An anti-interference monitoring circuit for high-power APFC combined environment

Abstract

The application provides an anti-interference monitoring circuit for a high-power APFC combined environment, comprising a control unit, an AC sampling unit and an anti-interference enabling unit. The AC sampling unit and the anti-interference enabling unit are connected with the control unit. The AC sampling unit samples the AC input voltage value of the APFC module and converts it into a DC signal for the control unit to judge. The control unit is connected with an upper computer through a CAN bus and communicates with the upper computer. The anti-interference enabling unit is connected with the enabling interface of the APFC module and enables and closes the APFC module according to the instruction of the control unit. The application is composed of an operational amplifier, a single-chip microcomputer and basic components, has the characteristics of simple circuit, high reliability, low cost and effective isolation of interference in the high-power APFC device, and is suitable for remote control in a long-distance and complex environment.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and in particular to an anti-interference monitoring circuit for high-power APFC combined environments. Background Technology

[0002] In current high-power and ultra-high-power applications, the importance of power factor correction and the trend towards power supply modularization are becoming increasingly apparent. The advantage of using high-power APFCs in parallel is that by connecting general-purpose functional modules in parallel, a new system can be constructed to achieve high-power output, thereby reducing product development cycles and improving system reliability.

[0003] However, parallel operation of multiple APFC modules can introduce several problems. For example, the enable signals of modules operating in parallel can interfere with each other, and the high power output after parallel operation can lead to stronger interference across the entire system. During remote control operation, the weak enable signal output by the control chip is susceptible to interference, causing high-power APFCs to fail to power on or to suddenly power off and restart after startup, resulting in system malfunction. Therefore, monitoring the operating status of multiple parallel APFC modules and ensuring the interference immunity of the enable circuits are crucial.

[0004] Currently, typical power enable circuits often use a single optocoupler or mechanical switch, achieving enable by shorting the optocoupler's secondary winding or closing the mechanical switch. While optocoupler enabling works fine in ordinary power supply applications, it is susceptible to interference in high-power APFC parallel environments, leading to system malfunctions. Although mechanical switches offer stronger anti-interference capabilities, they are limited by distance, requiring manual toggling of the switch on each power supply for enabling, making them unsuitable for modern, highly integrated remote control systems.

[0005] Secondly, monitoring the operating status of multiple APFC modules simultaneously requires collecting the input voltage status of each APFC module. The APFC module can only be powered on and operated when the external AC input voltage is normal; otherwise, it must be powered off to avoid damaging the APFC module. Since the input voltage is AC, the standard procedure requires a corresponding chip to convert the input AC signal into its root mean square (RMS) value and transmit it to the microcontroller to determine if the input voltage is abnormal. Summary of the Invention

[0006] This application provides an anti-interference monitoring circuit for high-power APFC combined environments, which can be used to solve the problem that the enable signal is easily interfered with in environments where multiple APFC modules are connected in parallel.

[0007] This application provides an anti-interference monitoring circuit for high-power APFC combined environments. The anti-interference monitoring circuit includes:

[0008] Control unit (2), AC sampling unit (1), and anti-interference enable unit (3);

[0009] Among them, the anti-interference enable unit (3) includes: eleventh resistor R11, fourth capacitor C4 to fifth capacitor C5, fifth diode V5, optocoupler U4, and relay D1;

[0010] The enable signal is connected to the anode of the diode in the primary winding of optocoupler U4 via the eleventh resistor R11. The fourth capacitor C4 is connected in parallel with the diode in the primary winding of optocoupler U4. The cathode of the diode in the primary winding of optocoupler U4 is grounded. The secondary winding of optocoupler U4 is connected in parallel with the fifth capacitor C5. The emitter of the secondary transistor of optocoupler U4 is grounded, and the collector is connected to the input terminal of relay D1. The other input terminal of the relay is connected to the cathode of diode V5. The anode of the fifth diode V5 is connected to +12V. The enable 1 and enable 2 signals of the APFC module are respectively connected to the two normally open contacts of relay D1.

[0011] Furthermore, the AC sampling unit (1) includes multiple resistors, including first resistor R1 to tenth resistor R10; multiple capacitors, including first capacitor C1 to third capacitor C3; multiple operational amplifiers, including first operational amplifier U1 to third operational amplifier U3; and multiple diodes, including first diode V1 to fourth diode V4.

[0012] The anode of the first diode V1 is connected to the inverting input of the first operational amplifier U1, and the cathode is connected to the output terminal of the first operational amplifier U1. The anode of the second diode V2 is connected to the output terminal of the first operational amplifier U1, and the cathode is connected to point a, which is the intersection of the cathodes of the second diode V2 and the fourth diode V4. The third resistor R3 is connected between the inverting input of the first operational amplifier U1 and point a. The anode of the third diode V3 is connected to the inverting input of the third operational amplifier U3, and the cathode is connected to the output terminal of the third operational amplifier U3. The anode of the fourth diode V4 is connected to the output terminal of the third operational amplifier U3, and the cathode is connected to point a. The tenth resistor R10 is connected between the inverting input of the third operational amplifier U3 and point a.

[0013] The AC input signal is fed into the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3 via the first resistor R1, the second resistor R2, the fourth resistor R4 and the first capacitor C1, respectively.

[0014] The fifth resistor R5 and the second capacitor C2 are connected in parallel, with one end connected to point a and the other end grounded. The sixth resistor R6 is connected to point a and the non-inverting input of the second operational amplifier U2. The seventh resistor R7 is connected between the inverting input of the second operational amplifier U2 and ground. The eighth resistor R8 and the third capacitor C3 are connected in parallel and then connected between the inverting input of the second operational amplifier U2 and the output, forming a negative feedback circuit. The ninth resistor R9 is connected to the output terminal of the second operational amplifier U2 to output a DC output signal.

[0015] Furthermore, the AC sampling unit (1) uses the non-inverting and inverting inputs of the first operational amplifier U1 and the third operational amplifier U3 to connect to the AC input signal, so that the circuit can charge the second capacitor C2 during the positive and negative cycles of the input AC signal, making the voltage at point a more stable and tending towards the DC voltage.

[0016] The DC voltage, as the root mean square reference value of the AC input signal, is output to the control unit (2) through the circuit formed by the second operational amplifier U2.

[0017] Furthermore, the input AC signal passes through the first resistor R1, the second resistor R2, and the fourth resistor R4 to the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3. When the AC input voltage is positive, the third operational amplifier U3 outputs a negative voltage, the fourth diode V4 is cut off, and the output of the third operational amplifier U3 has no effect on the voltage at point a. As the input voltage rises, since the voltage at the inverting input of the first operational amplifier U1 is equal to the voltage at point a, when the voltage at the non-inverting input of the first operational amplifier U1 is greater than the voltage at point a, the first operational amplifier U1 outputs a positive voltage close to 5V. This voltage charges the second capacitor C2 through the second diode V2, and the voltage at point a rises rapidly. When the input voltage is less than the voltage at point a, the first operational amplifier U1 outputs a negative voltage, the first diode V1 conducts, the second diode V2 is cut off, and the second capacitor C2 slowly discharges through the fifth resistor R5.

[0018] When the input voltage becomes negative, the voltage at point a is still positive. The voltage at the non-inverting input of the first op-amp U1 is less than the voltage at the inverting input, so the first op-amp U1 outputs a negative voltage, and the second diode V2 is cut off. At this time, the first op-amp U1 has no effect on the voltage at point a. Conversely, since the voltage at the non-inverting input of the third op-amp U3 is greater than the voltage at the inverting input, the output voltage of the third op-amp U3 is close to 5V positive. At this time, the fourth diode V4 is turned on, and the third diode V3 is cut off. The third op-amp U3 charges the second capacitor C2 quickly through the fourth diode V4, so that the second capacitor C2 is briefly and slowly discharged before being recharged.

[0019] The first operational amplifier U1 and the third operational amplifier U3 continuously and rapidly charge the second capacitor C2, while the second capacitor C2 slowly discharges intermittently. The voltage of the second capacitor C2 is close to the DC value and is proportional to the peak voltage of the input AC signal.

[0020] The voltage at point a passes through resistor R6 and enters the non-inverting input of op-amp U2. Resistors R7 and R8, along with capacitor C3 and op-amp U2, form a proportional circuit. If the voltage at point a is Va, then the output voltage of op-amp U2 is Va.

[0021] Furthermore, the first-stage enable circuit includes an eleventh resistor R11, a fourth capacitor C4, and an optocoupler U4. The enable port of the microcontroller is connected to one end of the eleventh resistor R11. A high level enables the circuit, and a low level disables it. When the enable signal is high, the primary winding of the optocoupler U4 is turned on, thus short-circuiting the secondary winding. At this time, the input terminals of relay D1 are connected to 12V and ground respectively, thereby turning on the relay. The normally open terminal of the relay is closed, and enable 1 and enable 2 are turned on, thus turning on the APFC module. Turning off the module is the opposite.

[0022] The anti-interference enable unit of this invention employs a two-stage circuit approach, solving the problem of enable signals being easily interfered with in environments with multiple high-voltage, high-power APFC modules connected in parallel. The main advantage of this circuit is that it divides the enable function into two stages: the first stage consists of the control chip's I / O port directly driving an optocoupler; the second stage consists of the first-stage optocoupler driving a relay via 12V DC power, combined with a filtering circuit. This design effectively protects the enable signal, increases the circuit's anti-interference capability, and ensures the circuit operates normally without interference in environments with multiple high-voltage, high-power APFC modules connected in parallel. Attached Figure Description

[0023] Figure 1 A schematic diagram of the control unit, AC sampling unit, and anti-interference enable unit circuit using the present invention is provided for an embodiment of this application.

[0024] Figure 2 A schematic diagram of an AC sampling unit provided in an embodiment of this application;

[0025] Figure 3 This is a schematic diagram of the anti-interference enable unit circuit provided in an embodiment of this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings. This invention employs three operational amplifiers to construct a sampling circuit, directly converting AC signals into corresponding DC signals for the microcontroller to determine whether the input voltage is normal.

[0027] The embodiments of this application will now be described in conjunction with the accompanying drawings.

[0028] This application provides an anti-interference monitoring circuit for high-power APFC combined environments. The anti-interference monitoring circuit includes:

[0029] Control unit (2), AC sampling unit (1), and anti-interference enable unit (3);

[0030] Among them, the anti-interference enable unit (3) includes: eleventh resistor R11, fourth capacitor C4 to fifth capacitor C5, fifth diode V5, optocoupler U4, and relay D1;

[0031] The enable signal is connected to the anode of the diode in the primary winding of optocoupler U4 via the eleventh resistor R11. The fourth capacitor C4 is connected in parallel with the diode in the primary winding of optocoupler U4. The cathode of the diode in the primary winding of optocoupler U4 is grounded. The secondary winding of optocoupler U4 is connected in parallel with the fifth capacitor C5. The emitter of the secondary transistor of optocoupler U4 is grounded, and the collector is connected to the input terminal of relay D1. The other input terminal of the relay is connected to the cathode of diode V5. The anode of the fifth diode V5 is connected to +12V. The enable 1 and enable 2 signals of the APFC module are respectively connected to the two normally open contacts of relay D1.

[0032] Furthermore, the AC sampling unit (1) includes multiple resistors, including first resistor R1 to tenth resistor R10; multiple capacitors, including first capacitor C1 to third capacitor C3; multiple operational amplifiers, including first operational amplifier U1 to third operational amplifier U3; and multiple diodes, including first diode V1 to fourth diode V4.

[0033] The anode of the first diode V1 is connected to the inverting input of the first operational amplifier U1, and the cathode is connected to the output terminal of the first operational amplifier U1. The anode of the second diode V2 is connected to the output terminal of the first operational amplifier U1, and the cathode is connected to point a, which is the intersection of the cathodes of the second diode V2 and the fourth diode V4. The third resistor R3 is connected between the inverting input of the first operational amplifier U1 and point a. The anode of the third diode V3 is connected to the inverting input of the third operational amplifier U3, and the cathode is connected to the output terminal of the third operational amplifier U3. The anode of the fourth diode V4 is connected to the output terminal of the third operational amplifier U3, and the cathode is connected to point a. The tenth resistor R10 is connected between the inverting input of the third operational amplifier U3 and point a.

[0034] The AC input signal is fed into the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3 via the first resistor R1, the second resistor R2, the fourth resistor R4 and the first capacitor C1, respectively.

[0035] The fifth resistor R5 and the second capacitor C2 are connected in parallel, with one end connected to point a and the other end grounded. The sixth resistor R6 is connected to point a and the non-inverting input of the second operational amplifier U2. The seventh resistor R7 is connected between the inverting input of the second operational amplifier U2 and ground. The eighth resistor R8 and the third capacitor C3 are connected in parallel and then connected between the inverting input of the second operational amplifier U2 and the output, forming a negative feedback circuit. The ninth resistor R9 is connected to the output terminal of the second operational amplifier U2 to output a DC output signal.

[0036] Furthermore, the AC sampling unit (1) uses the non-inverting and inverting inputs of the first operational amplifier U1 and the third operational amplifier U3 respectively to connect the AC input signal, so that the circuit can charge the second capacitor C2 in both the positive and negative cycles of the input AC signal, making the voltage at point a more stable and tending towards the DC voltage.

[0037] The DC voltage, as the root mean square reference value of the AC input signal, is output to the control unit (2) through the circuit formed by the second operational amplifier U2.

[0038] The sampling unit (1) uses only the non-inverting and inverting terminals of the first operational amplifier U1 and the third operational amplifier U3 to connect to the AC input signal without using any AC signal to DC signal chip. Through the design of diodes, resistors, capacitors and other devices, the circuit can charge the second capacitor C2 in both the positive and negative cycles of the input AC signal, so that the voltage at point a is more stable and tends to a DC voltage.

[0039] The DC voltage, as the root mean square reference value of the AC input signal, is output to the control unit (2) through the circuit formed by the second operational amplifier U2.

[0040] Specifically, in combination Figure 2 The AC sampling unit (1) includes: first resistor R1 to tenth resistor R10, first capacitor C1 to third capacitor C3, first diode V1 to fourth diode V4, and operational amplifiers, first operational amplifier U1 to third operational amplifier U3. The input AC signal passes through the first resistor R1, the second resistor R2, and the fourth resistor R4 to enter the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3. When the AC input voltage is positive, the third operational amplifier U3 outputs a negative voltage, the fourth diode V4 is cut off, and the output of the third operational amplifier U3 has no effect on the voltage at point a. As the input voltage rises, since the voltage at the inverting input of the first operational amplifier U1 is equal to the voltage at point a, when the voltage at the non-inverting input of the first operational amplifier U1 is greater than the voltage at point a, the first operational amplifier U1 outputs a positive voltage close to 5V, which charges the second capacitor C2 through the second diode V2, and the voltage at point a rises rapidly. When the input voltage is less than the voltage at point a, the first operational amplifier U1 outputs a negative voltage, the first diode V1 is turned on, the second diode V2 is cut off, and the second capacitor C2 discharges slowly through the fifth resistor R5.

[0041] When the input voltage becomes negative, the voltage at point a remains positive due to slow discharge. Therefore, the voltage at the non-inverting input of the first op-amp U1 is less than the voltage at the inverting input, resulting in a negative output voltage from the first op-amp U1. The second diode V2 is cut off, and the first op-amp U1 has no effect on the voltage at point a. Conversely, since the voltage at the non-inverting input of the third op-amp U3 is greater than the voltage at the inverting input, the output voltage of the third op-amp U3 is close to a positive 5V. At this time, the fourth diode V4 conducts, and the third diode V3 is cut off. The third op-amp U3 rapidly charges the second capacitor C2 through the fourth diode V4, causing the second capacitor C2 to discharge slowly for a short period before recharging.

[0042] Thus, as the input AC signal continuously cycles, the first operational amplifier U1 and the third operational amplifier U3 continuously and rapidly charge the second capacitor C2, while the second capacitor C2 slowly discharges intermittently. Throughout the process, the voltage of the second capacitor C2 is close to the DC value and is proportional to the peak voltage of the input AC signal.

[0043] The voltage at point a passes through the sixth resistor R6 and enters the non-inverting input of the second operational amplifier U2. The seventh resistor R7, the eighth resistor R8, the third capacitor C3, and the second operational amplifier U2 form a proportional circuit. If the voltage at point a is Va, then the output voltage of the second operational amplifier U2 is Va(1 + eighth resistor R8 / seventh resistor R7). This voltage value is sent to the microcontroller through the ninth resistor R9 for analysis.

[0044] Figure 3 The diagram shows the anti-interference enable circuit. The first-stage enable circuit includes an eleventh resistor R11, a fourth capacitor C4, and an optocoupler U4. The microcontroller's enable port is directly connected to one end of the eleventh resistor R11. A high level enables the signal, and a low level disables it. When the enable signal is high, the primary winding of optocoupler U4 conducts, short-circuiting the secondary winding. At this time, the input terminals of relay D1 are connected to 12V and ground respectively, thus turning on the relay. The normally open terminal of the relay closes, enabling 1 and enabling 2 conduct, thereby powering on the APFC module. Powering off is the opposite. The fifth diode V5 is connected in the +12V circuit to relay D1, filtering out reverse voltage interference. The fifth capacitor C5 is connected in parallel to the secondary winding of optocoupler U4, filtering out noise interference. Thus, through relay D1, the fifth diode V5, and the fifth capacitor C5, interference signals transmitted to the APFC via the enable signal line are blocked. This circuit design significantly reduces interference to the enable signal, allowing the APFC module to operate normally.

[0045] The anti-interference enable unit adopts a two-stage enable method using optocouplers and relays, combined with a circuit composed of diodes and capacitors. In high-power APFC combination environments, it has good anti-interference function and can ensure that the enable signal is not disturbed in high-voltage, high-power APFC combination applications.

[0046] The embodiments described above do not constitute a limitation on the scope of protection of this application.

Claims

1. An anti-interference monitoring circuit for high-power APFC combined environments, characterized in that, The anti-interference monitoring circuit includes: Control unit (2), AC sampling unit (1), and anti-interference enable unit (3); Among them, the anti-interference enable unit (3) includes: eleventh resistor R11, fourth capacitor C4 to fifth capacitor C5, fifth diode V5, optocoupler U4, and relay D1; The enable signal is connected to the anode of the diode in the primary winding of optocoupler U4 via the eleventh resistor R11. The fourth capacitor C4 is connected in parallel with the diode in the primary winding of optocoupler U4. The cathode of the diode in the primary winding of optocoupler U4 is grounded. The secondary winding of optocoupler U4 is connected in parallel with the fifth capacitor C5. The emitter of the secondary transistor of optocoupler U4 is grounded, and the collector is connected to the input terminal of relay D1. The other input terminal of the relay is connected to the cathode of diode V5. The anode of the fifth diode V5 is connected to +12V. The enable 1 and enable 2 signals of the APFC module are respectively connected to the two normally open contacts of relay D1.

2. The anti-interference monitoring circuit according to claim 1, characterized in that, The AC sampling unit (1) includes multiple resistors, including first resistor R1 to tenth resistor R10; multiple capacitors, including first capacitor C1 to third capacitor C3; multiple operational amplifiers, including first operational amplifier U1 to third operational amplifier U3; and multiple diodes, including first diode V1 to fourth diode V4. The anode of the first diode V1 is connected to the inverting input of the first operational amplifier U1, and the cathode is connected to the output terminal of the first operational amplifier U1. The anode of the second diode V2 is connected to the output terminal of the first operational amplifier U1, and the cathode is connected to point a, which is the intersection of the cathodes of the second diode V2 and the fourth diode V4. The third resistor R3 is connected between the inverting input of the first operational amplifier U1 and point a. The anode of the third diode V3 is connected to the inverting input of the third operational amplifier U3, and the cathode is connected to the output terminal of the third operational amplifier U3. The anode of the fourth diode V4 is connected to the output terminal of the third operational amplifier U3, and the cathode is connected to point a. The tenth resistor R10 is connected between the inverting input of the third operational amplifier U3 and point a. The AC input signal is fed into the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3 via the first resistor R1, the second resistor R2, the fourth resistor R4 and the first capacitor C1, respectively. The fifth resistor R5 and the second capacitor C2 are connected in parallel, with one end connected to point a and the other end grounded. The sixth resistor R6 is connected to point a and the non-inverting input of the second operational amplifier U2. The seventh resistor R7 is connected between the inverting input of the second operational amplifier U2 and ground. The eighth resistor R8 and the third capacitor C3 are connected in parallel and then connected between the inverting input of the second operational amplifier U2 and the output, forming a negative feedback circuit. The ninth resistor R9 is connected to the output terminal of the second operational amplifier U2 to output a DC output signal.

3. The anti-interference monitoring circuit as described in claim 2, characterized in that, The AC sampling unit (1) uses the non-inverting and inverting inputs of the first operational amplifier U1 and the third operational amplifier U3 respectively to connect the AC input signal, so that the circuit can charge the second capacitor C2 in both the positive and negative cycles of the input AC signal, making the voltage at point a more stable and tending towards the DC voltage. The DC voltage, as the root mean square reference value of the AC input signal, is output to the control unit (2) through the circuit formed by the second operational amplifier U2.

4. The anti-interference monitoring circuit as described in claim 3, characterized in that, The input AC signal passes through the first resistor R1, the second resistor R2, and the fourth resistor R4 to the non-inverting input of the first operational amplifier U1 and the inverting input of the third operational amplifier U3. When the AC input voltage is positive, the third operational amplifier U3 outputs a negative voltage, the fourth diode V4 is cut off, and the output of the third operational amplifier U3 has no effect on the voltage at point a. As the input voltage rises, since the voltage at the inverting input of the first operational amplifier U1 is equal to the voltage at point a, when the voltage at the non-inverting input of the first operational amplifier U1 is greater than the voltage at point a, the first operational amplifier U1 outputs a positive voltage close to 5V, which charges the second capacitor C2 through the second diode V2, and the voltage at point a rises rapidly. When the input voltage is less than the voltage at point a, the first operational amplifier U1 outputs a negative voltage, the first diode V1 conducts, the second diode V2 is cut off, and the second capacitor C2 discharges slowly through the fifth resistor R5. When the input voltage becomes negative, the voltage at point a is still positive. The voltage at the non-inverting input of the first op-amp U1 is less than the voltage at the inverting input, so the first op-amp U1 outputs a negative voltage, and the second diode V2 is cut off. At this time, the first op-amp U1 has no effect on the voltage at point a. Conversely, since the voltage at the non-inverting input of the third op-amp U3 is greater than the voltage at the inverting input, the output voltage of the third op-amp U3 is close to 5V positive. At this time, the fourth diode V4 is turned on, and the third diode V3 is cut off. The third op-amp U3 charges the second capacitor C2 quickly through the fourth diode V4, so that the second capacitor C2 is briefly and slowly discharged before being recharged. The first operational amplifier U1 and the third operational amplifier U3 continuously and rapidly charge the second capacitor C2, while the second capacitor C2 slowly discharges intermittently. The voltage of the second capacitor C2 is close to the DC value and is proportional to the peak voltage of the input AC signal. The voltage at point a passes through the sixth resistor R6 and enters the non-inverting input of the second operational amplifier U2. The seventh resistor R7, the eighth resistor R8, the third capacitor C3, and the second operational amplifier U2 form a proportional circuit. If the voltage at point a is Va, then the output voltage of the second operational amplifier U2 is Va.

5. The anti-interference monitoring circuit as described in claim 1, characterized in that, The first-stage enable circuit includes an eleventh resistor R11, a fourth capacitor C4, and an optocoupler U4. The enable port of the microcontroller is connected to one end of the eleventh resistor R11. A high level enables the circuit, and a low level disables it. When the enable signal is high, the primary winding of the optocoupler U4 is turned on, thus short-circuiting the secondary winding. At this time, the input terminals of relay D1 are connected to 12V and ground respectively, thereby turning on the relay. The normally open terminal of the relay is closed, and enable 1 and enable 2 are turned on, thus enabling the APFC module to power on. The reverse is true for powering off.

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