Quantum Circuit Simulation Method, Apparatus, Electronic Device, and Storage Medium
By identifying and processing quantum circuit diagrams, quantum gate matrix and connection matrix are generated, and fully automated identification and code conversion of quantum circuit diagrams are realized, which solves the problem of insufficient efficiency and accuracy in the existing technology, and improves the efficiency and accuracy of quantum circuit simulation.
Patent Information
- Application Number
- CN202311562383.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-21
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2043-11-21
AI Technical Summary
In the prior art, the identification and code conversion process of quantum circuit diagrams are lacking in automation, resulting in insufficient efficiency and accuracy of quantum circuit simulation.
By identifying the quantum circuit diagram, the type and position information of the quantum gate are obtained, the quantum gate matrix and the quantum gate connection matrix are generated, and simulated code is generated to realize the fully automated identification and code conversion of the quantum circuit diagram.
It improves the efficiency and accuracy of quantum line simulation, reduces the cost of manual identification, improves the acquisition efficiency of quantum gate position information and the generation reliability of simulation code.
Smart Images

Figure CN117669750B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of computer technologies, in particular to computer vision, quantum computing and other technical fields, and specifically relates to a quantum circuit simulation method, apparatus, electronic device and storage medium. Background Art
[0002] A quantum circuit is a graphical representation method used to describe and display the quantum gate operations and the interaction relationships between qubits in quantum computing. Identifying the image of a quantum circuit, converting it into code, and then obtaining the operation result through a quantum computing simulator is a key way to promote the development of the quantum computing field. Summary of the Invention
[0003] The present disclosure aims to solve at least one of the technical problems in the related art to some extent.
[0004] To this end, the purpose of the present disclosure is to provide a quantum circuit simulation method, apparatus, electronic device and storage medium, which can realize the full automation of quantum circuit diagram recognition and code conversion, and improve the efficiency and accuracy of quantum circuit simulation.
[0005] According to a first aspect of the present disclosure, there is provided a quantum circuit simulation method, including:
[0006] Identifying a quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram;
[0007] Based on the types and position information of the quantum gates, generating a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram, where the quantum gate matrix is used to represent the types and positions of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in a first direction;
[0008] Generating a simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix;
[0009] Running the simulation code to obtain a simulation result corresponding to the quantum circuit diagram.
[0010] According to a second aspect of the present disclosure, there is provided a quantum circuit simulation apparatus, including:
[0011] A first acquisition module, configured to identify a quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram;
[0012] The first generation module is configured to generate a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, where the quantum gate matrix is used to represent the type and position of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction;
[0013] The second generation module is configured to generate simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix;
[0014] The second acquisition module is configured to run the simulation code to obtain a simulation result corresponding to the quantum circuit diagram.
[0015] According to a third aspect of the present disclosure, there is provided an electronic device, including:
[0016] At least one processor; and
[0017] A memory communicatively connected to the at least one processor; wherein,
[0018] The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the quantum circuit simulation method as described in the first aspect.
[0019] According to a fourth aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium storing computer instructions, and the computer instructions are used to cause a computer to execute the quantum circuit simulation method as described in the first aspect.
[0020] According to a fifth aspect of the present disclosure, there is provided a computer program product, including computer instructions, and the computer instructions, when executed by a processor, implement the steps of the quantum circuit simulation method as described in the first aspect.
[0021] The quantum circuit simulation method, apparatus, electronic device, and storage medium provided by the present disclosure have the following beneficial effects:
[0022] In the present disclosure, by identifying the quantum circuit diagram to obtain a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram, and then generating simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix, the full automation of quantum circuit diagram recognition and code conversion is realized, improving the efficiency and accuracy of quantum circuit simulation.
[0023] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it used to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. Description of the Drawings
[0024] The above and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description of embodiments in conjunction with the accompanying drawings, which are used to better understand the present solution and do not constitute a limitation to the present disclosure, where:
[0025] Figure 1 is a schematic flowchart of a quantum circuit simulation method according to an embodiment of the present disclosure;
[0026] Figure 2 (a) is a schematic diagram of a quantum circuit provided by the present disclosure;
[0027] Figure 2 (b) is an example diagram of the corresponding relationship between a quantum gate matrix and a quantum gate connection matrix in the circuit diagram;
[0028] Figure 3 is a schematic flowchart of a quantum circuit simulation method according to another embodiment of the present disclosure;
[0029] Figure 4 is a schematic flowchart of a quantum circuit simulation method according to another embodiment of the present disclosure;
[0030] Figure 5 is a schematic structural diagram of a quantum circuit simulation device according to an embodiment of the present disclosure;
[0031] Figure 6 shows a block diagram of an exemplary electronic device suitable for implementing the embodiments of the present disclosure. Detailed Embodiments
[0032] The following describes exemplary embodiments of the present disclosure in conjunction with the accompanying drawings. Various details of the embodiments of the present disclosure are included to assist understanding, and they should be considered merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.
[0033] The embodiments of the present disclosure relate to technical fields such as computer vision and quantum computing.
[0034] Computer vision is a science that studies how to enable machines to "see". More specifically, it refers to using cameras and computers to replace human eyes for machine vision such as object recognition, tracking, and measurement, and further performing graphics processing to make the images processed by the computer more suitable for human eye observation or transmission to instruments for detection.
[0035] Quantum computing is a new type of computing mode that controls quantum information units according to the laws of quantum mechanics for computing. In contrast to traditional general-purpose computers, whose theoretical model is the universal Turing machine; for general quantum computers, the theoretical model is the universal Turing machine reinterpreted by the laws of quantum mechanics. From the perspective of computable problems, quantum computers can only solve the problems that traditional computers can solve. However, in terms of computing efficiency, due to the existence of the superposition property of quantum mechanics, some known quantum algorithms are faster than traditional general-purpose computers when dealing with problems.
[0036] The quantum circuit simulation method proposed in the embodiments of the present disclosure includes: identifying the quantum circuit diagram to be simulated to obtain the type and position information of the quantum gates included in the circuit diagram; generating a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, where the quantum gate matrix is used to represent the type and position of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction; generating simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix; and running the simulation code to obtain the simulation result corresponding to the quantum circuit diagram.
[0037] In the embodiments of the present disclosure, by identifying the quantum circuit diagram to obtain the corresponding quantum gate matrix and quantum gate connection matrix, and then generating the simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix, the full automation of quantum circuit diagram recognition and code conversion is realized, improving the efficiency and accuracy of quantum circuit simulation.
[0038] It can be understood that this quantum circuit simulation method can be applied to the field of quantum computing research, helping researchers quickly and accurately identify and convert quantum circuit diagrams, and generating the code of a quantum computing simulator, thereby improving the efficiency of quantum computing simulation and experiments. Secondly, this quantum circuit simulation method can also be applied to the development and optimization of quantum algorithms, helping researchers more conveniently design and implement complex quantum algorithms. In addition, this quantum circuit simulation method can also be applied to the fields of quantum communication and quantum security for processing and analyzing complex quantum communication networks.
[0039] It should be noted that the execution subject of the quantum circuit simulation method in this embodiment is a quantum circuit simulation device, which can be implemented in software and / or hardware, and this device can be configured in an electronic device, and the electronic device can include but is not limited to a server side, etc. In the embodiments of the present disclosure, the case where the quantum circuit simulation device is configured in a quantum circuit simulation system is taken as an example for description.
[0040] Next, the quantum circuit simulation method, device, electronic device, and storage medium of the embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0041] Figure 1 It is a schematic flowchart of a quantum circuit simulation method proposed according to an embodiment of the present disclosure.
[0042] As Figure 1 shown, the quantum circuit simulation method includes:
[0043] S101: Identify the quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram.
[0044] In the embodiment of the present disclosure, image recognition technology (such as OpenCV library, etc.) can be used to identify the quantum gates in the quantum circuit diagram to be simulated according to the template pictures corresponding to various types of quantum gates, so as to obtain the types and position information of the quantum gates included in the quantum circuit diagram.
[0045] It should be noted that before identifying the quantum circuit diagram to be simulated, if the resolution of the original circuit diagram is low or there are obvious noise points, the quantum circuit diagram can be subjected to fast non-local mean denoising processing and sharpening operations, etc.
[0046] Optionally, the quantum circuit diagram to be simulated can be traversed based on a reference quantum gate to obtain the quantum gates and the position information of the quantum gates whose similarity to the reference quantum gate in the circuit diagram is greater than a similarity threshold.
[0047] Among them, the reference quantum gate refers to the template picture used to identify different types of quantum gates, which can be obtained from the Internet or determined according to the content selected by the user in the quantum circuit diagram. The present disclosure does not limit this.
[0048] Among them, the similarity threshold can be adjusted according to the actual situation.
[0049] In the embodiment of the present disclosure, the reference quantum gate and the quantum circuit diagram to be simulated can be matched through the template matching algorithm of OpenCV to obtain a similarity matrix. For example, the reference quantum gate is slid on the quantum circuit diagram to be simulated according to a step value, and the similarity is calculated for each position. This similarity is usually calculated using a comparison method (such as the normalized correlation coefficient matching method, etc.).
[0050] It should be noted that the similarity matrix is a matrix used to store the similarity information of each position, and the size of the matrix is equal to the image size of the reference quantum gate divided by the step value.
[0051] Then, the relationship between the element values in the similarity matrix and the similarity threshold can be determined. When any element value is greater than the similarity threshold, the position information of the quantum gate corresponding to the element value can be output, and all the identified quantum gates can also be framed with a rectangle in the quantum circuit diagram.
[0052] It should be noted that after obtaining the position information of the quantum gates or the framed results of all the recognized quantum gates in the quantum circuit diagram, the user can judge whether the recognition result is incorrect according to the recognition result, and then adjust the similarity threshold to re-obtain the recognition result.
[0053] In the embodiments of the present disclosure, by determining the position information of the quantum gates based on the similarity between the reference quantum gates and each position in the quantum circuit diagram, the automatic recognition of the quantum gates in the circuit diagram can be realized, the cost of manual recognition can be reduced, and the acquisition efficiency of the position information of the quantum gates can be improved.
[0054] Optionally, the reference quantum gates can be segmented from the quantum circuit diagram to be simulated. When the quantum circuit diagram to be simulated contains a framed area, the grayscale matrix corresponding to the framed area can be determined first, and at least two specified row vectors and at least two specified column vectors in the grayscale matrix can be obtained. Then, according to the differences between adjacent element values in at least two specified row vectors, two boundary lines of the quantum gates contained in the framed area in the row direction are determined, and according to the differences between adjacent element values in at least two column vectors, two boundary lines of the quantum gates contained in the framed area in the column direction are determined. After that, the area in the framed area bounded by the two boundary lines in the row direction and the two boundary lines in the column direction is determined as a reference quantum gate.
[0055] Among them, the specified row vector or column vector can be the converted grayscale array of the row or column corresponding to the preset position in the framed area. For example, it can be the rows and columns at one-third and two-thirds of the area, and the present disclosure does not limit this.
[0056] Among them, the boundary line refers to the position where the grayscale of the image changes suddenly.
[0057] In the embodiments of the present disclosure, after the user uploads the quantum circuit to be simulated in the quantum circuit simulation system, each type of quantum gate in the circuit diagram can be manually framed. The quantum circuit simulation system can convert the image in each framed area into a grayscale matrix, and then extract the row vectors and column vectors corresponding to the preset positions in the grayscale matrix. After that, the differences between adjacent elements in each row vector and column vector can be calculated, and the element with the largest difference from the differences between adjacent two elements can be found, and the point corresponding to it in the image is determined as the boundary point. Then, according to the boundary points determined by at least two row vectors, two boundary lines of the quantum gate in the row direction can be obtained, and according to the boundary points determined by at least two column vectors, two boundary lines of the quantum gate in the column direction can be obtained, so that the area enclosed by the four boundary lines can be determined as a reference quantum gate.
[0058] In the embodiments of the present disclosure, by performing boundary cutting on the boxed area in the circuit diagram to determine the reference quantum gates, conditions can be provided for improving the efficiency and accuracy of identifying quantum gates in the quantum circuit diagram.
[0059] Optionally, in the case where the obtained position information may be deviated, in order to ensure the accuracy of the quantum circuit diagram during simulation, the difference between the coordinate values of every two position information in the same direction can be determined, and then in the case where any difference is less than the distance threshold, based on the average value of the two coordinate values corresponding to any difference, the two coordinate values are updated to obtain the position information including the updated coordinate values.
[0060] For example, the position information of the quantum gates is (230, 125), (288, 127), (482, 202), and (290, 202) respectively, and the distance threshold is 5. Since 290 - 288 = 2 < 5, the corresponding average value is 289, and 127 - 125 = 2 < 5, the corresponding average value is 126, then the updated position information is (230, 126), (289, 126), (482, 202), and (289, 202).
[0061] In the embodiments of the present disclosure, by calculating the average value of two adjacent coordinate values and then updating the position information using the average value, the error generated during the identification of quantum gates can be reduced, providing conditions for improving the accuracy of quantum circuit simulation.
[0062] S102: Generate a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates.
[0063] Among them, the quantum gate matrix is used to represent the type and position of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction.
[0064] In addition, the correspondence between the element values of each element in the quantum gate matrix and the quantum gate type can be as shown in Table 1 below. Table 1 is the correspondence between the elements of the quantum gate matrix and the quantum gate type.
[0065] Element value Quantum gate type Element value Quantum gate type 0 ID 8 TDG 1 X 9 RX 2 Y 10 RY 3 Z 11 RZ 4 H 12 Control 5 S 13 Target 6 SDG 14 MeasureZ 7 T 15 U
[0066] Table 1
[0067] In the embodiments of the present disclosure, a quantum gate matrix corresponding to the quantum circuit diagram can be generated according to the type and position information of the quantum gates, and then a corresponding quantum gate connection matrix can be generated according to whether there is a connection relationship between the quantum gates.
[0068] For example, Figure 2(a) is a schematic diagram of a quantum circuit diagram. After identifying all the quantum gates in the circuit diagram and obtaining the types and position information of the included quantum gates, the generated quantum gate matrix and quantum gate connection matrix can be as Figure 2 shown in (b). Figure 2 (b) is an example diagram of the correspondence between the gate matrix and the line matrix in the circuit diagram.
[0069] S103: Generate the simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix.
[0070] In the embodiments of the present disclosure, a nested loop in the order from left to right and from top to bottom can be used to traverse the quantum gate matrix and the quantum gate connection matrix. The traversal order is the columns of the outer loop matrix and the rows of the inner loop matrix. When looping to each row of a specific column in the quantum gate matrix, a pointer can be used in the quantum gate connection matrix to determine the qubits and / or quantum gate information associated with the quantum gate at that place. Then, according to the type of the quantum gate and the associated qubits and / or quantum gate information, the corresponding simulation code is generated. After traversing all the elements of the quantum gate matrix, the simulation code corresponding to the quantum circuit diagram can be generated.
[0071] S104: Run the simulation code to obtain the simulation result corresponding to the quantum circuit diagram.
[0072] In the embodiments of the present disclosure, after generating the simulation code, the user can choose to copy the code text or download the code file, and input the simulation code into a simulator, etc. to obtain the running result. Or, the simulation code can also be directly run in the quantum circuit simulation system to obtain the simulation result corresponding to the quantum circuit diagram.
[0073] In this embodiment, first, the quantum circuit diagram to be simulated is identified to obtain the types and position information of the quantum gates included in the circuit diagram. Then, based on the types and position information of the quantum gates, the corresponding quantum gate matrix and quantum gate connection matrix of the circuit diagram are generated. Then, based on the quantum gate matrix and the quantum gate connection matrix, the simulation code corresponding to the quantum circuit diagram is generated. After that, the simulation code is run to obtain the simulation result corresponding to the quantum circuit diagram. Thus, by identifying the quantum circuit diagram to obtain the corresponding quantum gate matrix and quantum gate connection matrix, and then generating the simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix, the full automation of quantum circuit diagram recognition and code conversion is realized, improving the efficiency and accuracy of quantum circuit simulation.
[0074] Figure 3 is a schematic flowchart of a quantum circuit simulation method proposed in another embodiment of the present disclosure.
[0075] AsFigure 3 As shown in ,
[0076] , the quantum circuit simulation method includes:
[0076] S301: Identify the quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram.
[0077] For the description of the above S301, specific reference can be made to the above embodiments, which will not be elaborated here.
[0078] S302: Generate a quantum gate matrix corresponding to the circuit diagram based on the types and position information of the quantum gates.
[0079] Among them, different element values in the quantum gate matrix correspond to different quantum gate types, and the number of rows of the quantum gate matrix is the same as the number of qubits included in the circuit diagram.
[0080] S303: Determine every two adjacent quantum gates in the first direction based on the first coordinate value in the first direction of the position information of each quantum gate.
[0081] Among them, the first direction refers to the direction perpendicular to the horizontal line representing the qubit in the quantum circuit. For example, in the case where the quantum gate coordinates are represented by the x - y coordinate system in the quantum circuit diagram, if the horizontal line is the x - axis, then the first direction is the y - axis direction.
[0082] In the embodiments of the present disclosure, since the quantum gates are on each line of the quantum circuit diagram and only adjacent qubits can interact with each other, when the coordinate values in the non - first direction in the position information of any two quantum gates are the same, every two adjacent quantum gates in the first direction can be determined based on the first coordinate value in the first direction of the position information of the quantum gates, and then it can be determined whether there is a connection line representing the interaction between the two quantum gates in the circuit diagram.
[0083] S304: Generate a quantum gate connection matrix according to whether there is a connection line between every two adjacent quantum gates in the first direction.
[0084] In the embodiments of the present disclosure, by traversing whether there is a connection line between every two adjacent quantum gates in the first direction in the quantum gate matrix and filling the corresponding element values at the corresponding positions in the matrix, a quantum gate connection matrix is generated. For example, 1 can be used to represent that there is a connection line, and 0 can be used to represent that there is no vertical connection line.
[0085] It can be understood that the number of rows of the quantum gate connection matrix is the number of qubits included in the circuit diagram minus 1.
[0086] Optionally, a reference coordinate value may be determined according to two first coordinate values of two adjacent quantum gates. Then, the gray values of each reference pixel point whose coordinate value in the first direction in the circuit diagram is the reference coordinate value are obtained, and whether the reference pixel points contain points in the connection line is determined according to the difference in gray values between every two adjacent reference pixel points. In the case where the reference pixel points contain points in the connection line, it can be determined that there is a connection line between the two quantum gates in the first direction.
[0087] Among them, the interval between each reference pixel point can be determined according to actual needs, and the present disclosure does not limit this.
[0088] In the embodiment of the present disclosure, when it is determined that two quantum gates are adjacent in the first direction, the intermediate value of the corresponding two first coordinate values may be determined as the reference coordinate value. For example, the coordinates of two adjacent quantum gates are (289, 126) and (289, 202), and the reference coordinate value may be (126 + 202) / 2 = 164. Then, the gray value of the reference pixel point whose coordinate value in the first direction in the circuit diagram is 164 can be determined, and then the difference in gray values between two adjacent reference pixel points is calculated, and the position where the reference pixel points with relatively large corresponding two gray value differences are located is determined as having a connection line. Thereby, the accuracy of the quantum gate connection matrix is improved, providing conditions for improving the reliability of quantum circuit simulation.
[0089] Optionally, in the case where the difference in gray values between any reference pixel point and two adjacent other reference pixel points is greater than the difference threshold, it can be determined that any reference pixel point is a point in the connection line. Or, in the case where the difference in gray values between any reference pixel point and two adjacent other reference pixel points is greater than other differences, it can also be determined that any reference pixel point is a point in the connection line.
[0090] Among them, the difference threshold is a value that can be determined according to the resolution of the circuit diagram.
[0091] In the embodiment of the present disclosure, by determining whether the reference pixel point is a point in the connection line based on the relationship between the difference in gray values corresponding to the reference pixel point and the difference threshold, or the relationship between the difference in gray values corresponding to other pixel points, the diversity of connection line recognition between quantum gates can be improved, further ensuring the accuracy of the quantum gate connection matrix, and providing conditions for improving the reliability of quantum circuit simulation.
[0092] Optionally, in the case where there is a connection line between two first quantum gates, it can be determined that the value of the first element in the quantum gate circuit matrix corresponding to the two first quantum gates is the first value. Or, in the case where there is no connection line between two second quantum gates, it is determined that the value of the second element in the quantum gate circuit matrix corresponding to the two second quantum gates is the second value.
[0093] Among them, the first value indicates the existence of a connection at the corresponding position in the quantum circuit diagram, and the second value indicates the non-existence of a connection at the corresponding position in the quantum circuit diagram. The two values can be set as needed. For example, the first value can be 0 and the second value can be 1.
[0094] In the embodiments of the present disclosure, by using different values to represent the connection situation at the corresponding positions in the quantum gate circuit matrix, the recognition result of the quantum circuit diagram can be made more intuitive, and further improve the efficiency of translating the quantum circuit diagram into simulation code.
[0095] S305: Generate simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix.
[0096] S306: Run the simulation code to obtain the simulation result corresponding to the quantum circuit diagram.
[0097] For the descriptions of S305 and S306 above, please refer to the above embodiments for details and will not be elaborated here.
[0098] In this embodiment, first, based on the type and position information of the quantum gates, a quantum gate matrix corresponding to the circuit diagram is generated. Then, based on the first coordinate value in the first direction in the position information of each quantum gate, every two adjacent quantum gates in the first direction are determined. Then, according to whether there is a connection between every two adjacent quantum gates in the first direction, a quantum gate connection matrix is generated. Thus, based on the type and position information of the quantum gates, a quantum gate matrix is obtained, and then according to whether there is a connection between adjacent quantum gates, a quantum gate connection matrix is obtained, making the obtained quantum gate connection matrix more reliable and providing conditions for improving the accuracy of quantum circuit simulation.
[0099] Figure 4 It is a schematic flowchart of a quantum circuit simulation method proposed in another embodiment of the present disclosure.
[0100] As Figure 4 shown, the quantum circuit simulation method includes:
[0101] S401: Identify the quantum circuit diagram to be simulated to obtain the type and position information of the quantum gates included in the circuit diagram.
[0102] S402: Generate a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates.
[0103] For the descriptions of S401 and S402 above, please refer to the above embodiments for details and will not be elaborated here.
[0104] S403: Traverse the quantum gate matrix, and according to the value of each third element in the quantum gate matrix, determine whether each third element corresponds to a quantum gate and the type of the corresponding quantum gate.
[0105] Among them, the third element refers to any element value in the quantum gate matrix, which is used to identify the type of the quantum gate and the position information in the quantum circuit diagram.
[0106] In the embodiments of the present disclosure, the quantum gate matrix can be traversed in a preset order, for example, in the nested loop order from left to right and from top to bottom. During the traversal, according to the value of each third element in the quantum gate matrix, it can be determined whether there is a corresponding quantum gate in the quantum circuit diagram for the third element, and the type of the corresponding quantum gate, and the corresponding relationship can be as shown in Table 1 above.
[0107] It should be noted that in the present disclosure, when the value of the third element is 0, it can be considered that there is no quantum gate at the corresponding position of the third element in the quantum circuit diagram, or, according to Table 1, it can be determined that the quantum gate here is an identity gate (Identity Gate, ID).
[0108] Optionally, the values of each third element included in each column vector in the quantum gate matrix can be traversed in sequence.
[0109] In the embodiments of the present disclosure, the column vectors in the quantum gate matrix can be traversed from left to right in sequence, and then when each column vector is traversed, the row index of the column is used as a pointer to traverse the values of each third element included in sequence. The initial value of the pointer is set to 0, and the value of the pointer is incremented by 1 for each traversed third element. Thus, the correlation relationship between the quantum gates in the vertical direction in the quantum circuit diagram can be analyzed more clearly and orderly, and the reliability of the code conversion result can be improved.
[0110] S404: When the element m in the i-th row and j-th column of the quantum gate matrix corresponds to the third quantum gate, based on the values of i and j, traverse the quantum gate connection matrix to obtain the element n associated with the element m in the quantum gate connection matrix.
[0111] In the embodiments of the present disclosure, when the element m in the i-th row and j-th column of the quantum gate matrix corresponds to the third quantum gate, based on the values of i and j, it can be determined that the element n in the i-th row and j-th column of the quantum gate connection matrix is associated with the element m.
[0112] S405: Determine the quantum and / or quantum gate information associated with the third quantum gate according to the value of the element n.
[0113] In the embodiments of the present disclosure, since the values of the elements in the quantum gate connection matrix represent whether there is an interaction between two adjacent quanta or quantum gates in the column direction, therefore, according to the element n, it can be determined whether the third quantum gate is associated with the adjacent quantum, and the quantum gate information acting on the quantum in the case of association.
[0114] Optionally, when the value of element n is the second value, the number of qubits associated with the third quantum gate can be determined to be 1. Alternatively, when the value of element n is the first value, the number of qubits associated with the third quantum gate can be determined to be greater than 1.
[0115] In the embodiments of the present disclosure, when the value of element n is the second value, it indicates that the third quantum gate is not connected to other quantum gates in the quantum circuit diagram. Therefore, the third quantum gate is only related to the qubits represented horizontally, and thus the number of qubits associated with the third quantum gate is 1. When the value of element n is the first value, it indicates that there is a connection relationship between the third quantum gate and other quantum gates in the quantum circuit diagram. Therefore, the number of qubits associated with the third quantum gate is at least 2. Thus, by determining the number of qubits associated with a quantum gate according to the value of the associated element of the quantum gate in the quantum gate connection matrix, it helps to ensure the accuracy of quantum circuit simulation.
[0116] Optionally, after determining that the number of qubits associated with the third quantum gate is greater than 1, the value of element m+1 in the i+1-th row and j-th column of the quantum gate matrix can be obtained. Then, according to the value of element m+1, it is determined whether element m+1 corresponds to a quantum gate. When element m+1 corresponds to the fourth quantum gate, the third quantum gate and the fourth quantum gate are stored in a preset quantum gate list, and then, from the quantum gate connection matrix, the element n+1 associated with element m+1 is obtained. After that, based on the value of element n+1, the operation of determining the number of qubits associated with the quantum gate is returned until the qubits and / or quantum gate information associated with the third quantum gate are determined.
[0117] In the embodiments of the present disclosure, after determining that the number of qubits associated with the third quantum gate is greater than 1, since the quantum gates in the quantum circuit may be single-qubit gates, two-qubit gates, or multi-qubit gates, it is necessary to continue traversing the quantum gate matrix and the connection matrix based on the third quantum gate to determine the types and numbers of quantum gates associated with the third quantum gate.
[0118] Therefore, the pointer can be incremented by 1 to obtain the value of element m+1 in the i+1-th row and j-th column of the quantum gate matrix. When it is determined that element m+1 corresponds to the fourth quantum gate, the fourth quantum gate is placed in the list corresponding to the third quantum gate, and then, from the quantum gate connection matrix, the element n+1 associated with element m+1 is obtained. Then, according to the value of element n+1, the number of qubits associated with the fourth quantum gate is determined... The above steps are cycled in turn until the value of the associated element in the determined quantum gate connection matrix is the second value, or the value of the pointer is equal to the number of rows of the quantum gate matrix minus 1, then the qubits and / or quantum gate information associated with the third quantum gate can be determined.
[0119] In the embodiments of the present disclosure, by alternately determining the element values in the quantum gate matrix and the connection matrix, the quantum and / or quantum gate information associated with the quantum gate can be determined, which can ensure the accuracy of multi-quantum gate recognition and further improve the reliability of quantum circuit simulation.
[0120] Optionally, when the element m + 1 does not correspond to a quantum gate, the element n + 1 in the quantum gate connection matrix can be obtained, where the element n + 1 is in the same column as the element n, and the element n + 1 is located in the row below the element n. Then, based on the value of the element n + 1, the operation of determining the number of quanta associated with the quantum gate can be returned until the quantum and / or quantum gate information associated with the third quantum gate is determined.
[0121] For example, as Figure 2 In the 4th column corresponding to the quantum circuit diagram in (b), since the element m in the 1st row and 4th column of the quantum gate matrix is 12, the corresponding third quantum gate is a Control gate, and the associated element n in the quantum gate connection matrix is 1 (i.e., the first value). The element m + 1 in the 2nd row and 4th column of the quantum gate matrix is 0, that is, there is no quantum gate corresponding to quantum x0, but it can be seen from the circuit diagram that this should be a three-quantum gate. Therefore, the element n + 1 in the quantum gate connection matrix can be obtained again. The value of the element n + 1 is 1, and it is obtained that the number of quanta associated here is greater than 1. Thus, the element m + 2 in the 3rd row and 4th column of the quantum gate matrix can be obtained, and its value is 3, and the corresponding quantum gate is a Z gate. Since the associated element n + 2 of this quantum gate in the connection matrix is 0, it can be determined that the quanta associated with the third quantum gate are x1, x0, and 0, as well as the Control gate and the Z gate.
[0122] In the embodiments of the present disclosure, when the element m + 1 does not correspond to a quantum gate, the element n + 1 in the quantum gate connection matrix located in the row below the element n is still judged, and then based on the value of the element n + 1, the quantum and / or quantum gate information associated with the quantum gate is determined. Thus, it can be avoided that when identifying multi-quantum gates in a circuit diagram, due to the quantum gate not being marked on the circuit corresponding to the intermediate quantum, the multi-quantum gate is misidentified as a single quantum gate, further improving the accuracy and reliability of quantum gate recognition.
[0123] S406: Generate the simulation code corresponding to the third quantum gate according to the type of the third quantum gate and the associated quantum and / or quantum gate information.
[0124] In the embodiments of the present disclosure, after determining the type of the third quantum gate and the associated quantum and / or quantum gate information, the type of the associated quantum gate can be determined according to Table 1, a new file can be created and written into the quantum simulation code text to generate the simulation code corresponding to the third quantum gate. Then, all the third quantum gates in the quantum gate matrix are traversed to obtain the simulation code corresponding to the quantum circuit diagram.
[0125] S407: Run the simulation code to obtain the simulation results corresponding to the quantum circuit diagram.
[0126] For the description of the above S407, please refer to the above embodiments for details and will not be elaborated here.
[0127] In this embodiment, first traverse the quantum gate matrix. According to the value of each third element in the quantum gate matrix, determine whether each third element corresponds to a quantum gate and the type of the corresponding quantum gate. Then, when the element m in the i-th row and j-th column of the quantum gate matrix corresponds to the third quantum gate, based on the values of i and j, traverse the quantum gate connection matrix to obtain the element n associated with the element m in the quantum gate connection matrix. After that, according to the value of the element n, determine the quantum and / or quantum gate information associated with the third quantum gate. Then, according to the type of the third quantum gate and the associated quantum and / or quantum gate information, generate the simulation code corresponding to the third quantum gate. Thus, the simulation code can be automatically generated through the quantum gate matrix and the quantum gate connection matrix, improving the generation efficiency and reliability of the simulation code, reducing the simulation cost, and further improving the efficiency and accuracy of quantum circuit simulation.
[0128] Figure 5 It is a schematic structural diagram of a quantum circuit simulation device proposed in an embodiment of the present disclosure.
[0129] As Figure 5 shown, the quantum circuit simulation device 500 includes:
[0130] The first acquisition module 501 is configured to identify the quantum circuit diagram to be simulated to obtain the type and position information of the quantum gates included in the circuit diagram;
[0131] The first generation module 502 is configured to generate a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, where the quantum gate matrix is used to represent the type and position of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction;
[0132] The second generation module 503 is configured to generate the simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix;
[0133] The second acquisition module 504 is configured to run the simulation code to obtain the simulation results corresponding to the quantum circuit diagram.
[0134] In some embodiments, the first acquisition module 501 is specifically configured to:
[0135] Traverse the quantum circuit diagram to be simulated based on a reference quantum gate to obtain the quantum gates in the circuit diagram whose similarity to the reference quantum gate is greater than the similarity threshold, and the position information of the quantum gates.
[0136] In some embodiments, the quantum circuit simulation device 500 further includes:
[0137] A first determination module, configured to determine a grayscale matrix corresponding to a selected area when the quantum circuit diagram to be simulated includes a selected area;
[0138] A third acquisition module, configured to acquire at least two specified row vectors and at least two specified column vectors in the grayscale matrix;
[0139] A second determination module, configured to determine two boundary lines of the quantum gates included in the selected area in the row direction according to the difference between adjacent element values in at least two specified row vectors;
[0140] A third determination module, configured to determine two boundary lines of the quantum gates included in the selected area in the column direction according to the difference between adjacent element values in at least two specified column vectors;
[0141] A fourth determination module, configured to determine, as a reference quantum gate, the area in the selected area that is bounded by two boundary lines in the row direction and two boundary lines in the column direction.
[0142] In some embodiments, wherein the first acquisition module 501 is further configured to:
[0143] Determine the difference between the coordinate values of every two position information in the same direction;
[0144] When any difference is less than the distance threshold, update the two coordinate values based on the average value of the two coordinate values corresponding to any difference to obtain the position information including the updated coordinate values.
[0145] In some embodiments, wherein the first generation module 502 is specifically configured to:
[0146] Generate a quantum gate matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, wherein different element values in the quantum gate matrix correspond to different quantum gate types, and the number of rows of the quantum gate matrix is the same as the number of qubits included in the circuit diagram;
[0147] Determine every two adjacent quantum gates in the first direction based on the first coordinate value in the first direction of the position information of each quantum gate;
[0148] Generate a quantum gate connection matrix according to whether there is a connection between every two adjacent quantum gates in the first direction.
[0149] In some embodiments, the first generation module 502 is further configured to:
[0150] Determine a reference coordinate value according to two first coordinate values of two adjacent quantum gates;
[0151] Obtain the grayscale values of each reference pixel point whose coordinate value in the first direction in the circuit diagram is the reference coordinate value;
[0152] Determine whether a point in the connection line is included in the reference pixel points according to the difference in grayscale values between every two adjacent reference pixel points;
[0153] When a point in the connection line is included in the reference pixel points, determine that there is a connection line between the two quantum gates in the first direction.
[0154] In some embodiments, the first generation module 502 is specifically configured to:
[0155] When the difference in grayscale values between any reference pixel point and two adjacent other reference pixel points is greater than the difference threshold, determine that any reference pixel point is a point in the connection line; or,
[0156] When the difference in grayscale values between any reference pixel point and two adjacent other reference pixel points is greater than other differences, determine that any reference pixel point is a point in the connection line.
[0157] In some embodiments, the first generation module 502 is specifically configured to:
[0158] When there is a connection line between two first quantum gates, determine that the value of the first element in the quantum gate circuit matrix corresponding to the two first quantum gates is the first value; or,
[0159] When there is no connection line between two second quantum gates, determine that the value of the second element in the quantum gate circuit matrix corresponding to the two second quantum gates is the second value.
[0160] In some embodiments, the second generation module 503 is specifically configured to:
[0161] Traverse the quantum gate matrix, and determine whether each third element corresponds to a quantum gate and the type of the corresponding quantum gate according to the value of each third element in the quantum gate matrix;
[0162] When the element m in the i-th row and j-th column in the quantum gate matrix corresponds to a third quantum gate, traverse the quantum gate connection matrix based on the values of i and j to obtain the element n associated with the element m in the quantum gate connection matrix;
[0163] Determine the quantum and / or quantum gate information associated with the third quantum gate according to the value of the element n;
[0164] Generate simulation code corresponding to the third quantum gate according to the type of the third quantum gate and the associated quantum and / or quantum gate information.
[0165] In some embodiments, the second generation module 503 is specifically configured to:
[0166] Traverse each third element value included in each column vector in the quantum gate matrix in sequence.
[0167] In some embodiments, the second generation module 503 is specifically configured to:
[0168] When the value of element n is the second value, determine that the number of quantum gates associated with the third quantum gate is 1;
[0169] When the value of element n is the first value, determine that the number of quantum gates associated with the third quantum gate is greater than 1.
[0170] In some embodiments, the second generation module 503 is further configured to:
[0171] Obtain the value of element m + 1 at the (i + 1)-th row and j-th column in the quantum gate matrix;
[0172] Determine whether element m + 1 corresponds to a quantum gate according to the value of element m + 1;
[0173] When element m + 1 corresponds to the fourth quantum gate, store the third quantum gate and the fourth quantum gate in a preset quantum gate list;
[0174] Obtain element n + 1 associated with element m + 1 from the quantum gate connection matrix;
[0175] Based on the value of element n + 1, return to perform the operation of determining the number of quantum gates associated with the quantum gate until the quantum and / or quantum gate information associated with the third quantum gate is determined.
[0176] In some embodiments, the second generation module 503 is further configured to:
[0177] When element m + 1 does not correspond to a quantum gate, obtain element n + 1 in the quantum gate connection matrix, where element n + 1 is in the same column as element n and element n + 1 is in the row below element n;
[0178] Based on the value of element n + 1, return to perform the operation of determining the number of quantum gates associated with the quantum gate until the quantum and / or quantum gate information associated with the third quantum gate is determined.
[0179] It should be noted that the foregoing explanation of the quantum circuit method also applies to the quantum circuit device of this embodiment, and will not be elaborated here.
[0180] In this embodiment, first, the quantum circuit diagram to be simulated is recognized to obtain the types and position information of the quantum gates included in the circuit diagram. Then, based on the types and position information of the quantum gates, a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram are generated. Then, based on the quantum gate matrix and the quantum gate connection matrix, a simulation code corresponding to the quantum circuit diagram is generated. After that, the simulation code is run to obtain the simulation result corresponding to the quantum circuit diagram. Thus, by recognizing the quantum circuit diagram and obtaining the quantum gate matrix and the quantum gate connection matrix to generate the simulation code corresponding to the quantum circuit diagram, the full automation of quantum circuit diagram recognition and code conversion can be achieved, improving the efficiency and accuracy of quantum circuit simulation.
[0181] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium, and a computer program product.
[0182] Figure 6 FIG. shows a schematic block diagram of an exemplary electronic device 600 that can be used to implement embodiments of the present disclosure. The electronic device is intended to represent various forms of digital computers, such as, for example, a laptop computer, a desktop computer, a workbench, a personal digital assistant, a server, a blade server, a mainframe computer, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as, for example, a personal digital processor, a cellular phone, a smart phone, a wearable device, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely exemplary and are not intended to limit the implementation of the present disclosure described and / or claimed herein.
[0183] As Figure 6 shown, the device 600 includes a computing unit 601 that can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 602 or a computer program loaded from a storage unit 608 into a random access memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the device 600 can also be stored. The computing unit 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.
[0184] A plurality of components in the device 600 are connected to the I / O interface 605, including: an input unit 606, such as a keyboard, a mouse, etc.; an output unit 607, such as various types of displays, speakers, etc.; a storage unit 608, such as a disk, an optical disc, etc.; and a communication unit 609, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 609 allows the device 600 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.
[0185] The computing unit 601 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 601 executes the various methods and processes described above, such as the quantum circuit simulation method. For example, in some embodiments, the quantum circuit simulation method can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 608. In some embodiments, part or all of the computer program can be loaded and / or installed onto the device 600 via the ROM 602 and / or the communication unit 609. When the computer program is loaded into the RAM 603 and executed by the computing unit 601, one or more steps of the quantum circuit simulation method described above can be executed. Alternatively, in other embodiments, the computing unit 601 can be configured to execute the quantum circuit simulation method by any other suitable means (e.g., by means of firmware).
[0186] The various embodiments of the systems and techniques described above in this document can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGA), application-specific integrated circuits (ASIC), application-specific standard products (ASSP), systems-on-chip (SOC), complex programmable logic devices (CPLD), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a dedicated or general-purpose programmable processor, receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting the data and instructions to the storage system, the at least one input device, and the at least one output device.
[0187] The program code for implementing the methods of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the program codes are executed by the processor or controller, the functions / operations specified in the flowchart and / or block diagram are implemented. The program code can be executed entirely on the machine, partially on the machine, as an independent software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0188] In the context of this disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0189] For purposes of providing an interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can also be used to provide an interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, speech input, or tactile input).
[0190] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer having a graphical user interface or a web browser through which the user can interact with an implementation of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of a communication network include: a local area network (LAN), a wide area network (WAN), the Internet, and a blockchain network.
[0191] A computer system may include a client and a server. The client and the server are generally far from each other and usually interact via a communication network. The relationship between the client and the server is generated by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or a cloud host, which is a host product in the cloud computing service system, solving the defects of difficult management and weak business scalability existing in traditional physical hosts and VPS services ("Virtual Private Server", or simply "VPS" for short). The server may also be a server of a distributed system or a server combined with a blockchain.
[0192] It should be understood that various forms of the processes shown above can be used, steps can be reordered, added or deleted. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and no limitations are imposed herein.
[0193] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of this disclosure, "a plurality" means at least two, such as two, three, etc., unless otherwise specifically and clearly defined. In the description of this disclosure, the words "if" and "when" can be interpreted as "when...", "while...", "in response to determining", or "in... case".
[0194] The above specific embodiments do not constitute a limitation on the protection scope of this disclosure. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure shall be included within the protection scope of this disclosure.
Claims
1. A quantum circuit simulation method, characterized in that, Including: Identifying a quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram; Generating a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the types and position information of the quantum gates, where the quantum gate matrix is used to represent the types and positions of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction; Generating a simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix; Running the simulation code to obtain a simulation result corresponding to the quantum circuit diagram; The generating a simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix includes: Traversing the quantum gate matrix, and determining whether each third element in the quantum gate matrix corresponds to a quantum gate and the type of the corresponding quantum gate according to the value of each third element in the quantum gate matrix; When the element m in the i-th row and j-th column in the quantum gate matrix corresponds to a third quantum gate, traversing the quantum gate connection matrix based on the values of i and j to obtain an element n associated with the element m in the quantum gate connection matrix; Determining the quantum and / or quantum gate information associated with the third quantum gate according to the value of the element n; Generating a simulation code corresponding to the third quantum gate according to the type of the third quantum gate and the associated quantum and / or quantum gate information.
2. The method according to claim 1, wherein The identifying a quantum circuit diagram to be simulated to obtain the types and position information of the quantum gates included in the circuit diagram includes: Traversing the quantum circuit diagram to be simulated based on a reference quantum gate to obtain the quantum gates in the circuit diagram whose similarity to the reference quantum gate is greater than a similarity threshold, and the position information of the quantum gates.
3. The method according to claim 2, wherein The method further includes: When the quantum circuit diagram to be simulated includes a selected area, determining a grayscale matrix corresponding to the selected area; Obtaining at least two specified row vectors and at least two specified column vectors in the grayscale matrix; Determining two boundary lines of the quantum gates included in the selected area in the row direction according to the difference between adjacent element values in the at least two specified row vectors; Determining two boundary lines of the quantum gates included in the selected area in the column direction according to the difference between adjacent element values in the at least two specified column vectors; Determining the area bounded by the two boundary lines in the row direction and the two boundary lines in the column direction in the selected area as one of the reference quantum gates.
4. The method according to claim 1, wherein After obtaining the types and position information of the quantum gates included in the circuit diagram, it further includes: Determining the difference between the coordinate values of each two position information in the same direction; When any difference is less than a distance threshold, updating the two coordinate values based on the average value of the two coordinate values corresponding to the any difference to obtain position information including the updated coordinate values.
5. The method according to claim 1, characterized in that, Generating the quantum gate matrix and the quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, includes: Generating the quantum gate matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, wherein different element values in the quantum gate matrix correspond to different quantum gate types, and the number of rows of the quantum gate matrix is the same as the number of qubits included in the circuit diagram; Determining every two adjacent quantum gates in the first direction based on the first coordinate value in the first direction in the position information of each quantum gate; Generating the quantum gate connection matrix according to whether there is a connection between every two adjacent quantum gates in the first direction.
6. The method according to claim 5, wherein Before generating the quantum gate connection matrix according to whether there is a connection between every two adjacent quantum gates in the first direction, it further includes: Determining a reference coordinate value according to the two first coordinate values of the two adjacent quantum gates; Obtaining the gray scale values of each reference pixel point with the coordinate value in the first direction in the circuit diagram being the reference coordinate value; Determining whether the reference pixel points contain points on the connection line according to the gray scale value difference between every two adjacent reference pixel points; In the case that the reference pixel points contain points on the connection line, determining that there is a connection between the two quantum gates in the first direction.
7. The method according to claim 6, wherein Determining whether the reference pixel points contain points on the connection line according to the gray scale value difference between every two adjacent reference pixel points, includes: In the case that the gray scale value difference between any reference pixel point and two adjacent other reference pixel points is greater than the difference threshold, determining that the any reference pixel point is a point on the connection line; or, In the case that the gray scale value difference between any reference pixel point and two adjacent other reference pixel points is greater than other differences, determining that the any reference pixel point is a point on the connection line.
8. The method according to claim 5, wherein Generating the quantum gate connection matrix according to whether there is a connection between every two adjacent quantum gates in the first direction, includes: In the case that there is a connection between two first quantum gates, determining that the value of the first element in the quantum gate circuit matrix corresponding to the two first quantum gates is the first value; or, In the case that there is no connection between two second quantum gates, determining that the value of the second element in the quantum gate circuit matrix corresponding to the two second quantum gates is the second value.
9. The method according to claim 1, wherein Traversing the quantum gate matrix, includes: Traversing each third element value included in each column vector in the quantum gate matrix in turn.
10. The method according to claim 1, wherein Determining the number of quanta associated with the third quantum gate according to the value of element n, includes: In the case that the value of element n is the second value, determining that the number of quanta associated with the third quantum gate is 1; or, In the case that the value of element n is the first value, determining that the number of quanta associated with the third quantum gate is greater than 1.
11. The method according to claim 10, wherein After determining that the number of quanta associated with the third quantum gate is greater than 1, it further includes: Obtaining the value of element m + 1 in the (i + 1)-th row and the j-th column in the quantum gate matrix; Determining whether element m + 1 corresponds to a quantum gate according to the value of element m + 1. When the element m + 1 corresponds to the fourth quantum gate, store the third quantum gate and the fourth quantum gate in a preset quantum gate list; Obtain the element n + 1 associated with the element m + 1 from the quantum gate connection matrix; Based on the value of the element n + 1, return and execute the operation of determining the number of quanta associated with the quantum gate until the quanta and / or quantum gate information associated with the third quantum gate are determined.
12. The method according to claim 11, wherein After determining whether the element m + 1 corresponds to a quantum gate according to the value of the element m + 1, it further includes: When the element m + 1 does not correspond to a quantum gate, obtain the element n + 1 in the quantum gate connection matrix, where the element n + 1 is in the same column as the element n, and the element n + 1 is in the row below the element n; Based on the value of the element n + 1, return and execute the operation of determining the number of quanta associated with the quantum gate until the quanta and / or quantum gate information associated with the third quantum gate are determined.
13. A quantum circuit simulation device, characterized in that, It includes: A first acquisition module, configured to identify the quantum circuit diagram to be simulated to obtain the type and position information of the quantum gates included in the circuit diagram; A first generation module, configured to generate a quantum gate matrix and a quantum gate connection matrix corresponding to the circuit diagram based on the type and position information of the quantum gates, where the quantum gate matrix is used to represent the type and position of each quantum gate in the quantum circuit diagram, and the quantum gate connection matrix is used to represent the connection state of the quantum gates in the first direction; A second generation module, configured to generate a simulation code corresponding to the quantum circuit diagram based on the quantum gate matrix and the quantum gate connection matrix; A second acquisition module, configured to run the simulation code to obtain a simulation result corresponding to the quantum circuit diagram; The second generation module is specifically configured to: Traverse the quantum gate matrix, and determine whether each third element corresponds to a quantum gate and the type of the corresponding quantum gate according to the value of each third element in the quantum gate matrix; When the element m in the i-th row and j-th column of the quantum gate matrix corresponds to the third quantum gate, based on the values of i and j, traverse the quantum gate connection matrix to obtain the element n associated with the element m in the quantum gate connection matrix; Determine the quanta and / or quantum gate information associated with the third quantum gate according to the value of the element n; Generate a simulation code corresponding to the third quantum gate according to the type of the third quantum gate and the associated quanta and / or quantum gate information.
14. The device according to claim 13, characterized in that, The first acquisition module is specifically configured to: Traverse the quantum circuit diagram to be simulated based on a reference quantum gate to obtain the quantum gates in the circuit diagram whose similarity to the reference quantum gate is greater than a similarity threshold, and the position information of the quantum gates.
15. The device according to claim 14, characterized in that, The device further includes: A first determination module, configured to determine a grayscale matrix corresponding to the selected area when the quantum circuit diagram to be simulated includes a selected area; A third acquisition module, configured to obtain at least two specified row vectors and at least two specified column vectors in the grayscale matrix; A second determination module, configured to determine two boundary lines of a quantum gate included in the boxed area in the row direction according to differences between adjacent element values in the at least two specified row vectors; A third determination module, configured to determine two boundary lines of a quantum gate included in the boxed area in the column direction according to differences between adjacent element values in the at least two specified column vectors; A fourth determination module, configured to determine, as a reference quantum gate, an area in the boxed area that is bounded by the two boundary lines in the row direction and the two boundary lines in the column direction; 16. The device according to claim 13, characterized in that, The first acquisition module is further configured to: Determine differences between coordinate values of each two position information in the same direction; In a case where any difference is less than a distance threshold, update the two coordinate values based on an average value of the two coordinate values corresponding to the any difference, so as to obtain position information including the updated coordinate values.
17. The device according to claim 13, characterized in that, The first generation module is specifically configured to: Generate a quantum gate matrix corresponding to the circuit diagram based on the type and position information of the quantum gate, where different element values in the quantum gate matrix correspond to different quantum gate types, and the number of rows of the quantum gate matrix is the same as the number of qubits included in the circuit diagram; Determine every two adjacent quantum gates in a first direction based on a first coordinate value in the first direction of the position information of each quantum gate; Generate the quantum gate connection matrix according to whether there is a connection between every two adjacent quantum gates in the first direction.
18. The device according to claim 17, wherein, The first generation module is further configured to: Determine a reference coordinate value according to two first coordinate values of two adjacent quantum gates; Obtain gray scale values of respective reference pixel points in the circuit diagram whose coordinate values in the first direction are the reference coordinate value; Determine whether the reference pixel points include points on a connection line according to differences between gray scale values of every two adjacent reference pixel points; In a case where the reference pixel points include points on a connection line, determine that there is a connection between the two quantum gates in the first direction.
19. The device according to claim 17, characterized in that, The first generation module is specifically configured to: In a case where differences between gray scale values of any reference pixel point and two adjacent other reference pixel points are all greater than a difference threshold, determine that the any reference pixel point is a point on the connection line; or In a case where differences between gray scale values of any reference pixel point and two adjacent other reference pixel points are all greater than other differences, determine that the any reference pixel point is a point on the connection line.
20. The device according to claim 17, wherein The first generation module is specifically configured to: In a case where there is a connection between two first quantum gates, determine that a value of a first element in a quantum gate circuit matrix corresponding to the two first quantum gates is a first value; or In a case where there is no connection between two second quantum gates, determine that a value of a second element in a quantum gate circuit matrix corresponding to the two second quantum gates is a second value.
21. The device according to claim 13, wherein, The second generation module is specifically configured to: Traverse each third element value included in each column vector in the quantum gate matrix in sequence.
22. The device according to claim 13, wherein The second generation module is specifically configured to: When the value of the element n is the second value, determine that the number of qubits associated with the third quantum gate is 1; or, When the value of the element n is the first value, determine that the number of qubits associated with the third quantum gate is greater than 1.
23. The device according to claim 22, characterized in that, The second generation module is further configured to: Obtain the value of the element m+1 at the (i+1)-th row and the j-th column in the quantum gate matrix; Determine whether the element m+1 corresponds to a quantum gate according to the value of the element m+1; When the element m+1 corresponds to a fourth quantum gate, store the third quantum gate and the fourth quantum gate into a preset quantum gate list; Obtain the element n+1 associated with the element m+1 from the quantum gate connection matrix; Based on the value of the element n+1, return to perform the operation of determining the number of qubits associated with the quantum gate until the qubits and / or quantum gate information associated with the third quantum gate are determined.
24. The device according to claim 23, wherein The second generation module is further configured to: When the element m+1 does not correspond to a quantum gate, obtain the element n+1 in the quantum gate connection matrix, where the element n+1 is in the same column as the element n and the element n+1 is in the row below the element n; Based on the value of the element n+1, return to perform the operation of determining the number of qubits associated with the quantum gate until the qubits and / or quantum gate information associated with the third quantum gate are determined.
25. An electronic device, comprising: At least one processor; And A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the quantum circuit simulation method according to any one of claims 1-12.
26. A non-transitory computer-readable storage medium storing computer instructions, characterized in that, Wherein, The computer instructions are used to cause the computer to execute the quantum circuit simulation method according to any one of claims 1-12.
27. A computer program product, characterized in that, Including a computer program, the computer program realizes the steps of the quantum circuit simulation method according to any one of claims 1-12 when executed by a processor.
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