Packaging method

Abstract

A packaging method includes: providing a plurality of wafers, each wafer including a bonding surface, and the wafers including a first wafer and a second wafer; performing edge thinning on the first wafer and / or the second wafer, thinning a portion of the wafer width along the edge of the first wafer and / or the second wafer from one side of the bonding surface, such that the thickness of the edge of the first wafer and / or the second wafer is less than the thickness of the remaining portion; forming a temporary protective film on the bonding surface, exposing the wafer edge; after forming the temporary protective film on the bonding surface, performing edge cleaning on the wafer; after performing edge cleaning on the wafer, removing the temporary protective film on the bonding surface; after removing the temporary protective film, bonding the first wafer and the second wafer, with the bonding surfaces of the first wafer and the second wafer facing each other. This invention improves packaging reliability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and more particularly to a packaging method. Background Technology

[0002] In semiconductor manufacturing, with the development trend of very large-scale integrated circuits, the feature size of integrated circuits continues to shrink. Correspondingly, the packaging requirements for integrated circuits are also increasing. Based on the two-dimensional packaging in the X and Y planes of multi-chip modules (MCMs), 3D packaging technology stacked along the Z direction has been fully developed, and the 3D packaging technology has higher density.

[0003] Three-dimensional integrated circuits (3D ICs) are fabricated using advanced chip stacking technology, which stacks chips with different functions into an integrated circuit with a three-dimensional structure. Compared to two-dimensional integrated circuits, the stacking technology of 3D ICs not only shortens the signal transmission path but also increases the operating speed, thereby meeting the demands of semiconductor devices for higher performance, smaller size, lower power consumption, and more functions.

[0004] Based on the different methods of interconnecting chips in 3D integrated circuits, the technologies that enable stacked chips to interconnect are divided into wire bonding, flip-chip bonding, and through-silicon via (TSV) packaging. Among these, TSV packaging technology has become the most commonly used method for interconnecting stacked chips in 3D integrated circuits because it can increase the density of chip stacking in three dimensions, shorten the interconnect lines between chips, reduce the overall size, and significantly improve chip speed and low power consumption. Summary of the Invention

[0005] The problem addressed by the embodiments of the present invention is to provide a packaging method that improves packaging reliability.

[0006] To address the aforementioned problems, embodiments of the present invention provide a packaging method, comprising: providing a plurality of wafers, each wafer including a bonding surface, and the wafer including a first wafer and a second wafer; performing edge thinning processing on the first wafer and / or the second wafer, thinning a portion of the wafer width along the edge of the first wafer and / or the second wafer from one side of the bonding surface, such that the thickness of the edge of the first wafer and / or the second wafer is less than the thickness of the remaining portion; forming a temporary protective film on the bonding surface, exposing the wafer edge; after forming the temporary protective film on the bonding surface, performing edge cleaning processing on the wafer; after performing edge cleaning processing on the wafer, removing the temporary protective film on the bonding surface; after removing the temporary protective film, bonding the first wafer and the second wafer together, wherein the bonding surfaces of the first wafer and the second wafer are positioned opposite each other.

[0007] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0008] In the packaging method provided by this invention, after forming a temporary protective film on the bonding surface, the wafer is subjected to edge cleaning treatment. After edge cleaning treatment, the temporary protective film is removed, and then the first wafer and the second wafer are bonded together. In this invention, forming a temporary protective film on the bonding surface and then performing edge cleaning treatment on the wafer helps to reduce the probability of damage to the area inside the wafer edge caused by edge cleaning treatment. This reduces the probability of void defects at the bonding surface after the first wafer and the second wafer are bonded due to wafer surface damage, thereby improving the bonding effect of the first wafer and the second wafer and correspondingly improving the packaging reliability. Attached Figure Description

[0009] Figures 1 to 4 This is a structural diagram showing the steps in an encapsulation method.

[0010] Figures 5 to 10 This is a schematic diagram of the structure corresponding to each step in one embodiment of the packaging method of the present invention. Detailed Implementation

[0011] As the background technology shows, current packaging reliability needs improvement. This paper analyzes the reasons why packaging reliability needs to be improved using a specific packaging method.

[0012] Figures 1 to 4 This is a structural diagram showing the steps in an encapsulation method.

[0013] refer to Figure 1 The facility provides multiple wafers 10, each wafer 10 including a bonding surface 10a on which a bonding pad 20 is formed, and each wafer 10 including a first wafer 11 and a second wafer 12.

[0014] refer to Figure 2 Edge cleaning was performed on wafer 10.

[0015] The bonding pads 20 formed on the bonding surface 10a are made of metal. During the manufacturing process of the wafer 10, metal residues are usually left on the edge of the wafer 10, so edge cleaning is required. However, during the edge cleaning process, the sputtering of the cleaning solution and the difficulty in controlling the cleaning boundary can easily damage the bonding pads 20 on the bonding surface 10a, or even remove some of the bonding pads 20, resulting in damage and depressions on the bonding surface 10a.

[0016] In existing technologies, a pad material layer that fills the bonding surface and covers the bonding surface can be formed in a pad groove. Then, the wafer is edge-cleaned. After edge cleaning, the pad material layer is planarized to remove the pad material layer that is higher than the bonding surface, and the pad material layer located in the pad groove is retained as the pad. However, this method is prone to damage to the pad material layer on the bonding surface due to the sputtering of the cleaning solution and the difficulty in controlling the cleaning boundary. It may even clean and remove part of the pad material layer in the pad groove, resulting in bonding surface damage and depression problems.

[0017] refer to Figure 3 The first wafer 11 and the second wafer 12 are bonded together, with the bonding surfaces 10a of the first wafer 11 and the second wafer 12 arranged opposite to each other.

[0018] Due to damage and depressions in the bonding surface 10a, void defects are easily generated at the bonding surface 10a after the first wafer 11 and the second wafer 12 are bonded together. This reduces the contact area of ​​the bonding surface 10a of the first wafer 11 and the second wafer 12, affecting the bonding effect of the first wafer 11 and the second wafer 12, and consequently affecting the packaging reliability.

[0019] refer to Figure 4 After bonding the first wafer 11 and the second wafer 12 together, the first wafer 11 is subjected to back-side thinning.

[0020] Due to void defects at the bonding surface 10a of the first wafer 11 and the second wafer 12, breakage is likely to occur at the location of void defects during back-side thinning. The breakage location will also extend further, causing breakage to occur at locations without void defects, thus affecting the packaging yield.

[0021] To address the aforementioned problems, embodiments of the present invention provide a packaging method, comprising: providing a plurality of wafers, each wafer including a bonding surface, and the wafer including a first wafer and a second wafer; performing edge thinning processing on the first wafer and / or the second wafer, thinning a portion of the wafer width along the edge of the first wafer and / or the second wafer from one side of the bonding surface, such that the thickness of the edge of the first wafer and / or the second wafer is less than the thickness of the remaining portion; forming a temporary protective film on the bonding surface, exposing the wafer edge; after forming the temporary protective film on the bonding surface, performing edge cleaning processing on the wafer; after performing edge cleaning processing on the wafer, removing the temporary protective film on the bonding surface; after removing the temporary protective film, bonding the first wafer and the second wafer together, wherein the bonding surfaces of the first wafer and the second wafer are positioned opposite each other.

[0022] In this embodiment of the invention, after forming a temporary protective film on the bonding surface, the wafer is subjected to edge cleaning treatment, which helps to reduce the probability of damage to the position inside the wafer edge caused by the edge cleaning treatment. This reduces the probability of void defects at the bonding surface after the first wafer and the second wafer are bonded due to wafer surface damage, thereby improving the bonding effect of the first wafer and the second wafer and correspondingly improving the packaging reliability.

[0023] To make the above-mentioned objects, features and advantages of the embodiments of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0024] Figures 5 to 10 This is a schematic diagram of the structure corresponding to each step in one embodiment of the packaging method of the present invention.

[0025] refer to Figure 5 Provides multiple wafers 100, each wafer 100 including a bonding surface 100a, and each wafer 100 including a first wafer 110 (e.g. Figure 5 (a) shown) and the second wafer 120 (as shown) Figure 5 (b) is shown.

[0026] In this embodiment, the packaging method is used to achieve wafer-level system packaging, and wafer 100 is used to bond to each other in subsequent processes.

[0027] In this embodiment, the wafer 100 is fabricated using integrated circuit manufacturing technology. The wafer 100 includes a substrate 111 and a circuit structure layer 121 located on the substrate 111. The bonding surface 100a is the exposed surface of the circuit structure layer 121. After the bonding between the wafers 100 is subsequently achieved, the electrical connection between the circuit structure layers 121 of the wafers 100 can be realized, thereby realizing the normal function of the packaging structure.

[0028] As an example, the substrate 111 of wafer 100 is a silicon substrate. In other embodiments, the substrate material may also be other materials such as germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium ionide, and the substrate may also be other types of substrates such as silicon-on-insulator substrate or germanium-on-insulator substrate.

[0029] In this embodiment, interconnect pads 200 are formed on the bonding surface 100a of wafer 100 to realize electrical connections between the circuit structure layers of wafer 100 in the subsequent bonding steps between wafers 100.

[0030] In this embodiment, the interconnect pad 200 is made of a conductive material. Specifically, the interconnect pad 200 may be made of one or more of the following materials: copper, titanium, aluminum, gold, nickel, iron, tin, silver, zinc, or chromium, which provide good conductivity.

[0031] Continue to refer to Figure 5 Edge thinning processing is performed on the first wafer 110 and / or the second wafer 120, thinning a portion of the width of the wafer 100 along the edge of the first wafer 110 and / or the second wafer 120 from the bonding surface 100a side, such that the thickness of the edge of the first wafer 110 and / or the second wafer 120 is less than the thickness of the remaining portion.

[0032] In this embodiment, edge thinning of the first wafer 110 is taken as an example.

[0033] After bonding the first wafer 110 and the second wafer 120, a back-side thinning process is required for the first wafer 110 and / or the second wafer 120. Since the edge of wafer 100 is typically arc-shaped, the remaining arc-shaped edge of wafer 100 is prone to breakage during the back-side thinning process. Therefore, edge thinning is performed on the first wafer 110, thinning a portion of the width of the first wafer 110 along the edge from the bonding surface 100a side. This results in the edge of the first wafer 110 located on the bonding surface 100a side having a vertical surface shape. Consequently, the surface of the first wafer 110 has a stepped appearance (e.g., ...). Figure 5 (as shown in (a)) thus, when performing back-side thinning on the first wafer 110 in the subsequent process, the portion of the first wafer 110 that has not undergone edge thinning is removed, and the remaining first wafer 110 has a vertical sidewall morphology, which helps to avoid the first wafer 110 from breaking during the back-side thinning process as much as possible.

[0034] In this embodiment, in the step of performing edge thinning processing on the first wafer 110 and / or the second wafer 120, the edge thinning processing is performed on the portion of the first wafer 110 and / or the second wafer 120 that is close to the bonding surface 100a.

[0035] The first wafer 110 will be thinned on the back side in the future. Therefore, the part of the first wafer 110 that will be removed in the future does not need to be thinned at the edge, which helps to reduce the workload of the process. Moreover, the side facing away from the bonding surface 100a serves as the bearing surface for subsequent processes. Therefore, the edge thinning of the first wafer 110 near the bonding surface 100a is performed to retain a larger bearing area of ​​the bearing surface, which helps to ensure the bearing function of the bearing surface.

[0036] Specifically, in this embodiment, in the step of performing edge thinning processing on the first wafer 110 with a portion of its thickness near the bonding surface 100a, a portion of the width of the circuit structure layer 121 is removed from one side of the bonding surface 100a, and at the same time, a portion of the thickness of the substrate 111 corresponding to that portion of the width is removed.

[0037] In this embodiment, the first wafer 110 is thinned at the edges using a grinding process.

[0038] Specifically, a scraper, including a grinding wheel, is used to cut the edge of the first wafer 110. During the masking process, the grinding wheel rotates at high speed to rapidly grind and thin the edge of the first wafer 110. The grinding process also involves spraying a liquid solution onto the grinding interface to quickly remove the powder and solid debris removed during grinding.

[0039] In other embodiments, the first wafer may be thinned at the edges using either a dry etching process or a wet etching process.

[0040] It should be noted that, in the edge thinning process of the first wafer 110 and / or the second wafer 120, the dimension d1 of the width of the thinned portion along the edge of the first wafer 110 and / or the second wafer 120 should not be too large or too small. If the dimension d1 of the width of the thinned portion along the edge of the first wafer 110 and / or the second wafer 120 is too large, it is easy to damage the devices inside the wafer 100 and affect the working performance of the wafer 100; if the dimension d1 of the width of the thinned portion along the edge of the first wafer 110 and / or the second wafer 120 is too small, it is easy to make it difficult to improve the morphology of the arc-shaped edge of the wafer 100, thus making it difficult to avoid edge breakage of the wafer 100 during the subsequent back-side thinning process. Therefore, in this embodiment, in the edge thinning process of the first wafer 110 and / or the second wafer 120, the dimension d1 of the width of the thinned portion along the edge of the first wafer 110 and / or the second wafer 120 is 0.5 mm to 10 mm.

[0041] refer to Figure 6 A temporary protective film 300 is formed on the bonding surface 100a, exposing the edge of the wafer.

[0042] The temporary protective film 300 is used to protect the bonding surface 100a of the wafer 100 during subsequent edge cleaning processing of the wafer 100.

[0043] In this embodiment, after forming a temporary protective film 300 on the bonding surface 100a, the wafer 100 is subjected to edge cleaning treatment. This helps to reduce the probability of damage to the area within the edge of the wafer 100 caused by the edge cleaning treatment. This reduces the probability of void defects being generated at the bonding surface 100a after the first wafer 110 and the second wafer 120 are bonded due to damage to the surface of the wafer 100. This improves the bonding effect of the first wafer 110 and the second wafer 120, and correspondingly improves the packaging reliability.

[0044] In this embodiment, in the step of forming a temporary protective film 300 on the bonding surface 100a, the temporary protective film 300 covers the interconnect pads 200, thereby protecting the interconnect pads 200 during the subsequent edge cleaning process of the wafer 100 and reducing the probability of the interconnect pads 200 being damaged.

[0045] It should be noted that in this embodiment, edge thinning processing is performed on the first wafer 110 and / or the second wafer 120. Therefore, in the step of forming a temporary protective film 300 on the bonding surface 100a, the temporary protective film 300 covers the remaining bonding surface 100a after the edge thinning processing. Figure 6 As shown in (a), the temporary protective film 300 covers the remaining bonding surface 100a of the first wafer after edge thinning treatment, as follows: Figure 6 As shown in (b), for the second wafer 120 that has not undergone edge thinning, a temporary protective film 300 covers the interconnect pads 200 in the bonding surface 100a, exposing part of the bonding surface 100a at the edge of the second wafer 120, in preparation for subsequent edge cleaning.

[0046] In other embodiments, the temporary protective film may also cover part of the remaining bonding surface of the first wafer after edge thinning, in addition to covering the interconnect pads of the bonding surface, exposing the edge portion of the remaining bonding surface to prepare for subsequent edge cleaning.

[0047] In this embodiment, in the subsequent edge cleaning process of wafer 100, the preset width d2 of the edge of wafer 100 (e.g., Figure 7 As shown, edge cleaning is performed; in the step of forming a temporary protective film 300 on the bonding surface 100a, along the direction parallel to the bonding surface 100a, the distance d3 between the edge of the temporary protective film 300 and the edge of the wafer 100 is less than or equal to the preset width d2, which helps to ensure that the cleaning solution avoids damage to the circuit structure inside the edge of the wafer 100 as much as possible when the wafer 100 is subsequently edge cleaned.

[0048] It should be noted that the difference between the preset width d3 and the distance d3 between the edge of the temporary protective film 300 and the edge of the wafer 100 should not be too large or too small. If the difference between the preset width d3 and the distance d3 between the edge of the temporary protective film 300 and the edge of the wafer 100 is too large, the temporary protective film 300 will easily cover the edge with metal residue, making it difficult to clean the metal residue on the edge of the wafer 100 during subsequent edge cleaning. If the difference between the preset width d3 and the distance d3 between the edge of the temporary protective film 300 and the edge of the wafer 100 is too small, the interconnect pads 200 of the bonding surface 100a will be difficult to protect well during subsequent edge cleaning of the wafer 100, and the interconnect pads 200 will be easily damaged by the sputtering of the cleaning solution, thus affecting the subsequent bonding effect of the wafer 100. Therefore, in this embodiment, the difference between the preset width d3 and the distance d3 between the edge of the temporary protective film 300 and the edge of the wafer 100 is 1μm to 1000μm.

[0049] Specifically, in this embodiment, the step of forming a temporary protective film 300 on the bonding surface 100a includes: using electrostatic attraction to adsorb the temporary protective film 300 onto the bonding surface 100a.

[0050] The temporary protective film 300 is adsorbed onto the bonding surface 100a by electrostatic attraction. The operation is simple and does not require additional processing steps, which makes the cost of forming the temporary protective film 300 on the bonding surface 100a low, while minimizing the contamination and impact on the wafer 100.

[0051] In this embodiment, the temporary protective film 300 is made of resin.

[0052] Resin materials are low-cost and readily available. A resin film made of resin material is used as a temporary protective film 300, which can be easily adsorbed onto the bonding surface 100a using electrostatic materials.

[0053] In other embodiments, the step of forming a temporary protective film on the bonding surface may further include: applying an adhesive to the bonding surface; and using the adhesive to bond the temporary protective film to the bonding surface.

[0054] Applying an adhesive allows the temporary protective film to adhere more firmly to the bonding surface, which helps to protect the bonding surface during subsequent edge cleaning. Moreover, the temporary protective film made of resin material is also easy to adhere to the bonding surface.

[0055] The adhesive material includes one or more of the following: water-soluble adhesive, hot-melt adhesive, solvent-based adhesive, emulsion adhesive, and solvent-free liquid adhesive.

[0056] The use of the adhesive described above results in good adhesion of the temporary protective film, and a small amount of adhesive is required to achieve good adhesion, which also makes it easy to remove the adhesive completely afterward.

[0057] In other embodiments, the step of forming a temporary protective film on the bonding surface includes depositing a temporary protective film on the bonding surface.

[0058] Depositing a temporary protective film on the bonding surface is a simple and easy-to-operate process.

[0059] The temporary protective film is made of photosensitive materials.

[0060] Photosensitive materials generally do not contaminate the wafer or affect subsequent processes. By depositing photosensitive materials to form a temporary protective film, the impact of forming the temporary protective film on the wafer can be reduced. Moreover, photosensitive materials are easy to remove, making it easy to remove the temporary protective film cleanly.

[0061] Specifically, photosensitive materials include photoresist, which is inexpensive and readily available.

[0062] refer to Figure 7 After forming a temporary protective film 300 on the bonding surface 100a, the wafer 100 is subjected to edge cleaning.

[0063] During the manufacturing process of wafer 100, residues are easily left on the edge of wafer 100. In particular, since the interconnect pads 200 formed on the bonding surface 100a are made of metal, metal residues are usually left on the edge of wafer 100. Therefore, edge cleaning of wafer 100 is required to remove the metal residues.

[0064] During the edge cleaning process, the temporary protective film 300 covers the interconnect pads 200 of the bonding surface 100a, which helps to reduce the probability of damage to the interconnect pads 200 caused by the edge cleaning process. This reduces the probability of void defects at the bonding surface 100a after the first wafer 110 and the second wafer 120 are bonded, thereby improving the bonding effect of the first wafer 110 and the second wafer 120 and improving the packaging reliability accordingly.

[0065] In this embodiment, the edge cleaning process of wafer 100 is performed using the edge bead removal (EBR) process.

[0066] Specifically, the EBR process is a wet cleaning process. Wet cleaning is less expensive and easier to operate. Furthermore, wet cleaning helps to remove residues from the edges of the wafer 100 while minimizing damage to the wafer 100.

[0067] refer to Figure 8After edge cleaning of wafer 100, the temporary protective film 300 on bonding surface 100a is removed.

[0068] Remove the temporary protective film 300 to expose the bonding surface 100a, in preparation for subsequent bonding between wafers 100.

[0069] In this embodiment, the temporary protective film 300 is adsorbed onto the bonding surface 100a by electrostatic attraction. Accordingly, the step of removing the temporary protective film 300 includes: tearing off the temporary protective film 300.

[0070] The temporary protective film 300 can be removed manually by peeling it off. The operation is simple, does not require any additional processing steps, has low cost, and causes almost no damage or impact to the wafer 100.

[0071] In other embodiments, an adhesive is applied to the bonding surface; a temporary protective film is bonded to the bonding surface using the adhesive. Accordingly, the step of removing the temporary protective film includes: peeling off the temporary protective film; and after peeling off the temporary protective film, cleaning to remove the adhesive from the bonding surface.

[0072] The temporary protective film can be removed manually by peeling it off, and the adhesive can be removed after simple cleaning. The operation is simple and easy to perform, and the operating cost is low.

[0073] In the step of cleaning and removing the adhesive on the bonding surface, the cleaning solution used includes one or more of the following: pure water, acetone, IPA, HCl, and H2SO4. The cleaning solution may also include SC1 or SC2 standard solution and organic solvent.

[0074] The cleaning solution described above can effectively remove the adhesive while minimizing damage to the wafer, thus facilitating adhesive removal while ensuring wafer performance.

[0075] In other embodiments, a temporary protective film is deposited on the bonding surface. The material of the temporary protective film includes a photosensitive material. Accordingly, the step of removing the temporary protective film includes: removing the temporary protective film by exposure and development.

[0076] If the temporary protective film is made of photosensitive material, it can be removed by exposure and development. The process is simple and easy to operate, and the exposure and development has little impact on the wafer, which helps to remove the temporary protective film while ensuring the performance of the wafer.

[0077] refer to Figure 9 After removing the temporary protective film 300, the first wafer 110 and the second wafer 120 are bonded together, with the bonding surface 100a of the first wafer 110 and the bonding surface 100a of the second wafer 120 being set opposite to each other.

[0078] The system integration of the first wafer 110 and the second wafer 120 is achieved by bonding the first wafer 110 and the second wafer 120 together.

[0079] During the edge cleaning process, due to the protective effect of the temporary protective film 300, the surface quality of the bonding surface 100a of the first wafer 110 and the second wafer 120 is good, and the bonding effect between the first wafer 110 and the second wafer 120 is good.

[0080] refer to Figure 10 After bonding the first wafer 110 and the second wafer 120, the packaging method further includes: performing back-side thinning on the first wafer 110 and / or the second wafer 120 that have undergone edge thinning.

[0081] In this embodiment, taking the back-side thinning process of the first wafer 110 as an example, the back-side thinning process of the first wafer 110 is performed to prepare for the subsequent formation of a through-silicon-via (TSV) structure in the substrate 111 of the first wafer 110.

[0082] In this embodiment, the first wafer 110 is subjected to edge thinning treatment, so that the edge of the first wafer 110 with a portion of thickness on one side of the bonding surface 100a has a vertical surface morphology. Then, when the first wafer 110 is subjected to backside thinning treatment, the portion of the first wafer 110 that has not undergone edge thinning treatment is removed, and the remaining first wafer 110 has a vertical sidewall morphology, which helps to avoid the first wafer 110 from breaking during the backside thinning treatment as much as possible.

[0083] In this embodiment, edge thinning processing is performed on the first wafer 110 and / or the second wafer 120 with a portion of thickness near the bonding surface 100a. Specifically, edge thinning processing is performed on the first wafer 110 with a portion of thickness near the bonding surface 100a. Correspondingly, in the step of performing back-side thinning processing on the first wafer 110 and / or the second wafer 120 with edge thinning processing, the remaining thickness of the first wafer 110 and / or the second wafer 120 facing away from the bonding surface 100a is removed. Specifically, the remaining thickness of the first wafer 110 facing away from the bonding surface 100a is removed.

[0084] The remaining thickness refers to the difference between the total thickness of the first wafer 110 and the thickness of the portion subjected to edge thinning.

[0085] In this embodiment, the thickness of the first wafer 110 that needs to be edge-thinned can be preset. When the edge-thinning process is performed on the portion of the first wafer 110 near the bonding surface 100a, the preset thickness is retained and no edge-thinning process is performed.

[0086] In this embodiment, an interconnect structure electrically connected to devices in the first wafer 110 and the second wafer 120 is formed on the surface of the first wafer 110 or the second wafer 120 after back-side thinning.

[0087] Specifically, the interconnect structure is a TSV structure. In this embodiment, a TSV structure is formed in the substrate of the first wafer 110 after back-side thinning, so as to realize the vertical conduction of the circuits at both ends of the first wafer 110. In other words, electrical connection with other circuits can be achieved through the TSV structure in the first wafer 110.

[0088] The TSV structure enables a higher density of wafer 100 stacked in three dimensions, resulting in a smaller overall size and significantly improved chip speed and reduced chip power consumption.

[0089] In this embodiment, the devices in the first wafer 110 and the second wafer 120 include resistors, capacitors, MOS, diodes, and other devices, as well as integrated circuits such as shift registers, SRAM, digital-to-analog converters, power management, and DRAM, which are integrated from simple devices.

[0090] In this embodiment, after the device is formed, the first wafer 110 and the second wafer 120 are diced.

[0091] The first wafer 110 and the second wafer 120 are cut to obtain product chips.

[0092] In other embodiments, after the device is formed, other wafers can be bonded on top of the device to further achieve 3D stacking of wafers.

[0093] In other embodiments, after the device is formed, the first wafer and the second wafer can be diced to obtain the product chip, and then the product chip can be bonded to other wafers, or the product chips can be bonded to each other.

[0094] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A packaging method, characterized in that, include: A plurality of wafers are provided, the wafers including bonding surfaces, the wafers including a first wafer and a second wafer; The first wafer and / or the second wafer are subjected to edge thinning treatment, which involves thinning a portion of the wafer width along the edge of the first wafer and / or the second wafer from one side of the bonding surface, such that the thickness of the edge of the first wafer and / or the second wafer is less than the thickness of the remaining portion. A temporary protective film is formed on the bonding surface, exposing the edge of the wafer; After forming a temporary protective film on the bonding surface, the wafer is subjected to edge cleaning. After edge cleaning of the wafer, the temporary protective film on the bonding surface is removed; After removing the temporary protective film, the first wafer and the second wafer are bonded together, with the bonding surfaces of the first wafer and the second wafer facing each other.

2. The packaging method as described in claim 1, characterized in that, The step of forming a temporary protective film on the bonding surface includes: using electrostatic attraction to adsorb the temporary protective film onto the bonding surface; The step of removing the temporary protective film includes: peeling off the temporary protective film.

3. The packaging method as described in claim 1, characterized in that, The step of forming a temporary protective film on the bonding surface includes: applying an adhesive to the bonding surface; and using the adhesive to bond the temporary protective film to the bonding surface. The step of removing the temporary protective film includes: peeling off the temporary protective film; and after peeling off the temporary protective film, cleaning to remove the adhesive on the bonding surface.

4. The packaging method according to any one of claims 1 to 3, characterized in that, The temporary protective film is made of resin.

5. The packaging method as described in claim 3, characterized in that, The adhesive material includes one or more of the following: water-soluble adhesive, hot-melt adhesive, solvent-based adhesive, emulsion adhesive, and solvent-free liquid adhesive.

6. The packaging method as described in claim 3, characterized in that, In the step of cleaning and removing the adhesive from the bonding surfaces, the cleaning solution used includes one or more of the following liquids: pure water, acetone, IPA, HCl, and H2SO4; or, the cleaning solution includes SC1 or SC2 standard solution; or, the cleaning solution includes an organic solvent.

7. The packaging method as described in claim 1, characterized in that, The step of forming a temporary protective film on the bonding surface includes: depositing the temporary protective film on the bonding surface.

8. The packaging method as described in claim 1 or 7, characterized in that, The temporary protective film is made of photosensitive materials; The step of removing the temporary protective film includes: removing the temporary protective film by exposure and development.

9. The packaging method as described in claim 8, characterized in that, The photosensitive material includes photoresist.

10. The packaging method as described in claim 1, characterized in that, In the step of performing edge cleaning on the wafer, the edge cleaning is performed on a preset width of the edge of the wafer; In the step of forming a temporary protective film on the bonding surface, the distance between the edge of the temporary protective film and the edge of the wafer is less than or equal to the preset width along a direction parallel to the bonding surface.

11. The packaging method as described in claim 10, characterized in that, The difference between the preset width and the distance between the edge of the temporary protective film and the edge of the wafer is 1 μm to 1000 μm.

12. The packaging method as described in claim 1, characterized in that, The wafer is edge-cleaned using an edge removal process.

13. The packaging method as described in claim 1, characterized in that, In the step of providing a plurality of said wafers, interconnect pads are formed on the bonding surfaces of said wafers; In the step of forming a temporary protective film on the bonding surface, the temporary protective film covers the interconnect pads.

14. The packaging method as described in claim 1, characterized in that, In the step of forming a temporary protective film on the bonding surface, the temporary protective film covers the remaining bonding surface after edge thinning treatment; After bonding the first wafer and the second wafer, the packaging method further includes: performing back-side thinning on the first wafer and / or the second wafer that have undergone edge thinning.

15. The packaging method as described in claim 14, characterized in that, In the step of performing edge thinning processing on the first wafer and / or the second wafer, the edge thinning processing is performed on the portion of the first wafer and / or the second wafer that is close to the bonding surface. In the step of performing back-side thinning on the first wafer and / or the second wafer that have undergone edge thinning, the remaining thickness of the first wafer and / or the second wafer facing away from the bonding surface is removed.

16. The packaging method as described in claim 14, characterized in that, In the step of performing edge thinning on the first wafer and / or the second wafer, the width of the portion thinned along the edge of the first wafer and / or the second wafer is between 0.5 mm and 10 mm.

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