Parallel GaN rectifier integrated chip and its manufacturing method and related equipment

Abstract

The present invention relates to the technical field of semiconductor chips, and specifically discloses a parallel-type GaN rectifier integrated chip and a manufacturing method and related equipment thereof, wherein the method comprises the steps of: preparing an epitaxial wafer; etching the epitaxial wafer so as to form a plurality of mesa-isolated diode devices on the epitaxial wafer; etching the N-GaN layer of the diode device so as to expose part of the P-GaN layer; preparing a cathode on the N-GaN layer of the diode device, and preparing an anode on the exposed part of the P-GaN layer of the diode device; preparing a parallel structure based on the cathode and the anode to connect a plurality of the diode devices; the chip manufactured by the method comprises a plurality of GaN-based PN junction diodes, and compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, can be used as rectifier devices of high-frequency and high-power rectifier circuits, and greatly reduce the area size of rectifier chips.

Description

Technical Field

[0001] The present application relates to the field of semiconductor chip technology, and in particular to a parallel-type GaN rectifier integrated chip and a manufacturing method and related equipment thereof. Background Art

[0002] As a power electronic component that plays an important role in national defense, energy transmission and other fields, rectifiers have attracted much attention from all walks of life.

[0003] Traditional rectifiers are generally made of rectifier thyristors. Due to the shortcomings of rectifier thyristors, such as narrow bandgap of the material itself, low electron saturation migration rate, and low thermal conductivity, the rectifiers have the disadvantages of large size and insufficient integration, and are difficult to meet high-frequency requirements.

[0004] There is currently no effective technical solution to the above problems. Summary of the invention

[0005] The purpose of this application is to provide a parallel-type GaN rectifier integrated chip and its manufacturing method and related equipment, that is, to manufacture a rectifier chip made of GaN-based PN junction diode, improve the integration of the rectifier chip, and reduce the area size of the rectifier chip to meet the needs of high-frequency and refined use.

[0006] In a first aspect, the present application provides a method for manufacturing a parallel-type GaN rectifier integrated chip, the manufacturing method comprising the following steps:

[0007] Prepare an epitaxial wafer, wherein the epitaxial wafer includes a substrate, an AlGaN buffer layer, a GaN channel layer, an AlGaN barrier layer, a P-GaN layer and an N-GaN layer connected in sequence from bottom to top;

[0008] Etching the epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer;

[0009] Etching the N-GaN layer of the diode device to expose a portion of the P-GaN layer;

[0010] A cathode is prepared on the N-GaN layer of the diode device, and an anode is prepared on the exposed portion of the P-GaN layer of the diode device;

[0011] A parallel structure is prepared based on the cathode and the anode to connect multiple diode devices.

[0012] The chip manufactured by the parallel GaN rectifier integrated chip manufacturing method of the present application contains multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and can even be compatible with millimeter-wave band rectification. Secondly, multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, which is suitable for refined device scenarios such as wireless power supply of micro-nano electronic devices.

[0013] The method for manufacturing a parallel-type GaN rectifier integrated chip, wherein the process of etching the epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer comprises:

[0014] The GaN channel layer, the AlGaN barrier layer, the P-GaN layer and the N-GaN layer of the epitaxial wafer are etched by photolithography, development and etching to form a plurality of mesa-isolated diode devices on the AlGaN buffer layer.

[0015] This example can easily and accurately form multiple mesa-isolated diode devices on an epitaxial wafer through photolithography, development, and etching processes. The sizes of different diode devices are controllable, and multiple diode devices are integrated in the epitaxial wafer, which can effectively reduce the capacitance caused by circuit welding.

[0016] The method for manufacturing a parallel-type GaN rectifier integrated chip, wherein the steps of preparing a cathode on the N-GaN layer of the diode device and preparing an anode on the exposed portion of the P-GaN layer of the diode device include:

[0017] A cathode in ohmic contact with the surface of the N-GaN layer of the diode device and an anode in Schottky contact with the exposed part of the P-GaN layer of the diode device are formed by photolithography, development, evaporation and stripping.

[0018] The method for manufacturing a parallel-type GaN rectifier integrated chip, wherein the step of preparing a parallel structure based on the cathode and the anode to connect a plurality of the diode devices comprises:

[0019] Depositing a passivation layer on the surface of the diode device;

[0020] Photolithography, development, and etching of the passivation layer to form electrode holes on the anode and the cathode;

[0021] The parallel structure is prepared by performing photolithography, development, evaporation and stripping processes based on the electrode holes.

[0022] The method for manufacturing a parallel-type GaN rectifier integrated chip, wherein the number of diode devices is two, namely a first diode and a second diode, the parallel structure includes a first wire, a second wire, a third wire and a fourth wire, the first wire is connected to the cathode of the first diode, one end of the second wire is connected to the cathode of the first diode, and the other end is connected to the anode or cathode of the second diode, the third wire is connected to the anode of the second diode, and the fourth wire is connected to the cathode of the second diode.

[0023] The method for manufacturing a parallel-type GaN rectifier integrated chip, wherein the P-GaN layer is doped with Mg, and the doping concentration is 1×10 18 cm -3 .

[0024] In the method for manufacturing a parallel-type GaN rectifier integrated chip, the thickness of the AlGaN buffer layer is 3 μm.

[0025] In the second aspect, the present application also provides a parallel-type GaN rectifier integrated chip, including a substrate and an AlGaN buffer layer arranged on the substrate, a plurality of diode devices are arranged on the AlGaN buffer layer, the diode devices include a GaN channel layer, an AlGaN barrier layer, a P-GaN layer and an N-GaN layer, a portion of the top surface of the P-GaN layer is exposed to the N-GaN layer and is connected to an anode, the top surface of the N-GaN layer is connected to a cathode, and a plurality of the diode devices are connected through cathodes, anodes and parallel structures.

[0026] The parallel-type GaN rectifier integrated chip of the present application includes multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and are even compatible with millimeter-wave band rectification. Secondly, multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, making it suitable for refined device scenarios such as wireless power supply for micro-nano electronic devices.

[0027] In a third aspect, the present application further provides a rectifier, comprising the parallel-type GaN rectifier integrated chip provided in the second aspect.

[0028] In a fourth aspect, the present application also provides a remote power supply device, comprising a rectifier as provided in the third aspect.

[0029] From the above, it can be seen that the present application provides a parallel-type GaN rectifier integrated chip and its manufacturing method and related equipment, wherein the chip manufactured by the parallel-type GaN rectifier integrated chip manufacturing method of the present application contains multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and can even be compatible with millimeter-wave band rectification. Secondly, multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, which is suitable for refined device scenarios such as wireless power supply of micro-nano electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a flow chart of the method for manufacturing a parallel-type GaN rectifier integrated chip provided in an embodiment of the present application.

[0031] Figure 2 A schematic diagram of the implementation process of the parallel-type GaN rectifier integrated chip manufacturing method provided in an embodiment of the present application.

[0032] Figure 3 This is a schematic diagram of the structure of the parallel-type GaN rectifier integrated chip provided in an embodiment of the present application.

[0033] Figure 4 This is a schematic diagram of the structure of a parallel-type GaN rectifier integrated chip provided in another embodiment of the present application.

[0034] Figure 5 A schematic diagram of the structure of a rectifier provided in an embodiment of the present application.

[0035] Figure 6 A schematic diagram of the structure of a remote power supply device provided in an embodiment of the present application.

[0036] Figure numerals: 1, substrate; 2, AlGaN buffer layer; 3, GaN channel layer; 4, AlGaN barrier layer; 5, P-GaN layer; 6, N-GaN layer; 7, anode; 8, cathode; 9, first wire; 10, second wire; 11, third wire; 12, fourth wire; 13, first diode; 14, second diode. DETAILED DESCRIPTION

[0037] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0038] In the description of the present invention, it should be understood that the terms "length", "width", "thickness", "up", "down", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0039] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0040] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0041] First, please refer to Figure 1 and Figure 2 Some embodiments of the present application provide a method for manufacturing a parallel-type GaN rectifier integrated chip, the manufacturing method comprising the following steps:

[0042] S1, preparing an epitaxial wafer, the epitaxial wafer comprising a substrate 1, an AlGaN buffer layer 2, a GaN channel layer 3, an AlGaN barrier layer 4, a P-GaN layer 5 and an N-GaN layer 6 connected in sequence from bottom to top;

[0043] S2, etching the epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer;

[0044] S3, etching the N-GaN layer 6 of the diode device to expose part of the P-GaN layer 5;

[0045] S4, preparing a cathode 8 on the N-GaN layer 6 of the diode device, and preparing an anode 7 on the exposed portion of the P-GaN layer 5 of the diode device;

[0046] S5. Prepare a parallel structure based on the cathode 8 and the anode 7 to connect multiple diode devices.

[0047] Specifically, step S1 can form an epitaxial wafer by gradually depositing different layer structures on the substrate 1 based on a deposition method, and the diode device formed in step S2 includes at least a GaN channel layer 3, an AlGaN barrier layer 4, a P-GaN layer 5 and an N-GaN layer 6 connected in sequence from bottom to top.

[0048] More specifically, after the etching treatment in step S2, the mesas between the diode devices are isolated. The etching depth in this step is required to be below the two-dimensional electron gas. After the etching treatment in step S3, the exposed P-GaN layer 5 also forms mutually isolated mesas, thereby forming a plurality of GaN-based PN junction diodes, so that the subsequent diode devices connected based on the parallel structure will not produce a short circuit, thereby effectively improving the circuit safety.

[0049] It should be noted that the parallel-type GaN rectifier integrated chip formed by the diode devices connected in parallel structure in step S5 has at least one high-frequency signal input terminal and a DC voltage output terminal.

[0050] More specifically, in some other connection methods, diode devices can be connected in a series structure, but the output voltage of the series structure is low and it is difficult to meet the needs of high-voltage occasions. Step S5 uses a parallel structure to connect multiple diode devices to increase the output voltage of the DC voltage output end of the chip to meet the high-voltage output requirements.

[0051] More specifically, the chip manufactured by the parallel GaN rectifier integrated chip manufacturing method of the embodiment of the present application includes multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and can even be compatible with millimeter wave band rectification. Secondly, step S5 connects multiple diode devices based on a parallel structure to form a parallel GaN rectifier integrated chip. Multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, which is suitable for refined device scenarios such as wireless power supply of micro-nano electronic devices.

[0052] In addition, the chip manufactured by the parallel-type GaN rectifier integrated chip manufacturing method of the embodiment of the present application has the advantages of wider bandgap, higher critical breakdown electric field, higher limit operating temperature and saturation electron mobility compared with the rectifier thyristor.

[0053] In some preferred embodiments, step S1 comprises:

[0054] S11 , depositing an AlGaN buffer layer 2 , a GaN channel layer 3 , an AlGaN barrier layer 4 , a P-GaN layer 5 and an N-GaN layer 6 in sequence on a substrate 1 to obtain an epitaxial wafer.

[0055] Specifically, step S11 is preferably based on MOCVD technology, and the above layers are sequentially formed on a Si substrate 1 to form a PN junction structure, thereby obtaining an epitaxial wafer.

[0056] More specifically, the thickness of the AlGaN buffer layer 2 is preferably 3 μm. In this embodiment, providing the AlGaN buffer layer 2 can effectively alleviate the lattice mismatch between the substrate 1 and the GaN channel layer 3 .

[0057] More specifically, the P-GaN layer 5 is preferably doped with Mg, with a doping concentration of 1×10 18 cm -3 In this embodiment, doping the P-GaN layer 5 with this concentration of Mg can effectively increase the hole concentration of the P-GaN layer 5, improve the crystal quality and optimize the conductive properties.

[0058] In some more preferred embodiments, the thicknesses of the GaN channel layer 3 , the AlGaN barrier layer 4 , the P-GaN layer 5 and the N-GaN layer 6 are 300 nm, 30 nm, 150 nm and 100 nm, respectively.

[0059] In some preferred embodiments, the process of etching an epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer comprises:

[0060] S21 , forming a plurality of mesa-isolated diode devices on the AlGaN buffer layer 2 by photolithography, development, and etching the GaN channel layer 3 , the AlGaN barrier layer 4 , the P-GaN layer 5 , and the N-GaN layer 6 of the epitaxial wafer.

[0061] Specifically, in step S21 , the etching process completely penetrates the GaN channel layer 3 , the AlGaN barrier layer 4 , the P-GaN layer 5 and the N-GaN layer 6 , so that the diode device is completely isolated with the AlGaN buffer layer 2 as a reference.

[0062] More specifically, multiple mesa-isolated diode devices can be easily and accurately formed on the epitaxial wafer through photolithography, development, and etching processes. The sizes of different diode devices are controllable, and multiple diode devices are integrated in the epitaxial wafer, which can effectively reduce the capacitance caused by circuit welding.

[0063] In some preferred embodiments, step S3 comprises:

[0064] S31 , partially exposing the P-GaN layer 5 by photolithography, development, and etching the N-GaN layer 6 of each diode device.

[0065] Specifically, step S21 and step S31 are performed by photolithography, development, and etching twice to form the mesa of the P-GaN layer 5 and the mesa of the N-GaN layer 6, which is beneficial to the subsequent accurate preparation of electrodes.

[0066] In some preferred embodiments, the steps of preparing the cathode 8 on the N-GaN layer 6 of the diode device and preparing the anode 7 on the exposed portion of the P-GaN layer 5 of the diode device include:

[0067] S41, forming a cathode 8 in ohmic contact with the surface of the N-GaN layer 6 of the diode device and an anode 7 in Schottky contact with the exposed portion of the P-GaN layer 5 of the diode device by photolithography, development, evaporation, and stripping.

[0068] Specifically, in this embodiment, the anode 7 is a Schottky electrode and the cathode 8 is an ohmic electrode, wherein the anode 7 is prepared by photolithography, development and electron beam evaporation coating technology, and the cathode 8 is prepared by photolithography, development, electron beam evaporation coating and rapid annealing technology.

[0069] In some preferred embodiments, the steps of preparing a parallel structure connecting a plurality of diode devices based on the cathode 8 and the anode 7 include:

[0070] S51, depositing a passivation layer on the surface of the diode device;

[0071] S52, photolithography, development, and etching of the passivation layer to form electrode holes on the anode 7 and the cathode 8;

[0072] S53, performing photolithography, development, evaporation, and stripping processes based on the electrode holes to prepare a parallel structure.

[0073] Specifically, depositing a passivation layer can effectively protect the device. Based on this technology, etching electrode holes and then preparing a parallel structure can effectively improve the accuracy and reliability of electrode connection.

[0074] In some preferred embodiments, there are two diode devices, namely a first diode 13 and a second diode 14, and the parallel structure includes a first wire 9, a second wire 10, a third wire 11 and a fourth wire 12, the first wire 9 is connected to the anode 7 of the first diode 13, one end of the second wire 10 is connected to the cathode 8 of the first diode 13, and the other end is connected to the anode 7 or cathode 8 of the second diode 14, the third wire 11 is connected to the anode 7 of the second diode 14, and the fourth wire 12 is connected to the cathode 8 of the second diode 14.

[0075] Specifically, the output voltage improvement effect of the general parallel structure is limited, so step S5 adopts the following method: Figure 3 and Figure 4 The voltage doubler rectifier circuit topology shown is used as a parallel structure. The parallel structure is based on a GaN-based three-port parallel first diode 13 and a second diode 14, which can effectively reduce the use of distributed devices, improve integration, and reduce parasitic parameters. It can be applied to the voltage doubler rectifier circuit to increase the output voltage.

[0076] More specifically, in this embodiment, the third wire 11 is used as a high-frequency signal input terminal, the fourth wire 12 is used as a DC voltage output terminal, and the first wire 9 is used as a ground terminal.

[0077] It should be noted that the wires in the drawings are used to express the connection relationship between the cathode 8 and the anode 7 , and they can actually adopt a two-dimensional or three-dimensional wire structure such as RDL and bonding wires.

[0078] Implementation Cases

[0079] (1) Using MOCVD technology, an AlGaN buffer layer 2, a GaN channel layer 3, an AlGaN barrier layer 4, a P-GaN layer 5 and an N-GaN layer 6 are sequentially deposited on a Si substrate to obtain an epitaxial wafer, wherein the thicknesses of the AlGaN buffer layer 2, the GaN channel layer 3, the AlGaN barrier layer 4, the P-GaN layer 5 and the N-GaN layer 6 are 3 μm, 300 nm, 30 nm, 150 nm and 100 nm, respectively, and the P-GaN layer 5 is doped with Mg with a doping concentration of 1×10 18 cm -3 , N-GaN doping concentration is 3×10 18 cm -3 .

[0080] (2) The GaN channel layer 3, AlGaN barrier layer 4, P-GaN layer 5 and N-GaN layer 6 are etched on the epitaxial wafer by photolithography, development and ICP etching to form a mesa-isolated first diode 13 and a second diode 14 on the AlGaN buffer layer 2. The etching depth is required to be below the two-dimensional electron gas.

[0081] (3) Part of the N-GaN layer 6 of the first diode 13 and the second diode 14 is etched by photolithography, development, and ICP to expose part of the P-GaN layer 5.

[0082] (4) An ohmic electrode as a cathode 8 is manufactured on the surface of the N-GaN layer 6 of the first diode 13 and the second diode 14 by photolithography, development, electron beam evaporation coating and rapid annealing technology, and a Schottky electrode as an anode 7 is manufactured on the surface of the exposed portion of the P-GaN layer 5 of the first diode 13 and the second diode 14 by photolithography, development, and electron beam evaporation coating technology.

[0083] (5) Based on (4), a passivation layer is deposited, and the passivation layer is etched by photolithography, development, and ICP to punch holes on the anode 7 and the cathode 8 to form electrode holes.

[0084] (6) Based on the electrode holes, photolithography, development, evaporation and stripping are performed to prepare a parallel structure, thereby obtaining a parallel GaN rectifier integrated chip, the parallel structure comprising a first wire 9, a second wire 10, a third wire 11 and a fourth wire 12, the first wire 9 is connected to the anode 7 of the first diode 13 device, one end of the second wire 10 is connected to the cathode of the first diode 13 device, and the other end is connected to the anode 7 of the second diode 14 device, the third wire 11 is connected to the anode 7 of the second diode 14 device, and the fourth wire 12 is connected to the cathode 8 of the second diode 14 device, wherein the third wire 11 is used as a high-frequency signal input terminal, the fourth wire 12 is used as a DC voltage output terminal, and the first wire 9 is used as a ground terminal.

[0085] The parallel GaN rectifier integrated chip prepared in this case includes two GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and are even compatible with millimeter-wave band rectification. Secondly, the two GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, which is suitable for refined device scenarios such as wireless power supply of micro-nano electronic devices; the parallel structure is based on the GaN-based three-port parallel first diode 13 and the second diode 14, which can effectively reduce the use of distributed devices, improve integration, and reduce parasitic parameters. It can be applied to voltage doubler rectifier circuits to increase output voltage.

[0086] Second, please refer to Figure 2-Figure 4Some embodiments of the present application also provide a parallel-type GaN rectifier integrated chip, including a substrate 1 and an AlGaN buffer layer 2 arranged on the substrate 1, a plurality of diode devices are arranged on the AlGaN buffer layer 2, the diode devices include a GaN channel layer 3, an AlGaN barrier layer 4, a P-GaN layer 5 and an N-GaN layer 6, a portion of the top surface of the P-GaN layer 5 is exposed to the N-GaN layer 6 and is connected to an anode 7, a top surface of the N-GaN layer 6 is connected to a cathode 8, and a plurality of diode devices are connected through the cathode 8, the anode 7 and the parallel structure.

[0087] The parallel-type GaN rectifier integrated chip of the embodiment of the present application includes multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and can even be compatible with millimeter-wave band rectification. Secondly, multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, making it suitable for refined device scenarios such as wireless power supply for micro-nano electronic devices.

[0088] In some preferred embodiments, the parallel-type GaN rectifier integrated chip of the embodiment of the present application is manufactured based on the parallel-type GaN rectifier integrated chip manufacturing method provided in the first aspect.

[0089] Third, please refer to Figure 5 Some embodiments of the present application also provide a rectifier, including the parallel-type GaN rectifier integrated chip of the second aspect.

[0090] Specifically, the rectifier comprises a bandpass filter, a parallel-type GaN rectifier integrated chip, and a through filter which are connected in sequence, wherein the parallel-type GaN rectifier integrated chip is connected in parallel with a capacitor and is grounded.

[0091] The rectifier can be used as a rectifier device of a high-frequency and high-power rectifier circuit, has high integration and small size, and can meet the use requirements of high-voltage output.

[0092] Fourth, please refer to Figure 6 Some embodiments of the present application also provide a remote power supply device, including a rectifier as provided in the third aspect.

[0093] Specifically, the remote power supply device further includes an antenna connected to the bandpass filter of the rectifier.

[0094] More specifically, the remote power supply device can be used in equipment such as drones. Its antenna can receive the commonly used 2.45GHz frequency band signals of equipment such as drones. The signal received by the antenna is rectified by the rectifier and can be used to power the equipment.

[0095] More specifically, the rectifier and signal decoding chip can be integrated on the same PCB board, and the antenna is also connected to the signal decoding chip. Part of the high-frequency signal can be input into the rectifier to power the device, and at the same time, part of the high-frequency signal can be input into the signal decoding chip for signal transmission and analysis. It has the advantages of high chip integration and small rectifier size.

[0096] In summary, the embodiments of the present application provide a parallel-type GaN rectifier integrated chip and its manufacturing method and related equipment. The chip manufactured by the parallel-type GaN rectifier integrated chip manufacturing method of the embodiments of the present application includes multiple GaN-based PN junction diodes. Compared with rectifier thyristors, GaN-based devices have a higher frequency range and power range, and can be used as rectifier devices for high-frequency and high-power rectifier circuits, and can even be compatible with millimeter-wave band rectification. Secondly, multiple GaN-based PN junction diodes are integrated in a single chip, which can effectively reduce the capacitance caused by circuit welding and greatly reduce the area size of the rectifier chip, which is suitable for refined device scenarios such as wireless power supply of micro-nano electronic devices.

[0097] In the description of this specification, the description with reference to the terms "one embodiment", "certain embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0098] The above are only some embodiments of the present invention. For those skilled in the art, several modifications and improvements can be made without departing from the creative concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. A method for manufacturing a parallel-type GaN rectifier integrated chip, characterized in that: The production method comprises the following steps: Prepare an epitaxial wafer, wherein the epitaxial wafer includes a substrate, an AlGaN buffer layer, a GaN channel layer, an AlGaN barrier layer, a P-GaN layer and an N-GaN layer connected in sequence from bottom to top; Etching the epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer; Etching the N-GaN layer of the diode device to expose a portion of the P-GaN layer; A cathode is prepared on the N-GaN layer of the diode device, and an anode is prepared on the exposed portion of the P-GaN layer of the diode device; A parallel structure is prepared based on the cathode and the anode to connect multiple diode devices, wherein the diode devices are two, namely a first diode and a second diode, and the parallel structure includes a first wire, a second wire, a third wire and a fourth wire, wherein the first wire is connected to the anode of the first diode, one end of the second wire is connected to the cathode of the first diode, and the other end is connected to the anode of the second diode, the third wire is connected to the anode of the second diode, and the fourth wire is connected to the cathode of the second diode; The third wire is used as a high-frequency signal input terminal, the fourth wire is used as a direct current voltage output terminal, and the first wire is used as a ground terminal.

2. The method for manufacturing a parallel-type GaN rectifier integrated chip according to claim 1, characterized in that: The process of etching the epitaxial wafer to form a plurality of mesa-isolated diode devices on the epitaxial wafer comprises: The GaN channel layer, the AlGaN barrier layer, the P-GaN layer and the N-GaN layer of the epitaxial wafer are etched by photolithography, development and etching to form a plurality of mesa-isolated diode devices on the AlGaN buffer layer.

3. The method for manufacturing a parallel-type GaN rectifier integrated chip according to claim 1, characterized in that: The steps of preparing a cathode on the N-GaN layer of the diode device and preparing an anode on the exposed portion of the P-GaN layer of the diode device include: A cathode in ohmic contact with the surface of the N-GaN layer of the diode device and an anode in Schottky contact with the exposed part of the P-GaN layer of the diode device are formed by photolithography, development, evaporation and stripping.

4. The method for manufacturing a parallel-type GaN rectifier integrated chip according to claim 1, characterized in that: The step of preparing a parallel structure based on the cathode and the anode to connect a plurality of the diode devices comprises: Depositing a passivation layer on the surface of the diode device; Photolithography, development, and etching of the passivation layer to form electrode holes on the anode and the cathode; The parallel structure is prepared by performing photolithography, development, evaporation and stripping processes based on the electrode holes.

5. The method for manufacturing a parallel-type GaN rectifier integrated chip according to claim 1, characterized in that: The P-GaN layer is doped with Mg, and the doping concentration is 1×10 18 cm -3 .

6. The method for manufacturing a parallel-type GaN rectifier integrated chip according to claim 1, characterized in that: The thickness of the AlGaN buffer layer is 3 μm.

7. A parallel-type GaN rectifier integrated chip, characterized in that: It comprises a substrate and an AlGaN buffer layer arranged on the substrate, wherein a plurality of diode devices are arranged on the AlGaN buffer layer, wherein the diode devices comprise a GaN channel layer, an AlGaN barrier layer, a P-GaN layer and an N-GaN layer, wherein a portion of the top surface of the P-GaN layer is exposed on the N-GaN layer and is connected to an anode, and the top surface of the N-GaN layer is connected to a cathode, wherein a plurality of the diode devices are connected via a cathode, an anode and a parallel structure, wherein there are two diode devices, namely a first diode and a second diode, and wherein the parallel structure comprises a first wire, a second wire, a third wire and a fourth wire, wherein the first wire is connected to the anode of the first diode, one end of the second wire is connected to the cathode of the first diode, and the other end is connected to the anode of the second diode, the third wire is connected to the anode of the second diode, and the fourth wire is connected to the cathode of the second diode; The third wire is used as a high-frequency signal input terminal, the fourth wire is used as a direct current voltage output terminal, and the first wire is used as a ground terminal.

8. A rectifier, characterized in that: It comprises the parallel-type GaN rectifier integrated chip as described in claim 7.

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