Through silicon via capable of suppressing copper extrusion and method of manufacturing the same

Abstract

This invention discloses a through-silicon via (TSV) capable of suppressing copper extrusion and its fabrication method. The invention utilizes magnetron sputtering to deposit a certain thickness of ZrW at the bottom of the TSV. 2‑x Mo x After depositing an O8 thin film, followed by electroplating a copper layer of a certain thickness, the above steps are repeated to deposit multiple layers of ZrW in the middle of the Cu. 2‑x Mo x O8 thin film; while ZrW 2‑x Mo x O8 is a material with a negative coefficient of thermal expansion, which is -4.3 × 10⁻⁶. ‑6 to -7.7×10 ‑6 K ‑1 This material contracts rather than expands when heated. During heat treatment (e.g., annealing) or temperature cycling of through-silicon vias (TSVs), Cu expands, while ZrW... 2‑x Mo x The O8 material shrinks rather than expands, which can partially offset the thermally induced stress caused by the mismatch in the coefficients of thermal expansion between the constituent materials of the through-silicon via (TSV). Therefore, the TSV fabricated by the method of this invention can improve the reliability of copper-filled TSVs while allowing for optimized device performance (e.g., allowing for higher temperature annealing of copper).

Description

Technical Field

[0001] This invention belongs to the field of electronic packaging, specifically relating to a through-silicon via (TSV) capable of suppressing copper extrusion and its preparation method. The TSV preparation method of this invention suppresses copper extrusion from the TSV by filling the TSV with Cu and a material with a negative coefficient of thermal expansion. Background Technology

[0002] In recent years, integrated circuit chips have become increasingly miniaturized, leading to higher demands on packaging. With continuously increasing packaging density, two-dimensional packaging has reached its limits. Three-dimensional packaging technology has become the best solution to continue Moore's Law. Currently, three-dimensional packaging is mainly achieved using through-silicon vias (TSVs) or multi-chip stacking. Among these, TSV-based three-dimensional packaging technology has become the most promising three-dimensional packaging technology due to its unique advantages. TSVs achieve electrical signal exchange between chips by directly etching through-holes on the chip and then filling them with conductive material. As a key component in three-dimensional electronic packaging, the TSV structure enables vertical interconnection of stacked chips. Compared to traditional packaging methods, TSV packaging technology offers many advantages, such as shorter interconnect paths, smaller package area, higher bandwidth, and higher packaging density.

[0003] However, TSVs have complex material composition and internal structure, and are typical heterogeneous units with huge differences in the thermal expansion coefficients of their internal materials. Under thermal load, thermal mismatch between the internal materials of TSVs can lead to serious reliability problems, such as, but not limited to: (1) substrate cracking; (2) interface delamination; (3) transistor performance degradation. Copper extrusion is a typical failure mode. During service, TSVs experience continuous temperature changes. Due to the large difference in thermal expansion coefficients between copper and silicon, their expansion or contraction during temperature changes differs, resulting in internal thermal stress. When the thermal stress exceeds the yield strength of copper, copper will undergo plastic deformation or even creep, leading to copper extrusion. Copper extrusion can deform nearby structures, causing the device to malfunction. Currently, the main methods to solve this problem are adding buffers and using special structures. However, existing solutions and technologies for suppressing copper extrusion in TSVs are not mature. Therefore, a more sophisticated method is needed to suppress copper extrusion in TSVs. Summary of the Invention

[0004] Therefore, the purpose of this invention is to provide a through-silicon via (TSV) capable of suppressing copper extrusion and a method for preparing the same, by filling the TSV with Cu and a material with a negative coefficient of thermal expansion, thereby suppressing copper extrusion of the TSV.

[0005] Specifically, the present invention provides a method for preparing through-silicon vias capable of suppressing copper extrusion, comprising the following preparation steps:

[0006] S1: The precursor was prepared by co-precipitation using zirconium oxynitrate, ammonium tungstate, and ammonium molybdate as raw materials.

[0007] S2: ZrW is obtained by sintering and annealing the precursor. 2-x Mo x O8 sputtering target;

[0008] S3: For ZrW 2-x Mo x O8 target material is pre-sputtered;

[0009] S4: Utilizing the ZrW pre-sputtered in S3 2-x Mo x O8 target material, using radio frequency magnetron sputtering technology to deposit thin films at the bottom of silicon vias on a silicon substrate that has been pretreated by degreasing and derusting;

[0010] Silicon vias and trenches communicating with the silicon vias are formed on the silicon substrate, and the trenches are disposed on the surface of the silicon substrate.

[0011] S5: Clean and dry the silicon vias processed in S4;

[0012] S6: Electroplat copper onto the silicon through-holes treated in S5.

[0013] S7: Repeat S3-S6 at least once until the metal layer fills the through-silicon via;

[0014] S8: The silicon through-holes prepared in S7 are cleaned and dried to finally obtain silicon through-holes that can suppress copper extrusion.

[0015] In some specific embodiments of the present invention, the molar ratio of zirconium oxynitrate, ammonium tungstate, and ammonium molybdate in S1 above is 1:(2-x):x, 0<x≤2.

[0016] In some specific embodiments of the present invention, the steps of preparing the precursor by the co-precipitation method in S1 are as follows: zirconium oxynitrate, ammonium tungstate and ammonium molybdate are dissolved in deionized water respectively, the zirconium oxynitrate solution is magnetically stirred, and the aqueous solutions of ammonium tungstate and ammonium molybdate are added at the same time, stirred, dried and ground to obtain powder; the powder is placed in a muffle furnace, kept at 500-800℃ for 4-8 hours and then taken out, and pressed into a target material of Φ60mm×5mm-Φ60mm×4mm on a hydraulic press, thus obtaining the precursor.

[0017] In some specific embodiments of the present invention, the steps of preparing the precursor by the co-precipitation method in S1 are as follows: zirconium oxynitrate, ammonium tungstate and ammonium molybdate are dissolved in deionized water respectively, the zirconium oxynitrate solution is magnetically stirred, and the aqueous solutions of ammonium tungstate and ammonium molybdate are added at the same time. After stirring for 2-3 hours, the mixture is dried and ground to obtain powder. The powder is placed in a muffle furnace and kept at 500°C for 8 hours. After being taken out, it is pressed into a target material of Φ60mm×5mm on a hydraulic press, thus obtaining the precursor.

[0018] In some specific embodiments of the present invention, the specific operation steps of precursor sintering and annealing in S2 above include: placing the precursor in a high-temperature furnace, sintering at 900-1200°C for 5-8 hours, and then quenching in ice water to obtain ZrW. 2-x Mo x O8 target material.

[0019] In some specific embodiments of the present invention, the specific operation steps of precursor sintering and annealing in S2 above include: placing the precursor in a high-temperature furnace, sintering at 1000°C for 6 hours, and then quenching in ice water to obtain ZrW. 2-x Mo x O8 target material.

[0020] In some specific embodiments of the present invention, the degreasing and derusting pretreatment in S4 above includes the following steps: immersing the silicon substrate in an alkaline solution to remove surface oil stains, and then rinsing the sample surface with deionized water; then immersing the silicon substrate in an acidic solution to remove the surface oxide layer, and then rinsing the sample surface with deionized water.

[0021] In some specific embodiments of the present invention, the alkaline solution in S4 above is a NaOH solution with a pH value of 7 to 10.

[0022] In some specific embodiments of the present invention, the acidic solution in S4 above is 5% hydrochloric acid.

[0023] In some specific embodiments of the present invention, the specific operating parameters for depositing a thin film at the bottom of a silicon via in S4 using radio frequency magnetron sputtering technology on a silicon substrate that has undergone degreasing and derusting pretreatment are as follows: the base vacuum is 2 × 10⁻⁶. -3 -2.2×10 -3 Pa; sputtering power of 200-220W; working gas argon to oxygen ratio of 24:12; working pressure of 2.0-2.5Pa; substrate-target spacing of 40-45mm; deposition time of 6-8h. The RF magnetron sputtering process includes: bias cleaning, thin film deposition, and thin film annealing.

[0024] In some specific embodiments of the present invention, the specific operating parameters for depositing a thin film at the bottom of a silicon via in S4 using radio frequency magnetron sputtering technology on a silicon substrate that has undergone degreasing and derusting pretreatment are as follows: the base vacuum is 2 × 10⁻⁶. -3 Pa; sputtering power is 200W; the flow rate of working gas argon and oxygen is 24mL / s and 12mL / s respectively; working pressure is 2.0Pa; substrate-target spacing is 40mm; the RF magnetron sputtering process includes: bias cleaning, thin film deposition and thin film annealing.

[0025] In some specific embodiments of the present invention, the electroplating step in S6 includes: immersing the through-silicon via sample in an electroplating solution for electroplating, and adding additives to the electroplating solution, the additives including inhibitors, accelerators, and leveling agents; the electroplating is performed in a water bath at 40-50°C with a current density of 3-5 mA / cm². 2 After electroplating for 1-2 hours, a metal layer is formed, but the metal layer does not fill the silicon through-hole. The electroplated silicon through-hole sample is then ultrasonically cleaned in deionized water and dried.

[0026] In some specific embodiments of the present invention, the electroplating step in S6 includes: immersing the through-silicon via sample in an electroplating solution for electroplating, and adding additives to the electroplating solution, the additives including inhibitors, accelerators, and leveling agents; the electroplating is performed in a water bath at 40-50°C with a current density of 3 mA / cm². 2 After electroplating for 1 hour, a metal layer is formed, but the metal layer does not fill the silicon through-hole. The electroplated silicon through-hole sample is then ultrasonically cleaned in deionized water and dried.

[0027] In some specific embodiments of the present invention, the ultrasonic cleaning time in S6 above is at least 10 minutes.

[0028] In some specific embodiments of the present invention, the electroplating solution is copper methanesulfonate, methanesulfonic acid, and hydrochloric acid; the additives include inhibitor UPT3360S, accelerator UPT3360A, and leveling agent UPT3360L.

[0029] In some specific embodiments of the present invention, the cleaning and drying steps in S8 include: ultrasonically cleaning the silicon through-hole sample prepared in S7 in alcohol, then ultrasonically cleaning it with deionized water, and finally drying it to obtain a silicon through-hole that can suppress copper extrusion.

[0030] In some specific embodiments of the present invention, the ultrasonic cleaning time for the two ultrasonic cleaning steps in S8 above is at least 10 minutes.

[0031] The present invention also provides a through-silicon via (TSV) capable of suppressing copper extrusion prepared by any of the methods described in the present invention.

[0032] The present invention provides a method for fabricating through-silicon vias (TSVs) that can suppress copper extrusion, using magnetron sputtering to deposit a 3-5 micrometer thick ZrW layer on the bottom of the TSV. 2-x Mo x After depositing an O8 thin film, followed by electroplating a copper layer of a certain thickness, the above steps are repeated to deposit multiple layers of ZrW in the middle of the Cu. 2-x Mo x O8 thin film; while ZrW 2-x Mo x O8 is a material with a negative coefficient of thermal expansion, which is -4.3 × 10⁻⁶. -6 to -7.7×10 -6 K -1 This material contracts rather than expands when heated. During heat treatment (e.g., annealing) or temperature cycling of through-silicon vias (TSVs), Cu expands, while ZrW... 2-x Mo x The O8 material shrinks rather than expands, which can partially offset the thermally induced stress caused by the mismatch in the coefficients of thermal expansion between the constituent materials of the through-silicon via.

[0033] Compared with existing technologies, the method for preparing through-silicon vias (TSVs) that can suppress copper extrusion provided by this invention differs from methods such as composite electroplating or changing the filler material. The preparation method of this invention fills the TSV with a material with a negative coefficient of thermal expansion during copper electroplating, which can effectively suppress copper extrusion in the TSV, reduce stress concentration, and improve the reliability of the TSV. In addition, the method for preparing TSVs that can suppress copper extrusion provided by this invention is relatively simple. Filling with a material with a negative coefficient of thermal expansion also allows Cu to be annealed at a higher temperature, making it less likely for Cu to be extruded. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A flowchart illustrating the method for preparing a through-silicon via capable of suppressing copper extrusion provided by the present invention;

[0036] Figure 2 A schematic cross-sectional view of a through-silicon via (TSV) prepared by the method for preparing TSVs capable of suppressing copper extrusion provided by the present invention; wherein, 101 is a silicon substrate, 102 is copper, and 103 is ZrW.2-x Mo x O8 film. Detailed Implementation

[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention and should not be used to limit the scope of protection of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0038] Example 1: Preparation of through-silicon vias using the method of the present invention for suppressing copper extrusion.

[0039] S1: Mix the molar ratio n Zr :n w :n Mo Zirconium oxynitrate, ammonium tungstate, and ammonium molybdate in a ratio of 1:2-x:x were dissolved in deionized water. The zirconium oxynitrate solution was magnetically stirred while ammonium tungstate and ammonium molybdate aqueous solutions were added. After stirring for 3 hours, the mixture was dried and ground to obtain powder. The powder was placed in a muffle furnace and kept at 500℃ for 8 hours. After being removed, it was pressed into a target material with a diameter of 60mm × 5mm on a hydraulic press, thus obtaining the precursor.

[0040] S2: The precursor was placed in a high-temperature furnace and sintered at 1000℃ for 6 hours, then quenched in ice water to obtain ZrW. 2- x Mo x O8 target material.

[0041] S3: Using pure argon gas to treat ZrW 2-x Mo x O8 target material is pre-sputtered to remove impurities from the target surface. The pre-sputtering operating parameters are: background vacuum of 2 × 10⁻⁶. -3 Pa, sputtering power of 150W, working gas pressure of 1Pa, sputtering time of 10min.

[0042] S4: Prepare a silicon substrate. Through-silicon vias and trenches communicating with the through-silicon vias are formed on the silicon substrate. The trenches are located on the surface of the silicon substrate.

[0043] The silicon substrate was immersed in a NaOH solution with a pH of 7.4 to remove surface oil, and then the sample surface was rinsed with deionized water. The silicon substrate was then immersed in a 5% hydrochloric acid solution to remove the surface oxide layer, and then the sample surface was rinsed with deionized water.

[0044] Utilizing ZrW pre-sputtered in S3 2-x Mo xUsing an O8 target, a thin film was deposited at the bottom of a silicon via on a pre-treated silicon substrate (after degreasing and rust removal) using radio frequency magnetron sputtering technology for 3 hours. Specific radio frequency magnetron sputtering operating parameters were: a base vacuum of 2 × 10⁻⁶. -3 Pa; sputtering power is 200W; the flow rate of working gas argon and oxygen is 24mL / s and 12mL / s respectively; working pressure is 2.0Pa; substrate-target spacing is 40mm; the RF magnetron sputtering process includes: bias cleaning, thin film deposition and thin film annealing.

[0045] S5: Place the silicon through-holes treated in S4 into deionized water for ultrasonic cleaning for 10 minutes, and then dry them.

[0046] S6: Immerse the S5-treated through-silicon vias in an electroplating solution consisting of copper methanesulfonate, methanesulfonic acid, and hydrochloric acid. Additives are added to the electroplating solution, including the inhibitor UPT3360S, the accelerator UPT3360A, and the leveling agent UPT3360L. The electroplating process is carried out in a water bath at 40-50°C with a current density of 3 mA / cm². 2 After electroplating for 1 hour, a metal layer is formed, but the metal layer does not fill the silicon via all at once. The electroplated silicon via sample is then placed in deionized water for ultrasonic cleaning for 10 minutes and then dried.

[0047] S7: Repeat S3-S6 three times until the metal layer fills the through-silicon via;

[0048] S8: The silicon through-hole sample prepared in S7 is ultrasonically cleaned in alcohol for 10 min, then ultrasonically cleaned in deionized water for 10 min, and then dried to finally obtain a silicon through-hole that can suppress copper extrusion.

[0049] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for preparing through-silicon vias capable of suppressing copper extrusion, characterized in that, The preparation steps include the following: S1: The precursor was prepared by co-precipitation using zirconium oxynitrate, ammonium tungstate, and ammonium molybdate as raw materials. S2: ZrW obtained by sintering and annealing of precursor 2-x Mo x O8 sputtering target; S3: For ZrW 2-x Mo x O8 target material is pre-sputtered; S4: Utilizing the ZrW pre-sputtered in S3 2-x Mo x O8 target material, using radio frequency magnetron sputtering technology to deposit thin films at the bottom of silicon vias on a silicon substrate that has been pretreated by degreasing and derusting; Silicon vias and trenches communicating with the silicon vias are formed on the silicon substrate, and the trenches are disposed on the surface of the silicon substrate. S5: Clean and dry the silicon vias processed in S4; S6: Electroplat copper onto the silicon through-holes treated in S5. S7: Repeat S3-S6 at least once until the metal layer fills the through-silicon via; S8: The silicon through-holes prepared in S7 are cleaned and dried to finally obtain silicon through-holes that can suppress copper extrusion.

2. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 1, characterized in that, In S1, zirconium oxynitrate, ammonium tungstate, and ammonium molybdate are used as raw materials, and the molar ratio of zirconium oxynitrate, ammonium tungstate, and ammonium molybdate is 1:(2-x):x, where 0 < x < 2.

3. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 2, characterized in that, The steps for preparing the precursor by the S1 co-precipitation method are as follows: Zirconium oxynitrate, ammonium tungstate, and ammonium molybdate are dissolved in deionized water, the zirconium oxynitrate solution is magnetically stirred, and the aqueous solutions of ammonium tungstate and ammonium molybdate are added simultaneously. The mixture is stirred for 2-3 hours, dried, and ground to obtain powder. The powder is placed in a muffle furnace and kept at 500-800℃ for 4-8 hours. After being removed, it is pressed into a target material of Φ60mm×5mm-Φ60mm×4mm on a hydraulic press, thus obtaining the precursor.

4. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 1, characterized in that, The specific steps of the precursor sintering and annealing in S2 include: placing the precursor in a high-temperature furnace and sintering it at 900-1200℃ for 5-8 hours, then quenching it in ice water to obtain ZrW. 2-x Mo x O8 target material.

5. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 1, characterized in that, The pretreatment for degreasing and rust removal in S4 includes the following steps: immersing the silicon substrate in an alkaline solution to remove surface oil, and then rinsing the sample surface with deionized water; then immersing the silicon substrate in an acidic solution to remove the surface oxide layer, and then rinsing the sample surface with deionized water.

6. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 1, characterized in that, The specific operating parameters for depositing a thin film at the bottom of a silicon via in step S4 using radio frequency magnetron sputtering technology on a silicon substrate that has undergone degreasing and derusting pretreatment are as follows: the base vacuum level is 2×10⁻⁶. -3 -2.2×10 -3 Pa; sputtering power is 200-220W; the ratio of argon to oxygen in the working gas is 24:12; the working gas pressure is 2.0-2.5Pa; The substrate-target spacing is 40-45mm; Deposition time is 6-8 hours; the RF magnetron sputtering process includes: bias cleaning, thin film deposition and thin film annealing.

7. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 1, characterized in that, The electroplating process in step S6 includes: immersing the through-silicon via (TSV) sample in an electroplating solution for electroplating, and adding additives, including inhibitors, accelerators, and leveling agents, to the electroplating solution; the electroplating is performed in a water bath at 40-50°C with a current density of 3-5 mA / cm², and a metal layer is formed after 1-2 hours of electroplating, wherein the metal layer does not completely fill the TSV; and the electroplated TSV sample is then ultrasonically cleaned in deionized water and dried.

8. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in claim 7, characterized in that, The electroplating solution is copper methanesulfonate, methanesulfonic acid, and hydrochloric acid; the additives include inhibitor UPT3360S, accelerator UPT3360A, and leveling agent UPT3360L.

9. The method for preparing a through-silicon via capable of suppressing copper extrusion as described in any one of claims 1-8, characterized in that, The cleaning and drying steps in S8 include: ultrasonically cleaning the silicon through-hole sample prepared in S7 in alcohol, then ultrasonically cleaning it with deionized water, and finally drying it to obtain a silicon through-hole that can suppress copper extrusion.

10. A through-silicon via capable of suppressing copper extrusion prepared by the method for preparing through-silicon vias capable of suppressing copper extrusion as described in any one of claims 1-9.

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