Onboard data storage device and method therefor

Abstract

This invention provides an airborne data storage device and method, wherein the device includes a core processing board, a storage board, and a power board; the core processing board, the storage board, and the power board are all plugged into an airborne backplane via card insertion; the core processing board is a fully programmable system-on-a-chip (SoC) ZYNQ chip, the ZYNQ chip including a power supply (PS) section and a power distribution (PL) section; the PS section embeds a flash memory card; the storage board is connected to the PS section; the power board supplies power to the airborne data storage device; the PL section receives airborne data and encrypts the airborne data; the PS section stores the encrypted data into the flash memory card and the storage board respectively. This solution can improve the reliability of data storage in harsh environments.

Description

Technical Field

[0001] This invention relates to the field of data storage technology, and in particular to an airborne data storage device and method. Background Technology

[0002] Airborne electronic systems are subject to severe vibration, impact and extreme temperature in harsh environments, which can cause airborne data storage devices to fail to store data properly, resulting in data loss and data corruption.

[0003] Based on the above problems, there is a need to provide a new airborne data storage device to solve these problems. Summary of the Invention

[0004] This invention provides an airborne data storage device and method that can improve the reliability of data storage in harsh environments.

[0005] In a first aspect, embodiments of the present invention provide an airborne data storage device, comprising: a core processing board, a storage board, and a power board; wherein the core processing board, the storage board, and the power board are all plugged into an airborne backplane using a card-insertion method;

[0006] The core processing board is a fully programmable system-on-a-chip (ZYNQ) chip, which includes a PS section and a PL section; the PS section has an embedded flash memory card.

[0007] The storage board is connected to the PS section;

[0008] The power board is used to supply power to the airborne data storage device;

[0009] The PL section is used to receive airborne data and encrypt the airborne data;

[0010] The PS section is used to store the encrypted data into the flash memory card and the storage board, respectively.

[0011] In one possible implementation, the flash memory card is an embedded multimedia card (EMMC); the storage board is a serial hard disk.

[0012] In one possible implementation, when the PS part determines that the storage board connection is faulty, it first stores the encrypted data to the flash memory card and marks the data that has not been stored to the storage board. After the connection fault of the storage board is resolved, the marked data is stored in the storage board and the marking of the data is deleted.

[0013] In one possible implementation, the PL portion includes an FPGA chip with a built-in factory key, which the FPGA uses to encrypt the onboard data and the index information of the recorded data.

[0014] In one possible implementation, the FPGA is further configured to destroy the factory key and the encrypted index information according to the data destruction instruction sent by the host computer upon receiving the data destruction instruction.

[0015] In one possible implementation, the ZYNQ chip is characterized by being an XC7Z100-2FFG900I chip.

[0016] Secondly, embodiments of the present invention also provide an airborne data storage method based on any of the airborne data storage devices described above, the method comprising:

[0017] The core processing board receives externally collected airborne data, encrypts the airborne data, and stores the encrypted data in the flash memory card and the storage board respectively.

[0018] In one possible implementation, before storing the encrypted data into the flash memory card and the storage board respectively, the method further includes: when a connection failure of the storage board is determined, first storing the encrypted data into the flash memory card and marking the data that has not been stored into the storage board; after the connection failure of the storage board is resolved, storing the marked data into the storage board and deleting the markings from the data.

[0019] In one possible implementation, encrypting the airborne data includes: encrypting the airborne data and the index information of the recorded data using a factory key built into the FPGA chip.

[0020] In one possible implementation, the method further includes: upon receiving a data destruction instruction from a host computer, destroying the factory key and the encrypted index information according to the data destruction instruction.

[0021] This invention provides an airborne data storage device and method. A core processing board, a storage board, and a power board are plugged into an airborne backplane using insert cards. A ZYNQ chip, serving as the core processing board, receives and encrypts the airborne data. The encrypted airborne data is then distributed and stored across flash memory cards and the storage board. This dual-backup storage of airborne data using flash memory cards and storage boards effectively improves the reliability of data storage in harsh environments. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of an airborne data storage device according to an embodiment of the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0025] Please refer to Figure 1 This invention provides an airborne data storage device, comprising: a core processing board, a storage board, and a power board; the core processing board, the storage board, and the power board are all plugged into the airborne backplane using a card-insertion method;

[0026] The core processing board is a fully programmable system-on-a-chip (ZYNQ) chip, which includes a PS section and a PL section; the PS section has an embedded flash memory card.

[0027] The storage board is connected to the PS section;

[0028] The power board is used to supply power to the airborne data storage device;

[0029] The PL section is used to receive airborne data and encrypt the airborne data;

[0030] The PS section is used to store the encrypted data into the flash memory card and the storage board, respectively.

[0031] In this embodiment of the invention, the core processing board, storage board, and power board are plugged into the airborne backplane using a card-based connection. The ZYNQ chip, serving as the core processing board, receives and encrypts the airborne data, distributing and storing the encrypted data across flash memory cards and storage boards. This dual-backup storage of airborne data using flash memory cards and storage boards effectively improves the reliability of data storage in harsh environments.

[0032] In this embodiment of the invention, the core processing board is a ZYNQ (fully programmable system-on-a-chip) chip, which can be an XC7Z100-2FFG900I chip. The ZYNQ chip includes a PL section and a PS section.

[0033] In one embodiment of the present invention, a flash memory card is embedded in the PS section, allowing for faster storage of onboard data. In one implementation, the flash memory card is an EMMC (Embedded Multimedia Card) chip, which is embedded within the PS section, providing a more robust connection even in harsh environments. In one embodiment, 32 EMMC chips are used, each with a capacity of 128GB, resulting in a total storage array capacity of 4TB and a storage time of 3.2 hours, meeting the requirement of 3 hours of continuous storage. To reduce overall power consumption, 16 EMMC chips are grouped together, with only one group active and the other in sleep mode. The continuous storage bandwidth of a single EMMC chip is 40MBps, and the efficiency of all 16 chips working simultaneously is greater than 80%, resulting in a total storage bandwidth of 512MBps, exceeding the requirement of 328MBps.

[0034] In addition, the PS section can also use a 32-bit wide, 1GB capacity DDR3 cache as a program cache.

[0035] In this embodiment of the invention, the storage board can be a serial interface (SATA) hard drive, such as an SSD. The backplane provides an interface compliant with the SATA 3.0 protocol, and the storage board is connected to this interface to enable connection between the storage board and the core processor via the backplane. In one embodiment, two storage boards are used, each including eight 1TB storage disks. Each storage disk can achieve a speed of 400MB / s, and four storage disks are grouped together to complete the data stream storage, achieving an actual storage speed of up to 1.5GB / s, meeting the data stream storage requirements.

[0036] In this embodiment of the invention, since the airborne data storage device includes a flash memory card and a storage board, and in harsh environments, the storage board connected by the card insertion method may experience connection failure. Therefore, when the PS part determines that the storage board has a connection failure, it first stores the encrypted data to the flash memory card and marks the data that has not been stored to the storage board. After the connection failure of the storage board is resolved, the marked data is stored in the storage board and the data mark is deleted.

[0037] In this way, even if the storage board fails, the data can still be stored normally in the flash memory card, ensuring normal data storage.

[0038] The SATA array controller can utilize Xilinx's 7-series chip platform Gen3 SATA controller. It supports array structures with 1 to N hard drives in parallel storage, significantly increasing array read and write speeds, making it suitable for high-speed data recording applications. Internally, the SATA hard drive employs a front-end / back-end separation architecture. The front end handles user data input and output processing, while the back end handles RAID logic control. Due to the unevenness of SATA read and write operations, DDR3 cache is used to buffer the data input from the front end. The BUFFER management unit allocates DDR3 read / write granularity units to the front-end and back-end controllers to complete data read / write allocation. Read / write DDR requests from both the front and back ends are processed by a read / write arbitrator, prioritizing front-end writes to ensure data-free storage.

[0039] This SATA hard drive supports unlimited small-granularity logical channel read and write operations, allowing data to be stored in combination according to logical channel numbers, thus enabling continuous reading of data on a single logical channel. This SATA hard drive can achieve small-granularity logical channel interleaving writes without affecting write bandwidth, and reading data from a single logical channel does not reduce read bandwidth performance. Furthermore, this SATA hard drive has a simple external interface, using an AXI-like interface for data and address command read and write operations, and using the CFG bus for module parameter configuration and global control.

[0040] In one embodiment of the present invention, the PL section of the ZYNQ chip includes an FPGA chip. This FPGA chip can utilize a set of four DDR3 chips as data caches, with a 64-bit width and a 2GB capacity. The FPGA chip can also be connected to an SFP+ (Small Form Pluggable) interface for implementing 10 Gigabit network communication functionality. Furthermore, an external RS232 interface chip can be connected to implement information reception functionality.

[0041] In this embodiment of the invention, the FPGA chip has a built-in factory key, which is used by the FPGA to encrypt the onboard data and the index information of the recorded data. Since the factory key built into the FPGA chip is unique, using this factory key to encrypt and decrypt the onboard data and index information using AES encryption can improve data security and prevent brute-force attacks.

[0042] Airborne data storage devices require self-destruct protection after data loss. One existing method uses a hard disk controller for rapid erasure, overwriting data by writing all 0s or all 1s. However, this method is time-consuming and highly dependent on the performance of the hard disk chips. Another existing method involves hardware destruction, such as high voltage or short circuits, but this method has low reliability and is susceptible to recovery. Therefore, in this embodiment of the invention, the FPGA is further configured to destroy the factory key and the encrypted index information upon receiving a data destruction command from the host computer.

[0043] After the factory key is destroyed, the exported data becomes garbled after passing through the FPGA. After the index information is destroyed, the corresponding airborne data cannot be found. Thus, even if someone gets the hard drive, they cannot decrypt the airborne data, thereby improving the security of the airborne data.

[0044] In this embodiment of the invention, the storage board can be connected to the core processing board via a backplane. The SATA array controller is a high-capacity storage array controller constructed using Xilinx's 7-series chip platform Gen3 SATA controller. The array structure supports parallel storage of 1 to N hard drives, significantly increasing array read and write speeds, thus making it suitable for high-speed data recording applications.

[0045] The onboard backplane includes at least four slots for the core processing board, power board, and two storage boards. The core processing board connects to the two storage boards via SATA interfaces on the backplane. The power board provides a 28V power input to the entire onboard data storage device and uses an 1 / 8" power supply brick to convert the voltage to 12V to power the other three slots on the backplane.

[0046] Based on any embodiment of the above-described airborne data storage device, this embodiment of the invention also provides an airborne data storage method, which is implemented using the above-described airborne data storage device. The method includes: receiving externally collected airborne data using the core processing board, encrypting the airborne data, and storing the encrypted data in the flash memory card and the storage board respectively.

[0047] In one embodiment of the present invention, before storing the encrypted data into the flash memory card and the storage board respectively, the method further includes: when it is determined that the storage board has a connection failure, first storing the encrypted data into the flash memory card, and marking the data that has not been stored into the storage board; after the connection failure of the storage board is resolved, storing the marked data into the storage board, and deleting the marking of the data.

[0048] In one embodiment of the present invention, encrypting the airborne data includes: using the factory key built into the FPGA chip to encrypt the airborne data and the index information of the recorded data.

[0049] In one embodiment of the present invention, the method further includes: upon receiving a data destruction instruction sent by a host computer, destroying the factory key and the encrypted index information according to the data destruction instruction.

[0050] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0051] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as ROM, RAM, magnetic disk, or optical disk.

[0052] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An airborne data storage device, characterized in that, include: The core processing board, the storage board, and the power board are all plugged into the onboard backplane using a card-type interface. The core processing board is a fully programmable system-on-a-chip (ZYNQ) chip, which includes a PS section and a PL section; the PS section has an embedded flash memory card. The storage board is connected to the PS section; The power board is used to supply power to the airborne data storage device; The PL section is used to receive airborne data and encrypt the airborne data; The PS section is used to store the encrypted data into the flash memory card and the storage board respectively; When the PS part determines that the storage board connection is faulty, it first stores the encrypted data to the flash memory card and marks the data that has not been stored to the storage board. After the connection fault of the storage board is resolved, the marked data is stored to the storage board and the data mark is deleted.

2. The airborne data storage device according to claim 1, characterized in that, The flash memory card is an embedded multimedia card (EMMC); the storage board is a serial hard drive.

3. The airborne data storage device according to claim 1, characterized in that, The PL section includes an FPGA chip, which has a built-in factory key. The FPGA uses the factory key to encrypt the airborne data and the index information of the airborne data.

4. The airborne data storage device according to claim 3, characterized in that, The FPGA is also used to destroy the factory key and the encrypted index information according to the data destruction instruction sent by the host computer upon receiving the data destruction instruction.

5. The airborne data storage device according to any one of claims 1-4, characterized in that, The ZYNQ chip is the XC7Z100-2FFG900I chip.

6. An airborne data storage method based on the airborne data storage device according to any one of claims 1-5, characterized in that, The method includes: The core processing board receives externally collected airborne data, encrypts the airborne data, and stores the encrypted data in the flash memory card and the storage board respectively.

7. The method according to claim 6, characterized in that, Before storing the encrypted data into the flash memory card and the storage board respectively, the method further includes: when a connection failure of the storage board is determined, first storing the encrypted data into the flash memory card, and marking the data that has not been stored into the storage board; after the connection failure of the storage board is resolved, storing the marked data into the storage board, and deleting the marking of the data.

8. The method according to claim 6, characterized in that, The PL section includes an FPGA chip, which has a built-in factory key. The FPGA uses the factory key to encrypt the airborne data and the index information of the airborne data. The step of encrypting the airborne data includes: encrypting the airborne data and its index information using a factory key built into the FPGA chip.

9. The method according to claim 8, characterized in that, Also includes: Upon receiving a data destruction instruction from the host computer, the factory key and the encrypted index information are destroyed according to the data destruction instruction.

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