A multi-sensor synchronous scanning control device

Abstract

This invention relates to a multi-sensor synchronous scanning control device, comprising: a panoramic synchronization pulse circuit, a multi-channel PID synchronization circuit, and a multi-channel drive control circuit. The panoramic synchronization pulse circuit generates multiple panoramic synchronization pulse signals according to the panoramic image refresh cycle, wherein the periods, duty cycles, and phases of the multiple panoramic synchronization pulse signals are identical. The multiple PID synchronization circuits synchronously output interrupt signals to the corresponding drive control circuits based on the received panoramic synchronization pulse signals. The drive control circuits control the movement and scanning of the corresponding sensors based on the interrupt signals. This invention achieves parallel synchronous motor scanning control of multiple motors without employing fieldbus technology, avoiding the hardware and software costs associated with fieldbus technology, and features low cost and high synchronization accuracy.

Description

Technical Field

[0001] This invention relates to the field of servo control technology, and more specifically to a multi-sensor synchronous scanning control device. Background Technology

[0002] Due to installation space constraints, traditional single-sensor shipborne electro-optical search and detection equipment suffers from observational obstruction, making it difficult to achieve 360° azimuth search and detection. Multi-sensor shipborne electro-optical search and detection equipment employs a distributed sensor arrangement. Taking into account factors such as real-time detection and equipment cost, multiple electro-optical sensors are distributed around the ship, evenly distributing the 360-degree azimuth airspace. Each sensor scans and images within its corresponding azimuth range. To meet the requirements of subsequent panoramic image stitching, multi-target extraction, and data output timing, all electro-optical detectors must scan at the same rotation speed and period.

[0003] To achieve the above requirements, photoelectric search and detection equipment uses motors to drive detectors or optical path reflectors for synchronous scanning. Multi-motor synchronous control employs two methods: mechanical synchronization and electronic synchronization. Early systems primarily used mechanical synchronization, achieved through gears, chains, and other transmission devices. However, due to the distributed arrangement of photoelectric sensors over long distances, this method proved unsuitable for the equipment's needs. Electronic synchronization often employs a master / slave synchronization method, where one motor acts as the master motor, and the other motors follow its movement. The drawback of this method is that if the master motor stops working, the other motors also cease operation, rendering the entire device inoperable. Summary of the Invention

[0004] This invention addresses the technical problems existing in the prior art by providing a multi-sensor synchronous scanning control device.

[0005] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: a multi-sensor synchronous scanning control device, comprising: a panoramic synchronous pulse circuit, a multi-channel PID synchronous circuit, and a multi-channel drive control circuit;

[0006] The panoramic synchronization pulse circuit generates multiple panoramic synchronization pulse signals according to the panoramic image refresh cycle. The period, duty cycle, and phase of the multiple panoramic synchronization pulse signals are all the same. The multiple PID synchronization circuits synchronously output interrupt signals to the corresponding drive control circuits according to the received panoramic synchronization pulse signals. The drive control circuits control the movement and scanning of the corresponding sensors according to the interrupt signals.

[0007] Furthermore, the panoramic synchronization pulse circuit includes a first clock generator, a first FPGA circuit, and a multi-channel first level conversion circuit. The first FPGA circuit outputs multiple synchronization pulse signals according to the clock signal output by the first clock generator and a preset clock period. The multiple synchronization pulse signals are output as panoramic synchronization pulse signals transmitted in differential signals through the corresponding first level conversion circuit.

[0008] Furthermore, the panoramic synchronization pulse circuit also includes a first serial port circuit, through which the first FPGA circuit is connected to the host computer to receive preset clock cycle setting parameters.

[0009] Furthermore, the PID synchronization circuit includes: a second level conversion circuit, a second clock generator, an interrupt generation module, and an interrupt register;

[0010] The second level conversion circuit receives the panoramic synchronization pulse signal, converts it to TTL level, and outputs it to the interrupt generation module. After receiving the signal, the interrupt generation module clears the interrupt register. After clearing, the interrupt generation module generates a PID interrupt signal according to the clock signal of the second clock generator and outputs it to the corresponding drive control circuit. The interrupt register counts the generated PID interrupt signals.

[0011] Furthermore, the drive control circuit includes a DSP circuit, a data input interface, and a DA output interface. The DSP circuit receives the PID interrupt signal through the data input interface and reads the count value in the interrupt register. Based on the count value, it controls the sensor scanning motor to run to a specified position. The count value in the interrupt register corresponds one-to-one with the running position of the sensor scanning motor.

[0012] Furthermore, the device also includes an angle calculation circuit, which is used to acquire real-time angle position data of the sensor scanning motor and feed the real-time angle position data back to the drive control circuit.

[0013] Furthermore, the angle calculation circuit includes an axis-angle conversion circuit, a second FPGA circuit, and a serial port circuit. The axis-angle conversion circuit is used to receive the coarse-channel analog value and the fine-channel analog value of the angle output by the sensor scanning motor, and convert them into coarse-channel digital value and fine-channel digital value of the angle. The second FPGA circuit performs combined error correction on the coarse-channel digital value and the fine-channel digital value of the angle to generate a digital value of the angle, and feeds back the digital value of the angle to the drive control circuit through the serial port circuit.

[0014] Furthermore, the device also includes a sensor interface circuit. The second FPGA circuit also feeds back the angle digital value to the sensor interface circuit through the serial port circuit. The sensor interface circuit generates a sensor trigger signal based on the angle digital value. The sensor operates according to the sensor trigger signal and outputs video data at the corresponding position.

[0015] The beneficial effects of this invention are: This invention adopts a parallel synchronous method in which each motor drive controller is connected through a fieldbus, so that they do not affect each other. The failure of one motor will not affect the other motors. Using an FPGA+DSP hardware architecture, multi-motor parallel synchronous motor scanning control is achieved without using fieldbus technology. This avoids the hardware and software costs associated with using fieldbus technology and features low cost and high synchronization accuracy. Attached Figure Description

[0016] Figure 1 A signal flow diagram of a multi-sensor synchronous scanning control device provided in an embodiment of the present invention;

[0017] Figure 2 This is a schematic diagram of the panoramic synchronization pulse circuit provided in an embodiment of the present invention;

[0018] Figure 3 This is a schematic diagram of the PID synchronization circuit provided in an embodiment of the present invention;

[0019] Figure 4 The schematic diagram of the angle calculation circuit provided in the embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0022] In the description of this application, the term "for example" is used to mean "used as an example, illustration, or description." Any embodiment described as "for example" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use the invention. Details are set forth in the following description for purposes of explanation. It should be understood that those skilled in the art will recognize that the invention can be made without using these specific details. In other instances, well-known structures and processes will not be described in detail to avoid obscuring the description of the invention with unnecessary detail. Therefore, the invention is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles and features disclosed in this application.

[0023] like Figure 1 As shown, this embodiment of the invention provides a multi-sensor synchronous scanning control device, which consists of a panoramic synchronous pulse circuit (1), a PID synchronous circuit (2), a drive control circuit (3), an angle calculation circuit (4), a sensor scanning motor (5), and a sensor interface circuit (6).

[0024] The device includes a panoramic synchronization pulse circuit, which generates a panoramic synchronization pulse signal based on the panoramic image refresh cycle. The signal period is 1 second (configurable). The panoramic synchronization pulse circuit can output multiple synchronization pulse signals with the same period, duty cycle, and phase.

[0025] like Figure 2 As shown, the panoramic synchronization pulse circuit includes a first clock generator, a first FPGA circuit, a multi-channel first level conversion circuit, and a first serial port circuit. The first FPGA circuit outputs multiple synchronization pulse signals according to the clock signal output by the first clock generator and a preset clock period. The multiple synchronization pulse signals are output as panoramic synchronization pulse signals transmitted in differential signals through the corresponding first level conversion circuits. The first FPGA circuit is connected to the host computer through the first serial port circuit to receive the preset clock period setting parameters.

[0026] The first clock generator is a high-frequency clock generator that outputs a fixed frequency. In this embodiment, a 30MHz clock circuit is selected. The first FPGA circuit acquires the high-frequency clock output by the clock generator. The first FPGA circuit counts internally according to the clock signal. The counting period (generally the panoramic image refresh period) can be configured through the first serial port circuit according to the needs of the device. In this embodiment, the counting period is selected as 1000ms. The first FPGA circuit outputs one panoramic synchronization pulse every 1000ms. The panoramic synchronization pulse signal is active low and has a pulse width of 40. The output of the first FPGA circuit is a TTL level pulse signal. To improve the signal interference resistance, the panoramic synchronization pulse circuit uses differential signals for external output. Therefore, the circuit includes a first level conversion circuit to output the panoramic synchronization pulse signal transmitted as a differential signal.

[0027] The PID synchronization circuit (2), drive control circuit (3), angle calculation circuit (4), sensor scanning motor (5), and sensor interface circuit (6) are configured in multiple groups according to the number of sensors, that is, one sensor corresponds to one group of PID synchronization circuit (2), drive control circuit (3), angle calculation circuit (4), sensor scanning motor (5), and sensor interface circuit (6).

[0028] The PID synchronization circuit, such as Figure 3 As shown, the system includes: a second level conversion circuit, a second clock generator, an interrupt generation module, and an interrupt register. The second level conversion circuit receives the panoramic synchronization pulse signal and converts the differential signal to TTL level. The interrupt generation module counts according to the clock signal. The interrupt generation module counts in each PID synchronization circuit and the interrupt register are cleared by the panoramic synchronization pulse circuit. The interrupt generation module further divides the panoramic synchronization pulse cycle equally, with one panoramic synchronization pulse cycle divided into 500 PID interrupts (configurable). The interrupt register is incremented by 1 when each PID interrupt occurs. When the interrupt generation module receives the panoramic synchronization pulse, the interrupt register is cleared, and the PID interrupt signal remains at a low "0" level. The PID interrupt signal is output to the drive control circuit, which enters the interrupt routine upon receiving the interrupt signal. To maintain high synchronization accuracy of the counters in each PID synchronization circuit, the clock signal generator in the PID synchronization circuit is selected from clock circuits with a frequency of 20MHz or higher. In this embodiment, a 20MHz clock circuit is selected.

[0029] Since the panoramic synchronization pulse signals received by each PID synchronization circuit have the same period, phase, and duty cycle, and the clock signals in each PID synchronization circuit have the same frequency and reach more than 20MHz, it can be ensured that the interrupt registers and interrupt signals in each PID synchronization circuit can maintain a synchronization accuracy of less than 100ns.

[0030] The drive control circuit includes a DSP circuit, a data input interface, and a DA output interface. The DSP circuit receives the PID interrupt signal through the data input interface and reads the count value in the interrupt register. Based on the count value, it controls the sensor scanning motor to run to the designated position. The sensor scanning motor uses traditional PID position control. After receiving the PID interrupt, the drive control circuit collects the motor's angle position information and the count value in the interrupt register in real time. The sensor scanning motor adopts a PID position control strategy. According to the control strategy, the motor's angle position corresponds one-to-one with the count value in each interrupt register. After reading the PID interrupt count value, the DSP circuit completes the motor position control, controlling the motor to run to the designated position.

[0031] The above operations ensure that the angular position of each sensor at the same time is the same relative to its zero position angle.

[0032] The angle calculation circuit includes an axis-angle conversion circuit, a second FPGA circuit, and a second serial port circuit, such as... Figure 4 As shown, the shaft angle conversion circuit receives the analog angle value output by the scanning motor angle sensor, converts the analog angle value into a coarse and fine digital angle value, and the FPGA circuit combines and corrects the coarse and fine digital values ​​output by the shaft angle conversion to output a digital angle value. The digital angle value is output to the drive controller and sensor interface circuit through a synchronous serial port.

[0033] The sensor scanning motor drives the sensor to perform orientation scanning, and its rotation position corresponds to the count value in the interrupt register.

[0034] The sensor interface circuit receives the digital angle output by the angle calculation circuit, and generates a series of sensor external trigger signals related to the spatial position based on the angle position. When the sensor is working in external trigger mode, it outputs video data of the corresponding position based on the external trigger signals.

[0035] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0036] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A multi-sensor synchronous scanning control device, characterized in that, include: Panoramic synchronous pulse circuit, multi-channel PID synchronous circuit and multi-channel drive control circuit; The panoramic synchronization pulse circuit generates multiple panoramic synchronization pulse signals according to the panoramic image refresh cycle, and the period, duty cycle and phase of the multiple panoramic synchronization pulse signals are the same. The multiple PID synchronization circuits synchronously output interrupt signals to the corresponding drive control circuits based on the received panoramic synchronization pulse signals. The drive control circuit controls the movement and scanning of the corresponding sensor according to the interrupt signal; The panoramic synchronization pulse circuit includes a first clock generator, a first FPGA circuit, and a multi-channel first level conversion circuit. The first FPGA circuit outputs multiple synchronization pulse signals according to the clock signal output by the first clock generator and a preset clock period. The multiple synchronization pulse signals are output as panoramic synchronization pulse signals transmitted in differential signals through the corresponding first level conversion circuit. The PID synchronization circuit includes: a second level conversion circuit, a second clock generator, an interrupt generation module, and an interrupt register; The second level conversion circuit receives the panoramic synchronization pulse signal, converts it to TTL level, and outputs it to the interrupt generation module. After receiving the signal, the interrupt generation module clears the interrupt register. After clearing, the interrupt generation module generates a PID interrupt signal according to the clock signal of the second clock generator and outputs it to the corresponding drive control circuit. The interrupt register counts the generated PID interrupt signals.

2. The control device according to claim 1, characterized in that, The panoramic synchronization pulse circuit also includes a first serial port circuit. The first FPGA circuit is connected to the host computer through the first serial port circuit to receive preset clock cycle setting parameters.

3. The control device according to claim 1, characterized in that, The drive control circuit includes a DSP circuit, a data input interface, and a DA output interface. The DSP circuit receives the PID interrupt signal through the data input interface and reads the count value in the interrupt register. Based on the count value, it controls the sensor scanning motor to run to the specified position. The count value in the interrupt register corresponds one-to-one with the running position of the sensor scanning motor.

4. The control device according to claim 1, characterized in that, Also includes: An angle calculation circuit is used to acquire real-time angle position data of the sensor scanning motor and feed the real-time angle position data back to the drive control circuit.

5. The control device according to claim 4, characterized in that, The angle calculation circuit includes an axis-angle conversion circuit, a second FPGA circuit, and a serial port circuit. The axis-angle conversion circuit receives the coarse-channel analog angle and the fine-channel analog angle output by the sensor scanning motor, and converts them into coarse-channel digital angle and fine-channel digital angle. The second FPGA circuit performs combined error correction on the coarse-channel digital angle and the fine-channel digital angle to generate a digital angle, and feeds back the digital angle to the drive control circuit through the serial port circuit.

6. The control device according to claim 5, characterized in that, The device also includes a sensor interface circuit. The second FPGA circuit also feeds back the angle digital value to the sensor interface circuit through the serial port circuit. The sensor interface circuit generates a sensor trigger signal based on the angle digital value. The sensor operates according to the sensor trigger signal and outputs video data at the corresponding position.

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