Fault analysis processing device and fault direction determination device for bidirectional signal line

Abstract

The application discloses a fault analysis processing device and a fault direction judgment device of a bidirectional signal line, and is applied to the technical field of fault processing, and comprises the following steps: when a fault is reproduced, a first resistor connected in series between a first device and a second device is removed and is replaced by the fault direction judgment device of the bidirectional signal line, the fault direction judgment device of the bidirectional signal line comprises a delay circuit for increasing the delay of signal change between a first connection end and a second connection end, an amplification circuit for increasing the voltage difference between the first connection end and the second connection end, and a comparison circuit, and the comparison circuit is used for outputting a first signal when the bidirectional signal line is dead after the first device sends a signal to the second device, and outputting a second signal when the bidirectional signal line is dead after the second device sends a signal to the first device. According to the scheme, the fault direction judgment can be effectively realized for the bidirectional signal line.

Description

Technical Field

[0001] This invention relates to the field of fault handling technology, and in particular to a fault analysis and handling device and a fault direction determination device for bidirectional signal lines. Background Technology

[0002] Currently, a large number of chips are used in electronic circuit design. Different chips are connected through the connection between pins. For example, power pins can be used to power the chip, reset pins are used for external control reset of the chip, clock pins can be connected to a crystal clock to provide a clock signal to the chip, and configuration pins can be used to set the chip's startup mode, working state, etc.

[0003] I2C (Inter-Integrated Circuit, two-wire serial bus), USB (Universal Serial Bus), etc., are pins with specific functions; please refer to [link / reference]. Figure 1 This is a simplified diagram illustrating the connections between the communication pins of multiple chips. Figure 1 In this system, different chips are connected via pins, and information is exchanged through the high / low states of the signal levels on the pins. Figure 1 The pins of multiple chips are connected together in a "wired-AND" manner, that is, when any one chip pulls the signal low, the other chips can only read low. Figure 1 The pull-up resistor is used to keep the signal line in a constantly high state when it is in a silent state, and also to enhance the driving capability. Figure 1 The series resistors set in the circuit can optimize signal quality; the resistance value typically ranges from 0 ohms to tens of ohms.

[0004] When pin communication between chips malfunctions, especially when the underlying driver causes a line hang (i.e., the signal is pulled low and cannot be recovered), Figure 1 For example, in a wired-AND connection, if even one chip pulls the signal low, all pins on the entire line will read a low state, and the entire bus will be unable to communicate. In this case, a hardware engineer needs to locate the source of the low signal by sequentially disconnecting the series resistors. Figure 1 In this scenario, we assume that chip 2 pulls the bus low, and when series resistor 2 is removed while the circuit is powered on, the bus returns to high. However, this method only confirms that chip 2 is stuck; chip 2 being stuck is merely a result, not a cause. In other words, this method cannot determine why the last high-to-low transition of the bus was caused by… Figure 1 Is it caused by chip 2 or chip 0?

[0005] In summary, how to effectively determine the direction of a fault in a bidirectional signal line is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] The purpose of this invention is to provide a fault analysis and processing device and a fault direction determination device for bidirectional signal lines, so as to effectively realize the fault direction determination of bidirectional signal lines.

[0007] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0008] A fault direction determination device for a bidirectional signal line, in normal state, a first device is connected in series with a second device through a first resistor, and the connection line used is a bidirectional signal line. The connection end between the first resistor and the first device is referred to as the first connection end, and the connection end between the first resistor and the second device is referred to as the second connection end. When reproducing a fault, the first device is connected in series with the second device through the fault direction determination device for the bidirectional signal line. The fault direction determination device for the bidirectional signal line includes: a delay circuit, an amplification circuit, and a comparison circuit.

[0009] The first end of the delay circuit is connected to the first connection end, and the second end of the delay circuit is connected to the second connection end. The delay circuit is used to increase the delay of the signal change between the first connection end and the second connection end.

[0010] The first input terminal of the amplifier circuit is connected to the first connection terminal, and the second input terminal of the amplifier circuit is connected to the second connection terminal. The amplifier circuit is used to increase the voltage difference between the first connection terminal and the second connection terminal.

[0011] The comparator circuit is connected to the output terminal of the amplifier circuit. The comparator circuit is used to: output a first signal when the bidirectional signal line is blocked after the first device sends a signal to the second device; and output a second signal when the bidirectional signal line is blocked after the second device sends a signal to the first device.

[0012] In one embodiment, the delay circuit includes: a second resistor and a first capacitor;

[0013] The first end of the second resistor serves as the first end of the delay circuit, the second end of the second resistor serves as the second end of the delay circuit, and the resistance value of the second resistor is higher than the resistance value of the first resistor.

[0014] The first terminal of the first capacitor is connected to the second terminal of the pull-up resistor in the bidirectional signal line, and the second terminal of the first capacitor is grounded.

[0015] Wherein, the first end of the pull-up resistor is connected to the positive terminal of the first power supply so that the default state of the bidirectional signal line is a high level state, and the second end of the pull-up resistor is connected to the first connection terminal or to the second connection terminal.

[0016] In one embodiment, the delay circuit further includes a second capacitor with its second terminal grounded;

[0017] When the first terminal of the first capacitor is connected to the first connection terminal, the first terminal of the second capacitor is connected to the second connection terminal;

[0018] When the first terminal of the first capacitor is connected to the second connection terminal, the first terminal of the second capacitor is connected to the first connection terminal.

[0019] In one embodiment, the amplification circuit includes: a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a first operational amplifier;

[0020] The first end of the third resistor serves as the first end of the amplifier circuit, the second end of the third resistor is connected to the first end of the fourth resistor and the non-inverting input of the first operational amplifier, and the second end of the fourth resistor is grounded.

[0021] The first end of the fifth resistor serves as the second end of the amplifier circuit. The second end of the fifth resistor is connected to the first end of the sixth resistor and the inverting input of the first operational amplifier. The second end of the sixth resistor is connected to the output of the first operational amplifier, and the connection end serves as the output of the amplifier circuit.

[0022] In one implementation, the pin containing the bidirectional signal line is a specific function pin, or a function pin simulated using general-purpose input / output pins.

[0023] In one implementation, it further includes:

[0024] A display device is used to display the output waveform of the comparison circuit during the fault reproduction process.

[0025] In one embodiment, the display device is further configured to:

[0026] During the fault reproduction process, when the bidirectional signal line is stuck, the fault log is read and displayed.

[0027] In one embodiment, the comparator circuit is specifically a comparator circuit with dual voltage thresholds to achieve hysteresis.

[0028] In one embodiment, the comparator circuit is a Schmitt trigger with a first voltage threshold and a second voltage threshold to achieve hysteresis, the Schmitt trigger specifically including a second operational amplifier, a seventh resistor and an eighth resistor.

[0029] The inverting input terminal of the second operational amplifier serves as the input terminal of the comparator circuit and is connected to the output terminal of the amplifier circuit. The non-inverting input terminal of the second operational amplifier is connected to the second terminal of the seventh resistor and the first terminal of the eighth resistor, respectively. The second terminal of the eighth resistor is grounded. The output terminal of the second operational amplifier is connected to the first terminal of the seventh resistor, and the connection terminal serves as the output terminal of the comparator circuit.

[0030] Accordingly, the Schmitt trigger is specifically used for:

[0031] After the first device sends a signal to the second device, the Schmitt trigger outputs a high-level signal. If the bidirectional signal line is hung, the output of the Schmitt trigger remains high. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a low-level signal.

[0032] After the second device sends a signal to the first device, the Schmitt trigger outputs a low-level signal. If the bidirectional signal line is stuck, the output of the Schmitt trigger remains low. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a high-level signal.

[0033] A fault analysis and processing device includes a fault direction determination device for bidirectional signal lines as described above.

[0034] Applying the technical solution provided in this invention, under normal conditions, the first device is connected in series with the second device through the first resistor R1, and the connection line used is a bidirectional signal line. When a fault occurs and the fault is located to be in the bidirectional signal line, fault reproduction can be performed. During fault reproduction, the original first resistor R1 needs to be removed, and then the first device is connected in series with the second device through the bidirectional signal line fault direction determination device. That is, the original first resistor R1 is replaced by the bidirectional signal line fault direction determination device of this application. The connection end between the first resistor R1 and the first device is referred to as the first connection end, and the connection end between the first resistor R1 and the second device is referred to as the second connection end.

[0035] Since the waveforms at the first and second connection terminals are nearly identical during signal transmission in a bidirectional signal line, a delay circuit 10 is provided after removing the first resistor R1 to distinguish the waveform differences between the first and second connection terminals. The first terminal of the delay circuit 10 is connected to the first connection terminal, and the second terminal is connected to the second connection terminal. The delay circuit 10 increases the delay of the signal change between the first and second connection terminals, thus causing a shift in the waveform between the first and second connection terminals. An amplifier circuit 20 is then used to process the signal difference. Specifically, the first input terminal of the amplifier circuit 20 is connected to the first connection terminal, and the second input terminal is connected to the second connection terminal. The amplifier circuit 20 increases the voltage difference between the first and second connection terminals, allowing the comparison circuit 30 to detect the waveform difference between the first and second connection terminals. The comparator circuit 30 can output the first signal after the first device sends a signal to the second device and the bidirectional signal line is stuck. If the bidirectional signal line is stuck after the second device sends a signal to the first device, the comparator circuit 30 outputs the second signal. In other words, the comparator circuit 30 can detect the transmission direction of the last signal sent before the bidirectional signal line is stuck, thus realizing the fault direction judgment.

[0036] In summary, for bidirectional signal lines, the solution proposed in this application can effectively determine the direction of the fault. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a simplified diagram showing the connections between the communication pins of multiple chips.

[0039] Figure 2 This is a schematic diagram of the structure of a fault direction determination device for a bidirectional signal line according to the present invention.

[0040] Figure 3 This is a schematic diagram of the fault direction determination device for a bidirectional signal line in a specific embodiment of the present invention.

[0041] Figure 4 This is a schematic diagram of signal changes in one specific embodiment of the present invention. Detailed Implementation

[0042] The core of this invention is to provide a fault direction determination device for bidirectional signal lines. For bidirectional signal lines, the solution of this application can effectively realize fault direction determination.

[0043] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0044] Please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of a fault direction determination device for a bidirectional signal line according to the present invention.

[0045] Under normal conditions, the first device is connected in series with the second device through the first resistor R1, and the connection line used is a bidirectional signal line. The connection end of the first resistor R1 with the first device is referred to as the first connection end, and the connection end of the first resistor R1 with the second device is referred to as the second connection end. When reproducing the fault, the first resistor R1 that was originally connected in series between the first device and the second device is removed. At this time, the first device is connected in series with the second device through the fault direction determination device of the bidirectional signal line. The fault direction determination device of the bidirectional signal line of this application includes: a delay circuit 10, an amplification circuit 20, and a comparison circuit 30.

[0046] The first end of the delay circuit 10 is connected to the first connection terminal, and the second end of the delay circuit 10 is connected to the second connection terminal. The delay circuit 10 is used to increase the delay of the signal change between the first connection terminal and the second connection terminal.

[0047] The first input terminal of the amplifier circuit 20 is connected to the first connection terminal, and the second input terminal of the amplifier circuit 20 is connected to the second connection terminal. The amplifier circuit 20 is used to increase the voltage difference between the first connection terminal and the second connection terminal.

[0048] The comparator circuit 30 is connected to the output terminal of the amplifier circuit 20. The comparator circuit 30 is used to output a first signal when the bidirectional signal line is blocked after the first device sends a signal to the second device, and to output a second signal when the bidirectional signal line is blocked after the second device sends a signal to the first device.

[0049] Specifically, the pin containing the bidirectional signal line in this application can be a specific function pin, such as the SDA pin of I2C, or a specific function pin in interfaces such as USB (Universal Serial Bus), ADC (Analog to Digital Converter), and UART (Universal Asynchronous Receiver / Transmitter), as described above. Figure 1 In the example, the signal lines between the chips can be SDA lines. The following sections of this application also use the I2C bus as an example, and for example... Figure 2 When the first device and the second device are connected in series, the connection line used is specifically the SDA line, which is a bidirectional signal line.

[0050] In the I2C bus, the SDA (Serial Data Line) pin is a bidirectional communication pin, allowing signals to be transmitted from the master device to the slave device, and vice versa. The SCL (Serial Clock Line) pin, on the other hand, is a unidirectional pin, requiring the communication protocol to transmit signals from the master device to the slave device. For example, in... Figure 1 In this example, chip 0 is the master device. The I2C bus allows one master device to connect to multiple slave devices. Figure 1 Chips 1, 2, and 3 are all slave devices. And as mentioned above... Figure 1 In the example, the hardware engineer disconnects the series resistors on the bus one by one while the power is on, and uses the process of elimination to locate whether the acceleration chip 2 pulls the bus low. Then the series resistor 2 can be removed, and the fault direction determination device of the bidirectional signal line of this application can be used to determine the fault direction.

[0051] In other words, the above text Figure 1 For example, this application Figure 2 The first device can be Figure 1 The first device is chip 0, the second device is chip 2, and the first resistor R1 is series resistor 2. Therefore, series resistor 2 needs to be removed and replaced with the fault direction determination device for the bidirectional signal line of this application. Figure 2 The symbol × is used to represent the first resistor R1 that was removed, which is also the series resistor 2 described in this example.

[0052] It should also be noted that the pins where bidirectional signal lines are located can be not only specific function pins, but also function pins simulated using general-purpose input / output pins, that is, function pins simulated using GPIO (General-purpose input / output) pins.

[0053] GPIO pins can be configured as inputs and outputs. When the number of pins for a specific function does not meet design requirements, GPIO can be used to simulate functions such as I2C and UART to improve flexibility. However, in practical applications, when using GPIO to simulate specific pins for I2C and UART, the underlying driver needs to be built and encapsulated by the developer. This means the simulated function uses a different underlying driver than the original function, thus lacking the protection and self-recovery mechanisms designed by the chip manufacturer. Consequently, the simulated pins are more prone to bus hangs during use.

[0054] For ease of description, the connection terminal between the first resistor R1 and the first device is referred to as the first connection terminal, i.e. Figure 2 Terminal A in the diagram, the connection point between the first resistor R1 and the second device is referred to as the second connection terminal, that is... Figure 2 The B-end in the middle.

[0055] After removing the first resistor R1, the fault needs to be reproduced. For example, if the device experienced a bus hang during the execution of the first program, and the hardware engineer has determined that the bus hang was caused by communication between the first and second devices, then it can be done as follows: Figure 2 As shown, the first resistor R1 between the first device and the second device is removed and a fault direction determination device for the bidirectional signal line is installed. The device is then allowed to re-execute the first program to reproduce the fault. During the fault reproduction process, each device, including the first device and the second device, will reproduce the relevant operation during the execution of the first program. When the bus hangs up again, the fault direction can be determined based on the output of the comparison circuit 30.

[0056] This application takes into account that, before the bidirectional signal line malfunctions, if the last signal transmission was from the first device to the second device, then terminal A is pulled low first, followed by terminal B. Conversely, if the last signal transmission was from the second device to the first device, then terminal B is pulled low first, followed by terminal A. Therefore, to determine the direction of the fault, it is necessary to distinguish whether terminal A or terminal B was pulled low first. Under normal circumstances, during signal transmission in a bidirectional signal line, regardless of whether terminal A or terminal B is pulled low first, the waveforms at the first and second connection terminals are almost identical.

[0057] In this application, in order to distinguish the waveform differences between terminals A and B, the first resistor R1 is removed, and the delay circuit 10 is used to increase the delay of the signal change between terminals A and B. The amplifier circuit 20 is used to increase the voltage difference between terminals A and B. This allows the waveform difference between terminals A and B to be detected by the comparison circuit 30, which then determines the fault direction.

[0058] Specifically, the first end of the delay circuit 10 is connected to the first connection end, and the second end of the delay circuit 10 is connected to the second connection end. The specific circuit configuration of the delay circuit 10 can be set and adjusted according to actual needs, as long as it can achieve the purpose of increasing the delay of the signal change between the first connection end and the second connection end.

[0059] See also Figure 3 This is a schematic diagram of a fault direction determination device for a bidirectional signal line in one specific embodiment. Figure 3 In this embodiment, the delay circuit 10 specifically includes: a second resistor R2 and a first capacitor C1;

[0060] The first end of the second resistor R2 serves as the first end of the delay circuit 10, and the second end of the second resistor R2 serves as the second end of the delay circuit 10. The resistance value of the second resistor R2 is higher than the resistance value of the first resistor R1.

[0061] The first terminal of the first capacitor C1 is connected to the second terminal of the pull-up resistor Rup in the bidirectional signal line, and the second terminal of the first capacitor C1 is grounded.

[0062] The first terminal of the pull-up resistor Rup is connected to the positive terminal of the first power supply to ensure that the default state of the bidirectional signal line is high. The second terminal of the pull-up resistor Rup is connected to either the first connection terminal or the second connection terminal. The positive terminal of the first power supply is... Figure 3 It is marked as VCC.

[0063] This implementation takes into account that after the original first resistor R1 between terminals A and B is removed, a high-resistance resistor needs to be connected in series between terminals A and B. That is, the resistance value of the second resistor R2 connected in series is higher than the resistance value of the first resistor R1. In practical applications, the resistance value of the second resistor R2 should be much higher than the resistance value of the first resistor R1, so that the current flowing through the second resistor R2 is very small.

[0064] Furthermore, this embodiment includes a first capacitor C1, the first terminal of which is connected to the second terminal of the pull-up resistor Rup in the bidirectional signal line. In practical applications, the pull-up resistor Rup may be located at terminal A or terminal B. Figure 3 In this example, the pull-up resistor Rup is set at terminal A. Therefore, the first capacitor C1 is the grounding capacitor set at terminal A.

[0065] exist Figure 3 In the example, if the first device pulls the bidirectional signal line low, after terminal A drops to a low level, since the current flowing through the second resistor R2 is very small and terminal A is equipped with the first capacitor C1, terminal B is equivalent to releasing electrical energy to the first capacitor C1 with a small current. That is, the voltage at terminal B will only start to decrease after a certain delay. This achieves the purpose of increasing the delay of signal change between the first connection terminal and the second connection terminal when the first device sends a signal to the second device.

[0066] If the second device pulls the bidirectional signal line low, that is, when the second device sends a signal to the first device, after the B terminal drops to a low level, since the current flowing through the second resistor R2 is very small and the first capacitor C1 is set at the A terminal, the voltage at the A terminal will only start to drop after a certain delay. This achieves the purpose of increasing the delay of the signal change between the first connection terminal and the second connection terminal when the second device sends a signal to the first device.

[0067] Furthermore, in one specific embodiment of the present invention, the delay circuit 10 may further include: a second capacitor with its second terminal grounded;

[0068] When the first terminal of the first capacitor C1 is connected to the first connection terminal, the first terminal of the second capacitor is connected to the second connection terminal.

[0069] When the first terminal of the first capacitor C1 is connected to the second terminal, the first terminal of the second capacitor is connected to the first terminal.

[0070] by Figure 3 For example, Figure 3In the example, since the pull-up resistor Rup is set at terminal A, i.e. the first connection terminal, the first capacitor C1 is the grounding capacitor set at terminal A. That is, at this time, the first end of the first capacitor C1 is connected to the first connection terminal. In this case, a grounding capacitor can also be set at terminal B, which is the second capacitor in this embodiment. At this time, the first end of the second capacitor is connected to the second connection terminal, and the second end is grounded.

[0071] Of course, in another scenario, if the first capacitor C1 is a grounding capacitor set at terminal B, it means that the pull-up resistor Rup is set at terminal B, and the second capacitor in this embodiment can be set at terminal A.

[0072] This implementation provides both a first capacitor C1 and a second capacitor, which helps to further increase the delay of signal change between the first and second connection terminals. However, in practical applications, the effect of the first capacitor C1 on increasing the delay of signal change between the first and second connection terminals is greater than that of the second capacitor. Therefore, in some cases, in order to simplify the circuit structure, only the first capacitor C1 needs to be provided.

[0073] In the solution of this application, in order to distinguish the waveform difference between terminal A and terminal B, after removing the first resistor R1, in addition to increasing the delay of the signal change between terminal A and terminal B through the set delay circuit 10, it is also necessary to increase the voltage difference between terminal A and terminal B through the amplifier circuit 20. This way, the waveform difference between terminal A and terminal B can be detected by the comparison circuit 30, and then the comparison circuit 30 can determine the fault direction.

[0074] Specifically, the first input terminal of the amplifier circuit 20 is connected to the first connection terminal, and the second input terminal of the amplifier circuit 20 is connected to the second connection terminal. The specific circuit configuration of the amplifier circuit 20 can be set and adjusted according to actual needs, as long as it can achieve the purpose of increasing the voltage difference between the first connection terminal and the second connection terminal.

[0075] In one specific embodiment of the present invention, see [reference needed]. Figure 3 The amplifier circuit 20 may specifically include: a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a first operational amplifier OP1;

[0076] The first end of the third resistor R3 serves as the first end of the amplifier circuit 20. The second end of the third resistor R3 is connected to the first end of the fourth resistor R4 and the non-inverting input of the first operational amplifier OP1. The second end of the fourth resistor R4 is grounded.

[0077] The first end of the fifth resistor R5 serves as the second end of the amplifier circuit 20. The second end of the fifth resistor R5 is connected to the first end of the sixth resistor R6 and the inverting input of the first operational amplifier OP1. The second end of the sixth resistor R6 is connected to the output of the first operational amplifier OP1, and the connection end serves as the output of the amplifier circuit 20.

[0078] The amplifier circuit 20 in this embodiment has a simple structure, high reliability, and easy-to-set amplification factor. Specifically, the resistance values ​​of the third resistor R3 and the fifth resistor R5 are usually set to the same value, and the resistance values ​​of the fourth resistor R4 and the sixth resistor R6 are also usually set to the same value to facilitate determining the amplification factor. For example, if the resistance values ​​of the third resistor R3 and the fifth resistor R5 are both Rf1, and the resistance values ​​of the fourth resistor R4 and the sixth resistor R6 are both Rf2, then the amplification factor of the amplifier circuit 20 is Rf2 / Rf1. In this case, the output voltage Uo of the amplifier circuit 20 can be expressed as:

[0079] Here, VA and VB represent the voltage at terminal A and the voltage at terminal B, respectively. It can be seen that the amplifier circuit 20 in this embodiment amplifies the difference between the voltage at terminal A and the voltage at terminal B by a factor of Rf2 / Rf1, which effectively increases the voltage difference between the first connection terminal and the second connection terminal.

[0080] By increasing the delay of the signal change between terminals A and B through delay circuit 10 and increasing the voltage difference between terminals A and B through amplifier circuit 20, the waveform difference between terminals A and B can be detected by comparator circuit 30. Then, comparator circuit 30 can distinguish whether terminal A or terminal B is pulled low first, thus determining the direction of the fault.

[0081] If the comparator circuit 30 determines that the bidirectional signal line is stuck after the first device sends a signal to the second device, it will output the first signal. If the bidirectional signal line is stuck after the second device sends a signal to the first device, the comparator circuit 30 will output the second signal.

[0082] The specific circuit configuration of the comparator circuit 30 can be set and adjusted according to actual needs. For example, in a specific embodiment of the present invention, the comparator circuit 30 is specifically a comparator circuit 30 with dual voltage thresholds to achieve hysteresis.

[0083] This implementation takes into account that, as described above, different fault directions mean whether terminal A or terminal B is pulled low first. Therefore, a comparator circuit 30 with dual voltage thresholds can be used to implement the hysteresis function, thus distinguishing whether terminal A or terminal B is pulled low first. The comparator circuit 30 with dual voltage thresholds to implement hysteresis has a simple structure and can be implemented using a flip-flop, thereby improving the reliability of this implementation and also helping to reduce the cost of the comparator circuit 30.

[0084] For example, in one specific embodiment of the present invention, see [reference needed]. Figure 3 The comparator circuit 30 is a Schmitt trigger with a first voltage threshold and a second voltage threshold to achieve hysteresis. The Schmitt trigger specifically includes a second operational amplifier OP2, a seventh resistor R7 and an eighth resistor R8.

[0085] The inverting input of the second operational amplifier OP2 serves as the input of the comparator circuit 30 and is connected to the output of the amplifier circuit 20. The non-inverting input of the second operational amplifier OP2 is connected to the second end of the seventh resistor R7 and the first end of the eighth resistor R8, respectively. The second end of the eighth resistor R8 is grounded. The output of the second operational amplifier OP2 is connected to the first end of the seventh resistor R7 and the connection end serves as the output of the comparator circuit 30.

[0086] Accordingly, this Schmitt trigger is specifically used for:

[0087] When the first device sends a signal to the second device, the Schmitt trigger outputs a high-level signal. If the bidirectional signal line is stuck, the output of the Schmitt trigger remains high. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a low-level signal.

[0088] When the second device sends a signal to the first device, the Schmitt trigger outputs a low-level signal. If the bidirectional signal line is stuck, the output of the Schmitt trigger remains low. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a high-level signal.

[0089] In this embodiment, the comparator circuit 30 is implemented by a Schmitt trigger, which is specifically composed of a second operational amplifier OP2, a seventh resistor R7, and an eighth resistor R8. The structure is simple and the reliability is high.

[0090] To facilitate understanding Figure 4 Let's take an example to illustrate. Figure 4 This is a schematic diagram of signal changes in one specific implementation, and... Figure 4In the example, the first device sends a signal to the second device, that is, the signal is transmitted from end A to end B. Therefore, the first device pulls the bidirectional signal line low, that is, end A is pulled low first.

[0091] Figure 4 The first curve in the diagram represents the voltage waveforms at terminals A and B. The second curve represents the voltage waveform obtained by subtracting VB from VA and amplifying it, which is also the waveform of Uo. The first voltage threshold of this Schmitt trigger circuit is positive, and the second voltage threshold is negative. The third curve is a schematic diagram of the output signal of the Schmitt trigger circuit when the bidirectional signal line is normally released after the first device sends a signal to the second device. The fourth curve is a schematic diagram of the output signal of the Schmitt trigger circuit when the bidirectional signal line is normally released after the second device sends a signal to the first device.

[0092] See also Figure 4 Since the first device sends a signal to the second device, terminal A is pulled low first. Due to the presence of delay circuit 10, the voltage at terminal B does not drop immediately. When the voltage at terminal A drops to a certain level, VA minus VB and after amplification, the resulting Uo will be lower than the second voltage threshold. At this time, the output of the Schmitt trigger in this embodiment is high, that is, the output is a high-level signal.

[0093] As the voltage at terminal A decreases, the voltage at terminal B will also begin to decrease after a certain delay. However, Uo will not exceed the first voltage threshold. Therefore, due to the hysteresis function of the Schmitt trigger, the output of the Schmitt trigger remains high in this implementation.

[0094] If the bidirectional signal line is released normally afterward, terminal A will be pulled high first. After VA is subtracted from VB and amplified, the resulting Uo is greater than the first voltage threshold. At this time, the output of the Schmitt trigger in this embodiment is low, that is, the output of the Schmitt trigger switches to a low-level signal.

[0095] If the bidirectional signal line is not released normally but is directly stuck, the output of the Schmitt trigger will still remain high, that is, the output of the Schmitt trigger will remain a high-level signal.

[0096] As can be seen, in this embodiment, if the bidirectional signal line is stuck, the output of the Schmitt trigger remains at a high level, which indicates that the fault direction is from the first device to the second device. That is, before the bidirectional signal line went stuck, the last signal transmission action was initiated by the first device.

[0097] In addition, it should be noted that Figure 4The dashed line representing the output signal of the Schmitt trigger circuit indicates that the output signal of the Schmitt trigger circuit may be either high or low.

[0098] Correspondingly, if the second device sends a signal to the first device, the B terminal is pulled low first. However, due to the existence of the delay circuit 10, the voltage at the A terminal does not drop immediately. When the voltage at the B terminal drops to a certain level, VA minus VB and after amplification, the resulting Uo will be higher than the first voltage threshold. At this time, the output of the Schmitt trigger in this embodiment is low, that is, the output is a low-level signal.

[0099] As the voltage at terminal B decreases, the voltage at terminal A will also begin to decrease after a certain delay. However, Uo will not fall below the second voltage threshold. Therefore, due to the hysteresis function of the Schmitt trigger, the output of the Schmitt trigger is still low in this implementation.

[0100] If the bidirectional signal line is released normally afterward, terminal B will be pulled high first. After VA is subtracted from VB and amplified, the resulting Uo is less than the second voltage threshold. At this time, the output of the Schmitt trigger in this embodiment is high, that is, the output of the Schmitt trigger switches to a high-level signal.

[0101] If the bidirectional signal line is not released normally but is directly stuck, the output of the Schmitt trigger will remain low, that is, the output of the Schmitt trigger will remain a low-level signal.

[0102] As can be seen, in this implementation, if the bidirectional signal line is stuck and the output of the Schmitt trigger remains at a low level, it can be determined that the fault direction is from the second device to the first device. That is, before the bidirectional signal line was stuck, the last signal transmission action was initiated by the second device.

[0103] In one specific embodiment of the present invention, it may further include:

[0104] A display device is used to display the output waveform of the comparison circuit 30 during the fault reproduction process.

[0105] As described above, when the bidirectional signal line is blocked, the direction of the fault can be determined based on the signal output by the comparison circuit 30. In this embodiment, the output waveform of the comparison circuit 30 can be directly displayed during the fault reproduction process through the provided display device, which makes it convenient for staff to intuitively and in real time view the output waveform of the comparison circuit 30. For example, the display device can be an oscilloscope.

[0106] Furthermore, in one specific embodiment of the present invention, the display device can also be used to: read and display the fault log when the bidirectional signal line is stuck during the fault reproduction process.

[0107] This implementation takes into account that, during fault reproduction, when the bidirectional signal line is stuck, a fault log can be displayed to assist the staff. Although the fault log cannot determine the defect in the driver layer, i.e., the direction of the fault cannot be determined, this implementation considers that the fault log can still provide some assistance to the staff during fault analysis and resolution. For example, the fault log can determine the fault situation in the protocol layer, i.e., which command was executed that triggered the fault, ultimately causing the bidirectional signal line to be stuck. Therefore, in this implementation, during fault reproduction, when the bidirectional signal line is stuck, the fault log can be read and displayed to assist the staff.

[0108] Applying the technical solution provided in this invention, under normal conditions, the first device is connected in series with the second device through the first resistor R1, and the connection line used is a bidirectional signal line. When a fault occurs and the fault is located to be in the bidirectional signal line, fault reproduction can be performed. During fault reproduction, the original first resistor R1 needs to be removed, and then the first device is connected in series with the second device through the bidirectional signal line fault direction determination device. That is, the original first resistor R1 is replaced by the bidirectional signal line fault direction determination device of this application. The connection end between the first resistor R1 and the first device is referred to as the first connection end, and the connection end between the first resistor R1 and the second device is referred to as the second connection end.

[0109] Since the waveforms at the first and second connection terminals are nearly identical during signal transmission in a bidirectional signal line, a delay circuit 10 is provided after removing the first resistor R1 to distinguish the waveform differences between the first and second connection terminals. The first terminal of the delay circuit 10 is connected to the first connection terminal, and the second terminal is connected to the second connection terminal. The delay circuit 10 increases the delay of the signal change between the first and second connection terminals, thus causing a shift in the waveform between the first and second connection terminals. An amplifier circuit 20 is then used to process the signal difference. Specifically, the first input terminal of the amplifier circuit 20 is connected to the first connection terminal, and the second input terminal is connected to the second connection terminal. The amplifier circuit 20 increases the voltage difference between the first and second connection terminals, allowing the comparison circuit 30 to detect the waveform difference between the first and second connection terminals. The comparator circuit 30 can output the first signal after the first device sends a signal to the second device and the bidirectional signal line is stuck. If the bidirectional signal line is stuck after the second device sends a signal to the first device, the comparator circuit 30 outputs the second signal. In other words, the comparator circuit 30 can detect the transmission direction of the last signal sent before the bidirectional signal line is stuck, thus realizing the fault direction judgment.

[0110] In summary, for bidirectional signal lines, the solution proposed in this application can effectively determine the direction of the fault.

[0111] Corresponding to the above embodiments of the fault direction determination device for bidirectional signal lines, this embodiment of the invention also provides a fault analysis and processing device, which may include the fault direction determination device for bidirectional signal lines as in any of the above embodiments, and can be referred to in correspondence with the above description, and will not be repeated here.

[0112] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0113] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0114] This article uses specific examples to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims

1. A fault direction determination device for a bidirectional signal line, characterized in that, Under normal conditions, the first device is connected in series with the second device through a first resistor, and the connection line used is a bidirectional signal line. The connection end between the first resistor and the first device is referred to as the first connection end, and the connection end between the first resistor and the second device is referred to as the second connection end. When reproducing a fault, the first device is connected in series with the second device through a fault direction determination device of the bidirectional signal line. The fault direction determination device of the bidirectional signal line includes: a delay circuit, an amplification circuit, and a comparison circuit. The first end of the delay circuit is connected to the first connection end, and the second end of the delay circuit is connected to the second connection end. The delay circuit is used to increase the delay of the signal change between the first connection end and the second connection end. The first input terminal of the amplifier circuit is connected to the first connection terminal, and the second input terminal of the amplifier circuit is connected to the second connection terminal. The amplifier circuit is used to increase the voltage difference between the first connection terminal and the second connection terminal. The comparator circuit is connected to the output terminal of the amplifier circuit. The comparator circuit is used to: output a first signal when the bidirectional signal line is blocked after the first device sends a signal to the second device; and output a second signal when the bidirectional signal line is blocked after the second device sends a signal to the first device.

2. The fault direction determination device for a bidirectional signal line according to claim 1, characterized in that, The delay circuit includes: a second resistor and a first capacitor; The first end of the second resistor serves as the first end of the delay circuit, the second end of the second resistor serves as the second end of the delay circuit, and the resistance value of the second resistor is higher than the resistance value of the first resistor. The first terminal of the first capacitor is connected to the second terminal of the pull-up resistor in the bidirectional signal line, and the second terminal of the first capacitor is grounded. Wherein, the first end of the pull-up resistor is connected to the positive terminal of the first power supply so that the default state of the bidirectional signal line is a high level state, and the second end of the pull-up resistor is connected to the first connection terminal or to the second connection terminal.

3. The fault direction determination device for a bidirectional signal line according to claim 2, characterized in that, The delay circuit further includes: a second capacitor with its second terminal grounded; When the first terminal of the first capacitor is connected to the first connection terminal, the first terminal of the second capacitor is connected to the second connection terminal; When the first terminal of the first capacitor is connected to the second connection terminal, the first terminal of the second capacitor is connected to the first connection terminal.

4. The fault direction determination device for a bidirectional signal line according to claim 2, characterized in that, The amplifier circuit includes: a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a first operational amplifier; The first end of the third resistor serves as the first end of the amplifier circuit, the second end of the third resistor is connected to the first end of the fourth resistor and the non-inverting input of the first operational amplifier, and the second end of the fourth resistor is grounded. The first end of the fifth resistor serves as the second end of the amplifier circuit. The second end of the fifth resistor is connected to the first end of the sixth resistor and the inverting input of the first operational amplifier. The second end of the sixth resistor is connected to the output of the first operational amplifier, and the connection end serves as the output of the amplifier circuit.

5. The fault direction determination device for a bidirectional signal line according to claim 1, characterized in that, The pin containing the bidirectional signal line is a bidirectional communication pin. When the number of bidirectional communication pins does not meet the design requirements, the functional pins simulated by general-purpose input / output pins are used.

6. The fault direction determination device for a bidirectional signal line according to claim 1, characterized in that, Also includes: A display device is used to display the output waveform of the comparison circuit during the fault reproduction process.

7. The fault direction determination device for a bidirectional signal line according to claim 6, characterized in that, The display device is also used for: During the fault reproduction process, when the bidirectional signal line is stuck, the fault log is read and displayed.

8. The fault direction determination device for a bidirectional signal line according to any one of claims 1 to 7, characterized in that, The comparator circuit is specifically a comparator circuit with dual voltage thresholds to achieve hysteresis.

9. The fault direction determination device for a bidirectional signal line according to claim 8, characterized in that, The comparator circuit is a Schmitt trigger with a first voltage threshold and a second voltage threshold to achieve hysteresis. The Schmitt trigger specifically includes a second operational amplifier, a seventh resistor, and an eighth resistor. The inverting input terminal of the second operational amplifier serves as the input terminal of the comparator circuit and is connected to the output terminal of the amplifier circuit. The non-inverting input terminal of the second operational amplifier is connected to the second terminal of the seventh resistor and the first terminal of the eighth resistor, respectively. The second terminal of the eighth resistor is grounded. The output terminal of the second operational amplifier is connected to the first terminal of the seventh resistor, and the connection terminal serves as the output terminal of the comparator circuit. Accordingly, the Schmitt trigger is specifically used for: After the first device sends a signal to the second device, the Schmitt trigger outputs a high-level signal. If the bidirectional signal line is hung, the output of the Schmitt trigger remains high. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a low-level signal. After the second device sends a signal to the first device, the Schmitt trigger outputs a low-level signal. If the bidirectional signal line is stuck, the output of the Schmitt trigger remains low. If the bidirectional signal line is released normally, the output of the Schmitt trigger switches to a high-level signal.

10. A fault analysis and processing device, characterized in that, It includes a fault direction determination device for a bidirectional signal line as described in any one of claims 1 to 9.

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