Ladder diagram program application device and method

Abstract

The present application provides a ladder diagram program application device and method. The ladder diagram program application device provided by the present application is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; the host computer is used to build a target project file on the Feiteng platform based on the ladder diagram library, and the target project file includes at least one ladder diagram, and the host computer at least includes a ladder diagram library; the host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set. The ladder diagram program application device and method provided by the present application, on the one hand, by abstracting the ladder diagram into a unified and standardized variable table file and a universal form of a processing logic file, the ladder diagram files of different platforms are integrated on the Feiteng platform, and the ladder diagram can be freely transferred and processed between multiple platforms, with good reusability and low time cost for ladder diagram transplantation; on the other hand, PLC programming is realized through ladder diagrams on the Feiteng platform.

Description

Technical Field

[0001] The present application relates to the technical field of ladder diagram programming, and in particular to a ladder diagram program application device and method. Background Art

[0002] As one of the five configuration languages, ladder diagram is widely used in PLC. The current PLC technology is relatively mature, and there are precedents for developing PLC on other platforms.

[0003] The Feiteng platform is a representative domestic chip based on the ARM instruction set license. Based on the ARM8 license, the CPU of the Feiteng platform has gradually formed its own instruction set. However, the existing PLCs that support ladder diagram programming have not yet been adapted to the Feiteng platform, which is a blind spot for domestic chips; and the legacy industries mostly use ladder diagram programming. When transplanting ladder diagrams, because different companies' products have different ways of processing ladder diagrams, transplantation is mostly based on manual processing and is very time-consuming. Therefore, the reusability of ladder diagrams on the Feiteng platform is poor, the time cost of transplantation is high, and there are few platforms that can perform ladder diagram programming. The portability of the ladder diagram itself is also poor. Summary of the invention

[0004] In view of this, the present application provides a ladder diagram program application device and method to realize PLC programming through ladder diagrams on the Feiteng platform and reduce the time cost of ladder diagram transplantation.

[0005] Specifically, the present application is implemented through the following technical solutions:

[0006] The first aspect of the present application provides a ladder diagram program application device, which is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein,

[0007] The host computer is used to construct a target engineering file on the Feiteng platform based on a ladder diagram library, wherein the target engineering file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library;

[0008] The ladder diagram library includes a plurality of ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least an input area variable and an output area variable, and the input area variable and the output area variable use the same storage address and are stored in the same memory space, and a read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier;

[0009] The processing logic file is used to store the processing logic in the corresponding ladder diagram;

[0010] The host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register.

[0011] Optionally, the input area variable has a first identifier, the output area variable has a second identifier, and the read / write request includes at least an access address and a permission identifier;

[0012] The read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including:

[0013] Determine a target memory area according to the access address;

[0014] matching the authority identifier with the first identifier and the second identifier;

[0015] If the permission identifier matches the first identifier, read and write control is performed on the input area variable;

[0016] If the permission identifier matches the second identifier, read and write control is performed on the output area variable.

[0017] Optionally, the read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including:

[0018] If the read / write request is a read request, read the input area variable or the output area variable in the content space corresponding to the access address;

[0019] If the read / write request is a write request, the read / write request at least includes variable information to be written, and the input area variable or the output area variable in the content space corresponding to the access address is replaced with the variable information written in the read / write request.

[0020] Optionally, each ladder diagram is a functional module, a functional module includes one or more components, and the processing logic is one or more data processing functions in the ladder diagram;

[0021] The processing logic file is used to store the processing logic in the corresponding ladder diagram, specifically including:

[0022] Track the input and output data of each component in the ladder diagram to form a data processing process;

[0023] Determine a data processing function that implements a corresponding function according to the data processing process, where each data processing process corresponds to one or more data processing functions;

[0024] The arrangement order of data processing functions is determined according to the logical order of the data processing process to form a processing logic file.

[0025] Optionally, the host computer further includes an adapter module and a plurality of application interfaces, and the ladder diagram file format corresponding to each application interface is different from the stored file;

[0026] The adaptation module is used to identify the file format of the ladder diagram input from the outside, match the corresponding target application interface based on the file format of the ladder diagram input from the outside, extract variable information and logical processing process from the stored file based on the target application interface, form an external variable file and processing logic file corresponding to the ladder diagram input from the outside, and identify and store the ladder diagram input from the outside.

[0027] Optionally, the identifying and storing the ladder diagram input from the outside specifically includes:

[0028] The target application interface extracts input variable information and output variable information of the ladder diagram input from the outside, creates a third identifier of the input variable information and a fourth identifier of the output variable information respectively, allocates a storage address to the external variable file, and stores the input variable information and the third identifier of the ladder diagram input from the outside and the output variable information and the fourth identifier of the ladder diagram input from the outside to the allocated storage address to form an external variable file;

[0029] According to the data processing process of the ladder diagram input from the outside, a data processing function that realizes a corresponding function is matched, and a processing logic file is formed according to the matched data processing function;

[0030] The external variable file and processing logic file corresponding to the ladder diagram input from the outside are stored to store the ladder diagram input from the outside.

[0031] Optionally, each ladder diagram stored in the ladder diagram library includes at least an associated stored external variable file and a processing logic file, specifically including:

[0032] The external variable file corresponding to each ladder diagram in the ladder diagram library includes at least variable information, and the variable information includes at least the name, type, value and attribute of the variable;

[0033] Store variable information in the form of a variable table to form an external variable file corresponding to the ladder diagram;

[0034] For each ladder diagram in the ladder diagram library, according to the data processing process, a data processing function that realizes a corresponding function is matched, a processing logic is formed according to the matched data processing function, and the extracted processing logic is stored in the form of an engineering file;

[0035] The external variable file is associated with the project file.

[0036] Optionally, the host computer further includes a writing module, a detection module and a downloading module; wherein,

[0037] The writing module is used to build a target project file using the ladder diagram library in response to a user's selection, and the writing module is connected to the compiling module;

[0038] The detection module is used to simulate the operation process and results of the built target engineering file to detect the correctness of the program, and the detection module is connected to the download module;

[0039] The download module is used to import the executable binary file obtained by compiling the target project file into the actual PLC device to modify the program in real time.

[0040] Optionally, the ladder diagram program application device further includes a lower computer, which is used to receive and process an executable binary file obtained by compiling the target project file on the upper computer on the PLC device; the lower computer includes an execution module, a debugging module and an upper loading module; wherein,

[0041] The execution module is used to receive and parse an executable binary file;

[0042] The debugging module is used to simulate the running process of the binary file in the PLC device to ensure the accuracy of program running;

[0043] The upload module is used to upload the binary file exported from the PLC device to the host computer for rewriting and compiling.

[0044] A second aspect of the present application provides a ladder diagram program application method, the ladder diagram program application method is applied to the Feiteng platform, the method comprising:

[0045] Building a target project file on the Feiteng platform based on a ladder diagram library, wherein the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library;

[0046] The ladder diagram library includes a plurality of ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least an input area variable and an output area variable, and the input area variable and the output area variable use the same storage address and are stored in the same memory space, and a read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram;

[0047] Match the ladder diagram external variable file and the processing logic file in the target project file, search for registers corresponding to the compilation instruction according to the matched files, and compile the matched files using the registers.

[0048] The application provides a ladder diagram program application device and method, wherein the ladder diagram program application device is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein the host computer is used to construct a target project file on the Feiteng platform based on a ladder diagram library, wherein the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library; wherein the ladder diagram library includes multiple ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least input area variables and output area variables, The input area variable and the output area variable use the same storage address and are stored in the same memory space. The read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram; the host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register. On the one hand, by abstracting the ladder diagram into a unified and standardized variable table file and a general form of the processing logic file, the ladder diagram files of different platforms are integrated in the Feiteng platform, realizing the free transfer and processing of the ladder diagram between multiple platforms, with good reusability and low time cost of ladder diagram transplantation; on the other hand, the corresponding files are compiled according to the general file format that can be recognized by each platform and the instruction set and corresponding register of the Feiteng platform, thereby realizing PLC programming through ladder diagram on the Feiteng platform. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1A schematic diagram of the structure of a ladder diagram program application device embodiment 1 provided by the present application;

[0050] Figure 2 A schematic diagram of a process image shown as an exemplary embodiment of the present application;

[0051] Figure 3 This is an architecture diagram of a ladder diagram program application device shown as an exemplary embodiment of the present application;

[0052] Figure 4 This is an interface diagram of a host computer shown in an exemplary embodiment of the present application;

[0053] Figure 5 This is a flowchart of the first embodiment of the ladder diagram program application method provided in this application. DETAILED DESCRIPTION

[0054] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0055] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0056] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0057] The present application provides a ladder diagram program application device and method for realizing PLC programming through ladder diagrams on the Feiteng platform and reducing the time cost of ladder diagram transplantation.

[0058] The application provides a ladder diagram program application device and method, wherein the ladder diagram program application device is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein the host computer is used to construct a target project file on the Feiteng platform based on a ladder diagram library, wherein the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library; wherein the ladder diagram library includes multiple ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least input area variables and output area variables, The input area variable and the output area variable use the same storage address and are stored in the same memory space. The read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram; the host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register. On the one hand, by abstracting the ladder diagram into a unified and standardized variable table file and a general form of the processing logic file, the ladder diagram files of different platforms are integrated in the Feiteng platform, realizing the free transfer and processing of the ladder diagram between multiple platforms, with good reusability and low time cost of ladder diagram transplantation; on the other hand, the corresponding files are compiled according to the general file format that can be recognized by each platform and the instruction set and corresponding register of the Feiteng platform, thereby realizing PLC programming through ladder diagram on the Feiteng platform.

[0059] Specific embodiments are given below to introduce the technical solution of the present application in detail.

[0060] Figure 1 This is a schematic diagram of the structure of the ladder diagram program application device embodiment 1 provided by this application. Figure 1 , the device provided in this embodiment, the ladder diagram program application device is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein,

[0061] The host computer is used to construct a target engineering file on the Feiteng platform based on a ladder diagram library, wherein the target engineering file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library;

[0062] The ladder diagram library includes a plurality of ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least an input area variable and an output area variable, and the input area variable and the output area variable use the same storage address and are stored in the same memory space, and a read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier;

[0063] The processing logic file is used to store the processing logic in the corresponding ladder diagram;

[0064] Preferably, the host computer includes memory, and the IEC memory allocation in the host computer is modified according to the memory capacity of the Feiteng platform. The modified memory includes at least a data area memory and a program area memory, which are used to store data files and program codes, respectively.

[0065] The host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register.

[0066] Specifically, the compiling module is used to compile the written program into machine language, and then compile the machine language into an executable binary file, and pass it to the lower computer.

[0067] In order to enable the Feiteng platform's instruction set to compile the universal external variable files and processing logic files generated by the above steps, preferably, the present invention provides compilation optimization. Specifically, (1) compiler backend optimization is performed for the Feiteng ARM V8 instruction set, CPU, and registers; (2) IEC memory allocation is modified based on memory capacity; (3) the traditional power-off retention function is improved based on the NVSRAM power-off retention driver.

[0068] Specifically, the Feiteng ARMV8 instruction set contains a series of instructions, and the form of the Feiteng ARMV8 instruction set includes the following features: (1) Reduced instruction set: The ARM architecture has a simplified instruction set, which provides efficient instruction execution, helps improve performance and reduce power consumption; (2) 64-bit architecture: Feiteng ARM V8 uses a 64-bit instruction set, supports a larger memory address space and higher data processing capabilities; (3) SIMD (Single Instruction, Multiple Data) instructions: provides the ability to perform multiple data operations on the same instruction, helps to process data in parallel, and improves the performance of multimedia and graphics applications; (4) Virtualization support: The ARM V8 architecture has strong virtualization support, which enables it to perform well in server and cloud computing environments; (5) Security enhancement: ARM V8 introduces some security enhancement features to help protect the system from various attacks and threats.

[0069] It should be noted that, according to the register and the file type of the matched file, corresponding commands may be used for compilation. If the register requires other options or parameters, they may be adjusted according to actual needs.

[0070] Specifically, the compilation of the ladder diagram is divided into upper computer compilation and lower computer execution. When the upper computer compiles, based on the above-mentioned common external variable files and processing logic files and the IEC61131-3 standard, the ladder diagram is compiled into the IL instruction table language as the universal intermediate code of the upper computer. The universal intermediate code is universal for all platforms. The universal intermediate code consists of an operation code with a length of 1 byte. The operation codes of different instructions are different, and the operation codes of different instructions are one or more; wherein, the universal intermediate code is hardware independent, has nothing to do with the communication software and the operating system, and can be executed on different target systems to ensure portability.

[0071] Furthermore, when the lower computer executes the program code, the lower computer at least includes a memory access module and a U-code interpreter. The memory access module is connected to the Feiteng platform for sending and reading data and accessing executable code. The memory access module converts data and / or code into a standard format and communicates with the U-code interpreter. The memory access module is independent in the lower computer. When performing platform transplantation, only the content of the module needs to be modified, and other kernel functions such as the U-code interpreter do not need to be modified. In order to cooperate with the Feiteng platform, the memory access module is modified to the little-endian byte order, and the executable universal intermediate code is read and sent to the U-code interpreter. The U-code interpreter is used to interpret and execute the universal intermediate code, determine the type of each opcode in the universal intermediate code, and determine the execution function based on the type. U-code executes the execution function in a stack. Specifically: first, load the instruction to push all instructions into the stack, then combine the first and second elements in the stack before executing the instruction (the number of elements varies according to the instruction type), and finally the result of the operation is returned to the stack.

[0072] The lower computer executes the ladder diagram application to realize the functions corresponding to the target project file. In order to realize the communication between the ladder diagram application and the external variables, at least one process image is set in the lower computer. Figure 2 This is a schematic diagram of a process image shown in an exemplary embodiment of the present application. Figure 2 , the process image is used to process external variables. The process image includes at least: a segment header, a first storage space, a second storage space, a third storage space, and a fourth storage space. The first storage space is used to store physical input (%I), the second storage space is used to store physical output (%Q), the third storage space is used to store identifiers (%M), and the fourth storage space gaps is an unused storage space.

[0073] Further, the lower computer is provided with two shared memory areas, including area I and area Q, area I is used to store physical input data, and area Q is used to store physical output data, and a first interface and a second interface are provided, which are used to associate the process image with the memory variables in area I and area Q, respectively. Optionally, the first interface is an EnvReadProcImg interface, and the second interface is an EnvWriteProcImg interface. The first interface is called before each program loop, and is responsible for reading the shared memory area I (i.e., physical input) and writing the input area of ​​the process image; the second interface is called after each program loop, and is responsible for writing the output area of ​​the process image to the shared memory area Q (i.e., physical output). As an optional embodiment, the size of area I and area Q is set according to the storage requirements of the Feiteng platform.

[0074] As an optional embodiment, in order to download the ladder diagram input from the outside, the present invention also provides a serial port adapter module, preferably, it can be an RS485 serial port driver adapter module, the serial port adapter module is used to execute the function of switching the serial port according to the download execution, the function of the serial port at least includes the ladder diagram program download function and the serial port driver function of the MODBUS RTU communication protocol, the two functions can reuse one serial port, give full play to the hardware capabilities, and improve the hardware utilization rate; as an optional embodiment, the present invention can also realize the data communication between the ladder diagram program and the local IO and remote IO through the shared memory mode; the hardware adaptation also includes the communication protocol adaptation, including the modbus TCP slave protocol and the RTU slave protocol adaptation.

[0075] Optionally, the host computer further includes an adapter module and a plurality of application interfaces, and the ladder diagram file format corresponding to each application interface is different from the stored file;

[0076] The adaptation module is used to identify the file format of the ladder diagram input from the outside, match the corresponding target application interface based on the file format of the ladder diagram input from the outside, extract variable information and logical processing process from the stored file based on the target application interface, form an external variable file and processing logic file corresponding to the ladder diagram input from the outside, and identify and store the ladder diagram input from the outside.

[0077] Specifically, the application interface matches the file format of the ladder diagram one by one. In other words, each application interface matches a ladder diagram to identify and store the ladder diagram.

[0078] Optionally, each ladder diagram is a functional module, a functional module includes one or more components, and the processing logic is one or more data processing functions in the ladder diagram;

[0079] The processing logic file is used to store the processing logic in the corresponding ladder diagram, specifically including:

[0080] Track the input and output data of each component in the ladder diagram to form a data processing process;

[0081] Determine a data processing function that implements a corresponding function according to the data processing process, where each data processing process corresponds to one or more data processing functions;

[0082] The arrangement order of data processing functions is determined according to the logical order of the data processing process to form a processing logic file.

[0083] Specifically, each data processing process corresponds to one data processing function or multiple data processing functions. The arrangement order of the corresponding data processing functions can be determined according to the logical order of the data processing processes, and the data processing functions can be combined in the arrangement order to form a processing logic file.

[0084] Optionally, the identifying and storing the ladder diagram input from the outside specifically includes:

[0085] The target application interface extracts input variable information and output variable information of the ladder diagram input from the outside, creates a third identifier of the input variable information and a fourth identifier of the output variable information respectively, allocates a storage address to the external variable file, and stores the input variable information and the third identifier of the ladder diagram input from the outside and the output variable information and the fourth identifier of the ladder diagram input from the outside to the allocated storage address to form an external variable file;

[0086] According to the data processing process of the ladder diagram input from the outside, a data processing function that realizes a corresponding function is matched, and a processing logic file is formed according to the matched data processing function;

[0087] The external variable file and processing logic file corresponding to the ladder diagram input from the outside are stored to store the ladder diagram input from the outside.

[0088] Specifically, the input variable information and output variable information of the ladder diagram input from the outside are stored as an external variable file corresponding to the ladder diagram, and the data processing project of the ladder diagram input from the outside is stored as a processing logic file corresponding to the ladder diagram.

[0089] Optionally, each ladder diagram stored in the ladder diagram library includes at least an associated stored external variable file and a processing logic file, specifically including:

[0090] The external variable file corresponding to each ladder diagram in the ladder diagram library includes at least variable information, and the variable information includes at least the name, type, value and attribute of the variable;

[0091] Store variable information in the form of a variable table to form an external variable file corresponding to the ladder diagram;

[0092] For each ladder diagram in the ladder diagram library, according to the data processing process, a data processing function that realizes a corresponding function is matched, a processing logic is formed according to the matched data processing function, and the extracted processing logic is stored in the form of an engineering file;

[0093] The external variable file is associated with the project file.

[0094] Specifically, the external variable file and the project file corresponding to each ladder diagram are associated to facilitate subsequent matching of the corresponding target application interface.

[0095] Optionally, the input area variable has a first identifier, the output area variable has a second identifier, and the read / write request includes at least an access address and a permission identifier;

[0096] The read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including:

[0097] Determine a target memory area according to the access address;

[0098] matching the authority identifier with the first identifier and the second identifier;

[0099] If the permission identifier matches the first identifier, read and write control is performed on the input area variable;

[0100] If the permission identifier matches the second identifier, read and write control is performed on the output area variable.

[0101] Optionally, the read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including:

[0102] If the read / write request is a read request, read the input area variable or the output area variable in the content space corresponding to the access address;

[0103] If the read / write request is a write request, the read / write request at least includes variable information to be written, and the input area variable or the output area variable in the content space corresponding to the access address is replaced with the variable information written in the read / write request.

[0104] Optionally, the host computer further includes a writing module, a detection module and a downloading module; wherein,

[0105] The writing module is used to build a target project file using the ladder diagram library in response to a user's selection, and the writing module is connected to the compiling module;

[0106] The detection module is used to simulate the operation process and results of the built target engineering file to detect the correctness of the program, and the detection module is connected to the download module;

[0107] The download module is used to import the executable binary file obtained by compiling the target project file into the actual PLC device to modify the program in real time.

[0108] Specifically, Figure 3 This is a diagram showing the architecture of a ladder diagram program application device according to an exemplary embodiment of the present application. Figure 3 In the writing module, the ladder diagram can be used to intuitively draw the program as expected. Each drawn project corresponds to an actual control program, and different purposes can be achieved through different projects. The host computer supports both 32-bit operating system and 64-bit operating system. This application establishes different operating system configurations for 32-bit operating system and 64-bit operating system. In this application, 64-bit operating system is selected for illustration.

[0109] Furthermore, in the detection module, the execution results of the program by the PLC device or the host computer itself can be detected, and the written program can be adjusted and optimized according to the search results. The operation process and results of the PLC can be simulated using the PLC device or simulation device to preliminarily detect the correctness of the program.

[0110] Furthermore, in the download module, the compiled binary file can be imported into the actual PLC device, and the operation of the PLC device can be observed through the host computer to make real-time corrections to the program. Figure 4 This is an interface diagram of a host computer showing an exemplary embodiment of the present application.

[0111] Optionally, the ladder diagram program application device further includes a lower computer, which can be preferably a PLC device, receiving and processing an executable binary file obtained by compiling the target project file on the upper computer on the PLC device; the lower computer includes an execution module, a debugging module and an upper loading module; wherein,

[0112] The execution module is used to receive and parse an executable binary file;

[0113] The debugging module is used to simulate the running process of the binary file in the PLC device to ensure the accuracy of program running;

[0114] The upload module is used to upload the binary file exported from the PLC device to the host computer for rewriting and compiling.

[0115] For details, please continue to refer to Figure 3, the debugging module includes an IO module and a PN communication module; in the IO module, IO operation refers to obtaining the input of the device and outputting to the device after the operation. The logical part of the program includes formal analog input and output variables and their addresses in the operating system. The actual digital input and output are processed by the IO module. The PLC device contains multiple IO modules, each of which corresponds to multiple digital input and output points. Through these IO modules, the PLC device can obtain external input to output to an external machine. There is an address variable conversion table in the PLC device, which can map the analog address in the program with the actual digital address to ensure the accuracy of the program operation.

[0116] In the PN communication module, PN communication refers to the communication between the master station and the slave station using the ProfiNet protocol. For IO operations, the slave station is responsible for collecting input and output information, while the master station is mainly responsible for the operation of the program except for a small part of IO. The peers of the master station and the slave station are executed in the lower computer. PN communication existed as an independent module at first, and later, in order to ensure real-time and reliability, it was directly embedded in the lower computer as a part.

[0117] It should be noted that the upper mounting module is usually used in the on-site debugging stage in actual situations.

[0118] The ladder diagram program application device provided in this embodiment is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein the host computer is used to construct a target project file on the Feiteng platform based on a ladder diagram library, and the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library; wherein the ladder diagram library includes multiple ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an associated stored external variable file and a processing logic file, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least input area variables and output area variables, and the The input area variable and the output area variable use the same storage address and are stored in the same memory space. The read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram; the host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register. On the one hand, by abstracting the ladder diagram into a unified and standardized universal form of the variable table file and the processing logic file, the ladder diagram files of different platforms are integrated in the Feiteng platform, realizing the free transfer and processing of the ladder diagram between multiple platforms, with good reusability and low time cost of ladder diagram transplantation; on the other hand, according to the universal file format that can be recognized by each platform and the instruction set and corresponding register of the Feiteng platform, the corresponding file is compiled, thereby realizing PLC programming through the ladder diagram on the Feiteng platform.

[0119] Figure 5 This is a flowchart of the first embodiment of the ladder diagram program application method provided by this application. Please refer to Figure 5 The method provided in this embodiment, the ladder diagram program application method is applied to the Feiteng platform, and the method includes:

[0120] S501. Build a target project file on the Feiteng platform based on the ladder diagram library. The target project file includes at least one ladder diagram, and the host computer includes at least the ladder diagram library.

[0121] Wherein, the ladder diagram library includes multiple ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an associated external variable file and a processing logic file, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least input area variables and output area variables. The input area variables and the output area variables use the same storage address and are stored in the same memory space. The read and write requests perform read and write control on the input area variables or the output area variables in the same storage address according to the access address and permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram.

[0122] Specifically, a reusable ladder diagram for certain specific functions can be created by combining and packaging one or more components.

[0123] In a possible implementation, the ladder diagram can also be obtained by external import, and when imported, the ladder diagram is abstracted into a common form of a unified and standardized external variable file and a processing logic file. Among them, the external variable file is used to store variable information in the ladder diagram, and the processing logic file is used to store the processing logic in the ladder diagram.

[0124] S502, matching ladder diagram external variable files and processing logic files in the target project file, searching for registers corresponding to compile instructions according to the matched files, and compiling the matched files using the registers.

[0125] In specific implementation, the target project file can be compiled through the registers mounted on the Feiteng platform. According to the registers and the file type of the target project file, corresponding commands are used for compilation, and an executable binary file is obtained after successful compilation.

[0126] The ladder diagram program application method provided in this embodiment is applied to the Feiteng platform, and the ladder diagram program application device includes at least a host computer; wherein the host computer is used to construct a target project file on the Feiteng platform based on a ladder diagram library, and the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library; wherein the ladder diagram library includes multiple ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an associated stored external variable file and a processing logic file, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least input area variables and output area variables, and the The input area variable and the output area variable use the same storage address and are stored in the same memory space. The read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram; the host computer also includes at least a compilation module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compilation instruction according to the matched file, and compiling the matched file using the register. On the one hand, by abstracting the ladder diagram into a unified and standardized universal form of the variable table file and the processing logic file, the ladder diagram files of different platforms are integrated in the Feiteng platform, realizing the free transfer and processing of the ladder diagram between multiple platforms, with good reusability and low time cost of ladder diagram transplantation; on the other hand, according to the universal file format that can be recognized by each platform and the instruction set and corresponding register of the Feiteng platform, the corresponding file is compiled, thereby realizing PLC programming through the ladder diagram on the Feiteng platform.

[0127] The implementation process of the functions and effects of each unit in the above-mentioned device is specifically described in the implementation process of the corresponding steps in the above-mentioned method, and will not be repeated here.

[0128] For the device embodiment, since it basically corresponds to the method embodiment, the relevant parts can refer to the partial description of the method embodiment. The device embodiment described above is only schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present application scheme. A person of ordinary skill in the art can understand and implement it without paying any creative work.

[0129] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A ladder diagram program application device, characterized in that: The ladder diagram program application device is applied to the Feiteng platform, and the ladder diagram program application device at least includes a host computer; wherein, The host computer is used to construct a target engineering file on the Feiteng platform based on a ladder diagram library, wherein the target engineering file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library; The ladder diagram library includes a plurality of ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least an input area variable and an output area variable, and the input area variable and the output area variable use the same storage address and are stored in the same memory space, and a read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier; The processing logic file is used to store the processing logic in the corresponding ladder diagram; The host computer also includes at least a compiling module, which is used to compile the target project file according to the Feiteng platform instruction set, wherein compiling the target project file at least includes matching the ladder diagram external variable file and the processing logic file in the target project file, searching for the register corresponding to the compiling instruction according to the matched file, and compiling the matched file using the register; The host computer also includes an adapter module and multiple application interfaces, and the ladder diagram file format corresponding to each application interface is different from the stored file; The adaptation module is used to identify the file format of the ladder diagram input from the outside, match the corresponding target application interface based on the file format of the ladder diagram input from the outside, extract variable information and logical processing process from the stored file based on the target application interface, form an external variable file and processing logic file corresponding to the ladder diagram input from the outside, and identify and store the ladder diagram input from the outside.

2. The device according to claim 1, characterized in that The input area variable has a first identifier, the output area variable has a second identifier, and the read / write request includes at least an access address and a permission identifier; The read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including: Determine a target memory area according to the access address; matching the authority identifier with the first identifier and the second identifier; If the permission identifier matches the first identifier, read and write control is performed on the input area variable; If the permission identifier matches the second identifier, read and write control is performed on the output area variable.

3. The device according to claim 1, characterized in that The read / write request performs read / write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier, specifically including: If the read / write request is a read request, read the input area variable or the output area variable in the content space corresponding to the access address; If the read / write request is a write request, the read / write request at least includes variable information to be written, and the input area variable or the output area variable in the content space corresponding to the access address is replaced with the variable information written in the read / write request.

4. The device according to claim 1, characterized in that Each ladder diagram is a functional module, and a functional module includes one or more components, and the processing logic is one or more data processing functions in the ladder diagram; The processing logic file is used to store the processing logic in the corresponding ladder diagram, specifically including: Track the input and output data of each component in the ladder diagram to form a data processing process; Determine a data processing function that implements a corresponding function according to the data processing process, where each data processing process corresponds to one or more data processing functions; The arrangement order of data processing functions is determined according to the logical order of the data processing process to form a processing logic file.

5. The device according to claim 1, characterized in that The step of identifying and storing the ladder diagram input from the outside world specifically includes: The target application interface extracts input variable information and output variable information of the ladder diagram input from the outside, creates a third identifier of the input variable information and a fourth identifier of the output variable information respectively, allocates a storage address to the external variable file, and stores the input variable information and the third identifier of the ladder diagram input from the outside and the output variable information and the fourth identifier of the ladder diagram input from the outside to the allocated storage address to form an external variable file; According to the data processing process of the ladder diagram input from the outside, a data processing function that realizes a corresponding function is matched, and a processing logic file is formed according to the matched data processing function; The external variable file and processing logic file corresponding to the ladder diagram input from the outside are stored to store the ladder diagram input from the outside.

6. The device according to claim 1, wherein each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, specifically including: The external variable file corresponding to each ladder diagram in the ladder diagram library includes at least variable information, and the variable information includes at least the name, type, value and attribute of the variable; Store variable information in the form of a variable table to form an external variable file corresponding to the ladder diagram; For each ladder diagram in the ladder diagram library, according to the data processing process, a data processing function that realizes a corresponding function is matched, a processing logic is formed according to the matched data processing function, and the extracted processing logic is stored in the form of an engineering file; The external variable file is associated with the project file.

7. The device according to claim 1, characterized in that The host computer also includes a writing module, a detection module and a downloading module; wherein, The writing module is used to build a target project file using the ladder diagram library in response to a user's selection, and the writing module is connected to the compiling module; The detection module is used to simulate the operation process and results of the built target engineering file to detect the correctness of the program. The detection module is connected to the download module; The download module is used to import the executable binary file obtained by compiling the target project file into the actual PLC device to modify the program in real time.

8. The device according to claim 1, characterized in that The ladder diagram program application device also includes a lower computer, which is used to receive and process the executable binary file obtained by compiling the target project file on the PLC device; the lower computer includes an execution module, a debugging module and an upper loading module; wherein, The execution module is used to receive and parse an executable binary file; The debugging module is used to simulate the running process of the binary file in the PLC device to ensure the accuracy of program running; The upload module is used to upload the binary file exported from the PLC device to the host computer for rewriting and compiling.

9. A ladder diagram program application method, characterized in that: The ladder diagram program application method is applied to the Feiteng platform, and the method includes: A target project file is constructed on the Feiteng platform based on a ladder diagram library, wherein the target project file includes at least one ladder diagram, and the host computer includes at least a ladder diagram library, an adapter module, and a plurality of application interfaces, wherein the ladder diagram file format and the stored file corresponding to each application interface are different; The adapter module is used to identify the file format of the ladder diagram input from the outside, match the corresponding target application interface based on the file format of the ladder diagram input from the outside, extract variable information and logic processing process from the stored file based on the target application interface, form an external variable file and processing logic file corresponding to the ladder diagram input from the outside, and identify and store the ladder diagram input from the outside; The ladder diagram library includes a plurality of ladder diagrams, and each ladder diagram stored in the ladder diagram library includes at least an external variable file and a processing logic file stored in association, wherein the external variable file is used to store variable information in the corresponding ladder diagram, and the variable information includes at least an input area variable and an output area variable, and the input area variable and the output area variable use the same storage address and are stored in the same memory space, and a read and write request performs read and write control on the input area variable or the output area variable in the same storage address according to the access address and the permission identifier; the processing logic file is used to store the processing logic in the corresponding ladder diagram; Match the ladder diagram external variable file and the processing logic file in the target project file, search for registers corresponding to the compilation instruction according to the matched files, and compile the matched files using the registers.

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