Ultra-high-speed multi-channel true random number generator with bidirectional full feedback ring oscillator

Abstract

This invention discloses an ultra-high-speed multi-channel true random number generator using a bidirectional full feedback ring oscillator (BFFRO). Specifically, it proposes an ultra-high throughput TRNG using a BFFRO as an entropy source circuit. Unlike conventional ring oscillators (ROs), the proposed BFFRO is designed with multiple parallel internal ROs, cascaded and coupled to disrupt the spectrum of each ring oscillator and enhance output uncertainty. Each internal ring oscillator in the BFFRO can be used as a random number output point, creating a multi-channel TRNG with parallel output and a single-channel TRNG with multi-bit serial output. The random sequences generated by the TRNG have passed various domestic and international random number evaluation kits. This invention implements TRNG designs with multiple channel numbers, achieving a throughput of 1100 Mbps with a 2-channel TRNG and 3200 Mbps with an 8-channel TRNG on an AMD Xilinx 7 series development board, and the circuit is not subject to routing limitations.

Description

Technical Field

[0001] This invention belongs to the fields of information security and integrated circuit technology, specifically a bidirectional full feedback ring oscillator for ultra-high-speed multi-channel true random number generator. Background Technology

[0002] With the rapid development of electronic information technology, information communication between devices is becoming increasingly widespread, and information security issues are receiving increasing attention. Random number generators, as key hardware security components providing random sequences in encryption technology, directly impact the security of information data based on the predictability of the random numbers they generate. Many high-security systems and applications based on random evolution, such as key generation, hash salts, Monte Carlo simulations, and quantum key distribution, require unpredictable truly random sequences. True random number generators (TRNGs) utilize some physical random phenomenon to obtain random numbers. Even if the system is deterministic, this random phenomenon remains unpredictable, and the sensitive microscopic details of the initial conditions used each time are always different. Therefore, TRNGs possess excellent randomness, unpredictability, and non-repeatability. Unfortunately, TRNGs are lacking in applications such as high-speed real-time encryption, mask generation in side-channel attack prevention, neural network training, numerical algorithms, and cloud computing. These applications often rely on faster public random number generators (PRNGs) to obtain random sequences to provide corresponding protection and meet requirements. However, the main problem with creating PRNG sequences is that they can only exist in a finite state; once the algorithm or seed is leaked, they are easily cracked. TRNGs are superior in terms of security because they can generate an infinite sequence of random numbers. Utilizing various random variations in physical processes, even with unlimited computing power, predicting and collecting such a large number of random sequences would be extremely difficult for an attacker. Therefore, upgrading TRNGs from a high-speed perspective is necessary, as this will provide greater security for high-speed electronic information transmission systems with stringent security requirements.

[0003] However, existing TRNGs based on feedback structures, such as the Fibonacci-Galova ring oscillator (FIGARO) and the multi-stage feedback ring oscillator (MSFRO), while improving the throughput of TRNGs based on traditional ring oscillators to some extent, all require switching control feedback to obtain high-quality random sequences. This not only increases the configuration difficulty but also may become an entry point for attacking TRNGs. Furthermore, because this structure is a unidirectional feedback circuit, the internally formed feedback loops (ROs) are not independent of each other. Summary of the Invention

[0004] The purpose of this invention is to provide an ultra-high-speed multi-channel true random number generator with a bidirectional full feedback ring oscillator in order to overcome the shortcomings mentioned above.

[0005] The technical solution adopted in this invention is as follows: a high-speed multi-channel true random number generator with a bidirectional full feedback ring oscillator, which consists of four parts: a scalable bidirectional full feedback ring oscillator (BFFRO), a D flip-flop, an XOR post-processing module, and a parallel-to-serial conversion module;

[0006] The scalable bidirectional full feedback ring oscillator is an entropy source circuit that provides a random source for the TRNG.

[0007] The D flip-flop is a sampling circuit for the entropy source to obtain the randomness of the entropy source;

[0008] The XOR post-processing module is used to eliminate the bias of the original random numbers obtained from sampling to improve the randomness of the generated random sequence, and the parallel-to-serial conversion module is used to serially combine the multiple random numbers output in parallel bit by bit.

[0009] The output of the parallel-to-serial conversion module is used to verify the correlation of multiple random numbers and to double the throughput of TRNG.

[0010] In a preferred embodiment, the scalable bidirectional full feedback ring oscillator (BFFRO) has the following structure:

[0011] Under the action of the bidirectional feedback mechanism, a 2-channel BFFRO is divided into two independent inner loops, which are cascaded with each other through internal XOR logic and influence each other's oscillation modes.

[0012] Each internal oscillator contains an independently oscillating first-order conventional ring oscillator connected to an XOR logic circuit. The purpose of this circuit is to ensure that the circuit is always in an oscillating state, increase the oscillation frequency, and reduce the correlation between the two outputs.

[0013] In a preferred embodiment, the scalable bidirectional full feedback ring oscillator is an n-channel BFFRO, expanded from a 2-channel BFFRO. Under the bidirectional feedback mechanism, the n-channel BFFRO is divided into n independent internal ROs, which cascade together to influence the oscillation mode of each ring, thus improving the randomness of each output. Similarly, the independent first-order ROs in each inner ring prevent the entire BFFRO from stopping oscillation due to coupling, and also reduce the correlation between the output ports.

[0014] In a preferred embodiment, the sampling circuit is characterized by slow clock sampling of the high-speed BFFRO output port, and its structure is as follows:

[0015] The standard clock generated by the phase-locked loop (PLL) serves as the clock input of the D flip-flop, and the output of the BFFRO serves as the data input of the D flip-flop. Different BFFROs for different output channels use different sampling frequencies: 550MHz for channel 2, 500MHz for channel 3, 450MHz for channel 5, 450MHz for channel 7, and 400MHz for channel 8.

[0016] In a preferred embodiment, the post-processing circuit is characterized as a lightweight XOR post-processor with the following structure:

[0017] By instantiating four sets of entropy source circuits, the four original random bits sampled from the output terminals of the four sets of entropy source circuits at the same position are XORed to obtain the final random bits.

[0018] In a preferred embodiment, the parallel-to-serial conversion module has the following structural features:

[0019] TRNG generates multiple parallel random bits at the rising edge of each sampling clock, outputs a random sequence using a bit-by-bit parallel-to-serial conversion method, detects the randomness of the serial output sequence to verify the correlation of multiple data streams, and achieves a doubling of TRNG throughput.

[0020] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0021] In this invention, the True Random Number Generator (TRNG) is one of the key technologies for hardware security. With the development of information technologies such as high-speed communication, higher requirements are placed on the throughput of TRNGs. This invention proposes a Bidirectional Full Feedback Loop Oscillator (BFFRO) as an entropy source circuit for an ultra-high throughput TRNG. Unlike previous ring oscillators (ROs), the proposed BFFRO is designed with multiple parallel internal ROs, which are cascaded and coupled to each other to disrupt the spectrum of each ring oscillator and enhance the uncertainty of the output. Each internal ring oscillator in the BFFRO can be used as a random number output point, thereby creating a multi-channel TRNG with parallel output and a single-channel TRNG with multi-bit serial output. The random sequences generated by the TRNG have passed the testing of various domestic and international kits. In addition, due to the good scalability of BFFRO, this invention realizes TRNG designs with various numbers of channels. On the AMD Xilinx 7 series development board, a 2-channel TRNG achieves a throughput of 1100 Mbps, and an 8-channel TRNG achieves a throughput of 3200 Mbps, and the circuit is not limited by routing.

[0022] 2. In this invention, a significant improvement in random number generation rate is achieved by using a relatively low amount of resources. The random number throughput of a 2-channel TRNG is 1100Mbps when using 11 slices, while the throughput of the more complex 8-channel TRNG system extended by this invention is comparable to that of a PRNG, at 3200Mbps. Without position constraints, it consumes 99 slices and has good anti-interference and anti-attack capabilities. Attached Figure Description

[0023] Figure 1 This is a circuit diagram of a 2-channel entropy source for the method of the present invention;

[0024] Figure 2 The circuit diagram of the n-channel entropy source extended by the method of the present invention;

[0025] Figure 3 This is a general block diagram of the TRNG method of the present invention;

[0026] Figure 4 The entropy source circuit structure decomposition and equivalent circuit diagram of the method of the present invention are shown below.

[0027] Figure 5 Circuit diagram for sampling by a D flip-flop;

[0028] Figure 6 This is a circuit diagram for XOR post-processing.

[0029] Figure 7 This is a schematic diagram of parallel-to-serial conversion;

[0030] Figure 8 Schematic diagrams of a Fibonacci ring oscillator (a) and a multi-stage feedback ring oscillator (b). Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0032] Reference Figure 1-8 ,

[0033] The ultra-high-speed multi-channel true random number generator with bidirectional full feedback ring oscillator consists of four parts: a scalable bidirectional full feedback ring oscillator (BFFRO), a D flip-flop, an XOR post-processing module, and a parallel-to-serial conversion module.

[0034] The scalable bidirectional full feedback ring oscillator is an entropy source circuit that provides a random source for the TRNG;

[0035] D flip-flops are used as sampling circuits for entropy sources to obtain the randomness of the entropy source;

[0036] The XOR post-processing module is used to eliminate the bias of the original random numbers obtained from sampling in order to improve the randomness of the generated random sequence; the parallel-to-serial conversion module is used to serially combine the multiple random numbers output in parallel bit by bit.

[0037] The output of the parallel-to-serial conversion module is used to verify the correlation of multiple random numbers and to double the throughput of TRNG.

[0038] The structure of the scalable bidirectional fully feedback ring oscillator (BFFRO) is as follows:

[0039] Under the action of the bidirectional feedback mechanism, a 2-channel BFFRO is divided into two independent inner loops, which are cascaded with each other through internal XOR logic and influence each other's oscillation modes.

[0040] Each internal oscillator contains an independently oscillating first-order conventional ring oscillator connected to an XOR logic circuit. The purpose of this circuit is to ensure that the circuit is always in an oscillating state, increase the oscillation frequency, and reduce the correlation between the two outputs.

[0041] The scalable bidirectional full feedback ring oscillator extends the circuit of the 2-channel BFFRO to form an n-channel BFFRO. Under the bidirectional feedback mechanism, the n-channel BFFRO is divided into n independent internal ROs. These cascaded ROs influence the oscillation mode of each ring to improve the randomness of each output. Similarly, the independent first-order ROs in each inner ring prevent the entire BFFRO from stopping oscillation due to coupling, and also reduce the correlation between the output ports.

[0042] The sampling circuit is characterized by slow clock sampling and high-speed BFFRO output port, and its structure is as follows:

[0043] The standard clock generated by the phase-locked loop (PLL) serves as the clock input of the D flip-flop, and the output of the BFFRO serves as the data input of the D flip-flop. Different BFFROs for different output channels use different sampling frequencies: 550MHz for channel 2, 500MHz for channel 3, 450MHz for channel 5, 450MHz for channel 7, and 400MHz for channel 8.

[0044] Its post-processing circuit is characterized by lightweight XOR post-processing, and its structure is as follows:

[0045] By instantiating four sets of entropy source circuits, the four original random bits sampled from the output terminals of the four sets of entropy source circuits at the same position are XORed to obtain the final random bits.

[0046] The characteristic structure of the parallel-to-serial conversion module is as follows:

[0047] TRNG generates multiple parallel random bits at the rising edge of each sampling clock, outputs a random sequence using a bit-by-bit parallel-to-serial conversion method, detects the randomness of the serial output sequence to verify the correlation of multiple data streams, and achieves a doubling of TRNG throughput.

[0048] Reference Figure 1 The scalable, bidirectional, fully feedback ring oscillator, an ultra-high-speed, multi-channel true random number generator, consists of an entropy source circuit (BFFRO), a sampling circuit, an XOR post-processing circuit, and a parallel-to-serial conversion module. Taking a 2-channel BFFRO as an example, the entropy source circuit uses Verilog HDL hardware description language to implement all logic functions on AMD Xilinx, Intel Altera FPGAs, and domestic Anlu development boards. The bidirectional feedback structure consists of an XOR, an outward-directing f, and an inward-directing g. Additionally, the inner loop consists of a closed-loop first-order inverter L and an XOR. One end of the XOR is connected to L, and the other end is provided by the XOR output connected to f. The output of the internal XOR logic serves as the input signal for the cascaded inverter. The bidirectional feedback circuit divides the entire RO into two independent inner loops, generating outputs OUT1 and OUT2 respectively.

[0049] Reference Figure 3 Four sets of 2-channel BFFROs are instantiated. The OUT1 output of each of the four sets of 2-channel BFFROs is sampled by a flip-flop and then XORed to obtain a 1-bit random number. The OUT2 output of each of the four sets of BFFROs is sampled by a flip-flop and then XORed to obtain a 2-bit random number. Two random number output channels are obtained through continuous sampling clock cycles. (Refer to...) Figure 7 The two random bits are converted from parallel to serial, and a multi-bit random number output channel is obtained through continuous sampling clock. Six test suites were used to test a large number of continuous random sequences collected from the two output methods: GM / T0005-2021 issued by the State Cryptography Administration of my country, NISTSP800-22 and NISTSP800-90B from the National Institute of Standards and Technology of the United States, Dieharder from Duke University, AIS-31 from the German Federal Consultative Office, and testU01.

[0050] The present invention provides a 2-bit output entropy source circuit: the entropy source circuit of the TRNG is described on the FPGA, and the 2-bit output ring oscillator with two independently oscillating ring oscillators connected to each other to form a bidirectional feedback mechanism is used as the entropy source circuit, which is called 2-channel BFFRO.

[0051] like Figure 1 As shown, the 2-bit output entropy source circuit consists of an independent first-order ring oscillator and a bidirectional feedback loop. The bidirectional feedback structure comprises XOR logic, an outward f, and an inward g. Furthermore, since the operating state of the first-order oscillator L is independent of the operation of other circuits, the XOR logic connected to it rapidly switches between inversion and buffering under the influence of the rapidly changing L terminal, thus continuously changing the XOR output and transmitting it throughout the entire circuit structure. It also reduces the correlation between the two output inverter terminals. The proposed circuit aims to establish an independently oscillating inner loop to reduce the correlation of the inverter outputs. Figure 3 As shown in (a), the 2-bit output entropy source circuit is divided into two independently oscillating inner loops. Figure 3 (b) For their equivalent circuits, they are cascaded together to further enhance the randomness of their oscillations.

[0052] This invention incorporates an extension of the entropy source circuit: to obtain more random numbers from more channels, the 2-channel BFFRO is extended to an n-channel BFFRO. For example... Figure 2 As shown, the n-channel BFFRO consists of n independently oscillating internal ROs, which are connected through node A. i and B i Interconnected, they form a more complex feedback network system, further enhancing the unpredictability of the entire loop and increasing the number of generated random bits.

[0053] This invention features TRNG random bit generation: a final true random bit is obtained from four original random bits through XOR logic. The four original random bits are provided by sampling from the output terminals of four identical entropy source circuits at the same location via D flip-flops. The sampling clock of the D flip-flops is generated by a phase-locked loop. It should be noted that as the entropy source expands, the sampling frequency needs to be appropriately reduced to ensure that all TRNG random bit output channels meet the requirements of the test standard.

[0054] In this invention, a single TRNG generation unit can produce multiple outputs, thus significantly increasing the throughput of random numbers. For a 2-channel TRNG, the throughput is 1100 Mbps; for an 8-channel TRNG, the throughput is 3200 Mbps. Compared to traditional single-channel TRNGs, this invention not only has a higher single-channel output rate but also can output multiple uncorrelated random sequences.

[0055] In this invention, the True Random Number Generator (TRNG) is one of the key technologies for hardware security. With the development of information technologies such as high-speed communication, higher requirements are placed on the throughput of TRNGs. This invention proposes a Bidirectional Full Feedback Loop Oscillator (BFFRO) as an entropy source circuit for an ultra-high throughput TRNG. Unlike previous ring oscillators (ROs), the proposed BFFRO is designed with multiple parallel internal ROs, which are cascaded and coupled to each other to disrupt the spectrum of each ring oscillator and enhance the uncertainty of the output. Each internal ring oscillator in the BFFRO can be used as a random number output point, thereby creating a multi-channel TRNG with parallel output and a single-channel TRNG with multi-bit serial output. The random sequences generated by the TRNG have passed the testing of various domestic and international kits. In addition, due to the good scalability of BFFRO, this invention realizes TRNG designs with various numbers of channels. On the AMD Xilinx 7 series development board, a 2-channel TRNG achieves a throughput of 1100 Mbps, and an 8-channel TRNG achieves a throughput of 3200 Mbps, and the circuit is not limited by routing.

[0056] In this invention, a significant increase in random number generation rate is achieved by using a relatively low amount of resources. The random number throughput of a 2-channel TRNG is 1100Mbps when using 11 slices. The throughput of the more complex 8-channel TRNG system extended by this invention is comparable to that of a PRNG, at 3200Mbps, consuming 99 slices, and both have good anti-interference and anti-attack capabilities.

[0057] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0058] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A multi-channel true random number generator based on a bidirectional full-feedback ring oscillator, characterized in that: The multi-channel true random number generator consists of four parts: an n-channel bidirectional fully feedback ring oscillator (BFFRO), a D flip-flop, an XOR post-processing module, and a parallel-to-serial conversion module; wherein n is greater than or equal to 2. The n-channel bidirectional full feedback ring oscillator serves as an entropy source circuit to provide a random source for the TRNG. Under the action of the bidirectional feedback mechanism, the n-channel BFFRO is divided into n independent internal ROs. Each internal RO has an independently oscillating first-order conventional ring oscillator connected to an XOR logic. The n internal ROs are cascaded together through internal XOR logic and influence each other's oscillation modes. The D flip-flop is a sampling circuit for the entropy source to obtain the randomness of the entropy source; the standard clock generated by the phase-locked loop is used as the clock input of the D flip-flop, and the output of the BFFRO is used as the data input of the D flip-flop. The XOR post-processing module is used to eliminate the bias of the original random numbers obtained by sampling in order to improve the randomness of the generated random sequence; by instantiating 4 sets of entropy source circuits, the 4 original random bits sampled at the same position of the output terminal of the 4 sets of entropy source circuits are processed by the XOR post-processing module to obtain the final random bits. The parallel-to-serial conversion module combines multiple random numbers output in parallel, bit by bit, in a serial manner.

2. The multi-channel true random number generator with a bidirectional full feedback ring oscillator as described in claim 1, characterized in that: Different output channels of BFFRO use different sampling frequencies: 2-channel BFFRO uses a sampling frequency of 550MHz, 3-channel BFFRO uses a sampling frequency of 500MHz, 5-channel BFFRO uses a sampling frequency of 450MHz, 7-channel BFFRO uses a sampling frequency of 450MHz, and 8-channel BFFRO uses a sampling frequency of 400MHz.

3. The multi-channel true random number generator with a bidirectional full feedback ring oscillator as described in claim 1, characterized in that: The parallel-to-serial conversion module features the following structure: TRNG generates multiple parallel random bits at the rising edge of each sampling clock, outputs a random sequence using a bit-by-bit parallel-to-serial conversion method, and detects the randomness of the serial output sequence to verify the correlation of multiple data streams.

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