Fluid storage for high-performance computing applications
By introducing the flowing dynamic memory area and automatic management mechanism, the inefficient use of dynamic memory areas in HPC systems is solved, and resource utilization and application performance are improved.
Patent Information
- Application Number
- CN202311067813.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2022-10-24
- Filing Date
- 2023-08-23
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2043-08-23
AI Technical Summary
Existing dynamic memory management techniques have struggled to keep pace with advances in high-performance computing (HPC) systems, resulting in inefficient use of dynamic memory areas and increased latency, especially in managing datasets of decreasing importance during long-running HPC applications.
The introduction of flowing dynamic memory regions reduces the dependence on explicit requests by automatically releasing unused memory regions and dynamically allocating memory resources according to the data importance level, and automatically manages memory regions using flowing memory valid time intervals.
Improved utilization of dynamic memory areas reduces storage costs and access time, reduces memory leakage, and improves latency and accuracy for HPC applications.
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Figure CN117931052B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to streaming memory for high performance computing applications. Background Art
[0002] High-performance computing (HPC) can refer to computing solutions (e.g., supercomputers or clusters of computing nodes) that can process data and perform calculations at rates far exceeding those of other computing solutions. Examples of HPC applications include software applications (running on supercomputers or clusters of computing nodes) that model / simulate complex natural systems, genome sequencing, molecular dynamics, etc.
[0003] Dynamic memory can refer to areas of computer memory that are (dynamically) allocated and / or deallocated during application runtime. Dynamic memory can be volatile memory (i.e., computer memory that requires power to store information, such as random access memory (RAM)) or non-volatile memory (i.e., computer memory that stores information even after the computer power has been turned off, such as non-volatile DIMMs (NVDIMMs)). Summary of the Invention
[0004] According to one aspect of the present disclosure, a method performed by a memory manager is provided, comprising: receiving a request for a memory area, the request including a data-oriented priority value, the data-oriented priority value measuring an importance level of data to be stored in the requested memory area; comparing the data-oriented priority value with a data-oriented priority liquidity threshold; allocating a flowing memory area to the data based on the comparison, wherein the allocated flowing memory area is automatically released to a free pool of memory areas when a flowing memory validity time interval of the allocated flowing memory area expires; and storing a unique identifier of the allocated flowing memory area based on the data-oriented priority value, so that the memory manager accesses the allocated flowing memory area faster than the memory manager accesses other allocated flowing memory areas having a lower associated data-oriented priority value.
[0005] According to another aspect of the present disclosure, a non-transitory computer-readable medium storing instructions is provided, which, when executed by one or more processing resources, causes the one or more processing resources to perform a method comprising: receiving a request for a fluid dynamic memory area from a computing entity, the request comprising a data-oriented priority value, the data-oriented priority value measuring the importance level of data to be stored in the requested fluid dynamic memory area; determining a fluid memory valid time interval of the requested fluid dynamic memory area; updating the determined fluid memory valid time interval of the allocated fluid dynamic memory area in response to the request from the computing entity; allocating a fluid dynamic memory area with the determined fluid memory valid time interval for the data, wherein, when the determined fluid memory valid time interval expires, the allocated fluid dynamic memory area is automatically released to a free pool of dynamic memory areas.
[0006] According to another aspect of the present disclosure, a system is provided, comprising: one or more processing resources; and a non-transitory computer-readable medium, coupled to the one or more processing resources, having instructions stored therein, which, when executed by the one or more processing resources, cause the system to perform a method comprising the following operations: determining a data-oriented priority value for a data set, the data-oriented priority value measuring a level of importance of data to be stored in a requested memory area; requesting a memory area for storing the data set from a memory manager, the request including the data-oriented priority value; and in response to the memory manager allocating a first streaming memory sub-channel for the data in response to the request, storing the data in the allocated first streaming memory sub-channel, wherein: the first streaming memory sub-channel is a descendant of a first memory channel, the first streaming memory sub-channel is orthogonal to the first memory channel, and when a streaming memory valid time interval expires, the allocated first streaming memory sub-channel is automatically released to a free pool of a memory. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] The present disclosure is described in detail according to one or more different examples with reference to the following drawings. The drawings are provided for illustrative purposes only and depict only examples.
[0008] Figure 1 is a schematic diagram of a memory-oriented distributed computing system having a centralized memory pool including fluid and non-fluid dynamic memory regions according to various examples of the presently disclosed technology.
[0009] Figure 2is a conceptual diagram depicting an exemplary data-oriented priority hierarchy for volatile and non-volatile dynamic memory regions according to an example of the presently disclosed technology.
[0010] Figure 3 is an exemplary conceptual diagram depicting streaming and non-streaming memory sub-channels according to an example of the presently disclosed technology.
[0011] Figure 4 An exemplary computing system that can be used to allocate flow memory regions according to various examples of the presently disclosed technology is depicted.
[0012] Figure 5 Another exemplary computing system that can be used to allocate a fluid memory region according to various examples of the presently disclosed technology is depicted.
[0013] Figure 6 An exemplary computing system is depicted that may be used to request a memory region for a data set having a determined data-oriented priority value in accordance with various examples of the presently disclosed technology.
[0014] Figure 7 Depicted is a block diagram of an exemplary computer system in which various examples described herein may be implemented.
[0015] The drawings are not exhaustive and do not limit the disclosure to the precise forms disclosed. DETAILED DESCRIPTION
[0016] Recent advances in HPC are enabling scientific, commercial, and engineering organizations to solve historically unsolvable computationally large problems. Examples of HPC applications include software applications (running on supercomputers or clusters of compute nodes) that model / simulate complex natural systems, genome sequencing, molecular dynamics, and more.
[0017] In many cases, the aforementioned HPC applications run continuously for months or even years. During these extended, continuous runtimes, the HPC applications process / generate large amounts of data, which in many cases evolves over the runtime of the HPC applications (e.g., and as will be described in more detail below, HPC applications typically create and then process a large number of nearly identical "parallel" data sets, which may be transformations / modifications of previously processed data sets—small differences between certain parallel data sets may be analytically / inferentially significant to the HPC application at early time intervals during the HPC application's runtime, but less analytically / inferentially significant at later time intervals). Consequently, HPC applications may require large amounts of dynamic memory areas (e.g., on the order of exabytes) to store the large amounts of evolving data. Unfortunately, existing memory management techniques have struggled to keep pace with recent advances in HPC and HPC system architectures, and their increasing demand for and utilization of dynamic memory areas.
[0018] Existing dynamic memory management techniques typically utilize a passive memory manager (e.g., a computing system or operating system subsystem for memory management) that allocates or deallocates dynamic memory regions only in response to explicit requests / instructions from computing entities (e.g., software applications, containers, virtual machines, computing nodes, etc.) that share a common dynamic memory region. Relying on explicit requests / instructions from computing entities to deallocate dynamic memory regions (allocated to computing entities) can be problematic for several reasons. For example, a computing entity may be executing / transforming mission-critical / real-time functions of an application and, therefore, may not be able to deviate from its functional flow to request / instruct the passive memory manager to deallocate dynamic memory regions that are no longer in use by the computing entity. Relatedly, even when a computing entity is able to interrupt its functional flow to request / instruct the passive memory manager to deallocate dynamic memory regions, such an interruption in the computing entity's functional flow may result in increased latency for the application. In many HPC applications, obtaining correct results within a fast response time is crucial and can be a measure of the accuracy / utility of real-time, mission-critical HPC applications. Therefore, the increased latency due to the interruption of the function flow requesting / instructing the passive memory manager to deallocate the dynamic memory region can be a major impediment to such HPC applications.
[0019] Active dynamic memory management (e.g., where a memory manager actively / selectively deallocates dynamic memory regions that have not been accessed for a long time) is challenging / infeasible for many memory management systems, including memory-driven computing systems, where a memory manager may be tasked with managing a central pool of millions / billions of dynamic memory regions shared by a large number of computing / supercomputing entities.
[0020] These problems may be particularly severe for memory management systems (e.g., memory-driven computing systems) that manage the dynamic memory resources of HPC applications. As described above, HPC applications may need to store large amounts of data during their extended runtime. A unique characteristic / computing requirement of HPC applications is that they typically need to analyze and store a large number of large "parallel data sets" (as used herein, a parallel data set may refer to a nearly identical data set describing a common characteristic / attribute - many parallel data sets may be transformations / modifications of previously processed data sets) that decrease in importance during the extended runtime of the HPC application. For example, in the early time intervals of the HPC application's runtime (which may be on the order of months or years), when determining future state transitions, such as when running an experiment or simulation of a model, small differences between a first set of parallel data sets may be of analytical / reasoning significance to the HPC application. However, during the runtime of the HPC application, the analytical / reasoning significance of these small differences tends to decrease (e.g., having determined a first set of state transitions based on an analysis of small differences between the first set of parallel data sets, the HPC application may continue to analyze a second set of parallel data sets generated from the first set of state transitions to determine a new / second set of state transitions). As a result, the importance levels of many (or all) of the first set of parallel data sets will also decrease over time. A drawback of existing (passive) memory management systems is that unless they receive explicit instructions / requests to deallocate the dynamic memory regions storing these parallel data sets of decreasing importance, the dynamic memory regions will remain allocated throughout the months or years of runtime of the HPC application (as described above, in many cases, the HPC application will not be able to deviate from its mission-critical / real-time functional flow to request / instruct the passive memory manager to deallocate dynamic memory regions that are no longer used by the HPC application). This inefficient use of valuable dynamic memory regions may significantly deplete the shared dynamic memory regions / shared memory structures managed by the memory management system, which may increase the monetary cost of storage, increase the amount of time the memory management system spends providing access to the dynamic memory regions, etc. Relatedly, even when the HPC application is able to interrupt its functional flow to request / instruct the passive memory manager to deallocate the dynamic memory regions, such interruptions in the functional flow of the HPC application may also result in increased latency for the HPC application. As mentioned above, in many HPC applications, achieving correct results within a fast response time is crucial and can be a measure of the accuracy / utility of real-time mission-critical HPC applications. Therefore, the increased latency caused by interrupting the function flow requesting / instructing the passive memory manager to deallocate dynamic memory regions can be a major impediment to such HPC applications.
[0021] Against this backdrop, examples of the presently disclosed technology provide new memory management systems and methods that improve utilization of dynamic memory regions by: (1) providing a new class / type of dynamic memory regions (i.e., floating dynamic memory regions) that are automatically released (i.e., deallocated) to a free pool of dynamic memory regions upon expiration of a "floating memory validity interval" (as used herein, a "floating memory validity interval" may refer to a time interval during which a floating dynamic memory region remains allocated before being released / deallocated to a free pool of dynamic memory regions—exemplary floating memory validity intervals may include days, weeks, months, years, etc.); and (2) allocating a "floating" dynamic memory region in response to a request for a dynamic memory region when the importance level of data to be stored in the requested dynamic memory region drops below an importance threshold level. In some examples, the floating memory validity interval may be on the order of seconds, minutes, or hours.
[0022] For example, the presently disclosed memory management system may first receive a request for a dynamic memory region (e.g., from a computing entity or other processing device), the request including a data-oriented priority value that measures the importance level of data to be stored in the requested dynamic memory region. The memory management system may then compare the data-oriented priority value with a data-oriented priority liquidity threshold. If the data-oriented priority value is on a first side of the data-oriented priority liquidity threshold (i.e., if the importance level measured by the data-oriented priority value does not exceed the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system may allocate a fluid dynamic memory region for the data. Conversely, if the data-oriented priority value is on a second side of the data-oriented priority liquidity threshold (i.e., if the importance level measured by the data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system may allocate a non-fluid dynamic memory region for the data. As described above, upon expiration of the fluid memory validity time interval of the allocated fluid dynamic memory region, the allocated fluid dynamic memory region will be automatically released to a free pool of dynamic memory regions (i.e., the allocated fluid dynamic memory region will be automatically released / deallocated and become a free dynamic memory region in a pool of free dynamic memory regions). In various examples, the memory management system may determine a flowing memory valid time interval of the allocated flowing dynamic memory region based on the data-oriented priority value of the data (e.g., the determined flowing memory valid time interval may increase as the importance level of the data increases). In some cases, the memory management system may store / organize the (multiple) unique identifiers of the allocated flowing dynamic memory region according to the data-oriented priority value, so that the memory management system can access the allocated flowing dynamic memory region faster than accessing other allocated flowing dynamic memory regions having data-oriented priority values that measure lower importance levels.
[0023] Examples of the currently disclosed technology may also include computing entities (e.g., software applications, containers, virtual machines, computing nodes, etc.) that collaborate with a memory management system to improve resource utilization of dynamic memory areas. For example, such a computing entity may request information related to data-oriented priority liquidity thresholds (e.g., a range of data-oriented priority values for flowing dynamic memory storage and a range of data-oriented priority values for non-flowing dynamic memory storage) from the memory management system. Based on this information and various application-specific factors and data set-specific factors, the computing entity may determine the data-oriented priority value of the data set. The computing entity may then include the determined data-oriented priority value in a request (sent to the memory management system) for a dynamic memory area for storing the data set. In some cases, the computing entity's request may also specify the type of dynamic memory area (i.e., flowing versus non-flowing). When requesting a flowing dynamic memory area, the request may also include the expected / specified flowing memory effective time interval. The memory management system may then allocate a dynamic memory area (flowing or non-flowing) in response to the computing entity's request.
[0024] As described above, the currently disclosed memory management system is particularly suitable for managing dynamic memory areas of HPC applications. Specifically, an example can improve the management of HPC applications by allocating flowing dynamic memory areas to store parallel data sets that HPC applications typically process / generate over time and whose importance decreases over time. The flowing memory validity intervals of these allocated flowing dynamic memory areas can be calibrated / determined by the memory management system or the HPC entity / application requesting the dynamic memory area on an HPC application-specific basis. For example, the currently disclosed memory management system can understand / predict that a genome sequencing HPC application typically accesses / utilizes parallel data sets for approximately two weeks and then moves to newer / most recently transformed parallel data sets (as described above, this situation may be because the analytical / reasoning significance of parallel data sets to the HPC application decreases within a relatively consistent two-week time frame). The memory management system can then calibrate / determine a three-week flowing memory validity interval for the flowing dynamic memory areas allocated to the genome sequencing HPC application (the memory management system can then establish a one-week buffer in the flowing memory validity interval so that data is not automatically deleted prematurely (i.e., when the HPC application still needs to access / process the data)). In a related example, a genome sequencing HPC application may predict that it will continue to process / utilize a specific critical dataset for a two-month time interval (i.e., the genome sequencing HPC application may predict that the importance of the critical dataset will not decrease until the two-month time period expires). Therefore, when requesting a dynamic memory area for storing a critical dataset, the genome sequencing HPC application may request, for example, a three-month mobile memory validity interval for the critical dataset. Alternatively (or in addition to requesting a longer mobile memory validity interval for the critical dataset), the genome sequencing HPC application may include a higher data-oriented priority value in its request for the dynamic memory area to store the critical dataset. Based on the higher data-oriented priority value of the critical dataset, the memory management system may determine / calibrate a longer mobile memory validity interval when allocating a mobile dynamic memory area to the critical dataset. In some examples, the memory management system may adjust / reset the mobile memory validity interval of the allocated mobile memory area in response to a request / instruction from the HPC application. For example, due to a change in the functional state of the HPC application, the HPC application may predict that certain data stored in the allocated mobile dynamic memory area may have analytical / reasoning significance over a longer time interval. Therefore, the HPC application may request a longer streaming memory valid time interval for those allocated streaming dynamic memory regions, and the memory management system may adjust the streaming memory valid time interval according to the request of the HPC application.
[0025] In various cases, the examples may be particularly suitable for improving other innovative dynamic memory area management systems / techniques, such as memory management based on orthogonal memory channels. As used herein, memory management based on orthogonal memory channels may refer to a virtual memory management scheme (also referred to as "memory channel-based virtualization"), in which virtual memory is allocated in a hierarchical memory channel structure. For example, the memory channel structure may be organized as a hierarchical tree of memory channels, including a "main memory channel" and one or more additional memory channels referred to as "memory sub-channels." Both the main memory channel and the memory sub-channel are examples of "memory channels." The main memory channel may correspond to the root node of the hierarchical tree. One or more memory sub-channels are descendants of the main memory channel and correspond to other non-root nodes of the hierarchical tree. In this context, the "descendants" of a memory channel (such as a main memory channel) refer to the direct descendants or children of the memory channel, as well as the indirect descendants (such as grandchildren or great-grandchildren) of the memory channel. A given memory sub-channel may correspond to a leaf node and have no child nodes, and another given memory sub-channel may be the parent node of one or more child nodes. Here, a first memory channel being "orthogonal" to a second memory channel means that there is no overlap between a set of consecutive virtual memory addresses assigned to the first memory channel and a set of consecutive virtual memory addresses assigned to the second memory channel. Furthermore, because there is no overlap in the assigned sets of virtual memory addresses, all memory channels in the memory channel structure should be orthogonal to each other.
[0026] As will be described in more detail below, like the memory management system of the presently disclosed technology, memory management based on orthogonal memory channels is particularly well suited for improving dynamic memory resource management for HPC applications that process / generate massive parallel data sets during their extended runtimes.
[0027] The examples can be adapted to improve memory management based on orthogonal memory channels in various ways. For example, a first group of memory subchannels can be designated as non-fluid memory subchannels. In contrast, a second group of memory subchannels can be directly designated as fluid memory subchannels. Thus, during the runtime of an HPC application, these non-fluid and fluid memory subchannels can be assigned to parallel data sets based on their corresponding data-oriented priority values (i.e., their analytical importance / significance to the application). As will be described in more detail below, memory subchannels derived from non-fluid memory subchannels can also be designated as non-fluid memory subchannels and can have the same data-oriented priority values as their ancestors. Similarly, memory subchannels derived from fluid memory subchannels can also be designated as fluid memory subchannels and can have the same data-oriented priority values and fluid memory validity intervals as their ancestors.
[0028] Examples of the presently disclosed technology offer numerous advantages over existing memory management systems. As described above, the presently disclosed memory management system can improve the utilization of dynamic memory regions because it does not require explicit requests / instructions from computing entities before deallocating memory regions used by them. Consequently, examples can reduce the consumption of dynamic memory regions caused by the inability of various computing entities to notify the memory management system when data stored in allocated dynamic memory regions is no longer used by them (as described above, in some cases, a computing entity running an HPC application may be unable to deviate from its mission-critical / real-time functional flow to request / instruct a passive memory manager to deallocate dynamic memory regions no longer used by the computing entity / HPC application). By reducing this inefficient use of valuable dynamic memory regions, examples can reduce the monetary cost of memory storage, reduce the amount of time a memory management system spends providing access to memory regions, and more. Relatedly, by not requiring computing entities / applications to deviate from their mission-critical / real-time functional flow to issue deallocation requests / instructions, examples can improve the latency and accuracy of scientific models and simulations run by the computing entities / applications.
[0029] Furthermore, by utilizing a floating memory valid interval (determined / configured at allocation time) to automate the deallocation process, the presently disclosed memory management system can reduce the occurrence of "memory leaks" (as used herein, a memory leak can refer to a resource leak that occurs when a computer program improperly manages memory allocation by not releasing / releasing memory that is no longer needed), which is another common cause of inefficient resource utilization of dynamic memory regions. In other words, by eliminating the need for explicit and customized actions by the memory management system to deallocate floating memory regions, the example can reduce the occurrence of memory leaks, thereby reducing inefficient use of memory regions, lowering the monetary cost of memory storage, reducing the amount of time the memory management system spends providing access to memory regions, etc. In certain scientific models and simulations, hundreds of millions of dynamic memory regions can exist as architectural elements, and reducing memory leaks can provide significant benefits in terms of reduced latency, ease of automated memory management, and simplified HPC application design.
[0030] Before describing examples of the presently disclosed technology in greater detail, it should be understood how the memory management system in the presently disclosed technology differs from some memory management systems / techniques that may be confused with examples of the presently disclosed technology.
[0031] As a first example, volatile memory devices (e.g., random access memory (RAM) or dynamic random access memory (DRAM)) are sometimes labeled as "dynamic" memory storage devices because they store information only when powered on and the stored information can be updated during application runtime. However, unlike the examples of the presently disclosed technology, conventional volatile memory devices / systems do not include "flowing" memory regions (i.e., memory regions that are automatically released to a free pool of memory regions upon expiration of a determined / calibrated time period) and typically do not consider the relative importance of the data to be stored in the memory regions when allocating memory regions (and / or storing / organizing unique identifiers for accessing memory regions). Also, as described above, these conventional systems typically: (1) require an explicit request / instruction from a computing entity before deallocating a memory region used by the computing entity; and (2) require explicit and personalized action by a memory management system to deallocate a memory region. This differs from examples of the presently disclosed technology which importantly: (1) do not require an explicit request / instruction from a computing entity before deallocating a floating memory region used by the computing entity; and (2) do not require explicit and personalized action by the memory management system to deallocate a floating memory region (instead, a floating memory region is automatically deallocated / released upon expiration of a floating memory validity time interval determined / configured at allocation time).
[0032] As a second example, time to live (TTL) is a concept used in caching systems, where data objects are stored in the cache for a set amount of time (i.e., TTL) before being deleted. Data caches are used in various memory hardware systems, such as RAM. Unlike the examples of the currently disclosed technology, traditional TTL technology / data caching systems do not consider the relative importance of data when setting the TTL, nor do they involve any intelligent / data-specific determination of whether individual data should be deleted after a set period of time. Relatedly, unlike the current technology's flowing memory validity interval, TTL is generally unmodifiable (i.e., it cannot be modified / reset) and is not specifically calibrated / determined on a data-specific or application-specific basis. TTL / data caching is also used in technology contexts that are completely different from the examples of the currently disclosed technology. In particular, TTL / data caching is not used to allocate / deallocate dynamic memory regions. Instead, the most common example of TTL is in networking environments, where each data packet transmitted in the network is assigned the same small (e.g., sub-second) TTL to prevent packets from circulating indefinitely. This is in contrast to the current disclosed technology's flowing memory validity interval, which can be on the order of days, weeks, months, etc. Relatedly, unlike the examples of the current disclosed technology, TTL is only used to cache small amounts of data (compared to the large-scale data storage of the current disclosed technology). In summary, the examples of the current disclosed technology differ from cache / TTL in both operation / complexity and technical application. In particular, only the examples of the current technology: (1) provide a class / new type of dynamic memory area (i.e., a "flowing" dynamic memory area) that is automatically released to a free pool of dynamic memory areas after the "flowing memory validity interval" expires; and (2) in response to a request for a dynamic memory area, allocates the "flowing" dynamic memory area to a non-flowing dynamic area based on a measured level of importance of the data to be stored in the requested dynamic memory area.
[0033] Figure 1 is a schematic diagram of a memory-oriented distributed computing system having centralized and shared memory pools including fluid and non-fluid dynamic memory regions according to various examples of the presently disclosed technology.
[0034] refer to Figure 1, a computer system 100 (e.g., a memory-oriented computing system or a memory-driven computing system) includes nodes 120 and a centralized memory pool 104 shared by the nodes 120. The nodes 120 can access the memory pool 104 via a relatively high-bandwidth network fabric 121 (e.g., a Gen-Z fabric, HPE Slingshot, or other network fabric). The memory pool 104 can be abstracted or virtualized by a memory manager 160. The memory pool 104 can include physical storage devices corresponding to a heterogeneous or homogeneous collection of physical non-transitory storage media devices.
[0035] As an example, a physical non-transitory storage medium device may include one or more of the following: a semiconductor storage device, a memristor-based device, a magnetic storage device, a phase-change memory device, a combination of devices using one or more of these storage technologies, a storage device using other storage technologies, etc. A physical non-transitory storage medium device may be a volatile memory device, a non-volatile memory device, or a combination of volatile and non-volatile memory devices. A non-transitory storage medium device may be part of a storage array or other type of storage subsystem.
[0036] Node 120 may be a computer platform (e.g., a blade server, a laptop, a router, a rack-based server, a gateway, a supercomputer, etc.), a sub-portion of a computer platform (e.g., a computing node corresponding to one or more processing cores of a blade server), or a plurality of computer platforms (e.g., computing nodes corresponding to a cluster). Some of nodes 120 may be computing nodes, and in some examples, one or more nodes 120 may be management nodes. In some examples, nodes 120 may include a cluster of computing nodes.
[0037] like Figure 1 As depicted, a given node 120-1 may include one or more processing cores 124 (e.g., one or more central processing unit (CPU) semiconductor packages, one or more CPU cores, etc.) that execute machine-executable instructions 136 (or "software") to form one or more software components. By way of example, these components may include one or more applications 128, one or more processes 144, one or more threads 148 of a process 144, an operating system 159, one or more containers, one or more virtual machines, etc. In executing the machine-executable instructions 136, the processing core(s) 124 may access the memory pool 104 via the network interface 125 of the node 120-1. Similarly, as Figure 1As depicted, node 120-1 may have local memory 132 that stores machine-executable instructions 136, data 140, etc. Other nodes 120 of computer system 100 may have a similar architecture and similar components as the illustrated node 120-1. In some examples, the software components illustrated on node 120-1 may be distributed components, for example, operating system 159 may be a component of a distributed operating system (i.e., an operating system distributed among nodes 120), application 128 may be a component of a distributed application, etc.
[0038] The memory manager 160 performs memory management on the computer system 100, for example, allocating unused dynamic memory areas from the memory pool 104 to entities of the computer system 100, deallocating dynamic memory areas to return them to the memory pool 104, and managing access to the memory pool 104. Figure 1 In the particular embodiment illustrated in FIG, memory manager 160 is part of node 120-1 and can be part of operating system 159. According to some embodiments, operating system 159 can be a distributed operating system distributed among multiple nodes 120. As such, multiple nodes 120 can have operating system 159 components and corresponding memory manager 160 components. Thus, generally, "memory manager" refers to a single or distributed entity that manages dynamic memory, where "management" can include one or more of: allocating dynamic memory regions in response to requests (e.g., from applications 128 running on node 120), deallocating dynamic memory regions (automatically for streaming dynamic memory regions 107 upon expiration of a streaming memory validity interval), managing requests to access dynamic memory regions, and performing virtual to physical address translation. In some examples, memory manager 160 (e.g., a memory manager of an HPC environment) can be a single or distributed entity that is part of a memory fabric, such as network fabric 121 and / or memory pool 104.
[0039] As part of memory management, the memory manager 160 allocates dynamic memory regions from unused dynamic memory regions of the centralized memory pool 104 to entities of the computer system 100, deallocates dynamic memory regions to return them to unused memory portions of the memory pool 104 (this is done automatically for the fluid dynamic memory regions 107), and manages virtual-to-physical memory address translation for memory access (e.g., read and write access). In some embodiments, the memory manager 160 employs a superset virtualization (e.g., fluid virtualization and non-fluid virtualization), and within this virtualization, the memory manager 160 may employ another virtual memory management scheme (e.g., a page table-based memory management scheme). Depending on the virtualization, the memory manager 160 may allocate fluid and non-fluid dynamic memory regions to entities of the computer system 100. In an example embodiment, the memory manager 160 may allocate dynamic memory regions to computing entities in response to memory allocation requests. In this context, a "computing entity" refers to any hardware or software component of the computer system 100 that can provide a request to access the memory pool 104. As examples, computing entities may include applications 128, threads 148, processes 144, containers, virtual storage, nodes 120, and the like.
[0040] According to some embodiments, a dynamic memory allocation request may be submitted by a computing entity (e.g., by an entity executing machine-executable instructions that generate the memory allocation request) or may be submitted on behalf of the computing entity (e.g., by a compiler). In response to the allocation request, the memory manager 160 allocates a dynamic memory region to the computing entity. The allocated dynamic memory region may be a fluid dynamic memory region 107 or a non-fluid dynamic memory region 108. As described above, the fluid dynamic memory region 107 may be configured with a fluid memory validity interval, wherein upon expiration of its corresponding fluid memory validity interval, the allocated fluid dynamic memory region 107 is released to an unused / free portion of the centralized memory pool 104. According to some embodiments, the dynamic memory regions 107 / 108 may not be visible to the computing entity because the allocation request may cause the memory manager 160 to provide a contiguous range of allocated virtual memory addresses (corresponding to the allocated dynamic memory regions 107 / 108) to the computing entity. According to another embodiment, the memory manager 160 may allocate a given dynamic memory region to a particular component (e.g., a computer node 120 or an application executing on the computer node 120) and allocate subcomponents (e.g., memory subchannels) of the dynamic memory region to different subcomponents of the component (e.g., threads, processes, applications, etc.).
[0041] Figure 2is a conceptual diagram depicting an example data-oriented priority hierarchy 200 for volatile and non-volatile dynamic memory regions according to an example of the presently disclosed technology. Here, the data-oriented priority hierarchy 200 is "data-oriented" because it arranges memory regions according to the importance level of the data they store.
[0042] As described above, examples of the presently disclosed technology provide new memory management systems and methods that improve utilization of dynamic memory regions by: (1) providing a new class / type of dynamic memory regions (i.e., "flowing" dynamic memory regions) that are automatically released to a free pool of dynamic memory regions after a "flowing memory valid time interval" expires; and (2) allocating a "flowing" dynamic memory region in response to a request for a dynamic memory region when the importance level of data to be stored in the requested dynamic memory region drops below a threshold level. In other words, the presently disclosed memory management system may first receive a request for a dynamic memory region (from, for example, a computing entity), the request including a data-oriented priority value that measures the importance level of data to be stored in the requested dynamic memory region. The memory management system may then compare the data-oriented priority value with a data-oriented priority liquidity threshold. If the data-oriented priority value is on the first side of the data-oriented priority liquidity threshold (i.e., if the importance level measured by the data-oriented priority value does not exceed the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system may allocate a flowing dynamic memory region for the data. Conversely, if the data-oriented priority value is on the second side of the data-oriented priority liquidity threshold (i.e., if the importance level measured by the data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system may allocate a non-fluid dynamic memory region for the data. As described above, upon expiration of the fluid memory validity interval of the allocated fluid dynamic memory region, the allocated fluid dynamic memory region will be automatically released to the free pool of dynamic memory regions. In contrast, a non-fluid dynamic memory region can be deallocated / released only in response to an explicit request / instruction from a computing entity utilizing the non-fluid dynamic memory region.
[0043] As depicted, the data-oriented priority hierarchy 200 represents a set of allocated dynamic memory regions arranged according to their respective data-oriented priority levels and, relatedly, their respective streaming and non-streaming designations. In various examples, the allocated dynamic memory regions may be allocated by a memory manager (e.g., Figure 1 ) and can be managed by multiple computing entities (e.g., Figure 1 A centralized memory pool (e.g., Figure 1 Part of the centralized storage pool 104).
[0044] Figure 2 Also depicted are data-oriented priority liquidity thresholds for separating the non-liquid memory region and the liquid memory region of the data-oriented priority hierarchy 200. Figure 2 In the specific example of , the data-oriented priority liquidity threshold is 500. Figure 2 In the specific example of , data-oriented priority values below 500 (i.e., data-oriented priority values 1-499) measure importance levels that are higher than the data-oriented priority mobility threshold of 500. On the other hand, data-oriented priority values above 500 (i.e., data-oriented priority values 501 and above) measure importance levels that are lower than the data-oriented priority mobility threshold of 500. In other words, a data-oriented priority value of "1" measures the highest importance level / priority, a data-oriented priority value of "2" measures the next highest importance level / priority, and so on. It should be understood that various examples may use different measurement schemes for data-oriented priority values, where, for example, increasing numerical values measure increasing / higher importance levels of the stored data. Relatedly, in other examples, data-oriented priority values may include non-integer values, zero and negative numerical values, and so on.
[0045] like Figure 2 As depicted in the conceptual diagram of FIG, the non-fluid dynamic memory regions 211-215, 221-222, and 231-234 are above the data-oriented priority liquidity threshold 500. Each of the non-fluid dynamic memory regions 211-215 has a data-oriented priority of "1". Figure 2 In the specific example of , this means that the data stored by the non-volatile dynamic memory regions 211-215 has the highest importance / priority. The non-volatile dynamic memory regions 231-234 each have a data-oriented priority of "3". Figure 2 In the specific example of , this means that the importance / priority of the data stored by the non-fluid dynamic memory regions 231-234 is lower than the data stored in the non-fluid dynamic memory regions 211-215. Each of the non-fluid dynamic memory regions 221-222 has a data-oriented priority of "2". Figure 2 In the specific example of , this means that the importance / priority of the data stored in the non-fluid dynamic memory area 221-22 is lower than the data stored in the non-fluid dynamic memory area 211-215, but its importance / priority is higher than the data stored in the non-fluid dynamic memory area 231-234. Again, although in Figure 2In the particular example of , a decreasing numerical value of the data-oriented priority measures increased / higher importance / priority, but it should be understood that in other examples, an increasing numerical value may measure increased / higher importance / priority.
[0046] The streaming dynamic memory regions 241, 251, 261-262, and 271-274 are depicted as being below a data-oriented priority liquidity threshold of 500. For example, the streaming dynamic memory region 241 has a data-oriented priority of "501". Figure 1 In the specific example of , this may mean that the data stored by the streaming dynamic memory area 241 has the highest importance / priority among the data stored in the streaming dynamic memory areas. The remaining streaming dynamic memory areas and their corresponding data-oriented priority values may follow the same order as in the case of Figure 2 The same / similar pattern as described for non-volatile dynamic memory regions.
[0047] As described above, in some cases, the flowing memory effective time interval of a flowing dynamic memory area can be determined / calibrated based on its associated data-oriented priority value. For example, a flowing dynamic memory area storing data with increased / relatively higher importance / priority can be stored for a longer time interval before it is automatically released to the free pool of dynamic memory areas. Thus, flowing dynamic memory area 241 can have a longer flowing memory effective time interval than flowing dynamic memory area 251, which can have a longer flowing memory effective time interval than flowing dynamic memory areas 261-262, which can have a longer flowing memory effective time interval than flowing dynamic memory areas 271-274, and so on.
[0048] In some examples, the unique identifiers used to access non-mobile and mobile dynamic memory regions can be organized / arranged (e.g., in a lookup table or hash table used in a memory manager / memory management system) according to the corresponding data-oriented priority values of the non-mobile and mobile dynamic memory regions. For example, the unique identifiers of dynamic memory regions storing higher importance data (as measured by the corresponding data-oriented priority values) can be organized / arranged (e.g., in a lookup table or hash table) such that the dynamic memory regions storing higher importance data can be accessed faster than dynamic memory regions storing relatively less important data (also as measured by the corresponding data-oriented priority values).
[0049] As described above, in various examples, a computing entity (e.g., a software application, a container, a virtual machine, a computing node, etc.) can determine a data-oriented priority value for data and include the determined data-oriented priority value in a request for a dynamic memory area for storing the data (e.g., to a memory manager / memory management system). The computing entity can use various criteria and application-specific and data-specific factors to make this determination. For example, the computing entity can consider the confidentiality and relative reliability of the data, or whether the value of the data will lead to important inferences in an experiment. The computing entity can also consider the instantaneous value of the data obtained during a function transformation, which can indicate whether the data will be a critical / inevitable input for a future nth state transition involving, for example, a circuitous function flow and function transformation of an HPC application. When determining the data-oriented priority value for data, the computing entity can also consider a data-oriented priority liquidity threshold and / or a known flow memory validity time interval.
[0050] In some examples, a computing entity may request to update the data-oriented priority value of an allocated dynamic memory area (and the data stored therein). For example, a computing entity utilizing data stored in a fluid dynamic memory area 241 may predict / determine the increase in the importance of the data. Therefore, a computing entity may request to update the data-oriented priority value of a fluid dynamic memory area 241 to, for example, 99. Here, this update will switch the designation of the fluid dynamic memory area 241 from fluid to non-fluid. Therefore, the (now non-fluid) dynamic memory area 241 (and the data stored therein) will no longer be automatically released to the free pool of the dynamic memory area when its (previous) fluid memory effective time interval expires. In other examples, for example, when a computing entity predicts / determines that the importance of the stored data decreases after allocation, the requested update to the data-oriented priority value may switch the designation of the non-fluid dynamic memory area (and the data stored therein) to fluid. Therefore, the fluid memory effective time interval may be determined / configured for the new fluid dynamic memory area.
[0051] Figure 3 is an example conceptual diagram depicting streaming and non-streaming memory sub-channels according to various examples of the presently disclosed technology.
[0052] As described above, examples of the presently disclosed technology may be particularly adapted to improve other innovative dynamic memory region management systems / techniques. For example (and as Figure 3As depicted), the presently disclosed memory management system can adapt dynamic memory region mobility to orthogonal memory channel-based memory management. As used herein, orthogonal memory channel-based memory management can refer to a virtual memory management scheme (also referred to as "memory channel-based virtualization"), in which virtual memory is allocated in a hierarchical memory channel structure. For example, the memory channel structure can be organized as a hierarchical tree of memory channels, including a "main memory channel" (e.g., main memory channel 310) and one or more additional memory channels referred to as "memory sub-channels" (e.g., memory sub-channels 310(a), 310(b), 310(c), etc.). The main memory channel and the memory sub-channels are both examples of "memory channels." The main memory channel can correspond to the root node of the hierarchical tree. One or more memory sub-channels are descendants of the main memory channel and correspond to other non-root nodes of the hierarchical tree. In this context, "descendants" of a memory channel (such as a main memory channel) refer to direct descendants or children of the memory channel, as well as indirect descendants (such as grandchildren or great-grandchildren) of the memory channel. A given memory sub-channel may correspond to a leaf node and have no child nodes, and another given memory sub-channel may be a parent node of one or more child nodes.
[0053] The memory manager can assign a set of contiguous virtual memory addresses to the above-mentioned memory channel structure. If the memory channel structure does not have memory sub-channels (i.e., the memory channel structure has a main memory channel and no other memory channels), then the main memory channel has the same set of contiguous virtual memory addresses. However, if the memory channel structure has one or more memory sub-channels, one or more subsets of contiguous virtual memory addresses are reserved (or "cut out") from the set of contiguous virtual memory addresses assigned to the memory channel structure. Typically, a set of contiguous virtual memory addresses is reserved for a child from the child's parent. In this context, an address "reserved" from the parent means that the address is no longer part of the set of contiguous virtual memory addresses assigned by the parent, but is now assigned to the child. Thus, a corresponding set of contiguous virtual memory addresses may be reserved for children of a given memory channel (i.e., a main memory channel or a memory sub-channel) from a set of contiguous virtual memory addresses assigned to the given memory channel; a set of contiguous virtual memory addresses may be reserved for grandchildren of the given memory channel from a set of contiguous virtual memory addresses assigned to the children; a set of contiguous virtual memory addresses assigned to the grandchildren may be reserved for the great-grandchildren of the given memory channel; and so on.
[0054] Due to the aforementioned manner in which virtual memory addresses are reserved from the parent generation to the child generation, the child and parent generations are orthogonal to each other. In this context, a first memory channel being "orthogonal" to a second memory channel means that there is no overlap between a set of contiguous virtual memory addresses assigned to the first memory channel and a set of contiguous virtual memory addresses assigned to the second memory channel. Because there is no overlap in the assigned sets of virtual memory addresses, all memory channels of the memory channel structure should be orthogonal to each other.
[0055] As will be described below, this memory channel structure is particularly well-suited for storing / managing parallel data sets (i.e., nearly identical data sets describing common characteristics / attributes). Thus, as with examples of the presently disclosed technology, memory management based on orthogonal memory channels is particularly well-suited for improving dynamic memory region management for HPC applications that process / generate large numbers of parallel data sets during their extended runtimes.
[0056] For example, the memory channel structure 300 may be used by one or more HPC entities that process / analyze brain lesion imaging. The primary memory channel 310 of the memory channel structure 300 may store a first data set comprising images of lesions (conceptually represented by ) associated with a first set of treatment parameters (e.g., treatment method, medication used, treatment duration, etc.). Figure 3 ) and corresponding metadata representing treatment parameters (conceptually represented by Figure 3 ). Memory subchannel 310(a), which is a first descendant of main memory channel 310, can store a first parallel dataset comprising lesion images and metadata associated with a second set of treatment parameters (e.g., an extended test, a different medication, a different treatment method, etc.) that are refined / modified from the first set of treatment parameters. Similarly, memory subchannel 310(b) can store a second parallel dataset comprising lesion images and metadata associated with a third set of treatment parameters that are refined / modified from the first set of treatment parameters, etc. Thus, memory subchannels 310(a)-310(y) can all store parallel datasets that are derived from / dependent on the first dataset stored in main memory channel 310.
[0057] As depicted, each of the memory subchannels 310(a)-310(y) is structurally parallel (i.e., similar) and includes its own nested / descendant memory subchannels. For example, memory subchannel 310(a)(i) is a child of memory subchannel 310(a), and memory subchannel 310(a)(i)(1) is a child of memory subchannel 310(a)(i). Similarly, memory subchannel 310(b)(i) is a child of memory subchannel 310(b), and memory subchannel 310(b)(i)(1) is a child of memory subchannel 310(b)(i), and so on. Here, a first data set can be stored on memory subchannel 310(a) and its nested / descendant memory subchannels (i.e., memory subchannel 310(a)(i) and memory subchannel 310(a)(i)(1)). Similarly, the second data set may be stored on memory subchannel 310(b) and its nested / descendant memory subchannels (i.e., memory subchannel 310(b)(i) and memory subchannel 310(b)(i)(1)), etc. Utilizing this parallel orthogonal memory channel structure to store parallel data sets allows examples of the presently disclosed technology to more easily identify differences between stored parallel data sets. For example, a first portion / aspect / transformation of a first data set stored within memory subchannel 310(a)(i) may correspond to a first portion / aspect / transformation of a second data set stored within memory subchannel 310(b)(i). Because similar portions / aspects / transformations of the first and second data sets are stored in parallel memory subchannels (i.e., memory subchannels of similar size, structure, and relational location), they may be more easily and efficiently analyzed together.
[0058] As described above, the examples can be adapted to improve memory management based on orthogonal memory channels in various ways. For example, memory subchannels 310(a)-(d) (and their descendant memory subchannels) can be designated as non-fluid memory subchannels. In contrast, memory subchannels 310(x) and 310(y) (together with their descendant memory subchannels) can be designated as fluid memory subchannels. Thus, during the runtime of an HPC application, these non-fluid and fluid memory subchannels can be assigned to store parallel data sets based on their respective data-oriented priority values (i.e., their analytical importance / significance to the HPC application). As described above, memory subchannels derived from non-fluid memory subchannels can also be designated as non-fluid memory subchannels and can have the same data-oriented priority values as their ancestors. Similarly, memory subchannels derived from fluid memory subchannels can also be designated as fluid memory subchannels and can have the same data-oriented priority values and fluid memory validity intervals as their ancestors.
[0059] Figure 4 An example computing system 400 is depicted that can be used to allocate fluid memory regions according to various examples of the presently disclosed technology. In some examples, computing system 400 can be associated with a memory manager that manages memory regions for one or more computing entities.
[0060] Now refer to Figure 4 , the computing component 410 can be, for example, a server computer, a controller, or any other similar computing component capable of processing data. Figure 4 In the example implementation, computing component 410 includes a hardware processor 412 and a machine-readable storage medium 414 .
[0061] The hardware processor 412 may be one or more central processing units (CPUs), semiconductor-based microprocessors, and / or other hardware devices suitable for retrieving and executing instructions stored in the machine-readable storage medium 414. The hardware processor 412 may fetch, decode, and execute instructions, such as instructions 416-420, to control the process or operation of burst preloading for available bandwidth estimation. Alternatively or in addition to fetching and executing instructions, the hardware processor 412 may include one or more electronic circuits, such as a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or other electronic circuits, containing electronic components for performing the functions of one or more instructions.
[0062] A machine-readable storage medium, such as machine-readable storage medium 414, can be any electronic, magnetic, optical, or other physical storage device that contains or stores executable instructions. Thus, machine-readable storage medium 414 can be, for example, random access memory (RAM), non-volatile RAM (NVRAM), electrically erasable programmable read-only memory (EEPROM), a storage device, an optical disk, or the like. In some examples, machine-readable storage medium 414 can be a non-transitory storage medium, where the term "non-transitory" does not encompass transient propagation instructions. As described in detail below, machine-readable storage medium 414 can be encoded with executable instructions (e.g., instructions 416-420).
[0063] As described above, according to various examples of the presently disclosed technology, the computing system 400 can be used to allocate a flow memory area.
[0064] Thus, hardware processor 412 executes instructions 416 to receive a request for a memory region.The request may include a data-oriented priority value that measures the level of importance of the data to be stored in the requested memory region.
[0065] In some examples, the request may be for a dynamic memory region. In some examples, the request may be received from a computing entity (e.g., a software application, a container, a virtual machine, a computing node, a cluster of computing nodes, etc.) that processes / utilizes data. In some of these examples, the computing entity may be an HPC entity (e.g., an HPC software application, an HPC computing node, etc.).
[0066] As described above, various metrics for data-oriented priority values can be used. For example, increasing values can measure an increased / higher level of importance / priority for the stored data, or decreasing values can measure an increased / higher level of importance / priority for the stored data. Relatedly, data-oriented priority values can include integer and non-integer values, positive values, negative values, and zero values, etc.
[0067] In some examples, a computing entity requesting a memory region may determine a data-oriented priority value for the data. The computing entity may use various criteria, as well as application-specific and data-specific factors, to make this determination. When making this determination, the computing entity may also consider a data-oriented priority liquidity threshold and / or a known liquid memory validity interval.
[0068] In various examples, the hardware processor 412 can determine or modify a data-oriented priority value for the data. For example, in some embodiments, the hardware processor 412 can modify the data-oriented priority value for the data based on an activity level associated with the data / allocated memory region storing the data (e.g., a number of accesses within a time interval). In some examples, the hardware processor 412 can verify the modification of the data-oriented priority value using a computing entity that utilizes the data / allocated memory region before implementing the modification.
[0069] The hardware processor 412 executes instructions 418 to compare the data-oriented priority value with the data-oriented priority mobility threshold. As described above, by comparing the data-oriented priority value with the data-oriented priority mobility threshold, the hardware processor 412 can determine whether to allocate a flowing memory area or a non-flowing memory area in response to the request. In particular, if the data-oriented priority value is on the first side of the data-oriented priority mobility threshold (i.e., if the importance level of the data measured by the data-oriented priority value does not exceed the importance threshold level measured by the data-oriented priority mobility threshold), the hardware processor 412 can allocate a flowing memory area for the data. Conversely, if the data-oriented priority value is on the second side of the data-oriented priority mobility threshold (i.e., if the importance level of the data measured by the data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority mobility threshold), the hardware processor 412 can allocate a non-flowing memory area for the data.
[0070] Based on the comparison of instructions 418, hardware processor 412 executes instructions 420 to allocate a fluid memory region for the data. As described above, this may be the case when the importance level of the data as measured by the data-oriented priority value does not exceed the importance threshold level as measured by the data-oriented priority fluidity threshold.
[0071] As described above, when the allocated flow memory area's flow memory validity period expires, the allocated flow memory area can be automatically released to the free pool of memory areas. In various examples, the hardware processor 412 can determine the flow memory validity period of the allocated flow memory area based on the data-oriented priority value of the data (e.g., the determined flow memory validity period can increase as the importance level of the data increases).
[0072] In some cases, the hardware processor 412 may store / organize unique identifiers / handles for accessing the allocated flowing memory regions according to the data-oriented priority values (e.g., in a lookup table or hash table), such that the hardware processor 412 can access the allocated flowing memory regions faster than other allocated flowing memory regions having data-oriented priority values associated with lower importance levels. More generally, the hardware processor 412 may store / organize unique identifiers for accessing the allocated memory regions according to their respective data-oriented priority values (e.g., in a lookup table or hash table), such that the hardware processor 412 can access allocated memory regions having data-oriented priority values associated with higher importance levels faster than other allocated memory regions having data-oriented priority values associated with lower importance levels.
[0073] In various cases, before the expiration of the streaming memory validity interval, the hardware processor 412 may receive an updated data-oriented priority value that measures the updated importance level of the data stored in the allocated streaming memory area. Similar to the request of instruction 416, a new / updated request may be received from a computing entity that processes / utilizes data. In response to receiving the new / updated request, the hardware processor 412 may compare the updated data-oriented priority value with a data-oriented priority liquidity threshold. If the updated data-oriented priority value is on the second side of the data-oriented priority liquidity threshold (i.e., if the updated importance level of the data measured by the updated data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority liquidity threshold), the hardware processor 412 may switch the allocated streaming memory area to a non-streaming memory area that will not be automatically released to the free pool of memory areas upon expiration of the streaming memory validity interval. If the updated data-oriented priority value is still on the first side of the data-oriented priority liquidity threshold (i.e., if the updated importance level of the data measured by the updated data-oriented priority value does not exceed the importance threshold level measured by the data-oriented priority liquidity threshold), the hardware processor 412 may not switch the allocated streaming memory area to the non-streaming memory area. However, in some examples, the hardware processor 412 may update the streaming memory validity period to reflect the updated data-oriented priority value / importance level of the data (e.g., if the updated importance level of the data measured by the updated data-oriented priority value increases, the hardware processor may increase the streaming memory validity period). Similarly, the hardware processor 412 may store / reorganize the (multiple) unique identifiers of the allocated streaming memory area according to its updated data-oriented priority value / importance level.
[0074] Figure 5 An example computing system 500 is depicted that can be used to allocate streaming dynamic memory regions according to various examples of the presently disclosed technology. In some examples, computing system 500 can be associated with a memory manager that manages memory regions for one or more computing entities.
[0075] Now refer to Figure 5 , the computing component 510 can be, for example, a server computer, a controller, or any other similar computing component capable of processing data. Figure 5 In the example embodiment of the present invention, the computing component 510 includes a hardware processor 512 and a machine-readable storage medium 514 for storing instructions 516-520. Here, the computing component 510, the hardware processor 512 and the machine-readable storage medium 514 can be combined with Figure 4 Their corresponding components are described as being the same / similar and will not be described again for the sake of brevity.
[0076] Hardware processor 512 executes instructions 516 to receive a request to stream a dynamic memory region from a computing entity (e.g., a software application, a container, a virtual machine, a computing node, a cluster of computing nodes, etc.). In some examples, the computing entity may be an HPC entity (e.g., an HPC software application, an HPC computing node, etc.).
[0077] The request may include a data-oriented priority value that measures the importance level of the data to be stored in the requested flow dynamic memory area. As described above, different measurement schemes may be used for data-oriented priority values. For example, an increasing numerical value may measure the increased / higher importance level / priority of the stored data, or a decreasing numerical value may measure the increased / higher importance level / priority of the stored data. Relatedly, data-oriented priority values may include integer and non-integer values, positive values, negative values, and zero values, etc.
[0078] In some examples, a computing entity may determine a data-oriented priority value for data. The computing entity may use various criteria and application-specific and data-specific factors to make this determination. When making this determination, the computing entity may also consider a data-oriented priority liquidity threshold and / or a known streaming memory validity interval. In these examples, prior to receiving the request of instruction 516, the hardware processor 512 may (1) receive a query from the computing entity requesting information related to the data-oriented priority liquidity threshold and / or the streaming memory validity interval of the streaming dynamic area; and (2) provide the requested information in response to the request. For example, the hardware processor 512 may provide information related to the data-oriented priority liquidity threshold in response to the query / request from the computing entity. The information may include the value of the data-oriented priority liquidity threshold. Instead of (or in addition to) the value of the data-oriented priority liquidity threshold, the hardware processor 512 may provide the computing entity with a first range of data-oriented priority values for data to be stored in the streaming dynamic memory area and a second range of data-oriented priority values for data to be stored in the non-streaming dynamic memory area. Thus, based on this information and application-specific and data-specific factors, the computing entity may determine a data-oriented priority value for the data. As described above, in some examples, the hardware processor 512 rather than a computing entity may determine the data-oriented priority value of the data.
[0079] In some examples, the request may also include a requested / expected time interval for the mobile storage. For example, the computing entity may predict that it will continue to process / utilize data for a two-month time interval (i.e., the computing entity may predict that the importance of the data will not decrease until the two-month time period expires). Thus, when requesting a mobile dynamic storage area for data, the computing entity may request, for example, a three-month mobile storage time interval. Alternatively (or in addition to requesting a three-month mobile storage time interval for the data), the computing entity may consider the predicted time interval for processing / utilizing the data when determining a data-oriented priority value for the data.
[0080] The hardware processor 512 executes instructions 518 to determine a flowing memory validity interval for the requested flowing dynamic memory region. In an example where the computing entity includes a requested / expected flowing memory validity interval in its request for the flowing dynamic memory region, the hardware processor 512 may determine the flowing memory validity interval based on the requested / expected flowing memory validity interval. In other examples, the hardware processor 512 may determine the flowing memory validity interval for the requested flowing dynamic memory region based on a data-oriented priority value. For example, the determined flowing memory validity interval may increase as the importance level of the data increases (as measured by the data-oriented priority value of the data).
[0081] The hardware processor 512 executes the instructions 520 to allocate a streaming dynamic memory region having a determined streaming memory valid time interval for the data.
[0082] As described above, when the determined floating memory valid time interval of the allocated floating dynamic memory area expires, the allocated floating dynamic memory area may be automatically released to the free pool of dynamic memory areas.
[0083] Figure 6 An example computing system 600 is depicted that can be used to request a memory region for a data set having a determined data-oriented priority value according to various examples of the presently disclosed technology.
[0084] Now refer to Figure 6 , the computing component 610 can be, for example, a server computer, a controller, or any other similar computing component capable of processing data. Figure 6 In the example embodiment of the present invention, the computing component 610 includes a hardware processor 612 and a machine-readable storage medium 614 for storing instructions 616-620. Here, the computing component 610, the hardware processor 612 and the machine-readable storage medium for 614 can be combined with Figure 4Their corresponding components are described as being the same / similar and will not be described again for the sake of brevity.
[0085] As described above, examples of the presently disclosed technology may also include computing entities (e.g., software applications, containers, virtual machines, computing nodes, etc.) that collaborate with a memory management system to improve area utilization of memory areas. Here, computing system 600 may be associated with such computing entities.
[0086] Thus, the hardware processor 612 executes instructions 616 to receive information related to a data-oriented priority liquidity threshold from a memory management system (e.g., a memory management system associated with computing system 400 or 500). As described above, the data-oriented priority liquidity threshold can be used to designate / distinguish between non-mobile and mobile memory regions. In particular, if the data-oriented priority value of a given data set is on a first side of the data-oriented priority liquidity threshold (i.e., if the importance level of the data set measured by the data-oriented priority value does not exceed the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system can allocate a mobile memory region for the data set. Conversely, if the data-oriented priority value of a given data set is on a second side of the data-oriented priority liquidity threshold (i.e., if the importance level of the data set measured by the data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority liquidity threshold), the memory management system can allocate a mobile memory region for the data.
[0087] The received information related to the data-oriented priority mobility threshold may include a value of the data-oriented priority mobility threshold. Alternatively or in addition to the value of the data-oriented priority mobility threshold, the received information may include a first range of data-oriented priority values for data to be stored in the streaming memory area and a second range of data-oriented priority values for data to be stored in the non-streaming memory area.
[0088] In various cases, the received information related to the data-oriented priority liquidity threshold may be provided by the memory management system in response to a request issued by the hardware processor 612 .
[0089] The hardware processor 612 executes instructions 618 to determine a data-oriented priority value for the data set based in part on the received information related to the data-oriented priority fluidity threshold. As described above, in addition to the received information related to the data-oriented priority fluidity threshold, the hardware processor 612 can also use various criteria and application-specific and data-specific factors to make this determination.
[0090] Hardware processor 612 executes instructions 620 to request a memory region for a data set from a memory management system, the request including the determined data-oriented priority value for the data set.
[0091] In response to the memory management system allocating the first streaming memory sub-channel for the data set, the hardware processor 612 executes instructions 622 to store the data set in the allocated first streaming memory sub-channel. Upon expiration of the streaming memory validity interval, the allocated first streaming memory sub-channel may be automatically released to a free pool of the memory.
[0092] As described above, the examples may be particularly suitable for improving other innovative dynamic memory area management systems / techniques, such as memory management based on orthogonal memory channels. As used herein, memory management based on orthogonal memory channels may refer to a virtual memory management scheme (also referred to as "memory channel-based virtualization"), in which virtual memory is allocated in a hierarchical memory channel structure. For example, the memory channel structure may be organized as a hierarchical tree of memory channels, including a "main memory channel" and one or more additional memory channels referred to as "memory sub-channels." Both the main memory channel and the memory sub-channel are examples of "memory channels." The main memory channel may correspond to the root node of the hierarchical tree. One or more memory sub-channels are descendants of the main memory channel and correspond to other non-root nodes of the hierarchical tree. In this context, the "descendants" of a memory channel (such as a main memory channel) refer to the direct descendants or children of the memory channel, as well as the indirect descendants (such as grandchildren or great-grandchildren) of the memory channel. A given memory sub-channel may correspond to a leaf node and have no child nodes, and another given memory sub-channel may be the parent node of one or more child nodes. Here, a first memory channel being "orthogonal" to a second memory channel means that there is no overlap between a set of consecutive virtual memory addresses assigned to the first memory channel and a set of consecutive virtual memory addresses assigned to the second memory channel. Because there is no overlap in the assigned sets of virtual memory addresses, according to example embodiments, all memory channels of the memory channel structure should be orthogonal to each other.
[0093] As described above, like the memory management system of the presently disclosed technology, memory management based on orthogonal memory channels is particularly well suited for improving dynamic memory resource management for HPC applications that process / generate massively parallel data sets during their extended runtimes.
[0094] The examples can be adapted to improve memory management based on orthogonal memory channels in various ways. For example, a first group of memory subchannels can be designated as non-fluid memory subchannels. Conversely, a second group of memory subchannels can be designated as fluid memory subchannels. Thus, during the runtime of an HPC application, these non-fluid and fluid memory subchannels can be assigned to parallel data sets based on their respective data-oriented priority values (i.e., their analytical importance / significance to the HPC application). Memory subchannels derived from non-fluid memory subchannels can also be designated as non-fluid memory subchannels and can have the same data-oriented priority values as their ancestors. Similarly, memory subchannels derived from fluid memory subchannels can also be designated as fluid memory subchannels and can have the same data-oriented priority values and fluid memory validity intervals as their ancestors.
[0095] Reference again Figure 6 , the first streaming memory subchannel may be a child of the first memory channel, and the first streaming memory subchannel may be orthogonal to the first memory channel. In some examples, the allocated first streaming memory subchannel may be a parent of the second streaming memory subchannel, and allocating the first streaming memory subchannel may also include allocating the second streaming memory subchannel. Thus, the allocated first streaming memory subchannel and the allocated second streaming memory subchannel may share the same data-oriented priority value and the same streaming memory valid time interval.
[0096] In various examples, the hardware processor 612 can execute additional instructions that cause the hardware processor 612 to: (1) determine a second data-oriented priority value for the second data set, the second data-oriented priority value measuring a level of importance of the second data set; (2) request a second memory area for storing the second data set from the memory management system, the request including the second data-oriented priority value; and (3) store the second data set in the first non-volatile memory channel in response to the memory manager allocating the first non-volatile memory sub-channel for the second data set.
[0097] Here, the first non-volatile memory subchannel may also be a descendant of the first memory channel, and the first non-volatile memory subchannel may be orthogonal to the first memory channel. Similarly, the data-oriented priority value of the first data set may be located on a first side of a data-oriented priority liquidity threshold (i.e., the importance level of the first data set measured by the data-oriented priority value of the first data set does not exceed the importance threshold level measured by the data-oriented priority liquidity threshold), and the second data-oriented priority value of the second data set may be located on a second side of the data-oriented priority liquidity threshold (i.e., the importance level of the second data set measured by the second data-oriented priority value exceeds the importance threshold level measured by the data-oriented priority liquidity threshold). Here, the first data set and the second data set may be parallel data sets used by a computing entity associated with the hardware processor 612. As described above, the parallel data sets may be nearly identical data sets describing common characteristics.
[0098] Figure 7 A block diagram of an example computer system 700 is depicted in which various embodiments described herein may be implemented. In various examples, the computing system 700 may be used to implement Figure 5 and Figure 6 Computing systems 500 and 600 are described respectively.
[0099] Computer system 700 includes a bus 702 or other communication mechanism for communicating information, and one or more hardware processors 704 coupled with bus 702 for processing information. Hardware processor(s) 704 may be, for example, one or more general-purpose microprocessors.
[0100] Computer system 700 also includes a main memory 706, such as random access memory (RAM), cache, and / or other dynamic storage devices, coupled to bus 702 for storing information and instructions to be executed by processor 704. Main memory 706 may also be used to store temporary variables or other intermediate information during execution of instructions to be executed by processor 704. Such instructions, when stored in a storage medium accessible to processor 704, render computer system 700 a special-purpose machine customized to perform the operations specified in the instructions.
[0101] Computer system 700 further includes a read only memory (ROM) 708 or other static storage device coupled to bus 702 for storing static information and instructions for processor 704. A storage device 710, such as a magnetic disk, optical disk, or USB thumb drive (flash drive), is provided and coupled to bus 702 for storing information and instructions.
[0102] The computer system 700 may be coupled via bus 702 to a display 712, such as a liquid crystal display (LCD) (or touch screen), for displaying information to a computer user. An input device 714, including alphanumeric and other keys, is coupled to bus 702 for communicating information and command selections to processor 704. Another type of user input device is a cursor control 716, such as a mouse, trackball, or cursor direction keys, for communicating direction information and command selections to processor 704 and for controlling cursor movement on display 712. In some embodiments, the same direction information and command selections as with a cursor control may be implemented by receiving touches on a touch screen without a cursor.
[0103] The computing system 700 may include a user interface module for implementing a GUI, which may be stored in a mass storage device as executable software code executed by the computing device(s). By way of example, this module and other modules may include components such as software components, object-oriented software components, class components, and task components, processes, functions, properties, programs, subroutines, program code segments, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables.
[0104] Generally, as used herein, the terms "component," "engine," "system," "database," "data store," and the like may refer to logic implemented in hardware or firmware, or to a set of software instructions written in a programming language such as Java, C, or C++, which may have entry and exit points. A software component may be compiled and linked into an executable program, installed in a dynamic link library, or written in an interpreted programming language such as BASIC, Perl, or Python. It should be understood that a software component may be called from other components or from itself, and / or may be called in response to a detected event or interrupt. A software component configured for execution on a computing device may be provided on a computer-readable medium such as an optical disc, digital video disc, flash drive, magnetic disk, or any other tangible medium, or may be provided as a digital download (and may be stored originally in a compressed or installable format that requires installation, decompression, or decryption prior to execution). Such software code may be stored in part or in whole on a memory device of an executing computing device for execution by the computing device. The software instructions may be embedded in firmware such as an EPROM. It will be further understood that hardware components may include connected logic units such as gates and flip-flops, and / or may include programmable units such as programmable gate arrays or processors.
[0105] The computer system 700 can implement the techniques described herein using custom hardwired logic, one or more ASICs or FPGAs, firmware, and / or program logic that, in combination with the computer system, makes the computer system 700 a special-purpose machine or programs it as a special-purpose machine. According to one embodiment, the techniques herein are performed by the computer system 700 in response to the processor(s) 704 executing one or more sequences of one or more instructions contained in the main memory 706. Such instructions can be read into the main memory 706 from another storage medium, such as the storage device 710. Execution of the sequences of instructions contained in the main memory 706 causes the processor(s) 704 to perform the process steps described herein. In alternative embodiments, hardwired circuitry can be used in place of or in combination with software instructions.
[0106] As used herein, the term "non-transitory media" and similar terms refer to any medium that stores data and / or instructions that cause a machine to operate in a specific manner. Such non-transitory media may include non-volatile media and / or volatile media. Non-volatile media include, for example, optical or magnetic disks, such as storage device 710. Volatile media include dynamic memory, such as main memory 706. Common forms of non-transitory media include, for example, floppy disks, diskettes, hard disks, solid-state drives, magnetic tape or any other magnetic data storage medium, CD-ROMs, any other optical data storage medium, any physical medium with a pattern of holes, RAM, PROM and EPROM, flash EPROM, NVRAM, any other memory chip or cartridge, and networked versions of these media.
[0107] Non-transient media are distinct from, but can be used in conjunction with, transmission media. Transmission media facilitate the transfer of information between non-transient media. Examples of transmission media include coaxial cables, copper wire, and optical fiber, including the wires comprising bus 702. Transmission media can also take the form of acoustic or light waves, such as those generated during radio wave and infrared data communications.
[0108] Computer system 700 also includes a communication interface 718 coupled to bus 702. Network interface 718 provides two-way data communication coupled to one or more network links, and the one or more network links are connected to one or more local networks. For example, communication interface 718 can be an integrated services digital network (ISDN) card, a cable modem, a satellite modem or a modem for providing a data communication connection with a corresponding type telephone line. As another example, network interface 718 can be a local area network (LAN) card for providing a data communication connection with a compatible LAN (or a WAN component for communicating with a WAN). Wireless links can also be implemented. In any such embodiment, network interface 718 sends and receives electrical indications, electromagnetic indications or optical indications that carry a digital data stream representing various types of information.
[0109] A network link typically provides data communication to other data devices through one or more networks. For example, a network link can provide a connection through a local network to a host computer or to data equipment operated by an Internet Service Provider (ISP). The ISP, in turn, provides data communication services through the global packet data communication network now commonly referred to as the "Internet." Both the local network and the Internet use electrical, electromagnetic, or optical signals to carry digital data streams. Signals through the various networks and signals on the network link and through the communication interface 718 (which carry digital data to and from the computer system 700) are example forms of transmission media.
[0110] Computer system 700 can send messages and receive data, including program code, through the network(s), network links, and communications interface 718. In the Internet example, a server can transmit the requested code for an application program through the Internet, an ISP, a local network, and communications interface 718.
[0111] The received code may be executed by processor 704 as it is received and / or stored in storage device 710 or other non-volatile storage for later execution.
[0112] Each of the processes, methods, and algorithms described in the preceding sections can be implemented in code components executed by one or more computer systems or computer processors comprising computer hardware and automated in whole or in part by these code components. The one or more computer systems or computer processors can also operate to support the execution of related operations in a "cloud computing" environment, or operate as "software as a service (SaaS)". These processes and algorithms can be implemented in part or in whole in dedicated circuits. The various features and processes described above can be used independently of each other, or can be combined in various ways. Different combinations and sub-combinations are intended to fall within the scope of this disclosure, and in some embodiments, certain method blocks or process blocks can be omitted. The methods and processes described herein are also not limited to any particular order, and the blocks or states associated with these methods and processes can be executed in other appropriate orders, or can be executed in parallel, or in some other manner. Blocks or states can be added to or removed from the disclosed example embodiments. The execution of certain operations or processes can be distributed among computer systems or computer processors so that they do not reside only within a single machine, but are deployed across multiple machines.
[0113] As used herein, circuit can utilize any form of hardware, software or its combination to implement.For example, one or more processors, controllers, ASIC, PLA, PAL, CPLD, FPGA, logic unit, software routine or other mechanisms can be implemented to form circuit.In an embodiment, various circuits described herein can be implemented as discrete circuits, or described functions and features can be shared partially or entirely between one or more circuits.Although various features or functional elements can be described or advocated individually as independent circuits, these features and functions can also be shared among one or more common circuits, and this description should not require or imply that independent circuits are needed to implement such features or functions.When using software to implement circuit in whole or in part, this software can be implemented to operate together with a computing system or a processing system (such as computer system 700) that can perform the function described about the software.
[0114] As used herein, the term "or" may be interpreted in an inclusive or exclusive sense. Furthermore, descriptions of resources, operations, or structures in the singular should not be construed to exclude the plural. Unless expressly stated otherwise, or understood otherwise within the context in which they are used, conditional language (including, among others, such as "can," "could," "might," or "may") is generally intended to convey that certain embodiments include and other embodiments do not include certain features, elements, and / or steps.
[0115] Unless expressly stated otherwise, the terms and phrases used in this document and their variations should be interpreted as open-ended rather than restrictive. Adjectives such as "conventional," "traditional," "normal," "standard," "known," and terms of similar meaning should not be interpreted as limiting the items described to items available for a given time period or before a given time, but should be understood to cover conventional, traditional, normal, or standard technology that may be available or known at any time now or in the future. In some cases, the presence of broad words and phrases (such as "one or more," "at least," "but not limited to," or other similar phrases) should not be understood to mean that a narrower situation is intended or required where such broad phrases may not be present.
Claims
1. A method performed by a memory manager, comprising: receiving a request for a memory region, the request including a data-oriented priority value measuring a level of importance of data to be stored in the requested memory region; comparing the data-oriented priority value to a data-oriented priority liquidity threshold; allocating a flow memory area for the data based on the comparison, wherein the allocated flow memory area is automatically released to a free pool of memory areas when a flow memory validity time interval of the allocated flow memory area expires; as well as The unique identifier of the allocated mobile memory region is stored according to the data-oriented priority value so that the memory manager accesses the allocated mobile memory region faster than the memory manager accesses other allocated mobile memory regions having lower associated data-oriented priority values.
2. The method of claim 1, further comprising: The flowing memory valid time interval of the allocated flowing memory area is determined based on the data-oriented priority value.
3. The method according to claim 1, wherein The request is received from an entity for high performance computing.
4. The method of claim 1, further comprising: receiving, before expiration of the streaming memory validity time interval, an updated data-oriented priority value measuring an importance level of updates to the data stored in the allocated streaming memory area; comparing the updated data-oriented priority value to the data-oriented priority liquidity threshold; as well as The allocated fluid memory area is switched to a non-fluid memory area, and the non-fluid memory area will not be automatically released to the free pool of memory areas when the fluid memory valid time interval expires.
5. A non-transitory computer-readable medium storing instructions that, when executed by one or more processing resources, cause the one or more processing resources to perform a method comprising: receiving a request for a streaming dynamic memory region from a computing entity, the request including a data-oriented priority value measuring a level of importance of data to be stored in the requested streaming dynamic memory region; determining a mobile memory valid time interval of the requested mobile dynamic memory area; updating the determined streaming memory validity time interval of the allocated streaming dynamic memory area in response to a request from the computing entity; A flowing dynamic memory area with a determined flowing memory valid time interval is allocated to the data, wherein when the determined flowing memory valid time interval expires, the allocated flowing dynamic memory area is automatically released to a free pool of dynamic memory areas.
6. The non-transitory computer readable medium storing instructions of claim 5, wherein: Determining the flowing memory valid time interval for the requested flowing dynamic memory area includes determining the flowing memory valid time interval based on the data-oriented priority value.
7. The non-transitory computer readable medium storing instructions of claim 5, wherein: The method further comprises: The unique identifier of the allocated streaming dynamic memory region is stored according to the data-oriented priority value of the allocated streaming dynamic memory region, so that the access speed to the allocated streaming dynamic memory region can be faster than the access speed to other allocated streaming dynamic memory regions with lower associated data-oriented priority values.
8. The non-transitory computer-readable medium storing instructions of claim 5 , wherein prior to receiving the request for the streaming dynamic memory region from the computing entity, the method further comprises: providing information related to a data-oriented priority liquidity threshold to the computing entity, wherein: The data oriented priority value of the data to be stored in the streaming dynamic memory area is located on a first side of the data oriented priority liquidity threshold, and The data oriented priority value of the data to be stored in the non-mobile dynamic memory area is located on a second side of the data oriented priority liquidity threshold.
9. The non-transitory computer readable medium storing instructions of claim 8, wherein: Providing information related to the data-oriented priority liquidity threshold includes: The computing entity is provided with a first range of data-oriented priority values for data to be stored in the streaming dynamic memory region and a second range of data-oriented priority values for data to be stored in the non-streaming dynamic memory region.
10. The non-transitory computer readable medium storing instructions of claim 8, wherein: In response to a query from the computing entity for information related to the data-oriented priority liquidity threshold, the information related to the data-oriented priority liquidity threshold is provided to the computing entity.
11. A system comprising: one or more processing resources; as well as a non-transitory computer-readable medium, coupled to the one or more processing resources, having instructions stored therein that, when executed by the one or more processing resources, cause the system to perform a method comprising: determining a data-oriented priority value for the data set, the data-oriented priority value measuring a level of importance of the data to be stored in the requested memory region; requesting from a memory manager a memory area for storing the data set, the request including the data-oriented priority value; In response to the memory manager allocating a first streaming memory sub-channel for the data in response to the request, the data is stored in the allocated first streaming memory sub-channel, wherein: the first mobile memory sub-channel being a descendant of the first memory channel, The first streaming memory subchannel is orthogonal to the first memory channel, When the valid time interval of the streaming memory expires, the allocated first streaming memory sub-channel is automatically released to the free pool of the memory.
12. The system of claim 11 , wherein before requesting the memory region, the method further comprises: Requesting information related to a data-oriented priority liquidity threshold from the memory manager, wherein: The data-oriented priority value of the data to be stored in the streaming memory sub-channel is on a first side of the data-oriented priority liquidity threshold, and The data-oriented priority value of data to be stored in the non-liquid storage sub-channel is on a second side of the data-oriented priority liquidity threshold; and Information related to the data-oriented priority liquidity threshold is received from the memory manager.
13. The system of claim 12, wherein: Determining the data-oriented priority value of the data set includes: The data-oriented priority value of the requested memory region is determined based in part on information related to the data-oriented priority liquidity threshold.
14. The system of claim 11, wherein: Requesting the memory region from the memory manager comprises: The floating storage area is requested with the floating storage validity time interval.
15. The system of claim 11, wherein: The allocated first streaming memory sub-channel is a parent of the second streaming memory sub-channel; The second flow storage sub-channel is orthogonal to the allocated first flow storage sub-channel; Allocating the first streaming memory sub-channel further comprises allocating the second streaming memory sub-channel; and The allocated first streaming memory sub-channel and the allocated second streaming memory sub-channel share the same data-oriented priority value and the same streaming memory valid time interval.
16. The system of claim 11, wherein: The method further comprises: determining a second data-oriented priority value for the second data set, the second data-oriented priority value measuring an importance level of the second data set; requesting from the memory manager a second memory area for storing the second data set, the request including the second data-oriented priority value; and In response to the memory manager allocating a first non-streaming memory sub-channel for the second data set, storing the second data set in the first non-streaming memory sub-channel, wherein: The first non-volatile memory sub-channel is a descendant of the first memory channel, and The first non-flowing memory sub-channel is orthogonal to the first memory channel.
17. The system of claim 16, wherein: The data-oriented priority value of the first data set is on a first side of a data-oriented priority fluidity threshold, and the second data-oriented priority value of the second data set is on a second side of the data-oriented priority fluidity threshold.
Citation Information
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Write stream priority identification and classification
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Prioritized scheduling of data store access requests
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