Solid-state power distribution device output constant voltage current limiting control circuit
The solid-state power distribution device output constant voltage and current limiting control circuit with dual closed-loop control mode solves the problems of circuit complexity and low reliability in the existing technology. It realizes the suppression of inrush current of large-capacity capacitive loads and the current limitation when the load is short-circuited, simplifies the circuit structure, and improves reliability and adaptability.
Patent Information
- Application Number
- CN202410077869.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-19
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2044-01-19
AI Technical Summary
In existing solid-state power distribution devices, when there is a large-capacity capacitive load or a short circuit, the existing technology is difficult to effectively control the loop current. This results in high circuit complexity and difficulty in achieving simple and effective current limiting control, leading to complex circuit structure and low reliability.
The system adopts a dual closed-loop control mode. Through the DSP control unit, isolation drive circuit, voltage sampling circuit and current control loop, it uses the dual closed-loop control of load voltage and loop current to achieve adaptive load voltage control and current limiting control, avoids the use of auxiliary pipelines, and dynamically adjusts the gate-source voltage of the field-effect transistor to control the loop current.
It achieves inrush current suppression for large-capacity capacitive loads and current limitation during load short circuits, simplifies the circuit structure, improves reliability and adaptability, and is suitable for resistive and inductive loads.
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Figure CN118012191B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electronic engineering technology, specifically to a constant voltage and current limiting control circuit for a solid-state power distribution device. Background Technology
[0002] With the continuous improvement of the intelligence level of aviation weapon equipment systems, the increasing number and types of equipment, and the increasingly higher power capacity requirements, new requirements have been put forward for aviation power systems in terms of reliability, power capacity, and intelligent power distribution. The conventional power distribution or remote control power distribution methods used under the traditional power supply system cannot meet the needs of aviation power development. Solid-state power distribution devices have become the mainstream development trend of aviation power secondary power distribution systems. Field-effect transistors are used as solid-state power switches to realize the functions of power transmission, control, distribution and protection of aviation power.
[0003] Solid-state power distribution devices typically use MOSFETs as power switches for power output control, while remote control and overcurrent protection are achieved through microcontrollers such as DSPs, FPGAs, and MCUs. 2 The implementation of control algorithms such as T-protection. Currently, current limiting control for distribution branches of solid-state power distribution devices typically employs MOSFET gate voltage reduction control or a combination of current-limiting resistors and auxiliary MOSFETs to limit the loop current under different operating conditions.
[0004] The article "Design of Soft-Start Circuit for 270V High Voltage DC Solid State Power Controller" published in the October 2020 issue of Measurement & Control Technology (Vol. 39, No. 10, pp. 87-92) proposes a power distribution output structure based on a main tube and an auxiliary tube plus a current-limiting resistor. When a capacitive load or a load experiences overcurrent or short circuit, the current-limiting branch formed by the auxiliary tube and the current-limiting resistor is first switched on. At the same time, the gate-source voltage of the MOSFET is reduced by the gate voltage reduction control circuit, so that the MOSFET operates in the amplification range, increasing the loop impedance. Combined with the current-limiting resistor, this limits the loop current. This control method requires the circuit structure to adopt a main tube plus an auxiliary tube, which increases the circuit complexity.
[0005] Chinese invention patent CN111435785A, "A Circuit Mechanism and Method for Suppressing Power-On Surge Current in Aircraft Equipment," proposes a circuit structure that combines solid-state electronic switches and current suppression. The current-limiting branch consists of a transistor and a current-limiting resistor. The solid-state electronic switch circuit controls the opening or closing of the electronic switch by detecting the load voltage slope. This control method is also based on the main circuit plus an auxiliary current-limiting circuit, which increases the number of hardware circuit components and reduces the reliability of the circuit. Summary of the Invention
[0006] This invention addresses the inrush current problem caused by large-capacity capacitive loads or load short circuits in solid-state power distribution devices by proposing a constant voltage and current limiting control circuit for the output of solid-state power distribution devices. This circuit enables adaptive control of the load voltage of the output branch of the solid-state power distribution device and current limiting control of the distribution branch current.
[0007] To achieve the above-mentioned objectives, the technical solution of the present invention is as follows:
[0008] A solid-state power distribution device output constant voltage and current limiting control circuit includes: a DSP control unit, an isolation drive circuit, a voltage control loop, a voltage sampling circuit, a current control loop, a current sampling circuit, an enable control circuit, and a power switch circuit. One end of the power switch is connected to the power input, and the other end is connected to the positive input terminal of the primary side of the current sampling circuit. The negative input terminal of the primary side of the current sampling circuit is connected to the load, and the secondary side of the current sampling circuit is connected to the negative input terminal of the current control loop. The positive input terminal of the current control loop is connected to the DSP main control unit. The positive and negative terminals of the voltage sampling circuit are connected to the positive and negative terminals of the load, respectively, and the sampling result is connected to the negative input terminal of the voltage control loop. The positive input terminal of the voltage control loop is connected to the DSP main control unit. The enable control circuit is connected to the positive terminal of the isolation drive circuit, the output terminal of the current control loop, and the output terminal of the voltage control loop.
[0009] Furthermore, the isolation drive circuit is connected to the power switch circuit, including the isolation drive chip N3; the isolation drive chip N3 converts the primary side current of the drive chip into the secondary side electromotive force, which is used to drive the N-channel MOSFET.
[0010] Furthermore, the enable control circuit includes resistors R8 and R9, and optocoupler N5. When the external enable control signal Ctrl is high, the drive signal forms a current path through resistor R9 and the primary side of optocoupler N5, the phototransistor on the secondary side of optocoupler N5 is saturated and turned on, the positive terminal of isolation driver chip N3 is grounded through resistor R8, the secondary side of isolation driver chip N3 outputs a low level, and the field-effect transistor V1 in the power switch is in the off state. When the external enable control signal Ctrl is low, the secondary side of optocoupler N5 is turned off, the voltage at the output of the current control loop or voltage control loop circuit forms a current path with the primary side of isolation driver chip N3, so that the secondary side of isolation driver chip N3 generates an electromotive force higher than the conduction threshold of field-effect transistor V1, and field-effect transistor V1 is turned on.
[0011] Furthermore, the output constant voltage and current limiting control circuit of the solid-state power distribution device is configured as follows:
[0012] When the loop current does not exceed the preset protection value, the load voltage rise rate is controlled by adaptive closed-loop control of the load voltage to suppress the inrush current of the large-capacity capacitive load during the power-on process and clamp it at the preset value; when the loop current exceeds the preset protection value, it automatically switches to the current limiting control mode to clamp the loop current at the preset value.
[0013] Furthermore, by utilizing the approximately linear relationship between the electromotive force generated on the secondary side of the isolation driver chip N3 and the primary side current, the gate-source voltage of the field-effect transistor V1 is dynamically adjusted to make it work in the linear amplification region, thereby controlling the voltage drop across the field-effect transistor V1 and adjusting the load voltage to rise according to the preset voltage slope.
[0014] Furthermore, by adjusting the primary current of the isolation driver chip N3, the gate-source voltage of the field-effect transistor V1 in the power switch is controlled, thereby adjusting the conduction level of the field-effect transistor V1 and changing the circuit impedance of the power distribution branch, thus achieving current limiting control of the circuit current and clamping it at the preset current limiting value.
[0015] Furthermore, the voltage control loop includes an error amplifier N2 and a resistor R2. The load voltage is divided by the voltage sampling circuit and enters the negative input terminal of the error amplifier N2, and is compared with the preset value of the positive terminal voltage of N2 in real time. The output voltage of the error amplifier N2 forms a current path through the resistor R2 and the primary side of the isolation driver chip N3.
[0016] Furthermore, the voltage control loop also includes resistor R5 and capacitor C2, which together form a compensation network for error amplifier N2 to adjust the dynamic response characteristics and DC amplification factor of the voltage control loop.
[0017] Furthermore, the current sampling circuit includes a Hall current sampling chip N4, which converts the current in the power distribution output circuit into a voltage value.
[0018] Furthermore, the current control loop includes a diode D1, an error amplifier N1, and a resistor R1. The current in the power distribution output loop passes through a current sampling circuit and is then sent to the error amplifier N1, where it is compared with a preset current limit value. The error amplifier output voltage passes through the resistor R1, the diode D1, and the isolation driver chip N3 to form a current loop.
[0019] Furthermore, the current control loop also includes a resistor R4 and a capacitor C1. The resistor R4 and the capacitor C1 form a compensation network for the error amplifier N1, which is used to adjust the dynamic response characteristics and DC amplification factor of the current control loop.
[0020] In summary, the present invention has the following advantages:
[0021] 1. This invention proposes a constant voltage and current limiting control circuit for solid-state power distribution devices, which can be applied to the control of power distribution branches in airborne intelligent power distribution devices. The entire control circuit adopts a dual-loop control mode of voltage loop and current loop. By setting different voltage preset values with different rise rates and different current limiting values with different amplitudes through software, combined with the hardware circuit of voltage and current control loops, real-time closed-loop control of output voltage and loop current can be effectively realized. The circuit has a simple structure, rapid dynamic response, and is easy to implement. It can improve the working reliability of solid-state power distribution devices when the downstream is a capacitive load. It has strong load adaptability and can be compatible with resistive and inductive loads, thus improving the working reliability of solid-state power distribution devices.
[0022] 2. The main circuit structure of this invention adopts a single-tube form without using auxiliary tube branches. The control circuit adopts dual closed-loop control with two variables: load voltage and loop current. When the loop current does not exceed the preset protection value, the solid-state power distribution device uses a load voltage adaptive closed-loop control method. By controlling the load voltage rise rate, the inrush current of large-capacity capacitive loads during power-on can be suppressed and clamped at the preset value. When the loop current exceeds the preset protection value, the solid-state power distribution device automatically switches to the current limiting control mode to clamp the loop current at the preset current value. This can be used to limit the loop current under load short-circuit conditions to not exceed the safe operating range of the power switch. Attached Figure Description
[0023] Figure 1 Block diagram of constant voltage and current limiting control principle for solid-state power distribution device;
[0024] Figure 2 A simplified schematic diagram of a constant voltage and current limiting control circuit for a solid-state power distribution device.
[0025] Figure 3 This is a graph showing the relationship between the primary current and the secondary electromotive force of a photovoltaic driver chip.
[0026] Figure 4 Simulation diagrams for preset voltage values with different rising slopes;
[0027] Figure 5 Simulation diagrams of capacitor charging current under different voltage rise rates;
[0028] Figure 6 Simulated waveforms of short-circuit voltage and loop current of the distribution branch load;
[0029] Figure 7 This is a block diagram illustrating the control principle of the digital control method in Example 2;
[0030] In the picture:
[0031] 1-Power switch, 2-Current sampling circuit, 3-Voltage sampling circuit, 4-Isolation drive circuit, 5-Current control loop, 6-Voltage control loop, 7-DSP main control unit, 8-Enable control circuit. Detailed Implementation
[0032] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0033] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.
[0034] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0035] In the description of this invention, it should be noted that the terms "upper," "vertical," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention. In addition, the terms "first," "second," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0036] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," and "connect" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0037] Example 1
[0038] This embodiment proposes a constant voltage and current limiting control circuit for the output of a solid-state power distribution device, such as... Figure 1 As shown, it includes a DSP control unit, an isolated drive circuit, a voltage control loop, a voltage sampling circuit, a current control loop, a current sampling circuit, and a power switching circuit.
[0039] Specifically, the connection relationship of the output constant voltage and current limiting control circuit of the solid-state power distribution device is as follows: Figure 2 As shown. The main circuit structure adopts a single-transistor form, without using auxiliary transistor branches. The control circuit uses dual closed-loop control with two variables: load voltage and loop current. Field-effect transistor V1 is a power switch, forming a power switch circuit; N3 is an isolation driver chip, forming an isolation driver circuit; N4 is a Hall current sensor, forming a current sampling circuit; R6 and R7 are load voltage sampling resistors, forming a voltage sampling circuit; resistors R8 and R9 and optocoupler N5 form an enable control circuit. The voltage control loop and current control loop are implemented using error amplifiers composed of operational amplifiers to achieve closed-loop tracking control between the sampled value and the reference value.
[0040] Specifically, in this control circuit, one end of the power switch is connected to the power input, and the other end is connected to the positive terminal of the primary input of the current sampling circuit. The negative terminal of the primary input of the current sampling circuit is connected to the load CL. At the same time, the secondary input of the current sampling circuit is connected to the negative terminal of the current control loop, and the positive terminal of the current control loop is connected to the DSP main control unit. The positive and negative terminals of the voltage sampling circuit are connected to the positive and negative terminals of the load CL, respectively. The sampling result is connected to the negative input terminal of the voltage control loop, and the positive input terminal of the voltage control loop is connected to the DSP main control unit. The enable control circuit is connected to the positive terminal of the isolation drive circuit, the output terminal of the current control loop, and the output terminal of the voltage control loop, respectively.
[0041] This control circuit employs dual closed-loop control with two variables: load voltage and loop current. When the loop current does not exceed the preset protection value, the solid-state power distribution device's distribution branch uses an adaptive closed-loop control method based on the load voltage. By controlling the rate of increase of the load voltage, it can suppress the inrush current of large-capacity capacitive loads during power-on and clamp it at the preset value. When the loop current exceeds the preset protection value, the solid-state power distribution device's distribution branch automatically switches to current-limiting control mode, clamping the loop current at the preset current value. This can be used to limit the loop current under load short-circuit conditions to not exceed the safe operating range of the power switch.
[0042] The following is a detailed description of the specific working process of load voltage adaptive control and output current limiting control in the enable control circuit of solid-state power distribution device.
[0043] Enable control circuit:
[0044] The enable control circuit consists of resistors R8 and R9, optocoupler N5, and isolation driver chip N3. The control logic is low-level operation and high-level shutdown. The isolation driver chip N3 is a photovoltaic-type solid-state power switch driver chip, employing photovoltaic principles to convert the primary-side current into a secondary-side electromotive force (EMF) to drive the N-channel MOSFET. Conventional N-channel MOSFET drivers use an independent DC / DC auxiliary source to provide a rated drive voltage of 15V. The relationship between the primary-side drive current and the generated EMF of the secondary side of the isolation driver chip N3 is shown in the curve below. Figure 3 As shown in the characteristic curve, within the range of 0 to 5 mA of the primary drive current, the electromotive force generated by the secondary side of N3 has an approximately linear relationship with the primary current.
[0045] When the external enable control signal Ctrl is high, the drive signal forms a current path through resistor R9 and the primary side of optocoupler N5. The phototransistor on the secondary side of optocoupler N5 is saturated and turned on, and the positive terminal of isolation driver chip N3 is grounded through resistor R8. The secondary side of isolation driver chip N3 outputs a low level, and the gate-source voltage of MOSFET V1 is lower than the turn-on threshold voltage, so MOSFET V1 is in the off state.
[0046] When the external enable control signal Ctrl is low, the secondary side of optocoupler N5 is cut off. The voltage at the output of the current control loop or voltage control loop circuit forms a current path with the primary side of the driver chip N3, causing the secondary side of N3 to generate an electromotive force of about 15V. This voltage value is higher than the turn-on threshold voltage of MOSFET V1, so MOSFET V1 turns on.
[0047] Load voltage adaptive control:
[0048] The voltage control loop includes error amplifier N2, resistors R2 and R5, and capacitor C2. Load voltage adaptive control is effective during power-up of the solid-state power distribution unit, limiting the inrush current by controlling the output voltage rise rate. Taking a capacitive load at the output as an example, the load voltage is divided by resistors R6 and R7 and sent to the negative input of error amplifier N2. This voltage is then compared in real-time with a preset value at the positive input of N2. This preset value is generated by the DSP controller and includes various voltage reference curves with different slopes, which can be configured online according to the actual load conditions. Resistor R5 and capacitor C2 form the error amplifier compensation network, used to adjust the dynamic response characteristics and DC amplification factor of the voltage control loop.
[0049] The output voltage of error amplifier N2 forms a current path through resistor R2 and the primary side of isolation driver chip N3. The electromotive force generated by the secondary side of N3 has an approximately linear relationship with the primary side current, which dynamically adjusts the gate-source voltage of field-effect transistor V1 to make it work in the linear amplification region. This controls the voltage drop across field-effect transistor V1 and adjusts the load voltage to rise according to the preset voltage slope.
[0050] Due to the capacitor charging current This refers to the rate of voltage rise across the capacitor, where C is the known capacitance. Therefore, given the capacitance C, the rate of voltage change across the capacitor is... If the current is constant, then the capacitor charging current i will be controlled at a fixed preset value, thus limiting the capacitor charging current. (Simulation waveform shown...) Figure 4 , Figure 5 .
[0051] Figure 4 For the preset reference voltage waveforms with different slopes, the time intervals from zero to the rated value are 100µs, 250µs, 500µs, 1ms, and 1.5ms, respectively. Figure 5 The simulated waveforms of capacitor charging current corresponding to different voltage rise rates of load voltage show that, with a fixed capacitance, the higher the voltage rise rate, the greater the inrush current generated by the capacitor, and the amplitude is consistent with the theoretical calculation value.
[0052] Output current limiting control:
[0053] The current control loop includes diode D1, error amplifier N1, resistors R1 and R4, and capacitor C1. The current in the power distribution output loop is converted into a voltage value by the Hall current sampling chip N4, and then fed into the error amplifier formed by operational amplifier N1, where it is compared with a preset current limit value. Resistor R4 and capacitor C1 form a compensation network for error amplifier N1, used to adjust the dynamic response characteristics and DC amplification factor of the current control loop. The output current of the error amplifier passes through resistor R1, diode D1, and driver chip N3 to form a current loop. By adjusting the primary current of N3, the gate-source voltage of MOSFET V1 is controlled, adjusting the conduction level of MOSFET V1, changing the impedance of the power distribution branch loop, thereby achieving current limiting control of the loop current and clamping it at the preset current limit value. The preset current limit value is generated by the DSP controller and can be adjusted according to actual conditions. The simulation waveform is shown below. Figure 6 As shown, when a short circuit occurs at the load end, the output voltage is pulled down to zero volts and the loop current is clamped at 300A. When the short circuit fault disappears, the current limiting circuit stops working, and the load voltage and loop current return to normal values.
[0054] When the loop current does not exceed the preset current limit, the voltage at the negative terminal of error amplifier N1 is less than the voltage at the positive terminal, so the output voltage of N1 is positive, diode D1 is in the off state, the current control loop does not function, and the solid-state power distribution device control loop is in voltage adaptive control mode. When overcurrent or short circuit occurs at the load end, the loop current sampling voltage value rises, the voltage at the negative terminal of error amplifier N1 is higher than the voltage at the positive terminal, N1 output is negative, diode D1 conducts, and at the same time, due to the overcurrent, the output voltage decreases, the voltage at the negative terminal of error amplifier N2 is lower than the reference value of the positive terminal voltage, and N2 output is a constant high level. The solid-state power distribution device current control loop starts working, enters the current limiting control mode, clamps the loop current to the preset current limit value, and cuts off the output of the power distribution branch through the DSP controller after a short circuit fault is confirmed.
[0055] This invention proposes a constant voltage and current limiting control circuit for the output of a solid-state power distribution device. It can realize adaptive control of the load voltage of the output branch of the solid-state power distribution device and current limiting control of the current of the distribution branch. The two control modes can be automatically switched according to different working states of the distribution branch. The adaptive load voltage control can effectively suppress the inrush current of large-capacity capacitive loads during the power-on stage. At the same time, when extreme faults such as overcurrent and short circuit occur at the load end, the control circuit automatically switches to the current limiting working mode, clamping the current of the distribution branch circuit to a reasonable preset current limit value, protecting the distribution circuit devices from damage.
[0056] Example 2
[0057] This embodiment proposes an alternative solution for a constant voltage and current limiting control circuit for a solid-state power distribution device. The voltage loop and current loop can be implemented using digital PID control. The circuit schematic diagram is shown below. Figure 7 As shown, compared to the pure hardware implementation method mentioned in this paper, digital control requires the use of AD chips to digitize analog quantities, and control loop compensation is achieved through digital PID calculation. Therefore, it has the risks of high hardware cost, slow response time, and control program failure under interference.
[0058] Although specific embodiments of the present invention have been described in detail with reference to the accompanying drawings, this should not be construed as limiting the scope of protection of this patent. Various modifications and variations that can be made by those skilled in the art without inventive effort within the scope described in the claims still fall within the scope of protection of this patent.
[0059] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any simple modifications or equivalent changes made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the present invention.
Claims
1. A constant voltage and current limiting control circuit for a solid-state power distribution device, comprising: The system comprises a DSP control unit, an isolation drive circuit, a voltage control loop, a voltage sampling circuit, a current control loop, a current sampling circuit, an enable control circuit, and a power switch circuit. One end of the power switch is connected to the power input, and the other end is connected to the positive input terminal of the primary side of the current sampling circuit. The negative input terminal of the primary side of the current sampling circuit is connected to the load, and the secondary side of the current sampling circuit is connected to the negative input terminal of the current control loop. The positive input terminal of the current control loop is connected to the DSP main control unit. The positive and negative terminals of the voltage sampling circuit are connected to the positive and negative terminals of the load, respectively, and the sampling result is connected to the negative input terminal of the voltage control loop. The positive input terminal of the voltage control loop is connected to the DSP main control unit. The enable control circuit is connected to the positive terminal of the isolation drive circuit, the output terminal of the current control loop, and the output terminal of the voltage control loop. The isolation drive circuit, which is connected to the power switch circuit, includes an isolation drive chip N3. The isolation driver chip N3 converts the primary current of the driver chip into a secondary electromotive force, which is used to drive the power switch N-channel MOSFET V1. The control principle of the constant voltage and current limiting control circuit of this solid-state power distribution device is as follows: When the loop current does not exceed the preset protection value, the load voltage rise rate is controlled by an adaptive closed-loop control to suppress the inrush current of large-capacity capacitive loads during power-on and clamp it at the preset value; specifically including: The voltage control loop includes an error amplifier N2 and a resistor R2. The load voltage is divided by the voltage sampling circuit and enters the negative input terminal of the error amplifier N2. It is compared with the preset value of the positive terminal voltage of N2 in real time. The output voltage of the error amplifier N2 forms a current path through the resistor R2 and the primary side of the isolation driver chip N3. The electromotive force generated by the secondary side of the isolation driver chip N3 is approximately linearly related to the primary current. The gate-source voltage of the field-effect transistor V1 is dynamically adjusted to make it work in the linear amplification region, thereby controlling the voltage drop across the field-effect transistor V1 and adjusting the load voltage to rise according to the preset voltage slope. When the loop current exceeds the preset protection value, it automatically switches to current limiting control mode to clamp the loop current at the preset value; specifically including: The current control loop includes diode D1, error amplifier N1, and resistor R1. The current in the power distribution output loop passes through the current sampling circuit and is then sent to the error amplifier N1, where it is compared with a preset current limit value. The error amplifier output current passes through resistor R1, diode D1, and isolation driver chip N3 to form a current loop. By adjusting the primary current of the isolation driver chip N3, the gate-source voltage of the field-effect transistor V1 in the power switch is controlled, thereby adjusting the conduction degree of the field-effect transistor V1 and changing the impedance of the power distribution branch loop, thus achieving current limiting control of the loop current and clamping it at the preset current limit value.
2. The solid-state power distribution device output constant voltage current limiting control circuit according to claim 1, characterized in that, The enable control circuit includes resistors R8 and R9, and optocoupler N5. When the external enable control signal Ctrl is high, the drive signal forms a current path through resistor R9 and the primary side of optocoupler N5. The phototransistor on the secondary side of optocoupler N5 is saturated and turned on, grounding the positive terminal of isolation driver chip N3 through resistor R8. The secondary side of isolation driver chip N3 outputs a low level, and the field-effect transistor V1 in the power switch is in the off state. When the external enable control signal Ctrl is low, the secondary side of optocoupler N5 is turned off, and the voltage at the output of the current control loop or voltage control loop circuit forms a current path with the primary side of isolation driver chip N3, causing the secondary side of isolation driver chip N3 to generate an electromotive force higher than the conduction threshold of field-effect transistor V1, and field-effect transistor V1 turns on.
3. The output constant voltage and current limiting control circuit of a solid-state power distribution device according to claim 1, characterized in that, The voltage control loop also includes resistor R5 and capacitor C2. Resistor R5 and capacitor C2 form the compensation network of error amplifier N2, which is used to adjust the dynamic response characteristics and DC amplification factor of the voltage control loop.
4. The output constant voltage and current limiting control circuit of a solid-state power distribution device according to claim 1, characterized in that, The current sampling circuit includes a Hall current sampling chip N4, which converts the current in the power distribution output circuit into a voltage value.
5. The output constant voltage and current limiting control circuit of a solid-state power distribution device according to claim 1, characterized in that, The current control loop also includes resistor R4 and capacitor C1. Resistor R4 and capacitor C1 form the compensation network of error amplifier N1, which is used to adjust the dynamic response characteristics and DC amplification factor of the current control loop.
Citation Information
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Aviation airborne equipment power-on surge current suppression circuit structure and method
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