Front structure of topcon cell, topcon cell and preparation

Abstract

The application belongs to the technical field of photovoltaics, and particularly relates to a front structure of a TOPCon cell, the TOPCon cell and preparation. The solar cell uses laser sintering to promote silver-silicon interdiffusion in the preparation process, forms a contact effect equivalent to or superior to laser SE doping, realizes a further effect of reducing a surface boron-rich layer, cancels the laser SE process, completely avoids surface damage of the cell and re-doping-induced recombination in the laser area, greatly improves the efficiency, avoids screen printing offset, and stably improves the efficiency; and solves the problem that light doping cannot realize good contact without the laser SE process of the TOPCon cell.

Description

[0001] This application is a divisional application.

[0002] Original application number: 2024100140759

[0003] Original application date: January 5, 2024

[0004] Invention Title: Frontal Structure of Photovoltaic Modules and Their TOPCon Cells, TOPCon Cells and Their Fabrication Technical Field

[0005] This invention relates to the field of photovoltaic technology, specifically to a front structure of a TOPCon cell, the TOPCon cell itself, and its fabrication. Background Technology

[0006] A single solar cell cannot be used directly as a power source; several individual cells must be connected in series or parallel and tightly sealed to form a module. Solar cells, or solar cells of different sizes cut by a laser cutter or wire cutter, are combined together, encapsulated on a stainless steel, aluminum, or other non-metallic frame, fitted with glass and a backsheet, filled with nitrogen, and sealed. This entire assembly is called a module, also known as a photovoltaic module or solar cell module.

[0007] Currently, photovoltaic (PV) module frames are made of anodized 6063T5 aluminum alloy. Frames of average wall thickness can withstand approximately 5400Pa of pressure. However, in harsh climates with year-round snow cover, PV modules struggle to maintain normal operation for extended periods. Therefore, enhancing the mechanical strength of PV modules is essential. At the same time, large factories often employ portal steel frame structures with corrugated steel roofs. Traditional glass-encapsulated modules, due to their significant weight, frequently place excessive loads on building roofs, requiring special reinforcement measures to meet PV installation requirements. This results in high costs, long construction periods, and hinders the construction speed and overall profitability of PV power plants. Furthermore, the installation of traditional module brackets can sometimes damage the existing building structure. Additionally, the inherent characteristics of traditional modules prevent installation on some uniquely shaped roofs, limiting the expansion of PV installation capacity and the development of the PV industry. Therefore, considering factors such as applicability to different scenarios, construction difficulty, construction period, and construction costs, there is a growing demand for lightweight PV modules.

[0008] Furthermore, in the case of solar cells, the SE (Selective Emitter) electrode involves high-concentration doping at the contact area between the metallized grid line on the front side of the crystalline silicon cell and the silicon wafer, forming a good ohmic contact and reducing the contact resistance between the metallization and the silicon wafer. Meanwhile, low-concentration doping is performed in the non-contact area outside the electrode, which can improve the short-wavelength response of the cell, reduce the surface recombination of the diffusion layer, and ultimately achieve the goal of increasing the open-circuit voltage and short-circuit current.

[0009] For example, Chinese patent CN116864568A discloses a method for preparing a bifacial SE TOPCon solar cell. The preparation of the bifacial SE TOPCon solar cell mainly includes the following steps: cleaning and texturing, pre-boron doping, front-side laser SE, post-boron doping, BSG removal and alkaline polishing, LPCVD deposition of amorphous silicon, primary phosphorus diffusion, back-side laser SE, secondary phosphorus diffusion, PSG removal and RCA cleaning, PECVD deposition of antireflection layer, front and back metallization, and electrical or optical injection.

[0010] like Figure 1 The diagram shows a conventional TOPCon cell structure fabricated using the laser SE (Sequencing) route. In existing technologies, the boron expansion process produces a uniform surface junction depth and concentration, requiring a large overall boron source flow, introducing significant doping, and resulting in substantial surface recombination. Performing a laser SE process after boron expansion advances boron atom doping in the expanded surface, achieving heavy doping in the screen-printed fine grid region, thereby improving efficiency. However, the laser SE process presents a challenge in controlling the "heat" of the process. If the laser power is too high, it can easily cause surface damage in the laser-irradiated area, affecting subsequent passivation processes, and the high doping concentration in the laser region can lead to severe recombination. Conversely, if the power is too low, the energy during advancement may be insufficient, making it difficult for the laser to propel boron doping from the BSG (borosilicate glass, corresponding to the phosphosilicate glass in P-type cells, serving as the laser doping source) into the P+ layer, resulting in insufficient concentration in the heavily metallized doped region.

[0011] Furthermore, since subsequent screen printing needs to follow the laser SE path, there is a risk that the printing may deviate from the laser SE path, resulting in the inability to accurately achieve the laser SE effect and unstable efficiency improvement. Summary of the Invention

[0012] 1. The problem to be solved

[0013] One of the objectives of this invention is to provide a front structure of a TOPCon battery and a solar cell having the front structure shown, aiming to improve the conversion efficiency of the solar cell; at the same time, this invention also provides the front structure of the solar cell and the fabrication process of the solar cell.

[0014] 2. Technical Solution

[0015] To address the problems mentioned in the background section, the present invention provides the following technical solution:

[0016] The first aspect of the present invention provides a front structure of a TOPCon battery, the front structure including a base silicon wafer, a front electrode and a front layer structure disposed on the base silicon wafer;

[0017] The front layer structure includes a boron diffusion layer, and the front electrode is in contact with the boron diffusion layer;

[0018] A silver-silicon interdiffusion layer is formed between the front electrode and the boron diffusion layer;

[0019] Furthermore, the boron diffusion layer does not have a heavily doped layer in the region near or in contact with the front electrode.

[0020] According to any embodiment of the TOPCon battery front structure of the first aspect of the present invention, the front layer structure further includes a passivation layer and an anti-reflection layer; the front electrode passes through the passivation layer and the anti-reflection layer and contacts the boron diffusion layer.

[0021] According to any embodiment of the front-side structure of the TOPCon cell of the first aspect of the present invention, the TOPCon cell includes a base silicon wafer.

[0022] The front structure includes a front electrode and a front layer structure disposed on the base silicon wafer;

[0023] The front layer structure includes a boron diffusion layer, a passivation layer, and an anti-reflection layer;

[0024] The front electrode passes through the passivation layer and the antireflection layer and contacts the boron diffusion layer;

[0025] A silver-silicon interdiffusion layer is formed between the front electrode and the boron diffusion layer; and the boron diffusion layer does not have a heavily doped layer in the region near or in contact with the front electrode.

[0026] It should be noted that the "region near or in contact with the front electrode" as described herein can also be called the "electrode region," and the other corresponding regions are called "non-electrode regions." Based on this, the boron diffusion layer of the front structure of the TOPCon battery provided in this invention has "electrode regions" and "non-electrode regions" with substantially similar or identical sheet resistance.

[0027] Based on this, further, in the boron diffusion layer, in the region near the front electrode or in the region in contact with the front electrode, it has a sheet resistance of 250-270 Ω / sq.

[0028] Furthermore, in the boron diffusion layer, the "non-electrode region" has a sheet resistance of 250-270 Ω / sq.

[0029] It should be noted that in traditional TOPCon solar cells, the region "near or in contact with the front electrode" in the boron diffusion layer of the front structure is typically heavily doped using laser SE (Selenoplastin). Therefore, this region usually has a sheet resistance of 80-90 Ω / sq. However, in the TOPCon solar cell of this invention, the sheet resistance of the region "near or in contact with the front electrode" in the front structure is 250-270 Ω / sq. This means that the "electrode region" and the "non-electrode region" have essentially the same or similar sheet resistance, reducing overall recombination in the boron diffusion layer.

[0030] According to any embodiment of the front-side structure of the TOPCon battery of the first aspect of the present invention, the sheet resistance of the boron diffusion layer is 250-270 Ω / sq. It should be noted that the sheet resistance of the boron diffusion layer in the conventional TOPCon battery front-side structure, as described above, is generally only 220 Ω / sq.

[0031] According to any embodiment of the TOPCon battery front structure of the first aspect of the present invention, the surface concentration of the boron diffusion layer in the region near the front electrode or in the region in contact with the front electrode (i.e., the electrode region) is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers; simultaneously, the surface concentration of the "non-electrode region" is 4.9E+18cm⁻¹. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers.

[0032] It should be noted that, as described above, the surface concentration of the boron diffusion layer (formed after boron diffusion, laser SE, and high-temperature annealing) in the front structure of a conventional TOPCon battery, specifically in the region "close to or in contact with the front electrode," is generally 3.0E+18cm⁻¹. -3 ~3.2E+18cm -3 The junction depth is 2–2.5 micrometers; simultaneously, the surface concentration of the "non-electrode region" is 4.9E+18cm⁻¹. -3 ~5.0E+18cm -3The junction depth is 0.74–0.79 micrometers.

[0033] According to any embodiment of the TOPCon battery front structure of the first aspect of the present invention, the surface concentration of the boron diffusion layer is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers.

[0034] The second aspect of this invention provides a method for fabricating the front structure of a TOPCon battery, comprising: 1) performing boron diffusion on the front side of a silicon wafer to form a shallowly doped boron-rich layer; 2) further repairing and advancing the front side of the silicon wafer to remove the surface boron-rich layer and obtain a boron diffusion layer; 3) sequentially forming a passivation layer and a front anti-reflection layer on the front side of the silicon wafer; 4) directly performing screen printing on the boron diffusion layer of the silicon wafer and sintering; 5) performing laser sintering treatment on the connection between the front electrode and the boron diffusion layer.

[0035] The bias voltage for the laser sintering process is 10-30V, and the laser power is 10%; the laser sintering temperature can be roughly controlled between 820 and 950℃.

[0036] Preferably, the bias voltage for the laser sintering process is 10-28V, and the laser power is 10%. This allows the laser sintering temperature to be controlled approximately between 820 and 910℃.

[0037] Further preferably, the bias voltage for the laser sintering process is 10-20V, and the laser power is 10%. This allows the laser sintering temperature to be approximately controlled between 820 and 900℃.

[0038] It should be noted that the "bias voltage" and "laser power" mentioned herein mainly affect the peak sintering temperature of the laser. Under the conditions described above (bias voltage 10-30V, laser power 10%), the laser sintering temperature can be roughly controlled between 820 and 950℃. This is an important guarantee for reducing the contact resistance between the metal gate and the silicon wafer in the present invention.

[0039] This further illustrates that, in order to reduce the contact resistance between the metal grid lines and the silicon wafer, in the traditional TOPCon cell fabrication process, after the boron diffusion layer is prepared, laser sintering (SE) is used to perform high-concentration doping at and near the contact area between the metal grid lines and the silicon wafer (the sheet resistance of this electrode region is typically 80~90 Ω / sq) to reduce the contact resistance between the metal electrode and the silicon wafer. The technical solution provided by this invention adds a laser sintering step after screen printing and sintering. Based on this, the "method for fabricating the front structure of a TOPCon cell" provided by this invention has the following advantages:

[0040] Firstly, it avoids the problem of difficulty in controlling the "heat" of laser SE in the traditional TOPCon battery fabrication process;

[0041] Secondly, it avoids the problem of misalignment that occurs in the traditional TOPCon battery manufacturing process, where laser SE is performed first and then screen printing needs to follow the laser SE path, resulting in the inability to accurately exert the laser SE effect.

[0042] Thirdly, the bias voltage and laser power of the laser sintering step in the technical solution of this invention are extremely important. They are effective guarantees for reducing the contact resistance between the metal grid lines and the silicon wafer, increasing the output current and voltage of the solar cell, and thus increasing the photoelectric conversion efficiency.

[0043] Fourth, it avoids the reduction in sheet resistance of the boron diffusion layer and surface recombination caused by the increase in doping concentration due to laser SE (forced increase);

[0044] Based on the above-mentioned "fourth point", according to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, after boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer, the sheet resistance of the front side of the silicon wafer is 105-125Ω / sq.

[0045] According to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the front side of the silicon wafer is repaired and advanced, and after removing the boron-rich layer on the surface, the sheet resistance of the front side (boron diffusion layer) of the silicon wafer is 250-270 Ω / sq.

[0046] It should be noted that, as described above, the sheet resistance of the boron diffusion layer in the front structure of a conventional TOPCon battery prepared by the traditional method can generally only reach 220 Ω / sq.

[0047] According to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the front side of the silicon wafer is repaired and advanced by high-temperature annealing.

[0048] According to any embodiment of the method for fabricating the front-side structure of a TOPCon battery according to the second aspect of the present invention, a shallowly doped boron-rich layer is formed by boron diffusion on the front side of a silicon wafer, such that its surface concentration is 5.4E+19cm. -3 ~5.5E+19cm -3 The junction depth is 0.24–0.29 micrometers;

[0049] After repairing and advancing the front side of the silicon wafer (after annealing), and removing the boron-rich layer, its surface concentration is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers.

[0050] According to any embodiment of the method for preparing the front structure of a TOPCon battery according to the second aspect of the present invention, the laser sintering process includes scanning the front side of the battery cell with printed metal grid lines using a laser and applying a forward bias voltage to the metal grid lines to sinter the metal grid lines.

[0051] In any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the type of laser is a pulsed laser; the scanning speed of the laser is 4 to 20 m / s.

[0052] According to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the peak sintering temperature of the laser is 820 to 950°C.

[0053] According to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the laser is in the shape of a dotted spot with a diameter of 15 to 30 micrometers.

[0054] According to any embodiment of the method for preparing the front structure of the TOPCon battery according to the second aspect of the present invention, the laser sintering time is 0.5 to 2.5 s.

[0055] According to any embodiment of the method for preparing the front structure of a TOPCon battery according to the second aspect of the present invention, a front structure of a TOPCon battery as described in any embodiment of the first aspect of the present invention can be prepared.

[0056] A third aspect of the present invention provides a TOPCon battery, the TOPCon battery comprising a front structure and a back structure;

[0057] The front structure is as provided in any embodiment of the first aspect of the present invention, or is the front structure of the TOPCon battery prepared by the method described in any embodiment of the second aspect of the present invention.

[0058] The back structure includes a back electrode and a back layer structure disposed on the base silicon wafer;

[0059] The back-side layer structure includes a tunneling oxide layer, a polysilicon layer, and an anti-reflection layer;

[0060] The back electrode passes through the antireflective layer and contacts the polycrystalline silicon layer.

[0061] A fourth aspect of the present invention provides a method for fabricating a TOPCon battery, comprising a method for fabricating the front-side structure of a TOPCon battery as described in any embodiment of the second aspect of the present invention; and:

[0062] Before boron diffusion is performed on the silicon wafer, the following steps are included: S1, cleaning the silicon wafer and texturing both sides;

[0063] After repairing and advancing the silicon wafer, and before laser sintering the connection between the front electrode and the boron diffusion layer, the following steps are included: S4, acid pickling to remove the silicon wafer edge and back BSG, and then alkaline polishing to remove the silicon wafer edge and back PN junction;

[0064] S5. Deposit a tunneling oxide layer on the back side of the silicon wafer, and simultaneously deposit an amorphous silicon layer;

[0065] S6. Perform phosphorus diffusion process to form a polycrystalline silicon layer;

[0066] S7. Remove the silicon wafer edge and front PSG, then remove the silicon wafer edge and front polysilicon layer.

[0067] S8. A passivation layer is formed on the front side of the silicon wafer;

[0068] S9. An anti-reflection layer is formed on the front side and an anti-reflection layer is formed on the back side of the silicon wafer, respectively.

[0069] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0070] According to any embodiment of the method for fabricating a TOPCon cell according to the fifth aspect of the present invention, the step of repairing and advancing the silicon wafer and before laser sintering the connection between the front electrode and the boron diffusion layer includes the following steps:

[0071] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0072] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and at the same time deposit an amorphous silicon layer (i.e., a poly layer).

[0073] S6. Face-to-face double insertion is used to perform phosphorus diffusion process to form polycrystalline silicon layer (i.e. N+-Poly layer).

[0074] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0075] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0076] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0077] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0078] According to any embodiment of the method for preparing a TOPCon battery according to the fourth aspect of the present invention, the method includes the following steps:

[0079] S1. Clean the silicon wafer and texturize both sides; S2. Perform boron diffusion on the front side of the silicon wafer to form a shallowly doped boron-rich layer with a surface concentration of 5.4E+19cm. -3 ~5.5E+19cm -3 After the junction depth is 0.24–0.29 micrometers; S3, high-temperature annealing is performed to repair and advance the silicon wafer, achieving a surface concentration of 4.9E+18cm. -3 ~5.0E+18cm -3 S1. The junction depth is 0.74-0.79 micrometers to form a boron diffusion layer; S4. Acid washing is performed to remove the BSG from the edge and back of the silicon wafer, followed by alkaline polishing to remove the PN junction from the edge and back of the silicon wafer; S5. LPCVD process is performed face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and a poly layer is deposited simultaneously; S6. Phosphorus diffusion process is performed face-to-face double insertion to form an N+-poly layer; S7. The PSG from the edge and front of the silicon wafer is removed, followed by RCA cleaning to remove the N+-poly layer from the edge and front of the silicon wafer; S8. ALD atomic layer deposition process is used to form a passivation layer on the front of the silicon wafer; S9. PECVD process is used to form a front antireflection layer and a back antireflection layer on the front and back of the silicon wafer, respectively; S10. Screen printing is performed on the front and back of the silicon wafer, followed by sintering and annealing; S11. Laser sintering is performed to form a silver-silicon interdiffusion layer at the junction of the front electrode and the boron diffusion layer.

[0080] The fifth aspect of the present invention provides a photovoltaic module, the photovoltaic module comprising a solar panel, the solar panel comprising the front structure of a TOPCon cell as described in any embodiment of the first aspect of the present invention, or the front structure of a TOPCon cell prepared by the method described in any embodiment of the second aspect of the present invention, or the TOPCon cell as described in any embodiment of the third aspect of the present invention, or the TOPCon cell prepared by the method described in any embodiment of the fourth aspect of the present invention;

[0081] A frame for securing the solar panel;

[0082] Support member, the support member comprising:

[0083] At the end, the support member is fixed to the frame via the end;

[0084] A support plate, comprising an upper support plate and a lower support plate disposed opposite to each other, the support plate providing a support surface for the solar panel;

[0085] An inclined plate, comprising inclined plate one and inclined plate two disposed between the upper support plate and the lower support plate, inclined plate three disposed between the lower support plate and inclined plate one, and inclined plate four disposed between the lower support plate and inclined plate two; wherein the upper support plate, inclined plate one, and inclined plate two form a triangular support, the lower support plate, inclined plate one, and inclined plate three form a triangular support, and the lower support plate, inclined plate two, and inclined plate four form a triangular support.

[0086] It should be noted that, based on the above, the photovoltaic module provided by this invention, by adding support members to the back and frame of the solar panel, can increase the ultimate pressure that the frame can withstand, enhance its mechanical strength, and enable it to work for a longer time in harsh climatic environments, thus extending its service life. Furthermore, the triangular support structure between the support plates and inclined plates of the support members allows for a smaller size design of each support plate and inclined plate, ensuring a lightweight design while providing more stable support.

[0087] According to any embodiment of the photovoltaic module of the fifth aspect of the present invention, the photovoltaic module further includes a spacer disposed between the support surface of the support plate and the solar panel.

[0088] According to any embodiment of the photovoltaic module of the fifth aspect of the present invention, the spacer is made of an elastic material.

[0089] According to any embodiment of the photovoltaic module of the fifth aspect of the present invention, the spacer is any one of silicone strip and rubber strip.

[0090] Beneficial effects

[0091] (1) The solar cell provided by the present invention uses laser sintering to promote silver-silicon interdiffusion during its preparation process, forming a contact effect equivalent to or better than laser SE doping, which further reduces the surface boron-rich layer. At the same time, eliminating the laser SE process can completely avoid surface damage to the cell and recombination caused by heavy doping in the laser region, resulting in greater efficiency improvement. It also avoids screen printing offset phenomenon, making the efficiency improvement more stable. It solves the problem that light doping of TOPCon cells without laser SE process cannot achieve good contact.

[0092] (2) The photovoltaic module provided by the present invention can increase the limit pressure that its frame can withstand by adding support members on the back and frame of the solar panel, thereby enhancing its mechanical strength and enabling it to work for a longer time in harsh climatic environments and extending its service life.

[0093] (3) The photovoltaic module provided by the present invention adopts a triangular support structure between the support plate and the inclined plate of the support member, which can realize the size reduction design of each support plate and the inclined plate, and has a more stable support while ensuring the lightweight design. Attached Figure Description

[0094] Figure 1 This is a schematic diagram of a TOPCon battery structure fabricated using the conventional laser SE route.

[0095] Figure 2 This is a schematic diagram of the TOPCon battery structure obtained by the non-laser SE route in the embodiments of this application;

[0096] Figure 3 A schematic diagram of the structure of the photovoltaic module provided in this embodiment of the invention;

[0097] Figure 4 A schematic diagram of the frame structure of a photovoltaic module provided in an embodiment of the present invention;

[0098] Figure 5 A schematic diagram of the structure of the support component for the photovoltaic module provided in this embodiment of the invention.

[0099] The labels in the diagram are as follows: 101, N-type basic silicon wafer; 102, boron diffusion layer; 103, passivation layer; 104, front antireflection layer; 105, laser-sintered high-concentration boron diffusion layer; 106, front electrode; 107, tunneling oxide layer; 108, N+-Poly layer; 109, back antireflection layer; 110, back electrode; 111, laser-sintered silver-silicon interdiffusion layer; 100, solar panel; 200, frame; 300, support component; 310, upper support plate; 311, inclined plate one; 312, inclined plate two; 313, inclined plate three; 314, inclined plate four; 320, lower support plate; 330, spacer; A, end. Detailed Implementation

[0100] To further understand the content of this invention, a detailed description is provided in conjunction with the accompanying drawings and embodiments. The structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the scope of the invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and objectives of the invention, should still fall within the scope of the disclosed technical content. Furthermore, terms such as "upper," "lower," "left," "right," and "middle" used in this specification are merely for clarity and not intended to limit the scope of implementation. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the invention's implementation.

[0101] Example 1

[0102] like Figure 3 As shown, this embodiment provides a photovoltaic module, which includes a solar panel 100, a frame 200 for fixing the solar panel 100, a support member 300 for providing a support surface for the solar panel 100, and a spacer 330 disposed between the support surface of the support plate and the solar panel 100. In actual use, the upper support plate 310 or the lower support plate 320 can be selected as the back support surface of the solar panel 100 to raise the support surface.

[0103] The solar panel 100 has an absorbing surface (i.e., the front) that absorbs sunlight, and a back surface opposite to the front. The frame 200 is disposed on the outer periphery of the solar panel 100, and its main function is to provide overall fixation for the solar panel 100. The back surface of the solar panel 100 is provided with a long strip-shaped support member 300, which is installed on the inner side of the frame 200 through its two ends A. The installation method can be welding or fixing by a detachable method such as screws.

[0104] like Figure 4 As shown, the support member 300 has an upper support plate 310 and a lower support plate 320, which are arranged parallel to each other. Along the same length direction as the upper support plate 310 and the lower support plate 320, there are extending inclined plates 311 and 312. These three inclined plates 311, 312, and the upper support plate 310 form a triangular support with a triangular cross-section. The inclined plates 311 and 312 connect to form a common side that is fixedly connected to the lower support plate 320. Further, referring to… Figure 5As shown, an extended inclined plate 313 is provided along the length direction of the inclined plate 311 or the lower support plate 320. The inclined plate 311, the inclined plate 313, and the lower support plate 320 form a triangular support with a triangular cross-section. An extended inclined plate 4 314 is provided along the length direction of the inclined plate 312 or the lower support plate 320. The inclined plate 312, the inclined plate 4 314, and the lower support plate 320 form a triangular support with a triangular cross-section.

[0105] Based on the above, the photovoltaic module provided by the present invention, by adding support members 300 to the back of the solar panel 100 and the frame 200, can increase the ultimate pressure that the frame 200 can withstand, enhance its mechanical strength, and enable it to work for a longer time in harsh climatic environments, thus extending its service life. Furthermore, the support plate and the inclined plate of the support member 300 adopt a triangular support structure, which allows for a smaller size design of each support plate and inclined plate, ensuring a lightweight design while providing more stable support.

[0106] A spacer 330 with lower rigidity than the support plate is also provided between the support member 300 and the back of the solar panel 100. One function of the spacer 330 is to prevent the support member 300 from scratching the back of the solar panel 100. Another function is to fill the gap between the support member 300 and the back of the solar panel 100 to avoid creating additional gaps, thereby improving support stability. Therefore, the support member 300 is preferably made of an elastic material, such as rubber or silicone strips.

[0107] Example 2

[0108] In this embodiment, as Figure 2 As shown, this application proposes a TOPCon battery, which can be applied to the solar panel 100 described in this invention to form a photovoltaic module. Specifically, the TOPCon battery includes an N-type base silicon wafer 101. The front side of the N-type base silicon wafer 101 is stacked with a boron diffusion layer 102, a passivation layer 103, a front antireflection layer 104, and a front electrode 106. The back side of the N-type base silicon wafer 101 is stacked with a tunneling oxide layer 107, an N+-Poly layer 108, a back antireflection layer 109, and a back electrode 110. Specifically, in this embodiment, the passivation layer 103 is an aluminum oxide layer, the front antireflection layer 104 is composed of three layers stacked sequentially: a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer (wherein the silicon nitride layer is stacked on top of the passivation layer 103), and the back antireflection layer 109 is a silicon nitride layer. Other relevant information is shown in Table 1 below.

[0109] Table 1. Structural information of the TOPCon battery provided in this embodiment.

[0110]

[0111] The above-mentioned layered structure is relatively mature in the existing technology, and the preparation method is also mature. Therefore, the preparation method will not be described in detail here. For a more detailed preparation process, please refer to Examples 2 to 10.

[0112] This embodiment focuses on a detailed description of the fabrication process of the front structure of the TOPCon battery, wherein the fabrication process of the boron diffusion layer 102 is as follows:

[0113] A shallowly doped boron-rich layer was formed by boron diffusion on the base silicon wafer 101, with a surface concentration of 5.4E+19cm. -3 ~5.5E+19cm -3 The junction depth is 0.24–0.29 micrometers, and the front sheet resistance of the silicon wafer is 105–125 Ω / sq. Specifically, in this embodiment, boron diffusion forms a shallowly doped boron-rich layer with a surface concentration of 5.480E+19cm. -3 The junction depth is 0.2656 micrometers, and the front sheet resistance of the silicon wafer is 115 Ω / sq.

[0114] The silicon wafer is then repaired and advanced to remove the boron-rich layer on the surface, resulting in a surface concentration of 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers, thus forming a boron diffusion layer 102 with a concentration of 250–270 Ω / sq. Furthermore, in the region of the boron diffusion layer near or in contact with the front electrode (hereinafter referred to as the electrode region), the surface concentration is 4.9E+18 cm⁻¹. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 μm, and the sheet resistance is 250–270 Ω / sq; the surface concentration in other non-electrode regions is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers, and the sheet resistance is 250–270 Ω / sq. Specifically, in this embodiment, the surface concentration of the entire boron diffusion layer is 4.980E+18cm. -3 The junction depth is 0.7640 micrometers, the sheet resistance is 260 Ω / sq, and the surface concentration in the electrode region is 4.980E+18cm. -3 The junction depth is 0.7640 micrometers, and the sheet resistance is 260 Ω / sq.

[0115] It should be noted that, as described above, the surface concentrations of traditional TOPCon cells after boron diffusion, laser SE treatment, and annealing are shown in Table 2 below:

[0116] Table 2. Relevant information on various TOPCon batteries prepared by conventional processes and the process of this invention.

[0117]

[0118] Furthermore, the specific process of forming a laser-sintered silver-silicon interdiffusion layer 111 by laser sintering at the connection between the front electrode 106 and the boron diffusion layer 102 is as follows: A pulsed laser is used to scan the front side of the battery cell with printed metal grid lines, and a forward bias voltage is applied to the metal grid lines to sinter them. Specifically, during laser sintering in this invention:

[0119] The bias voltage is set between 10-30V, preferably 10-20V; the laser power is set at 10%; based on this, the peak sintering temperature T of the laser can be set. 峰值 The temperature is controlled between 850 and 900°C. Specifically, in this embodiment, the bias voltage and peak sintering temperature T during laser sintering are... 峰值 As shown in Table 2 below;

[0120] The wavelength of the laser is 400-1100nm; specifically in this embodiment, the wavelength of the laser is 450nm.

[0121] The laser frequency is 100–500 kHz, and the peak energy is 4.0–10.0 J / cm². 2 ;

[0122] The laser scanning speed is 4–20 m / s; specifically in this embodiment, the laser scanning speed is 20 m / s.

[0123] The laser beam is in the shape of a dotted spot with a diameter of 15–30 micrometers; specifically, in this embodiment, the diameter of the spot is 30 micrometers.

[0124] The laser sintering time is 0.5–2.5 s. Specifically, in this embodiment, the laser sintering time is 1.5 s.

[0125] Table 3 shows the laser sintering information for each TOPCon cell provided in this embodiment.

[0126]

[0127] In addition, the present invention also provides a TOPCon cell prepared using a laser SE route, wherein after the boron diffusion layer is prepared, laser SE is immediately added to form a heavily doped region, and the final laser sintering step is not performed.

[0128] The TOPCon battery prepared in this invention has the same parameters as in the embodiments of the present invention, except that it exhibits the same performance after laser SE treatment and subsequent annealing process, with a surface concentration of 3.08E+18cm in the electrode region. -3 The junction depth is 2.102 micrometers, and the sheet resistance is 79 Ω / sq; the surface concentration in the non-electrode region remains at 4.980E+18cm. -3 The junction depth is 0.7640 micrometers, and the sheet resistance is 250 Ω / sq; the final sheet resistance of the entire boron diffusion layer is 220 Ω / sq.

[0129] The test results of the TOPCon cells prepared based on Table 3 are shown in Table 4:

[0130] The testing results for each TOPCon battery are provided in Table 4.

[0131]

[0132] According to the test results in Table 4, the prepared battery has high efficiency when the laser bias voltage is 10-30V, and the prepared battery has the best efficiency when the bias voltage is 10-20V.

[0133] Furthermore, compared with TOPCon cells prepared by conventional laser SE process, the cell efficiency was improved by 0.08%, mainly due to a 0.37% increase in fill power. This invention primarily solves the problem of achieving good contact in TOPCon cells with light doping without a laser SE process. By using laser sintering to promote silver-silicon interdiffusion, a contact effect equivalent to or better than laser SE doping is achieved, further reducing the surface boron-rich layer. Simultaneously, eliminating the laser SE process completely avoids surface damage and recombination caused by heavy doping in the laser region, resulting in a greater efficiency improvement. It also avoids screen printing misalignment, leading to a more stable efficiency improvement.

[0134] Furthermore, it should be noted that, while maintaining the same bias voltage and laser power, appropriate variations in other peak conditions of laser sintering within the range required by this invention will still ensure that the performance of the prepared battery meets the requirements.

[0135] In Tables 3 and 4, the peak sintering temperature T of the samples with a bias voltage of 14V is... 峰值 At a temperature of 850℃, while keeping other conditions constant, several groups of products were prepared with a bias voltage of 14V by changing only the laser power to alter the peak sintering temperature. These products were then tested, and the results are shown in Table 5.

[0136] Table 5 shows the testing results of several TOPCon cells fabricated with a bias voltage of 14V.

[0137]

[0138] As can be seen from the test results in Table 5, even when the bias voltage remains constant, changing the laser power and peak sintering temperature will have a significant impact on battery performance.

[0139] Example 3

[0140] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0141] S1. The silicon wafer is cleaned and textured on both sides; the thickness of the N-type monocrystalline silicon wafer is 100-160 micrometers and the resistivity is 0.4-10Ω·cm.

[0142] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer, with a surface concentration of 5.4E+19cm. -3 ~5.5E+19cm -3 The junction depth is 0.24–0.29 micrometers;

[0143] S3. High-temperature annealing is used to repair and advance the silicon wafer, achieving a surface concentration of 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers, forming a boron diffusion layer;

[0144] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0145] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0146] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0147] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0148] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0149] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0150] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0151] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0152] Example 4

[0153] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0154] S1. Clean the silicon wafer and texturize both sides;

[0155] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer; boron doping is then performed to form a PN junction with a sheet resistance of 105-125 Ω / sq. It should be noted that when using a low-pressure, high-temperature diffusion furnace for boron diffusion on the front side of the silicon wafer, the diffusion temperature is 800-1100℃ and the diffusion time is 10-50 minutes.

[0156] S3, high-temperature annealing, sheet resistance is 250-270Ω / sq;

[0157] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0158] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0159] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0160] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0161] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0162] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0163] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0164] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0165] Example 5

[0166] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0167] S1. Clean the silicon wafer and texturize both sides;

[0168] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer; boron doping is then performed to form a PN junction.

[0169] S2 specifically includes the following steps: S201 Start, S202 Enter the boat, S203 Vacuuming, S204 Heating, S205 Heating, S206 Maintaining temperature, S207 Leak detection, S208 Heating, S209 Maintaining temperature, S210 Diffusion / Deposition, S211 Maintaining temperature, S212 Diffusion / Deposition, S213 Maintaining temperature, S214 Diffusion / Deposition, S215 Heating, S216 Heating, S217 Maintaining temperature, S218 Maintaining temperature, S219 Cooling, S220 Cooling, S221 Breaking vacuum, S222 Unloading from the boat, S223 End.

[0170] S3, High-temperature annealing;

[0171] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0172] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0173] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0174] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0175] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0176] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0177] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0178] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0179] Example 6

[0180] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0181] S1. Clean the silicon wafer and texturize both sides;

[0182] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer; boron doping is then performed to form a PN junction.

[0183] S2 specifically includes the following steps: S201 Start, S202 Enter the boat, S203 Vacuuming, S204 Heating, S205 Heating, S206 Maintaining temperature, S207 Leak detection, S208 Heating, S209 Maintaining temperature, S210 Diffusion / Deposition, S211 Maintaining temperature, S212 Diffusion / Deposition, S213 Maintaining temperature, S214 Diffusion / Deposition, S215 Heating, S216 Heating, S217 Maintaining temperature, S218 Maintaining temperature, S219 Cooling, S220 Cooling, S221 Breaking vacuum, S222 Unloading from the boat, S223 End.

[0184] Furthermore, in S2, the time, temperature, pressure, BCl3 gas flow rate, nitrogen gas flow rate in the first pipeline, oxygen gas flow rate, and nitrogen gas flow rate in the second pipeline for each step are as follows:

[0185] S201: 10s, 700-900℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 0sccm;

[0186] S202: 300-500s, 700-900℃, 800-1000mbar, 0sccm, 1000-3000sccm, 0sccm, 30000-40000sccm;

[0187] S203: 100-200s, 700-900℃, 600-800mbar, 0sccm, 0sccm, 0sccm, 0sccm;

[0188] S204: 200-500s, 700-900℃, 100-150mbar, 0sccm, 0sccm, 0sccm, 0sccm;

[0189] S205: 200-500s, 700-900℃, 100-150mbar, 0sccm, 0sccm, 0sccm, 0sccm;

[0190] S206: 100-240s, 700-900℃, 90-110mbar, 0sccm, 0sccm, 0sccm, 0sccm;

[0191] S207: 30-100s, 700-900℃, 90-110mbar, 0sccm, 0sccm, 0sccm, 0sccm;

[0192] S208: 200-400s, 750-950℃, 100-200mbar, 0sccm, 3000-5000sccm, 0sccm, 0sccm;

[0193] S209:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、200-500ccm、0sccm;

[0194] S210:80-200s、750-950℃、100-200mbar、70-150sccm、3000-5000sccm、300-600sccm、0sccm;

[0195] S211:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、0sccm、0sccm;

[0196] S212:180-240s、750-950℃、100-200mbar、100-200sccm、3000-5000sccm、400-700sccm、0sccm;

[0197] S213:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、0sccm、0sccm;

[0198] S214:180-240s、750-950℃、100-200mbar、100-200sccm、3000-5000sccm、400-700sccm、sccm;

[0199] S215:80-200s、800-1000℃、100-200mbar、200-400sccm、450-650sccm、0sccm、0sccm;

[0200] S216:200-400s、800-1000℃、100-200mbar、0sccm、2000-4000sccm、0sccm、0sccm;

[0201] S217:200-400s、800-1000℃、100-200mbar、0sccm、2000-4000sccm、0sccm、0sccm;

[0202] S218:200-400s、800-1000℃、200-400mbar、0sccm、4000-6000sccm、0sccm、0sccm;

[0203] S219: 800-1000s, 700-800℃, 200-400mbar, 0sccm, 7000-9000sccm, 0sccm, 0sccm;

[0204] S220: 200-400s, 700-800℃, 200-400mbar, 0sccm, 7000-9000sccm, 0sccm, 0sccm;

[0205] S221: 60-150s, 700-800℃, 900-1060mbar, 0sccm, 15000-20000sccm, 0sccm, 0sccm;

[0206] S222: 300-500s, 700-800℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 30000-40000sccm;

[0207] S223: 10s, 700-800℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 0sccm.

[0208] S3, High-temperature annealing;

[0209] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0210] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0211] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0212] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0213] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0214] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0215] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0216] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0217] Example 7

[0218] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0219] S1. Clean the silicon wafer and texturize both sides;

[0220] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer; boron doping is then performed to form a PN junction.

[0221] S3, High-temperature annealing;

[0222] S3 specifically includes the following steps: S201 Start, S202 Open furnace door, S203 Enter boat, S204 Close furnace door, S205 Heat up, S206 Heat up, S207 Heat up, S208 Check for leaks, S209 Heat up, S210 Heat up, S211 Heat up, S212 Heat up, S213 Heat up, S214 Oxidize, S215 Cool down, S216 Cool down, S217 Purge with nitrogen, S218 Open furnace door, S219 Unload boat, S220 Close furnace door, S221 End.

[0223] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0224] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0225] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0226] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0227] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0228] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0229] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0230] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0231] Example 7

[0232] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0233] S1. Clean the silicon wafer and texturize both sides;

[0234] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer;

[0235] S3, High-temperature annealing;

[0236] S3 specifically includes the following steps: S201 Start, S202 Open furnace door, S203 Enter boat, S204 Close furnace door, S205 Heat up, S206 Heat up, S207 Heat up, S208 Check for leaks, S209 Heat up, S210 Heat up, S211 Heat up, S212 Heat up, S213 Heat up, S214 Oxidize, S215 Cool down, S216 Cool down, S217 Purge with nitrogen, S218 Open furnace door, S219 Unload boat, S220 Close furnace door, S221 End.

[0237] Furthermore, in S3, the time, temperature, pressure, nitrogen gas flow rate, oxygen gas flow rate, and nitrogen gas flow rate for each step are as follows:

[0238] S301: 10s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0239] S302: 20-50s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0240] S303: 300-600s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0241] S304: 20-50s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0242] S305: 80-200s, 700-950℃, 600-800mbar, 0sccm, 0sccm, 2000-4000sccm;

[0243] S306: 200-500s, 700-950℃, 150-250mbar, 0sccm, 0sccm, 1000-3000sccm;

[0244] S307: 30-150s, 700-950℃, 150-250mbar, 0sccm, 0sccm, 0sccm;

[0245] S308:30-120s、700-950℃、150-250mbar、0sccm、0sccm、0sccm;

[0246] S309:100-200s、700-950℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0247] S310:30-150s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0248] S311:30-150s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0249] S312:400-650s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0250] S313:500-700s、1000-1050℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0251] S314:3000-5000s、1000-1050℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0252] S315:2000-3000s、700-800℃、700-900mbar、0sccm、15000-20000sccm、2000-4000sccm;

[0253] S316:200-400s、700-800℃、700-900mbar、0sccm、15000-20000sccm、1000-2500sccm;

[0254] S317:30-100s、700-800℃、800-1060mbar、800-2000sccm、0sccm、15000-30000sccm;

[0255] S318: 20-50s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0256] S319: 400-600s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0257] S320: 20-50s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0258] S321: 10s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm.

[0259] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0260] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0261] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0262] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0263] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0264] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0265] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0266] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0267] Example 8

[0268] In this embodiment, this application proposes a method for preparing a TOPCon battery, comprising the following steps:

[0269] S1. Clean the silicon wafer and texturize both sides;

[0270] S2. Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer;

[0271] S3, High-temperature annealing;

[0272] S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer.

[0273] S5. Perform LPCVD process with face-to-face double insertion to deposit a tunneling oxide layer on the back of the silicon wafer, and simultaneously deposit a poly layer.

[0274] S6. Face-to-face double insertion is used for phosphorus diffusion process to form N+-Poly layer;

[0275] S7. Remove the PSG from the edge of the silicon wafer and the front side, and then perform RCA cleaning to remove the N+-Poly layer from the edge of the silicon wafer and the front side.

[0276] S8. A passivation layer is formed on the front side of the silicon wafer using the ALD atomic layer deposition process.

[0277] S9. Using the PECVD process, a front anti-reflection layer and a back anti-reflection layer are formed on the front and back sides of the silicon wafer, respectively.

[0278] S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

[0279] S11. Perform laser sintering to form a silver-silicon interdiffusion layer at the connection between the front electrode and the boron diffusion layer.

[0280] In S2, the sheet resistance of the silicon wafer is 105-125Ω / sq, and in S3, the sheet resistance of the silicon wafer is 250-270Ω / sq.

[0281] S2 specifically includes the following steps: S201 Start, S202 Enter the boat, S203 Vacuuming, S204 Heating, S205 Heating, S206 Maintaining temperature, S207 Leak detection, S208 Heating, S209 Maintaining temperature, S210 Diffusion / Deposition, S211 Maintaining temperature, S212 Diffusion / Deposition, S213 Maintaining temperature, S214 Diffusion / Deposition, S215 Heating, S216 Heating, S217 Maintaining temperature, S218 Maintaining temperature, S219 Cooling, S220 Cooling, S221 Breaking vacuum, S222 Unloading from the boat, S223 End.

[0282] Furthermore, in S2, the time, temperature, pressure, BCl3 gas flow rate, nitrogen gas flow rate in the first pipeline, oxygen gas flow rate, and nitrogen gas flow rate in the second pipeline for each step are as follows:

[0283] S201: 10s, 700-900℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 0sccm;

[0284] S202:300-500s、700-900℃、800-1000mbar、0sccm、1000-3000sccm、0sccm、30000-40000sccm;

[0285] S203:100-200s、700-900℃、600-800mbar、0sccm、0sccm、0sccm、0sccm;

[0286] S204:200-500s、700-900℃、100-150mbar、0sccm、0sccm、0sccm、0sccm;

[0287] S205:200-500s、700-900℃、100-150mbar、0sccm、0sccm、0sccm、0sccm;

[0288] S206:100-240s、700-900℃、90-110mbar、0sccm、0sccm、0sccm、0sccm;

[0289] S207:30-100s、700-900℃、90-110mbar、0sccm、0sccm、0sccm、0sccm;

[0290] S208:200-400s、750-950℃、100-200mbar、0sccm、3000-5000sccm、0sccm、0sccm;

[0291] S209:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、200-500ccm、0sccm;

[0292] S210:80-200s、750-950℃、100-200mbar、70-150sccm、3000-5000sccm、300-600sccm、0sccm;

[0293] S211:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、0sccm、0sccm;

[0294] S212:180-240s、750-950℃、100-200mbar、100-200sccm、3000-5000sccm、400-700sccm、0sccm;

[0295] S213:200-400s、750-950℃、100-200mbar、200-400sccm、3000-5000sccm、0sccm、0sccm;

[0296] S214:180-240s、750-950℃、100-200mbar、100-200sccm、3000-5000sccm、400-700sccm、sccm;

[0297] S215:80-200s、800-1000℃、100-200mbar、200-400sccm、450-650sccm、0sccm、0sccm;

[0298] S216:200-400s、800-1000℃、100-200mbar、0sccm、2000-4000sccm、0sccm、0sccm;

[0299] S217:200-400s、800-1000℃、100-200mbar、0sccm、2000-4000sccm、0sccm、0sccm;

[0300] S218:200-400s、800-1000℃、200-400mbar、0sccm、4000-6000sccm、0sccm、0sccm;

[0301] S219:800-1000s、700-800℃、200-400mbar、0sccm、7000-9000sccm、0sccm、0sccm;

[0302] S220:200-400s、700-800℃、200-400mbar、0sccm、7000-9000sccm、0sccm、0sccm;

[0303] S221:60-150s、700-800℃、900-1060mbar、0sccm、15000-20000sccm、0sccm、0sccm;

[0304] S222: 300-500s, 700-800℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 30000-40000sccm;

[0305] S223: 10s, 700-800℃, 900-1060mbar, 0sccm, 1000-3000sccm, 0sccm, 0sccm.

[0306] S3 specifically includes the following steps: S201 Start, S202 Open furnace door, S203 Load boat, S204 Close furnace door, S205 Heat up, S206 Heat up, S207 Heat up, S208 Check for leaks, S209 Heat up, S210 Heat up, S211 Heat up, S212 Heat up, S213 Heat up, S214 Oxidize, S215 Cool down, S216 Cool down, S217 Purge with nitrogen, S218 Open furnace door, S219 Unload boat, S220 Close furnace door, S221 End. Further, in S3, the time, temperature, pressure, nitrogen gas flow rate, oxygen gas flow rate, and nitrogen gas flow rate for each step are as follows:

[0307] S301: 10s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0308] S302: 20-50s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0309] S303: 300-600s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0310] S304: 20-50s, 700-900℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0311] S305: 80-200s, 700-950℃, 600-800mbar, 0sccm, 0sccm, 2000-4000sccm;

[0312] S306: 200-500s, 700-950℃, 150-250mbar, 0sccm, 0sccm, 1000-3000sccm;

[0313] S307: 30-150s, 700-950℃, 150-250mbar, 0sccm, 0sccm, 0sccm;

[0314] S308:30-120s、700-950℃、150-250mbar、0sccm、0sccm、0sccm;

[0315] S309:100-200s、700-950℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0316] S310:30-150s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0317] S311:30-150s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0318] S312:400-650s、800-1000℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0319] S313:500-700s、1000-1050℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0320] S314:3000-5000s、1000-1050℃、700-900mbar、0sccm、15000-20000sccm、700-1000sccm;

[0321] S315:2000-3000s、700-800℃、700-900mbar、0sccm、15000-20000sccm、2000-4000sccm;

[0322] S316:200-400s、700-800℃、700-900mbar、0sccm、15000-20000sccm、1000-2500sccm;

[0323] S317:30-100s、700-800℃、800-1060mbar、800-2000sccm、0sccm、15000-30000sccm;

[0324] S318: 20-50s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0325] S319: 400-600s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0326] S320: 20-50s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm;

[0327] S321: 10s, 700-800℃, 800-1060mbar, 0sccm, 0sccm, 2000-4000sccm.

[0328] In step S11, a laser is used to irradiate the metal grid lines on the front side of the crystalline silicon solar cell, and a forward bias voltage is applied to the metal grid lines of the crystalline silicon solar cell to sinter the metal grid lines.

[0329] The present invention and its embodiments have been described above illustratively. This description is not restrictive, and the figures shown are only one embodiment of the present invention; the actual structure is not limited thereto. Therefore, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. A front-side structure of a TOPCon battery, said front-side structure comprising a base silicon wafer, characterized in that, The front structure includes a front electrode and a front layer structure disposed on the base silicon wafer; The front layer structure includes a boron diffusion layer, and the front electrode is in contact with the boron diffusion layer; A silver-silicon interdiffusion layer is formed between the front electrode and the boron diffusion layer; Furthermore, the boron diffusion layer does not have a heavily doped layer in the region near or in contact with the front electrode; Specifically, the surface concentration is 4.9E+18cm⁻¹ in both the region near the front electrode and the region in contact with the front electrode. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers, and the sheet resistance is 250–270 Ω / sq. The surface concentration of the boron diffusion layer is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers, and the sheet resistance is 250–270 Ω / sq.

2. The front structure of the TOPCon battery according to claim 1, characterized in that, The front layer structure also includes a passivation layer and an anti-reflection layer; the front electrode passes through the passivation layer and the anti-reflection layer and contacts the boron diffusion layer.

3. A method for preparing the front-side structure of a TOPCon battery as described in claim 1 or 2, characterized in that, include: 1) Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer; the surface concentration of the shallowly doped boron-rich layer is 5.4E+19cm. - ³~5.5E+19cm - ³, The junction depth is 0.24–0.29 micrometers; 2) The front side of the silicon wafer is repaired and advanced by high-temperature annealing to remove the boron-rich layer and obtain a boron diffusion layer; the surface concentration of the boron diffusion layer is 4.9E+18cm. - ³~5.0E+18cm - ³, The junction depth is 0.74–0.79 micrometers; 3) A passivation layer and a front anti-reflection layer are sequentially formed on the front side of the silicon wafer; 4) Screen printing is performed directly on the boron diffusion layer of the silicon wafer, followed by sintering; 5) The connection between the front electrode and the boron diffusion layer is subjected to laser sintering treatment, wherein the bias voltage of the laser sintering treatment is 10-20V and the frequency of the laser is 100-500kHz.

4. The method for preparing the front structure of the TOPCon battery according to claim 3, characterized in that: The laser sintering process includes: using a laser to scan the front side of the battery cell with printed metal grid lines, and applying a forward bias voltage to the metal grid lines to sinter them.

5. The method for preparing the front structure of a TOPCon battery according to claim 3, characterized in that: The laser wavelength is 400-1100 nm; the peak energy is 4.0–10.0 J / cm². 2 .

6. The method for preparing the front structure of a TOPCon battery according to claim 3, characterized in that: The laser type is a pulsed laser; the laser scanning speed is 4–20 m / s.

7. The method for preparing the front structure of a TOPCon battery according to claim 3, characterized in that: The laser beam is in the shape of a dotted spot with a diameter of 15–30 micrometers.

8. The method for preparing the front structure of the TOPCon battery according to claim 3, characterized in that: The laser sintering time is 0.5 to 2.5 seconds.

9. The method for preparing the front structure of the TOPCon battery according to any one of claims 3 to 8, characterized in that: The laser power of the laser sintering process is 8-10%; And / or, the temperature of the laser sintering treatment is 820–950°C.

10. The method for preparing the front structure of a TOPCon battery according to claim 9, characterized in that: After boron diffusion is performed on the front side of the silicon wafer to form a shallow boron-rich layer, the sheet resistance of the front side of the silicon wafer is 105-125Ω / sq.

11. The method for preparing the front structure of a TOPCon battery according to claim 10, characterized in that: After repairing and advancing the front side of the silicon wafer and removing the boron-rich layer, the sheet resistance of the front side of the silicon wafer is 250-270 Ω / sq.

12. The method for preparing the front structure of a TOPCon battery according to claim 11, characterized in that: Boron diffusion is performed on the front side of the silicon wafer to form a shallowly doped boron-rich layer, resulting in a surface concentration of 5.4E+19cm. -3 ~5.5E+19cm -3 The junction depth is 0.24–0.29 micrometers; After repairing and advancing the front side of the silicon wafer and removing the boron-rich layer, its surface concentration is 4.9E+18cm. -3 ~5.0E+18cm -3 The junction depth is 0.74–0.79 micrometers.

13. A TOPCon battery, characterized in that: The TOPCon battery includes a front structure and a back structure; The front structure is the front structure of the TOPCon battery as described in any one of claims 1 to 2, or the front structure of the TOPCon battery prepared by the method according to any one of claims 3 to 12; The back structure includes a back electrode and a back layer structure disposed on the base silicon wafer; The back-side layer structure includes a tunneling oxide layer, a polysilicon layer, and an anti-reflection layer; The back electrode passes through the antireflective layer and contacts the polycrystalline silicon layer.

14. A method for preparing a TOPCon battery, characterized in that: Including the method for preparing the front structure of the TOPCon battery as described in any one of claims 3 to 12; Before boron diffusion onto the silicon wafer, the following steps are included: S1. Clean the silicon wafer and texturize both sides; After repairing and advancing the silicon wafer, and before laser sintering the connection between the front electrode and the boron diffusion layer, the following steps are included: S4. Perform acid pickling to remove the BSG from the edges and back of the silicon wafer, and then perform alkaline polishing to remove the PN junction from the edges and back of the silicon wafer. S5. Deposit a tunneling oxide layer on the back side of the silicon wafer, and simultaneously deposit an amorphous silicon layer; S6. Perform phosphorus diffusion process to form a polycrystalline silicon layer; S7. Remove the silicon wafer edge and front PSG, then remove the silicon wafer edge and front polysilicon layer. S8. A passivation layer is formed on the front side of the silicon wafer; S9. An anti-reflection layer is formed on the front side and an anti-reflection layer is formed on the back side of the silicon wafer, respectively. S10. Screen printing is performed on the front and back sides of the silicon wafer, followed by sintering and annealing.

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