A gate driving method and an array display device

Abstract

The application discloses a gate driving method and an array display device. The method comprises the following steps: providing an array display device, wherein the array display device comprises a display array, a control module and a timing output module, the display array comprises row gate lines, VCOM blocks and pixels; in a frame time, the timing output module is used to provide a gate driving timing to the gate lines; a first gate line group of a previous VCOM block is scanned in a first sequence, and a second gate line group adjacent to the first gate line group is scanned in a second sequence in a current VCOM block. By cross scanning the adjacent gate lines of the VCOM blocks, the situation that the gate driving signals of the positive scan and the reverse scan are driven together in the same VCOM block is avoided, and the display horizontal lines caused by the simultaneous driving coupling are effectively reduced.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a gate driving method and an array display device. Background Technology

[0002] like Figure 1 Current LCD displays use 4H charging technology, where the first 3H are for pre-charging and the last 1H is for actual charging. This technology can improve the pixel charging rate. Clearly, the gate drive waveform at this point occupies the width of 4H. In existing 4H driving technology, the gate is turned on row by row. This means that the gate high level on a common electrode VCOM block is coupled to the VCOM block for 4 rows, causing a coupling pull-up phenomenon on the common electrode, resulting in horizontal stripes.

[0003] Chinese public document CN 115407895 A discloses a gate driving scanning method and a TDDI display panel. This method employs a cross-scanning of the gate scan lines from two opposing directions. However, at some point, the gate driving signals for both forward and reverse scans may be driven simultaneously on the same RX (touch block). Because the forward and reverse scans will inevitably meet at some point, if the gate driving signals for both scans are driven on the same RX touch block at that moment, coupling horizontal lines may occur, and this method cannot effectively solve the problem of horizontal lines caused by coupling. Summary of the Invention

[0004] Existing LCD screens exhibit horizontal stripe problems during gate driving due to high-level coupling at the gate.

[0005] To address the aforementioned issues, a gate driving method and array display device are proposed. By cross-scanning adjacent gate lines of the VCOM block, the situation where forward and reverse gate driving signals drive the same VCOM block simultaneously is avoided, effectively reducing display horizontal stripes caused by simultaneous driving coupling.

[0006] In a first aspect, a gate driving method includes:

[0007] Step 100: Provide an array display device, the array display device including a display array, a control module and a timing output module, the display array including row gate lines, VCOM blocks and pixels; the row gate lines, VCOM blocks and pixels are connected to form the display array, and the timing output module is used to output gate drive timing to the gate lines according to the instructions of the control module;

[0008] Step 200: Within one frame, the timing output module provides gate drive timing to the gate line:

[0009] The first gate line group of the previous VCOM block is scanned in a first sequence, and the second gate line group that is adjacent to the first gate line group is scanned in a second sequence in the current VCOM block.

[0010] Wherein, the first gate line group is an even or odd row of the row gate lines of the VCOM block; the second gate line group is an odd or even row of the row gate lines of the VCOM block.

[0011] In conjunction with the gate driving method described in the first aspect of the present invention, in a first possible embodiment, step 200 includes:

[0012] Step 210: Determine if the VCOM block is the first VCOM block;

[0013] Step 220: If the VCOM block is the first VCOM block, then perform a first sequential scan on the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block.

[0014] In conjunction with the first possible embodiment of the first aspect of the present invention, in the second possible embodiment, step 200 further includes:

[0015] Step 230: Determine if the VCOM block is the first VCOM block;

[0016] Step 240: If the VCOM block is not the first VCOM block, then the even or odd rows of the gate lines corresponding to the current VCOM block are scanned together with the odd or even rows of the previous VCOM block in a second sequential scan.

[0017] In conjunction with the second possible embodiment of the first aspect of the present invention, in the third possible embodiment, step 240 includes:

[0018] Step 241: Take the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block as the even-numbered or odd-numbered rows of the second sequential scan;

[0019] Step 242: Take the first row of the even-numbered or odd-numbered row of the gate line corresponding to the current VCOM block as the first row of the second sequential scan.

[0020] Step 243: Use the odd or even rows of the gate lines corresponding to the previous VCOM block as the odd or even rows of the second sequential scan;

[0021] Step 244: Take the odd-numbered row or the first even-numbered row of the gate line corresponding to the previous VCOM block as the second row of the second sequential scan.

[0022] In conjunction with the gate driving method described in the first aspect of the present invention, in a fourth possible embodiment, the VCOM blocks corresponding to the first sequential scan and the second sequential scan are:

[0023] Adjacent or not adjacent.

[0024] In a second aspect, an array display device is provided, the array display device comprising a display array, a control module, and a timing output module, wherein the display array comprises row gate lines, VCOM blocks, and pixels; the row gate lines, VCOM blocks, and pixels are correspondingly connected to form the display array, and the timing output module is used to output gate drive timing to the gate lines according to the instructions of the control module.

[0025] The timing output module is used to provide gate drive timing for the gate line:

[0026] The first gate line group of the previous VCOM block is scanned in a first sequence, and the second gate line group that is adjacent to the first gate line group is scanned in a second sequence in the current VCOM block.

[0027] Wherein, the first gate line group is an even or odd row of the row gate lines of the VCOM block; the second gate line group is an odd or even row of the row gate lines of the VCOM block.

[0028] In conjunction with the array display device described in the second aspect of the present invention, in a first possible embodiment, the timing output module is further configured to:

[0029] Determine whether the VCOM block is the first VCOM block. If the VCOM block is the first VCOM block, then perform a first sequential scan on the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block.

[0030] In conjunction with the array display device described in the second aspect of the present invention, in a second possible embodiment, the timing output module is further configured to:

[0031] Determine whether the VCOM block is the first VCOM block. If the VCOM block is not the first VCOM block, then perform a second sequential scan together with the odd or even rows of the gate lines corresponding to the current VCOM block and the odd or even rows of the previous VCOM block.

[0032] In conjunction with the second possible implementation of the second aspect of the present invention, in a third possible implementation, the timing output module is further configured to:

[0033] The even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block are taken as the even-numbered or odd-numbered rows of the second sequential scan, and the first row of the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block is taken as the first row of the second sequential scan;

[0034] The odd or even rows of the gate lines corresponding to the previous VCOM block are used as the odd or even rows of the second sequential scan, and the first row of the odd or even rows of the gate lines corresponding to the previous VCOM block is used as the second row of the second sequential scan.

[0035] In conjunction with the gate driving method described in the second aspect of the present invention, in a fourth possible implementation, the VCOM blocks corresponding to the first sequential scan and the second sequential scan are:

[0036] Adjacent or not adjacent.

[0037] By implementing the gate driving method and array display device described in this invention, the adjacent gate lines of the VCOM block are cross-scanned, avoiding the situation where forward and reverse gate driving signals are driven together in the same VCOM block, and effectively reducing the display stripes caused by simultaneous driving coupling. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a schematic diagram of an array display device;

[0040] Figure 2 A schematic diagram of the VCOM block at the top of the array display device and its corresponding gate lines;

[0041] Figure 3 This is a schematic diagram of the VCOM block at the bottom of the array display device and its corresponding gate lines.

[0042] Figure 4 This is a schematic diagram of the gate driving timing of an existing array display device;

[0043] Figure 5 This is a schematic diagram of the gate driving timing of the array display device in this invention;

[0044] Figure 6 This is a first schematic diagram of the gate driving method in Example 1;

[0045] Figure 7 This is a second schematic diagram of the gate driving method in Example 1;

[0046] Figure 8 This is a third schematic diagram of the gate driving method in Example 1;

[0047] Figure 9 This is a fourth schematic diagram of the gate driving method in Example 1. Detailed Implementation

[0048] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are all within the scope of protection of this invention.

[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0050] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0051] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0052] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0053] Existing LCD screens exhibit horizontal stripe problems during gate driving due to high-level coupling at the gate.

[0054] To address the above problems, a gate driving method and an array display device are proposed.

[0055] Example 1

[0056] Firstly, a gate driving method, such as Figure 6 , Figure 6 This is a first schematic diagram of the gate driving method in Embodiment 1; including:

[0057] Step 100: Provide an array display device, the array display device includes a display array, a control module and a timing output module, the display array includes row gate lines, VCOM blocks and pixels; the row gate lines, VCOM blocks and pixels are connected to form the display array, and the timing output module is used to output gate drive timing to the gate lines according to the instructions of the control module;

[0058] Step 200: Within one frame, use the timing output module to provide gate drive timing to the gate line:

[0059] The first gate line group of the previous VCOM block is scanned in a first sequence, and the second gate line group adjacent to the first gate line group is scanned in a second sequence in the current VCOM block; wherein, the first gate line group is the even or odd row of the row gate lines of the VCOM block; and the second gate line group is the odd or even row of the row gate lines of the VCOM block.

[0060] like Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the VCOM block at the top of the array display device and its corresponding gate lines. Figure 3 This is a schematic diagram of the VCOM block at the bottom of the array display device and its corresponding gate lines; as shown. Figure 4 , Figure 4 This is a schematic diagram of the gate drive timing of an existing array display device; the 4H charging technology causes four lines of high-level gate lines on a VCOM block (RX) to couple in the VCOM block during one charging cycle, which causes coupling pull-up problems in the VCOM block, resulting in the appearance of horizontal stripes.

[0061] In this embodiment, all gate lines on the same VCOM block are divided into two groups and scanned separately. The even-numbered or odd-numbered rows of the previous VCOM block are scanned first, and the separated odd-numbered or even-numbered rows are placed in the next VCOM block for scanning, which effectively avoids coupling pull-up.

[0062] like Figure 5 , Figure 5This is a schematic diagram of the gate driving timing of the array display device in this invention. Analyzing with a resolution of 720RGB*1600 lines, the display screen can be divided into 18*32=576 VCOM blocks. Clearly, each VCOM block corresponds to 1600 / 18=50 rows of gate traces. In this embodiment, the gate driving within the same VCOM block is staggered, that is, the odd-numbered rows are driven first. The first sequential scan is: G1, G3, G5, ..., G49, as shown below. Figure 2 The odd-numbered rows of gates on the first VCOM block are driven, followed by the G51 row gates of the second VCOM block. Then, the remaining even-numbered rows of gates (G2) on the first VCOM block are driven. The second sequential scan, i.e., the sequential start order, is G51, G2, G53, G4, G55, G6, cycling sequentially until the G1599, G1550, G1552, and so on up to the G1600 row gates are driven. This completes the writing of one frame of image data. Because the high-level signal of the gate in the previous row of the VCOM block halves the coupling pull to the common electrode VCOM block, the gates corresponding to a row of VCOM blocks are driven alternately between odd and even rows, reducing the probability of horizontal stripes.

[0063] Preferably, such as Figure 7 , Figure 7 This is a second schematic diagram of the gate driving method in Embodiment 1; step 200 includes:

[0064] Step 210: Determine whether the VCOM block is the first VCOM block; Step 220: If the VCOM block is the first VCOM block, perform a first sequential scan on the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block.

[0065] For the first sequential scan of the first VCOM block, only the even-numbered or odd-numbered gate lines are scanned, and only half of the gate lines are scanned.

[0066] Preferably, such as Figure 8 , Figure 8 This is a third schematic diagram of the gate driving method in Embodiment 1; step 200 further includes:

[0067] Step 230: Determine if the VCOM block is the first VCOM block;

[0068] Step 240: If the VCOM block is not the first VCOM block, then the even or odd rows of the gate lines corresponding to the current VCOM block are scanned together with the odd or even rows of the previous VCOM block in the second sequential scan.

[0069] For a second sequential scan of a non-first VCOM block, it is necessary to scan the gate lines of the even or odd rows of the current VCOM block as well as the odd or even rows of the previous VCOM block.

[0070] Preferably, such as Figure 9 , Figure 9 This is a fourth schematic diagram of the gate driving method in Embodiment 1. Step 240 includes: Step 241, taking the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block as the even-numbered or odd-numbered rows of the second sequential scan; Step 242, taking the first row of the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block as the first row of the second sequential scan; Step 243, taking the odd-numbered or even-numbered rows of the gate lines corresponding to the previous VCOM block as the odd-numbered or even-numbered rows of the second sequential scan; Step 244, taking the first row of the odd-numbered or even-numbered rows of the gate lines corresponding to the previous VCOM block as the second row of the second sequential scan.

[0071] Furthermore, the VCOM blocks corresponding to the first and second sequential scans can be either adjacent or non-adjacent. The VCOM blocks undergoing the first and second sequential scans can be scanned sequentially, meaning two VCOM blocks are adjacent on the array display device, or they can be scanned intermittently, meaning two VCOM blocks are not adjacent on the array display device, with several VCOM blocks in between. All gate lines of the VCOM blocks can be scanned within one frame. By cross-scanning adjacent gate lines of the VCOM blocks, the situation where forward and reverse scan gate drive signals drive the same VCOM block simultaneously is avoided, effectively reducing display horizontal lines caused by simultaneous drive coupling.

[0072] Example 2

[0073] In a second aspect, an array display device is provided, comprising a display array, a control module, and a timing output module. The display array includes row gate lines, VCOM blocks, and pixels. The row gate lines, VCOM blocks, and pixels are connected to form the display array. The timing output module is used to output gate drive timing to the gate lines according to the instructions of the control module. The timing output module is used to provide gate drive timing to the gate lines: performing a first sequential scan on the first gate line group of the previous VCOM block, and performing a second sequential scan on the second gate line group adjacent to the first gate line group in the current VCOM block; wherein the first gate line group is an even-numbered or odd-numbered row of row gate lines in the VCOM block; and the second gate line group is an odd-numbered or even-numbered row of row gate lines in the VCOM block.

[0074] The timing output module is further used to determine whether the VCOM block is the first VCOM block. If the VCOM block is the first VCOM block, the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block are scanned in the first sequence.

[0075] The timing output module is further used to determine whether the VCOM block is the first VCOM block. If the VCOM block is not the first VCOM block, the even or odd rows of the gate lines corresponding to the current VCOM block are scanned together with the odd or even rows of the previous VCOM block in the second sequence scan.

[0076] The timing output module is further used for:

[0077] The even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block are used as the even-numbered or odd-numbered rows of the second sequential scan, and the first row of the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block is used as the first row of the second sequential scan; the odd-numbered or even-numbered rows of the gate lines corresponding to the previous VCOM block are used as the odd-numbered or even-numbered rows of the second sequential scan, and the first row of the odd-numbered or even-numbered rows of the gate lines corresponding to the previous VCOM block is used as the second row of the second sequential scan.

[0078] The VCOM blocks corresponding to the first sequential scan and the second sequential scan are either adjacent or not adjacent.

[0079] The gate driving method and array display device of the present invention avoid the situation where forward and reverse gate driving signals are driven together in the same VCOM block by cross-scanning adjacent gate lines of the VCOM block, thus effectively reducing the display stripes caused by simultaneous driving coupling.

[0080] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A gate driving method, characterized in that it includes: Step 100: Provide an array display device, the array display device including a display array, a control module and a timing output module, the display array including row gate lines, VCOM blocks and pixels; the row gate lines, VCOM blocks and pixels are connected to form the display array, and the timing output module is used to output gate drive timing to the gate lines according to the instructions of the control module; Step 200: Within one frame, the timing output module provides gate drive timing to the gate line: The first gate line group of the previous VCOM block is scanned in a first sequence, and the second gate line group that is adjacent to the first gate line group is scanned in a second sequence in the current VCOM block. Wherein, the first gate line group is an even-numbered or odd-numbered row of the row gate lines of the VCOM block; the second gate line group is an odd-numbered or even-numbered row of the row gate lines of the VCOM block; Step 200 includes: Step 210: Determine if the VCOM block is the first VCOM block; Step 220: If the VCOM block is the first VCOM block, then perform a first sequential scan on the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block; Step 230: Determine if the VCOM block is the first VCOM block; Step 240: If the VCOM block is not the first VCOM block, then the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block are scanned together with the odd-numbered or even-numbered rows of the previous VCOM block in a second sequential scan. Step 240 specifically includes: Step 241: Take the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block as the even-numbered or odd-numbered rows of the second sequential scan; Step 242: Take the first row of the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block as the first row of the second sequential scan; Step 243: Use the odd or even rows of the gate lines corresponding to the previous VCOM block as the odd or even rows of the second sequential scan; Step 244: Take the odd-numbered row or the first even-numbered row of the gate line corresponding to the previous VCOM block as the second row of the second sequential scan.

2. The gate driving method according to claim 1, characterized in that, The VCOM blocks corresponding to the first sequential scan and the second sequential scan: Adjacent or not adjacent.

3. An array display device employing the gate driving method of claim 1, characterized in that, The array display device includes a display array, a control module, and a timing output module. The display array includes row gate lines, VCOM blocks, and pixels. The row gate lines, VCOM blocks, and pixels are connected to form the display array. The timing output module is used to provide gate drive timing for the gate line: The first gate line group of the previous VCOM block is scanned in a first sequence, and the second gate line group that is adjacent to the first gate line group is scanned in a second sequence in the current VCOM block. Wherein, the first gate line group is an even-numbered or odd-numbered row of the row gate lines of the VCOM block; the second gate line group is an odd-numbered or even-numbered row of the row gate lines of the VCOM block; The timing output module is further used for: Determine whether the VCOM block is the first VCOM block. If the VCOM block is the first VCOM block, then perform a first sequential scan on the even-numbered or odd-numbered rows of the gate lines corresponding to the VCOM block. Determine whether the VCOM block is the first VCOM block. If the VCOM block is not the first VCOM block, then perform a second sequential scan together with the odd rows or even rows of the gate lines corresponding to the current VCOM block and the odd rows or even rows of the previous VCOM block. The timing output module is further used for: The even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block are taken as the even-numbered or odd-numbered rows of the second sequential scan, and the first row of the even-numbered or odd-numbered rows of the gate lines corresponding to the current VCOM block is taken as the first row of the second sequential scan; The odd or even rows of the gate lines corresponding to the previous VCOM block are used as the odd or even rows of the second sequential scan, and the first row of the odd or even rows of the gate lines corresponding to the previous VCOM block is used as the second row of the second sequential scan.

4. The array display device according to claim 3, characterized in that, The VCOM blocks corresponding to the first sequential scan and the second sequential scan: Adjacent or not adjacent.

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