Preparation method of an N-type TOPCon battery and a solar cell

Abstract

Provided are a preparation method of an N-type TOPCon battery based on laser-induced sintering technology and a solar cell structure. The steps include preparing a mask layer on the front side of an N-type silicon wafer; removing the mask layer corresponding to the metal contact area by using a laser; performing boron diffusion doping on the front side of the silicon wafer, and forming a heavily doped area in the mask-free area, with a surface concentration of not less than 7E+18 cm<supgt;‑3< / supgt>; preparing a back surface passivation contact structure; preparing antireflection layers on the front and back surfaces; preparing electrodes; and performing laser-induced sintering. The preparation method of the N-type TOPCon battery of the present invention only requires laser film opening without laser doping, has lower laser energy, smaller surface damage, and reduces surface recombination. Through the introduction of an oxidation mask, independent adjustment of the truly heavily doped contact area and the lightly doped passivation area is achieved, and an ideal PN junction type is obtained by preparing a selective emitter. Matching the LIF scheme has lower metal recombination and contact resistivity, which can not only increase the open-circuit voltage but also balance the FF loss caused by the high sheet resistance in the shallow diffusion area.

Description

Technical Field

[0001] This application belongs to the technical field of solar cells, and relates to a preparation method of an N-type TOPCon battery and a solar cell. Background Art

[0002] The original SE technical route of the N-type TOPCon battery is as follows: Step 1, texturing; Step 2, boron diffusion; Step 3, laser doping; Step 4, high-temperature oxidation; Step 5, backside pickling to remove the oxide layer; Step 6, backside alkaline polishing; Step 7, tunneling SiO 2 growth; Step 8, i-Poly Si growth / n-PolySi deposition; Step 9, high-temperature P diffusion / high-temperature annealing crystallization; Step 10, pickling to remove the front-side PSG around the diffusion; Step 11, alkaline cleaning to remove the front-side polysilicon around the plating; Step 12, pickling to remove the BSG and PSG on the front and back sides; Step 13, preparation of alumina; Step 14, coating; Step 15, screen printing sintering and light injection. In order to achieve the purpose of improving the efficiency of the TOPCon battery, Laser Induced Firing (LIF) process can be added to the original technical route. This technology can be paired with pure silver paste with less burn-through. Compared with the original silver-aluminum paste, the low-burn-through method can effectively improve the passivation effect and significantly reduce the contact resistivity between the silver paste and silicon.

[0003] The applicant found in the research that after adding the LIF process to the TOPCon battery SE route, the original SE solution has no advantage in conversion efficiency compared with the non-SE (uniform junction) solution. Specifically, it is reflected in: 1. The infrared laser energy selected for laser doping is relatively high (10-16 J / cm 2 ) which causes relatively large laser damage, resulting in open-circuit voltage and current loss and affecting the passivation effect; 2. The silver particles generated by the silver paste matched with the LIF technology have a smaller size, and the contact performance is more affected by the surface concentration. In the original SE process, the surface concentration in the heavily doped region decreases significantly after the oxidation process, and both the surface concentration in the lightly doped region and the heavily doped region are at a relatively low level, and there is no obvious gap between them. After matching with the LIF technology, the SE structure has no advantage in contact resistance.

[0004] For the above reasons, the current mainstream N-type TOPCon technical route is the non-SE (uniform junction) solution, and the specific steps are as follows: Step 1, texturing; Step 2, boron diffusion; Step 3, high-temperature oxidation; Step 4, backside pickling to remove the oxide layer; Step 5, backside alkaline polishing; Step 6, tunneling SiO 2Growth, Step 7, i-PolySi growth / n-PolySi deposition, Step 8, high-temperature P diffusion / high-temperature annealing crystallization, Step 9, pickling to remove the front-side PSG around the diffusion, Step 10, alkali washing to remove the front-side polysilicon around the plating, Step 11, pickling to remove the BSG and PSG on the front and back sides, Step 12, preparation of alumina, Step 13, coating, Step 14, screen printing sintering and light injection, Step 15, laser-induced sintering.

[0005] As the production capacity of TOPCon cells in the market continues to expand, cell manufacturers need to further improve cell efficiency to increase market competitiveness. The uniform junction plus LIF solution needs to continue to increase the sheet resistance of the front junction region (300 ohm / sq) to improve the open-circuit voltage and short-circuit current. However, once the uniform junction sheet resistance reaches above 350 ohm / sq, the contact resistivity of its grid lines will rise to 4 mOhm╳cm 2 or higher, directly affecting the cell FF fill factor performance and unable to achieve the purpose of efficiency improvement. Summary of the Invention

[0006] The present invention provides a method for preparing an N-type TOPCon cell and a solar cell, which solves at least one problem of the prior art.

[0007] On the one hand, the present invention provides a method for preparing an N-type TOPCon cell, including the following steps: preparing a mask layer on the front side of an N-type silicon wafer; using a laser to remove the mask layer corresponding to the metal contact area, which is the maskless area, and the unremoved mask area is the mask protection area; performing boron doping on the front side of the silicon wafer, a heavily doped area is formed in the maskless area, and a lightly doped area or a non-doped area is formed in the mask protection area, wherein the surface concentration of the heavily doped area is not less than 7E+18 cm -3 , the junction depth of the heavily doped area is 0.2 - 1.2 μm, and the sheet resistance of the heavily doped area is 50 - 200 ohm / sq; the junction depth of the lightly doped area is 0.1 - 0.8 μm, and the sheet resistance of the lightly doped area is 200 - 1000 ohm / sq; preparing a back surface passivation contact structure; removing the mask layer outside the metal contact area;

[0008] preparing antireflection layers on the front and back sides; preparing electrodes; laser-induced sintering.

[0009] In a method for preparing an N-type TOPCon cell according to an embodiment, a mask layer is prepared on the front side of an N-type silicon wafer, and a silicon oxide mask layer is prepared by using a high-temperature thermal oxidation, wet oxidation, wet chemical oxidation or PECVD N 2 O oxidation method.

[0010] In a method for preparing an N-type TOPCon cell according to an embodiment, the thickness of the mask layer is 5 - 100 nm.

[0011] A preparation method of an N-type TOPCon battery according to an embodiment, which uses a laser to remove the mask layer corresponding to the metal contact area, where the laser wavelength is 300 - 600 nm and the laser energy density is 100 - 3000 mJ / cm 2 .

[0012] A preparation method of an N-type TOPCon battery according to an embodiment, which prepares a mask layer with a thickness of 5 - 60 nm on the front side of an N-type silicon wafer, uses a laser to remove the mask layer corresponding to the metal contact area, performs boron doping on the front side of the silicon wafer, a heavily doped region is formed in the maskless area, and a lightly doped region is formed in the mask-protected area.

[0013] A preparation method of an N-type TOPCon battery according to an embodiment, which prepares a mask layer with a thickness of 61 - 100 nm on the front side of an N-type silicon wafer, uses a laser to remove the mask layer corresponding to the heavily doped region, performs boron doping on the front side of the silicon wafer, a heavily doped region is formed in the maskless area, and a non-doped region is formed in the mask-protected area.

[0014] A preparation method of an N-type TOPCon battery according to an embodiment, where the surface concentration of the heavily doped region is not less than 1E+19 cm -3 .

[0015] A preparation method of an N-type TOPCon battery according to an embodiment, when performing laser-induced sintering, the bias voltage is 10 - 20 V, the laser power is 1 - 200 W, and the laser energy density is 0.01 - 1 J / cm 2 .

[0016] A preparation method of an N-type TOPCon battery according to an embodiment, which performs alkali cleaning after using a laser to remove the mask layer corresponding to the metal contact area. Among them, an alkali with a mass concentration of 1 - 20% is used to clean the damaged surface of the laser-opened film area to reduce the damage of the laser to the silicon wafer.

[0017] A preparation method of an N-type TOPCon battery according to an embodiment includes the following steps

[0018] S1 Cleaning and texturing the N-type silicon wafer

[0019] S2 Preparing a front-side silicon oxide mask layer

[0020] S3 Laser opening of the metal contact area

[0021] Using a laser beam to perform laser opening on the silicon wafer with a silicon oxide mask layer, the laser opening area corresponds to the metal contact area, using a laser to scan this area to remove the silicon oxide mask layer in this area, which is the maskless area, and the area where the mask is not removed is the mask-protected area

[0022] S4 Front-side boron diffusion

[0023] After laser film opening, the silicon wafer is sent into a diffusion furnace for boron diffusion. A heavily doped region is formed in the maskless area, while a lightly doped region or non-doped region is formed in the mask-protected area;

[0024] S5 Pickling to remove the back BSG layer;

[0025] Use HF acid to remove the back BSG layer;

[0026] S6 Backside alkaline polishing;

[0027] S7 Prepare a tunneling oxide layer on the backside;

[0028] S8 Prepare an n-PolySi or i-PolySi layer;

[0029] S9 High-temperature annealing crystallization or high-temperature phosphorus diffusion;

[0030] S10 Pickling to remove the front-side deposited PSG;

[0031] S11 Alkaline cleaning to remove the front-side deposited polysilicon;

[0032] S12 Pickling to remove the front-side borosilicate glass, silicon oxide mask layer, and the back-side phosphosilicate glass;

[0033] S13 Prepare a passivation layer on the front side;

[0034] S14 Prepare antireflection layers on the front and back sides;

[0035] S15 Perform front and back electrode printing, pre-sintering, and light injection;

[0036] S16 Laser-induced sintering.

[0037] A preparation method of an N-type TOPCon cell of an embodiment. After laser film opening in the metal contact region in step S3, alkaline cleaning is performed. Use an alkali with a concentration of 1-20% to clean and etch the damaged surface of the laser film opening region to reduce the damage of the laser to the silicon wafer.

[0038] On the other hand, the present invention provides an N-type TOPCon selective emitter solar cell prepared by the aforementioned method.

[0039] Through the above technical methods, the present application achieves the following technical effects.

[0040] Compared with the SE method of N-type TOPCon cells in the prior art, the preparation method of N-type TOPCon cells of the present invention realizes the independent control of the truly heavily doped region and lightly doped region through the introduction of an oxidation mask. The concentration of the lightly doped region can be achieved by controlling the thickness of the oxidation mask, and its doping concentration can be reduced to a lower level, optimizing the open-circuit voltage performance and improving the cell conversion efficiency. Moreover, the preparation method of N-type TOPCon cells of the present invention does not require laser doping but only needs to remove the oxidation mask layer by laser, and can use a laser with lower energy for opening film patterning, with less surface damage and reduced surface recombination.

[0041] Advantages over the existing uniform junction process: The present invention realizes the separate control of the heavily doped region and the lightly doped region. The heavily doped region matches a higher doping concentration and a shallower junction depth, and its electrode can achieve a lower contact resistivity. The lower doping concentration in the lightly doped region improves the passivation effect and the short-wave response of the internal quantum effect is better, enhancing the short-circuit current performance.

[0042] The preparation method of N-type TOPCon cells of the present invention, for the new LIF route, matches a higher concentration, shallower junction depth, and high sheet resistance, which can reduce surface recombination, enhance the passivation effect, improve the open-circuit voltage, and optimize the short-wave response of the internal quantum effect through a shallower junction to enhance the short-circuit current; while the heavily doped contact region matches the LIF method to obtain lower metal recombination and lower contact resistance, which can not only improve the open-circuit voltage but also balance the FF loss caused by the high sheet resistance in the lightly doped region.

[0043] The preparation method of N-type TOPCon cells of the present invention only needs to add a laser opening film device, reducing the equipment investment cost. By adjusting the process sequence of oxidation, laser, and diffusion, the SE heavily doped region emitter structure matching the new TOPCon LIF cell route can be prepared. Brief Description of the Drawings

[0044] In order to more clearly illustrate the technical methods in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0045] Figure 1 It is a schematic flow chart of the preparation method of N-type TOPCon cells according to an embodiment of the present invention;

[0046] Figure 2 It is a schematic structural diagram of a silicon wafer after preparing a silicon oxide mask layer according to an embodiment of the present invention;

[0047] Figure 3 It is a schematic structural diagram of a silicon wafer after laser opening film according to an embodiment of the present invention;

[0048] Figure 4 This is a schematic structural diagram of a silicon wafer after alkaline polishing on the back side in an embodiment of the present invention;

[0049] Figure 5 This is a schematic structural diagram of a silicon wafer after preparing a tunneling oxide layer and an n-PolySi layer in an embodiment of the present invention;

[0050] Figure 6 This is a schematic structural diagram of a silicon wafer after pickling to remove BSG on the front side and PSG on the back side in an embodiment of the present invention;

[0051] Figure 7 This is a schematic structural diagram of a solar cell prepared in an embodiment of the present invention;

[0052] Figure 8 This is an ECV curve graph of the lightly doped region of a solar cell prepared by the method of the present invention and the prior art;

[0053] Figure 9 This is an ECV curve graph of the heavily doped region of a solar cell prepared by the method of the present invention and the prior art;

[0054] Figure 10 This is a schematic structural diagram of a solar cell in another embodiment of the present invention.

[0055] In the figure, it includes 11, silicon substrate; 12, silicon oxide mask layer; 13A, heavily doped region; 13, lightly doped region; 14, tunneling oxide layer; 15, n-Poly Si layer; 16, aluminum oxide layer; 17, silicon nitride layer; 18, front electrode; 19, back electrode;

[0056] 21, silicon substrate; 23A, heavily doped region; 23, undoped region 24, tunneling oxide layer; 25, n-Poly Si layer; 26, aluminum oxide layer; 27, silicon nitride layer; 28, front electrode; 29, back electrode. Detailed implementation manners

[0057] To make the above objects, features and advantages of the present application more obvious and understandable, the following will make a detailed description of the specific implementation manners of the present application with reference to the accompanying drawings.

[0058] In the following description, many specific details are set forth in order to fully understand the present application. However, the present application can also be implemented in other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0059] In order to solve the problems existing in the prior art, on the one hand, the present invention provides a method for preparing an N-type TOPCon battery. Refer to Figure 1, is a process schematic diagram; a mask layer with a certain thickness is prepared on the front side of the N-type silicon wafer, and then, laser film opening is adopted. Specifically, the laser removes the mask layer corresponding to the metal contact area, and this area is the maskless area, while the mask layer in the remaining area is retained, and this area is the mask protection area. Then, boron diffusion doping is carried out. A heavily doped area is formed in the maskless area, while a lightly doped area or an undoped area is formed in the mask protection area. Then, the preparation of the back passivated contact structure is carried out, the mask layer outside the metal contact area is removed, and other conventional processes, such as the preparation of a passivation layer, an antireflection layer, electrodes, etc., are completed to prepare the solar cell wafer. The method of the present invention realizes independent separate control of the truly heavily doped area and the lightly doped or undoped passivated area.

[0060] Specifically, the mask layer can be a silicon oxide mask layer, and its thickness is 5 - 100 nm, or an intermediate value thereof, such as 5 - 10 nm, 10 - 20 nm, 20 - 25 nm, 25 - 30 nm, 35 - 40 nm, 40 - 45 nm, 50 - 55 nm, 55 - 60 nm, 61 - 70 nm, 70 - 80 nm, 80 - 100 nm, etc.

[0061] During laser film opening, the laser wavelength is 300 - 600 nm, the laser power is 20 - 500 W, the spot size is 50 - 150 μm, and the laser is pulsed or continuous laser.

[0062] The peak concentration of the heavily doped area is greater than 1E+19 cm -3 , for example, is 1 - 9E+19 cm -3 , or an intermediate value thereof, such as 1 - 2E+19 cm -3 、2 - 3E+19 cm -3 、3 - 4E+19 cm -3 、4 - 5E+19 cm -3 、5 - 7E+19 cm -3 、7 - 9E+19 cm -3 ; the surface concentration of the heavily doped area is not less than 7E+18 cm -3 , and even greater than 1E+19 cm -3 , for example, is 7 - 8E+18 cm -3 , or 8 - 9E+18 cm -3 , or greater than 1E+19 cm -3, the dot value or range value therein; the junction depth of the heavily doped region is 0.2 to 0.8 μm, or the intermediate value thereof, such as 0.2 to 0.4 μm, 0.4 to 0.6 μm, 0.6 to 0.8 μm; the sheet resistance of the heavily doped region is 50 to 200 ohm / sq, or the intermediate value thereof, such as 50 to 80 ohm / sq, 80 to 100 ohm / sq, 100 to 120 ohm / sq, 120 to 150 ohm / sq, 150 to 200 ohm / sq; the peak concentration and surface concentration of the lightly doped region can be controlled by the thickness of the oxidation mask layer. For example, the peak concentration is 1 to 8E+18 cm -3 , or the intermediate value thereof, such as 1 to 2E+18 cm -3 , 2 to 3E+18 cm -3 , 3 to 5E+18 cm -3 ; the surface doping concentration of the lightly doped region is 5E+17 cm -3 ~5E+18 cm -3 ; the junction depth of the lightly doped region is 0 to 0.8 μm, or the intermediate value thereof, such as 0 to 0.2 μm, 0.2 to 0.4 μm, 0.4 to 0.6 μm; the sheet resistance of the lightly doped region is 200 to 1000 ohm / sq, or the intermediate value thereof, such as 200 to 250 ohm / sq, 250 to 300 ohm / sq, 300 to 400 ohm / sq, 400 to 1000 ohm / sq.

[0063] Furthermore, the present invention further includes the step of laser-induced sintering of the N-type TOPCon cell.

[0064] The following are specific embodiments.

[0065] Embodiment 1

[0066] This embodiment provides a new preparation method for an N-type TOPCon cell, including the following steps:

[0067] S1 Cleaning and texturing

[0068] In this step, the N-type silicon wafer is cleaned to prepare a textured surface.

[0069] S2 Preparation of the front mask layer

[0070] The textured silicon wafer is sent into an oxidation furnace to prepare a silicon oxide mask layer 12 on the front of the silicon substrate 11. Specifically, a silicon oxide mask layer with a thickness of 5 to 60 nm is prepared. See Figure 2 , which is a schematic structural diagram of the silicon wafer after preparing the silicon oxide mask layer in this embodiment.

[0071] Among them, the oxidation method can adopt high-temperature thermal oxidation, wet oxidation, wet chemical oxidation or PECVD to pass N 2Oxidation, etc. For the high-temperature thermal oxidation method, the temperature is 950 - 1100 °C, and the oxidation time is 120 - 150 minutes. The thickness of the oxide film can be controlled by adjusting the oxidation time.

[0072] S3 Laser opening of the metal contact area

[0073] Use a laser to open the film on a silicon wafer with a silicon oxide mask layer. Specifically, the laser opening area corresponds to the metal contact area. Use a laser to scan this area to remove the silicon oxide mask layer in this area. This area is called the maskless area, and the remaining areas where the mask is not removed are called the mask protection areas.

[0074] See Figure 3 , which is a schematic diagram of the structure of the silicon wafer after laser opening of the film.

[0075] In this step, a laser is used to remove the silicon oxide mask layer corresponding to the metal contact area without the need for doping.

[0076] Specifically, in this step, the laser wavelength is 300 - 600 nm, the laser power is 1 - 50 W, the spot size is 50 - 150 μm, and the laser energy density is 100 - 3000 mJ / cm 2 . The laser can be a pulsed laser or a continuous laser.

[0077] After S4 laser opening of the film, an alkali cleaning step can be added as needed. The silicon wafer is soaked and cleaned with a low-concentration (1 - 20% mass concentration) alkali to clean and etch the damaged surface of the laser opening area to reduce the damage to the silicon wafer by the laser.

[0078] S5 Front-side boron diffusion

[0079] Send the silicon wafer after laser opening of the film into a diffusion furnace for boron diffusion. In this embodiment, after diffusion, the front side of the silicon wafer includes two regions, a lightly doped region 13 and a heavily doped region 13A. Specifically, the region covered with the silicon oxide mask layer forms the lightly doped region 13, and the region without the silicon oxide mask layer (laser opening area) forms the heavily doped region 13A. In this step, the silicon substrate 11 of the heavily doped region 13A has no mask protection, and the boron source diffuses directly to the silicon substrate 11 faster, and high-temperature push sintering at 900 - 1000 °C forms BSG; due to the relatively thick silicon oxide mask layer 12 in the lightly doped region 13, the diffusion of boron is blocked, and the segregation coefficient m of boron > 1, so it is easier to diffuse into the silicon oxide mask layer 12. Most of the boron remains in the silicon oxide mask layer 12 to form BSG, and only a small part diffuses to the surface of the silicon substrate 11, thus forming the lightly doped region 13.

[0080] S6 Pickling to remove the BSG layer on the back side;

[0081] In this step, HF acid is used to remove the back BSG layer. The specific process is that the silicon wafer enters a chain acid pickling equipment for back immersion pickling to remove the back BSG layer.

[0082] S7 Backside alkaline polishing;

[0083] In this step, alkaline is used for backside polishing. The specific process is that the silicon wafer enters a tank-type alkaline polishing equipment. With the front side of the silicon wafer protected by BSG, the backside is polished with alkaline solution.

[0084] See Figure 4 , which is a schematic structural diagram of the silicon wafer after backside alkaline polishing.

[0085] S8 Preparation of tunneling oxide layer;

[0086] In this step, for the LPCVD route, oxygen is introduced into the LPCVD furnace tube to grow a 1 - 10 nm SiO 2 tunneling oxide layer at 800 - 900 °C. For the PECVD route, a 1 - 10 nm tunneling oxide layer 14 is deposited by directly introducing nitrous oxide for oxidation in the PECVD furnace tube.

[0087] S9 Preparation of n-PolySi or i-PolySi layer;

[0088] In this step, for the PECVD route, SiH 4 +PH 3 +H 2 is introduced into the PECVD furnace tube to deposit an n-PolySi layer 15. Or for the preparation of an i-PolySi layer, SiH 4 is introduced into the LPCVD furnace tube for i-PolySi growth.

[0089] S10 High-temperature annealing crystallization or high-temperature phosphorus diffusion;

[0090] In this step, for the LPCVD route, POCl 3 is introduced into the phosphorus diffusion furnace tube for n-PolySi growth. For the PECVD route, high-temperature furnace tube is used for annealing crystallization. In this step, the annealing crystallization temperature is 850 - 950 °C and the time is 30 - 90 minutes.

[0091] See Figure 5 , which is a schematic structural diagram of the silicon wafer after the preparation of the tunneling oxide layer and the n-PolySi layer.

[0092] S11 Acid pickling to remove the front-side diffused PSG (phosphosilicate glass);

[0093] In this step, HF acid is used to remove the front-side diffused PSG. The specific process is that the silicon wafer enters a chain acid pickling equipment for front-side pickling to remove the front-side diffused PSG.

[0094] S12 Alkaline cleaning to remove the polysilicon around the front side

[0095] In this step, the alkaline concentration for removing the polysilicon around the front side is relatively low, and a certain thickness of BSG is also formed during boron diffusion, which is thick enough to resist the alkaline corrosion here.

[0096] S13 Acid cleaning to remove the BSG (borosilicate glass), silicon oxide mask layer on the front side and the PSG (phosphosilicate glass) on the back side

[0097] In this step, HF acid is used to remove the BSG on the front side, the silicon oxide mask layer and the PSG on the back side. The specific process is that the silicon wafer enters the tank-type acid cleaning equipment for acid cleaning to remove the BSG on the front side, the silicon oxide mask layer and the PSG on the back side. See Figure 6 。

[0098] The silicon oxide mask layer here is S3, which is not removed by laser opening and is the remaining silicon oxide mask layer.

[0099] S14 Prepare the passivation layer on the front side;

[0100] In this step, an ALD device is used to deposit aluminum oxide on the front side to form the aluminum oxide layer 16.

[0101] S15 Prepare the antireflection layers on the front and back sides.

[0102] Specifically, silicon nitride films are deposited on the front and back sides to form the silicon nitride layer 17; in this step, SiH is introduced into the PECVD furnace tube 4 +NH 3 to deposit the silicon nitride layer 17 on the front and back sides.

[0103] S16 Perform electrode printing, sintering and light injection on the front and back sides;

[0104] In this step, a screen printing device, a screen plate and a paste are used for electrode printing, and sintering and light injection are completed through a sintering and light injection device. Among them, printing can also be carried out by electroplating or laser transfer printing and other methods. The front electrode 18 and the back electrode 19 are formed.

[0105] S17 Laser-induced sintering (LIF).

[0106] In this step, the solar cell is completed through laser scanning and biasing voltage treatment by a laser-induced sintering (LIF) device.

[0107] Specifically, in this step, the biasing voltage is 10 - 20V, preferably 15 - 20V, the laser power is 1 - 200W, preferably 45 - 100W, the laser energy density is 0.01 - 1 J / cm 2 , and the laser scanning speed is not greater than 70000 mm / s.

[0108] Figure 7 Schematic diagram of the structure of the solar cell wafer prepared in this embodiment.

[0109] In this embodiment, the thickness of the oxide film is 5 - 60 nm, or the intermediate value thereof. For example, preferably 5 - 10 nm, 10 - 20 nm, 20 - 25 nm, 25 - 30 nm, 30 - 35 nm, 35 - 40 nm, 40 - 45 nm, 45 - 50 nm, 50 - 55 nm, 55 - 60 nm, etc. Among them, preferably, the thickness of the oxide film is 5 - 10 nm, 10 - 15 nm, 15 - 20 nm, 20 - 25 nm, 25 - 30 nm, 30 - 35 nm, 35 - 40 nm, 40 - 45 nm.

[0110] In S3, the peak concentration of the heavily doped region is 1 - 5E+19 cm -3 , or the intermediate value thereof, such as 1 - 2E+19 cm -3 , 2 - 3E+19 cm -3 , 3 - 4E+19 cm -3 , 4 - 5E+19 cm -3 , 5 - 7E+19 cm -3 , 7 - 9E+19 cm -3 ; the junction depth of the heavily doped region is 0.2 - 1.2 μm, or the intermediate value thereof, such as 0.2 - 0.3 μm, 0.3 - 0.4 μm, 0.4 - 0.5 μm, 0.5 - 0.6 μm, 0.6 - 0.7 μm, 0.7 - 0.8 μm, 0.8 - 1.0 μm; 1.0 - 1.2 μm, etc., and the sheet resistance of the heavily doped region is 50 - 200 ohm / sq, or the intermediate value thereof, such as 50 - 60 ohm / sq, 60 - 70 ohm / sq, 70 - 80 ohm / sq, 80 - 90 ohm / sq, 90 - 100 ohm / sq, 100 - 110 ohm / sq, 110 - 120 ohm / sq, 120 - 140 ohm / sq, 140 - 160 ohm / sq, 160 - 200 ohm / sq; the peak concentration of the lightly doped region is 1 - 8E+18 cm -3 , or the intermediate value thereof, such as 1 - 2E+18 cm -3 , 2 - 3E+18 cm -3 , 3 - 4E+18 cm -3 , 4 - 5E+18 cm -3 ; the surface concentration of the heavily doped region is 7 - 9E+18 cm -3 , for example, 7 - 8E+18 cm -3 , or 8 - 9E+18 cm -3 , the point value or range value among them; the surface concentration of the lightly doped region is 5E+17 cm-3 ~5E+18 cm -3 The junction depth of the lightly doped region is 0.1 - 0.8 μm, or an intermediate value thereof, such as 0 - 0.1 μm, 0.1 - 0.2 μm, 0.2 - 0.4 μm, 0.4 - 0.5 μm, 0.5 - 0.6 μm; the sheet resistance of the lightly doped region is 200 - 1000 ohm / sq, or an intermediate value thereof, such as 200 - 250 ohm / sq, 250 - 300 ohm / sq, 300 - 350 ohm / sq, 350 - 400 ohm / sq, 400 - 450 ohm / sq, 450 - 500 ohm / sq, 500 - 600 ohm / sq, 600 - 700 ohm / sq, 700 - 800 ohm / sq, 800 - 900 ohm / sq, 900 - 1000 ohm / sq.

[0111] See Figure 8 and Figure 9 , which are the ECV curves (electrochemical capacitance - voltage method test curves) of the lightly doped region and the heavily doped region of the solar cells prepared by the method of the present invention and the prior art method, respectively. See Figure 8 , in the ECV curve graph of the lightly doped region, the solid curve and the dashed curve are the ECV curves of the lightly doped region of the solar cells prepared by the method of the present invention and the prior art method respectively. The peak concentration of the present invention: 3.18E+18 cm -3 , junction depth 0.52 μm, the peak concentration of the prior art: 5.29E+18 cm -3 , junction depth 0.9 μm. The junction depth of the present invention is shortened by more than 1 / 2, and the concentration of the lightly doped region is effectively reduced.

[0112] See Figure 9 , in the ECV curve graph of the opened - film heavily doped region, the solid curve and the dashed curve are the ECV curves of the opened - film heavily doped region of the solar cells prepared by the method of the present invention and the prior art method respectively. The peak concentration of the present invention: 2.42E+19 cm -3 , junction depth 1.19 μm, the peak concentration of the prior art: 8.92E+18 cm -3 , junction depth 1.6 μm. Compared with the prior art, the present invention has a higher concentration and a shallower junction depth.

[0113] By the above - mentioned method, after laser opening the film in the present invention, the reflectivity of the laser - opened - film region increases by ≤1%, and the velvet - surface pyramid structure is hardly damaged.

[0114] The passivation J0 of the laser - opened - film region increases by ≤5 fA / cm compared with the non - laser region 2 , and the decrease amplitude of IVoc is ≤5 mV.

[0115] The contact resistivity of the laser - opened - film region is ≤1 mohm×cm2 , in contact with a uniform junction (300 Ohm / sq), the contact resistivity is 3 mOhm×cm 2 , a decrease of 2 mOhm×cm compared to 2 , and the metal J0 ≤ 100 fA / cm2, and the fill factor FF increases by ≥ 0.3%.

[0116] Compared with the uniform junction, the terminal efficiency of the selective emitter cell of the present invention is increased by ≥ 0.2%, the open-circuit voltage is increased by ≥ 3 mV, and the fill factor FF is increased by ≥ 0.3%.

[0117] On the other hand, the present invention also provides a solar cell prepared by the above method, see Figure 7 .

[0118] Example 2

[0119] This example provides a new preparation method for an N-type TOPCon cell, including the following steps:

[0120] S1 Cleaning and texturing

[0121] In this step, the N-type silicon wafer is cleaned to prepare a textured surface.

[0122] S2 Preparation of the front mask layer

[0123] The textured silicon wafer is sent into an oxidation furnace to prepare a silicon oxide mask layer on the front of the silicon substrate 21, and a silicon oxide mask layer with a thickness of 61 - 100 nm is prepared. The oxidation method can be high-temperature thermal oxidation, wet oxidation, wet chemical oxidation, or PECVD with N 2 O oxidation, etc. For the high-temperature thermal oxidation method, the temperature is 950 - 1100 °C, and the oxidation time is 120 - 150 minutes. The thickness of the silicon oxide mask layer can be controlled by adjusting the oxidation time.

[0124] S3 Laser opening of the metal contact area

[0125] Use a laser to perform laser opening on the silicon wafer with a silicon oxide mask layer. Specifically, the laser opening area corresponds to the metal contact area, and the laser is used to scan this area to remove the silicon oxide mask layer in this area. This area is called the maskless area, and the remaining areas where the mask is not removed are called the mask protection areas.

[0126] In this step, the silicon oxide mask layer corresponding to the metal contact area is removed by laser without the need for doping.

[0127] Specifically, in this step, the laser wavelength is 300 - 600 nm, the laser power is 1 - 50 W, the spot size is 50 - 150 μm, and the laser energy density is 100 - 3000 mJ / cm 2 . The laser can be a pulsed laser or a continuous laser.

[0128] After the S4 laser film opening, an additional alkali cleaning step can be added as needed. The silicon wafer is soaked and cleaned with alkali at a low concentration (1-20% mass concentration) to clean and etch the damaged surface of the laser film opening area, reducing the damage of the laser to the silicon wafer.

[0129] S5 Front boron diffusion

[0130] The silicon wafer after laser film opening is sent into a diffusion furnace for boron diffusion. In this embodiment, after diffusion, the front of the silicon wafer includes two regions, an undoped region 23 and a heavily doped region 23A. Specifically, the region covered by the silicon oxide mask layer forms the undoped region 23, and the region without the silicon oxide mask layer (laser film opening area) forms the heavily doped region 23A. In this step, the heavily doped region 23A has no mask protection, and the boron source diffuses directly to the silicon substrate faster; due to the setting of a silicon oxide mask layer with sufficient thickness in the undoped region 23, the diffusion of boron to the surface of the silicon substrate is blocked, forming the undoped region 23.

[0131] S6 Pickling to remove the back BSG layer

[0132] In this step, HF acid is used to remove the back BSG layer. The specific process is that the silicon wafer enters a chain pickling equipment for back immersion pickling to remove the back BSG layer.

[0133] S7 Back alkali polishing

[0134] In this step, alkali is used for back polishing. The specific process is that the silicon wafer enters a tank-type alkali polishing equipment, and the front of the silicon wafer is protected by BSG, and the back is polished with an alkali solution.

[0135] S8 Preparation of tunneling oxide layer

[0136] In this step, for the LPCVD route, oxygen is introduced into the LPCVD furnace tube to grow the tunneling oxide layer of 1-10 nm SiO at 800-900 °C. 2 For the PECVD route, the tunneling oxide layer of 1-10 nm is deposited by directly introducing nitrous oxide for oxidation in the PECVD furnace tube.

[0137] S9 Preparation of n-PolySi layer or i-PolySi layer

[0138] In this step, for the PECVD route, SiH is introduced into the PECVD furnace tube. 4 +PH 3 +H 2 to deposit the n-PolySi layer 25. Or to prepare the i-PolySi layer, for the LPCVD route, SiH is introduced into the LPCVD furnace tube. 4 for i-PolySi growth.

[0139] S10 High-temperature annealing crystallization or high-temperature phosphorus diffusion

[0140] In this step, in the LPCVD route, POCl is introduced into the phosphorus diffusion furnace tube 3 for n-PolySi growth, and in the PECVD route, high-temperature furnace tubes are used for annealing crystallization

[0141] In this step, the annealing crystallization temperature is 850 - 950 °C and the time is 30 - 90 minutes

[0142] S11 Pickling to remove the PSG (phosphosilicate glass) around the front side diffusion

[0143] In this step, HF acid is used to remove the PSG around the front side diffusion. The specific process is that the silicon wafer enters the chain pickling equipment for front side pickling to remove the PSG around the front side diffusion

[0144] S12 Alkaline cleaning to remove the polysilicon deposited around the front side

[0145] In this step, the alkali concentration for removing the polysilicon deposited around the front side is relatively low, and a certain thickness of BSG is also formed during boron diffusion, and this thickness is sufficient to resist the alkali corrosion here

[0146] S13 Pickling to remove the BSG (borosilicate glass) on the front side, the silicon oxide mask layer, and the PSG (phosphosilicate glass) on the back side

[0147] In this step, HF acid is used to remove the BSG on the front side, the silicon oxide mask layer, and the PSG on the back side. The specific process is that the silicon wafer enters the tank pickling equipment for pickling to remove the BSG on the front side, the silicon oxide mask layer, and the PSG on the back side

[0148] The silicon oxide mask layer here is the one in S3 that was not removed by laser opening and is the remaining silicon oxide mask layer

[0149] S14 Prepare the passivation layer on the front side

[0150] In this step, an ALD device is used to deposit aluminum oxide on the front side to form the aluminum oxide layer 26

[0151] S15 Prepare the antireflection layers on the front and back sides

[0152] Specifically, silicon nitride films are deposited on the front and back sides to form the silicon nitride layer 27. In this step, SiH is introduced into the PECVD furnace tube 4 +NH 3 to deposit the silicon nitride films on the front and back sides

[0153] S16 Perform front and back side electrode printing, sintering, and light injection

[0154] In this step, screen printing equipment, a screen plate, and a slurry are used for electrode printing, and sintering and light injection are completed through a sintering and light injection device. Among them, printing can also be performed by electroplating or laser transfer printing. The front electrode 28 and the back electrode 29 are formed.

[0155] S17 Laser-induced sintering (LIF).

[0156] In this step, the solar cell is prepared by laser scanning and applying a bias voltage through a laser-induced sintering (LIF) device. Specifically, in this step, the bias voltage is 10 - 20V, preferably 15 - 20V, the laser power is 1 - 200W, preferably 45 - 100W, the laser energy density is 0.01 - 1 J / cm 2 , and the laser scanning speed is not greater than 70000 mm / s.

[0157] In S2, the thickness of the silicon oxide mask layer is 61 - 100 nm, or an intermediate value thereof, such as 61 - 70 nm, 70 - 80 nm, 80 - 100 nm, etc. When laser opening the film, the laser wavelength is 300 - 600 nm, the laser power is 1 - 500W, the spot size is 50 - 150 μm, and the laser is pulsed or continuous laser.

[0158] In S3, the peak concentration of the heavily doped region is 1 - 9E+19 cm -3 , or an intermediate value thereof, such as 1 - 2E+19 cm -3 , 2 - 3E+19 cm -3 , 3 - 4E+19 cm -3 , 4 - 5E+19 cm -3 , 5 - 7E+19 cm -3 , 7 - 9E+19 cm -3 ; the surface concentration of the heavily doped region is not less than 7E+18 cm -3 , and even greater than 1E+19 cm, for example, it is 7 - 8E+18 cm -3 , or 8 - 9E+18 cm -3, wherein the dot value or range value; the junction depth of the heavily doped region is 0.2 to 1.2 μm, or the intermediate value thereof, such as 0.2 to 0.3 μm, 0.3 to 0.4 μm, 0.4 to 0.5 μm, 0.5 to 0.6 μm, 0.6 to 0.7 μm, 0.7 to 0.8 μm, 0.8 to 1.0 μm, 1.0 to 2.0 μm, etc.; the sheet resistance of the heavily doped region is 50 to 200 ohm / sq, or the intermediate value thereof, such as 50 to 60 ohm / sq, 60 to 70 ohm / sq, 70 to 80 ohm / sq, 80 to 90 ohm / sq, 90 to 100 ohm / sq, 100 to 110 ohm / sq, 110 to 120 ohm / sq, 120 to 140 ohm / sq, 140 to 160 ohm / sq, 160 to 200 ohm / sq; in this embodiment, the non-doped region is blocked by a relatively thick silicon oxide mask layer and is not doped, and its sheet resistance is the sheet resistance of the silicon substrate.

[0159] On the other hand, the present invention provides a solar cell prepared by the above method. Refer to Figure 10 .

[0160] The above is only the preferred embodiment of the present application. Although the present application has been disclosed above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make many possible changes and modifications to the technical method of the present application by using the methods and technical contents disclosed above, or modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the technical method of the present application still fall within the scope of the technical method protection of the present application.

Claims

1. A method for preparing an N-type TOPCon battery, characterized in that: The following steps are included: Preparing a mask layer on the front side of an N-type silicon wafer; The mask layer corresponding to the metal contact area is removed by laser to form a mask-free area, and the area where the mask is not removed is a mask protection area; Boron is doped on the front side of the silicon wafer. The mask-free area forms a heavily doped area, and the mask-protected area forms a lightly doped area or a non-doped area. The surface concentration of the heavily doped area is not less than 7E+18cm -3 , the peak doping concentration in the heavily doped region is greater than 2E+19cm -3 , the junction depth of the heavily doped region is 0.2-0.8 μm, and the square resistance of the heavily doped region is 50-200 ohm / sq; the junction depth of the lightly doped region is 0.1-0.8 μm, and the square resistance of the lightly doped region is 200-1000 ohm / sq; preparing a back-side passivation contact structure; removing the mask layer outside the metal contact area; Preparing front and back anti-reflection layers; preparing electrodes; Laser Induced Sintering.

2. The method for preparing an N-type TOPCon battery according to claim 1, characterized in that: A mask layer is prepared on the front side of the N-type silicon wafer, and the oxidation mask layer is prepared by adopting a high-temperature thermal oxidation, wet oxygen oxidation, wet oxidation or PECVD through N2O oxidation method.

3. The method for preparing an N-type TOPCon battery according to claim 1 or 2, characterized in that: The thickness of the mask layer is 5-100 nm.

4. The method for preparing an N-type TOPCon battery according to claim 3, characterized in that: The mask layer corresponding to the metal electrode position is removed by laser, wherein the laser wavelength is 300-600nm and the laser energy density is 100-3000mJ / cm 2 .

5. The method for preparing an N-type TOPCon battery according to claim 4, characterized in that: A 5-60nm mask layer is prepared on the front side of the N-type silicon wafer. The mask layer corresponding to the metal contact area is removed by laser. Boron is diffused on the front side of the silicon wafer. The mask-free area forms a heavily doped area, and the mask-protected area forms a lightly doped area.

6. The method for preparing an N-type TOPCon battery according to claim 4, characterized in that: A mask layer of 61 to 100 nm is prepared on the front side of an N-type silicon wafer. The mask layer corresponding to the metal contact area is removed by laser. The front side of the silicon wafer is doped with boron. The mask-free area forms a heavily doped area, and the mask-protected area forms a non-doped area.

7. The method for preparing an N-type TOPCon battery according to claim 4, characterized in that: The surface concentration of the heavily doped area is not less than 1E+19cm -3 .

8. The method for preparing an N-type TOPCon battery according to claim 1, characterized in that: During laser induced sintering, the bias voltage is 10-20V, the laser power is 1-200W, and the laser energy density is 0.01-1J / cm 2 .

9. The method for preparing an N-type TOPCon battery according to claim 1, characterized in that: The mask layer corresponding to the metal contact area is removed by laser and then cleaned with alkali, wherein the surface of the laser-opened area is cleaned and etched with alkali having a mass concentration of 1 to 20%, thereby reducing the damage of the laser to the silicon wafer.

10. The method for preparing an N-type TOPCon battery according to any one of claims 1 to 9, characterized in that: The following steps are included: S1 N-type silicon wafer cleaning and texturing; S2 prepares a front silicon oxide mask layer; S3 laser film cutting in metal contact area A laser beam is used to laser open a silicon wafer having a silicon oxide mask layer. The laser opening area corresponds to the metal contact area. The laser is used to scan the area to remove the silicon oxide mask layer in the area, which is a mask-free area. The area where the mask is not removed is a mask protection area. S4 front side boron expansion; The laser-opened silicon wafer is sent to a diffusion furnace for boron diffusion. The area corresponding to the laser-opened film forms a heavily doped area, and the remaining area forms a lightly doped area or a non-doped area. S5 pickling to remove the back BSG layer; Use HF acid to remove the back BSG layer; S6 back side alkaline polishing; A tunnel oxide layer is prepared on the back side of S7; S8: preparing an n-PolySi layer or an i-PolySi layer; S9 high temperature annealing crystallization or high temperature phosphorus diffusion; S10 pickling to remove the PSG plated on the front side; S11 alkali washing to remove the polysilicon coated on the front side; S12 pickling to remove the borosilicate glass and silicon oxide mask layer on the front side and the phosphosilicate glass on the back side; S13 prepares a passivation layer on the front side; S14 prepares front and back anti-reflection layers; S15 performs front and back electrode printing, pre-sintering and light injection; S16 Laser Induced Sintering.

11. The method for preparing an N-type TOPCon battery according to claim 10, characterized in that: The following steps are included: After the metal contact area is laser-opened in step S3, alkali cleaning is performed, using 1-20% alkali to clean the surface of the laser-opened area to reduce laser damage to the silicon wafer.

12. An N-type TOPCon solar cell, characterized in that: The N-type TOPCon battery is prepared by the preparation method of any one of claims 1 to 11.

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