A four-core four-mode millimeter wave voltage-controlled oscillator based on double-path coupled inductors
By using a quad-core, quad-mode millimeter-wave voltage-controlled oscillator based on dual-coupling inductors, ultra-wideband tuning of the oscillator is achieved using quad-mode inductors and mode switching circuits. This solves the problems of limitations in capacitor tuning and difficulty in balancing phase noise performance in existing technologies, and achieves frequency range expansion and noise performance optimization.
Patent Information
- Application Number
- CN202410336661.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-22
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2044-03-22
AI Technical Summary
Existing oscillators struggle to achieve ultra-wideband tuning in the millimeter-wave band, capacitor tuning has significant limitations, and existing quad-core quad-mode voltage-controlled oscillators are difficult to balance between phase noise performance and inductor structural complexity.
Design a quad-core, quad-mode millimeter-wave voltage-controlled oscillator based on dual-channel coupled inductors. It adopts four-mode inductors and four voltage-controlled oscillator cores, and realizes free switching of four operating modes through a mode switching circuit. It uses NMOS transistors to provide negative resistance, a switched capacitor array for frequency tuning, and a tail current source array to control the oscillation conditions.
It achieves ultra-wideband continuous tuning of the oscillator in four modes, reduces the capacitor tuning pressure, maintains low phase noise performance, and saves chip area.
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Figure CN118300535B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the field of millimeter wave front-end circuits in electronic communication technology, and particularly relates to a four-core four-mode millimeter wave voltage-controlled oscillator based on a double-path coupled inductor. BACKGROUND
[0002] With the rapid development of modern wireless communication, the amount of data transmitted is increasing day by day, and there are higher requirements for communication rate and channel bandwidth, resulting in that the commonly used meter wave and centimeter wave spectrum in communication can no longer meet the demand. The millimeter wave frequency band has great potential in high data rate communication due to its rich spectrum resources, high bandwidth and high precision, and therefore countries around the world not only develop the Sub-6G frequency band, but also deploy multiple millimeter wave development frequency bands, mainly distributed in the 24GHz, 26GHz, 28GHz, 37GHz and 39GHz frequency bands. In order to realize full coverage of the above-mentioned millimeter wave frequency bands, compared with the method of covering by using multiple frequency sources, directly designing a super-bandwidth frequency source can greatly reduce the complexity of the system and improve the reconfigurability of the system. As a key module of the frequency source, the frequency tuning range of the oscillator directly determines the working bandwidth of the frequency source, and the phase noise determines whether high QAM modulation and EVM are supported.
[0003] In the prior art, common structures of oscillators include LC oscillators, ring oscillators, Colpitts oscillators and the like. Among them, the LC oscillator has become the mainstream structure used by the industry due to its excellent phase noise performance, but the inductor contained in the LC oscillator occupies a large area. The resonant cavity of the traditional LC oscillator only contains one mode, and frequency tuning can only be performed by changing the capacitance. With the increase of the tuning range, the Q value of the capacitance array will be greatly reduced, thereby affecting the performance of the voltage-controlled oscillator, especially in the millimeter wave frequency band, the limitation of using capacitance tuning is greater, because the Q value of the varactor and the switched capacitance array in the millimeter wave frequency band is even lower than the inductance Q value, and it is more difficult to realize wideband tuning. In order to realize a super-bandwidth voltage-controlled oscillator, a multi-core multi-mode type voltage-controlled oscillator appears. At this time, the resonant cavity contains not only one mode, but also a mode switching switch to clamp the resonant cavity port signal, so that the resonant cavity port signal can be freely switched between different resonant modes, thereby enabling the voltage-controlled oscillator to work at the frequency corresponding to different modes. In each mode, the frequency tuning is performed in the mode using the capacitance tuning method. This method not only realizes super-bandwidth tuning, but also greatly reduces the pressure of using capacitance tuning, while maintaining a relatively low phase noise performance.
[0004] In the prior art, there are documents that use odd and even mode excitation to change the current path through the inductor, obtain two different equivalent inductance values, and realize dual-mode switching, but there is no frequency overlap between the two modes, so it is not possible to realize continuous frequency modulation within a wide band (A Ka-Band Dual-Band Digitally Controlled Oscillator With-195.1-dBc / Hz FoM T Based on a Compact High-Q Dual-Path Phase-SwitchedInductor). There are documents that use electromagnetic mixed coupling to construct a four-core four-mode voltage-controlled oscillator, which covers an octave while maintaining good phase noise performance, but the electric coupling introduces a fixed capacitance, limiting the range of capacitance tuning (A 2-D Mode-Switching Quad-Core Oscillator Using E-M Mixed-CouplingResonance Boosting). The third prior art constructs a four-core four-mode voltage-controlled oscillator through magnetic coupling, with a tuning range of 90.2%, but the overall phase noise performance is poor, and the inductor structure is complex, making it impossible to achieve high frequency (AWideband Mode-Switching Quad-Core VCO Using Compact Multi-Mode MagneticallyCoupled LC Network). SUMMARY
[0005] To at least partially solve one of the problems existing in the prior art, the purpose of the present application is to provide a four-core four-mode millimeter wave voltage-controlled oscillator based on a dual-path coupled inductor. The oscillator contains four arbitrarily switched operating modes, and there is a certain frequency overlap between adjacent modes to ensure the continuity of the overall frequency band. The realization of the four modes of the oscillator is mainly based on a four-mode inductor with dual-path coupling. This inductor model has a simple structure and a small size when implementing the four modes, saving chip area.
[0006] The purpose of the present application is achieved at least by one of the following technical solutions.
[0007] A four-core four-mode millimeter wave voltage-controlled oscillator based on a dual-path coupled inductor, comprising a four-mode inductor, four voltage-controlled oscillator cores, and four mode switching circuits;
[0008] The four-mode inductor is an eight-terminal model, and the eight ports are P1-P8, wherein P1 and P2, P3 and P4, P5 and P6, and P7 and P8 respectively form four differential ports of the four-mode inductor;
[0009] The four voltage-controlled oscillator cores are a first core 1, a second core 2, a third core 3 and a fourth core 4, the first core 1 is connected to a first differential port P1P2 of the four-mode inductor, the second core 2 is connected to a second differential port P3P4 of the four-mode inductor
[0010] The third core 3 is connected to a third differential port P5P6 of the four-mode inductor, and the fourth core 4 is connected to a fourth differential port P7P8 of the four-mode inductor. The internal devices and parameters of the four voltage-controlled oscillator cores are consistent.
[0011] The four mode switching circuits are a first mode switching circuit SW1, a second mode switching circuit SW2, a third mode switching circuit SW3 and a fourth mode switching circuit SW4. The first mode switching circuit SW1 is connected to the first core 1 and the second core 2, the second mode switching circuit SW2 is connected to the first core 1 and the third core 3, the third mode switching circuit SW3 is connected to the third core 3 and the fourth core 4, and the fourth mode switching circuit SW4 is connected to the fourth core 4 and the second core 2.
[0012] The four-core four-mode millimeter wave voltage-controlled oscillator includes multiple working modes, and a switch signal is arranged in each of the four mode switching circuits. The conversion between the multiple working modes is realized by the high and low level switching of the switch signal.
[0013] Further, the four-mode inductor is composed of ten inductors L1-L 10 , wherein the same name ends of the first inductor L1 and the third inductor L3 are connected at point A, and the different name ends are respectively used as P1 end and P3 end; the same name ends of the second inductor L2 and the fourth inductor L4 are connected at point B, and the different name ends are respectively used as P2 end and P4 end; the same name ends of the fifth inductor L5 and the seventh inductor L7 are connected at point C, and the different name ends are respectively used as P5 end and P7 end; the same name ends of the sixth inductor L6 and the eighth inductor L8 are connected at point D, and the different name ends are respectively used as P6 end and P8 end; the same name ends of the ninth inductor L9 and the tenth inductor L 10 are respectively connected at points A and C, and the different name ends are respectively connected at points B and D; the coupling coefficient between L3 and L7 is K1; the coupling coefficient between L1 and L5 is K2; the coupling coefficient between L2 and L6 is K3; the coupling coefficient between L4 and L8 is K4; and the coupling coefficient between L9 and L 10 is K5.
[0014] Further, the coupling coefficients K1=K2=K3=K4.
[0015] Further, the first core 1 includes a first switched capacitor array C A1 , a first varactor C V1 , a second varactor C V2, a first NMOS transistor M1, a second NMOS transistor M2 and a first tail current source array M T1 ;
[0016] C A1 is connected at one end to P1 and at the other end to P2; a first varactor C V1 is connected at one end to P1 and at the other end to a second varactor C V2 ; the second varactor C V2 is connected at one end to P2 and at the other end to the first varactor C V1 ; the drain of M1 and the gate of M2 are connected to P1, the drain of M2 and the gate of M1 are connected to P2, and the sources of M1 and M2 are connected to the drain of a first tail current source array M T1 ; the sources of the first tail current source array M T1 are grounded, and the gates are connected to a control voltage;
[0017] The second core 2 comprises a second switched capacitor array C A2 , a third varactor C V3 , a fourth varactor C V4 , a third NMOS transistor M3, a fourth NMOS transistor M4 and a second tail current source array M T2 ;
[0018] C A2 is connected at one end to P3 and at the other end to P4; the third varactor C V3 is connected at one end to P3 and at the other end to a fourth varactor C V4 ; the fourth varactor C V4 is connected at one end to P4 and at the other end to the third varactor C V3 ; the drain of M3 and the gate of M4 are connected to P3, the drain of M4 and the gate of M3 are connected to P4, and the sources of M3 and M4 are connected to the drain of a second tail current source array M T2 ; the sources of the second tail current source array M T2 are grounded, and the gates are connected to a control voltage;
[0019] The third core 3 comprises a third switched capacitor array C A3 , a fifth varactor C V5 , a sixth varactor C V6 , a fifth NMOS transistor M5, a sixth NMOS transistor M6 and a third tail current source array M T3 ;
[0020] C A3 is connected at one end to P5 and at the other end to P6; the fifth varactor C V5 is connected at one end to P5 and at the other end to a sixth varactor C V6 ; the sixth varactor CV6 one end is connected with P6 and the other end is connected with the fifth varactor C V5 ; the drain of M5 and the gate of M6 are connected with P5, the drain of M6 and the gate of M5 are connected with P6, and the source of M5 and M6 are connected with the drain of the third tail current source array M T3 ; the source of the third tail current source array M T3 is grounded and the gate is connected with a control voltage;
[0021] The fourth core 4 comprises a fourth switched capacitor array C A4 , a seventh varactor C V7 , an eighth varactor C V8 , a seventh NMOS transistor M7, an eighth NMOS transistor M8 and a fourth tail current source array M T4 ;
[0022] C A4 one end is connected with P7 and the other end is connected with P8; the seventh varactor C V7 one end is connected with P7 and the other end is connected with the eighth varactor C V8 ; the eighth varactor C V8 one end is connected with P8 and the other end is connected with the seventh varactor C V7 ; the drain of M7 and the gate of M8 are connected with P7, the drain of M8 and the gate of M7 are connected with P8, and the source of M7 and M8 are connected with the drain of the fourth tail current source array M T4 ; the source of the fourth tail current source array M T4 is grounded and the gate is connected with a control voltage;
[0023] The NMOS transistors M1-M8 in the four voltage-controlled oscillator cores are used to provide negative resistance to offset the energy loss of the resonant cavity; the switched capacitor arrays C A1 -C A4 in the four voltage-controlled oscillator cores are used to tune the frequency in each operating mode; the varactors C V1 -C V8 in the four voltage-controlled oscillator cores are used to continuously tune the frequency in the step of switched capacitor array frequency tuning; and the tail current source arrays M T1 -M T4 in the four voltage-controlled oscillator cores are used to control the starting condition and the oscillation amplitude.
[0024] Further, the first mode switching circuit SW1 controls the gate of the ninth NMOS transistor M9 and the twelfth NMOS transistor M 12 with a first switching signal S1, and controls the gate of the tenth NMOS transistor M 10 and the eleventh NMOS transistor M 11 with a second switching signal S2.
[0025] The source end of the ninth NMOS transistor M9 is connected with the input end INP1, and the drain end is connected with the output end OUTP1;
[0026] The source end of the tenth NMOS transistor M 10 is connected with the input end INN1, and the drain end is connected with the output end OUTP1;
[0027] The source end of the eleventh NMOS transistor M 11 is connected with the input end INP1, and the drain end is connected with the output end OUTN1;
[0028] The source end of the twelfth NMOS transistor M 12 is connected with the input end INN1, and the drain end is connected with the output end OUTN1.
[0029] Further, the second mode switching circuit SW2 controls the gate end of the thirteenth NMOS transistor M 13 and the sixteenth NMOS transistor M 16 by using the third switch signal S3, controls the gate end of the fourteenth NMOS transistor M 14 and the fifteenth NMOS transistor M 15 by using the fourth switch signal S4;
[0030] The source end of the thirteenth NMOS transistor M 13 is connected with the input end INP2, and the drain end is connected with the output end OUTP2;
[0031] The source end of the fourteenth NMOS transistor M 14 is connected with the input end INN2, and the drain end is connected with the output end OUTP2;
[0032] The source end of the fifteenth NMOS transistor M 15 is connected with the input end INP2, and the drain end is connected with the output end OUTN2;
[0033] The source end of the sixteenth NMOS transistor M 16 is connected with the input end INN2, and the drain end is connected with the output end OUTN2.
[0034] Further, the third mode switching circuit SW3 controls the gate end of the seventeenth NMOS transistor M 17 and the twentieth NMOS transistor M 20 by using the fifth switch signal S5, controls the gate end of the eighteenth NMOS transistor M 18 and the nineteenth NMOS transistor M 19 by using the sixth switch signal S6;
[0035] The source end of the seventeenth NMOS transistor M17 The source terminal is connected to the input terminal INP3, and the drain terminal is connected to the output terminal OUTP3;
[0036] The eighteenth NMOS transistor M 18 The source terminal is connected to the input terminal INN3, and the drain terminal is connected to the output terminal OUTP3;
[0037] The nineteenth NMOS transistor M 19 The source terminal is connected to the input terminal INP3, and the drain terminal is connected to the output terminal OUTN3;
[0038] The twentieth NMOS transistor M 20 The source terminal is connected to the input terminal INN3, and the drain terminal is connected to the output terminal OUTN3.
[0039] Furthermore, the fourth mode switching circuit SW4 uses the seventh switch signal S7 to control the twenty-first NMOS transistor M. 21 The twenty-fourth NMOS transistor M 24 The gate terminal of the twentieth NMOS transistor M is controlled by the eighth switching signal S8. 22 The 23rd NMOS transistor M 23 The gate end;
[0040] The 21st NMOS transistor M 21 The source terminal is connected to the input terminal INP4, and the drain terminal is connected to the output terminal OUTP4;
[0041] The twentieth NMOS transistor M 22 The source terminal is connected to the input terminal INN4, and the drain terminal is connected to the output terminal OUTP4;
[0042] The 23rd NMOS transistor M 23 The source terminal is connected to the input terminal INP4, and the drain terminal is connected to the output terminal OUTN4;
[0043] The 24th NMOS transistor M 24 The source terminal is connected to the input terminal INN4, and the drain terminal is connected to the output terminal OUTN4.
[0044] Further, INN1, INP1, OUTN1, OUTP1 of the first mode switching circuit SW1 are connected to P1, P2, P3, P4 respectively; INN2, INP2, OUTN2, OUTP2 of the second mode switching circuit SW2 are connected to P1, P2, P5, P6 respectively; INN3, INP3, OUTN3, OUTP3 of the third mode switching circuit SW3 are connected to P5, P6, P7, P8 respectively; INN4, INP4, OUTN4, OUTP4 of the fourth mode switching circuit SW4 are connected to P7, P8, P3, P4 respectively.
[0045] Further, by controlling the first and second switching signals S1 and S2 of the first mode switching circuit SW1, the third and fourth switching signals S3 and S4 of the second mode switching circuit SW2, the fifth and sixth switching signals S5 and S6 of the third mode switching circuit SW3, the seventh and eighth switching signals S7 and S8 of the fourth mode switching circuit SW4, the following four working modes are obtained:
[0046] Working mode 1: at this time, S1, S3, S5, S7 are high, S2, S4, S6, S8 are low, there is a potential difference between A and B points, C and D points, and there is current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all forward coupled; 10
[0047] Working mode 2: at this time, S2, S3, S6, S7 are high, S1, S4, S5, S8 are low, there is no potential difference between A and B points, C and D points, and there is no current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all forward coupled;
[0048] Working mode 3: at this time, S1, S4, S5, S8 are high, S2, S3, S6, S7 are low, there is a potential difference between A and B points, C and D points, and there is current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8, L9 and L 10 are all reverse coupled;
[0049] Working mode 4: at this time, S2, S4, S6, S8 are high, S1, S3, S5, S7 are low, there is no potential difference between A and B points, C and D points, and there is no current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all reverse coupled.
[0050] Compared with the prior art, the application has the following advantages and beneficial effects:
[0051] The application can realize free switching in four modes, obtain four different equivalent inductance values, and make the oscillator work in four different modes, thereby reducing the pressure of capacitance tuning and realizing super-bandwidth continuous tuning.
[0052] The four-mode inductance structure constructed by the application is simple, has low inductance value, and is small in size, and is suitable for millimeter wave frequency band and saves chip area. BRIEF DESCRIPTION OF DRAWINGS
[0053] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following introduces the drawings of the related technical solutions in the embodiments of the application or the prior art. It should be understood that the drawings in the following introduction are only for the convenience of clearly describing part of the embodiments in the technical solutions of the application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of the drawings.
[0054] Figure 1 is the overall circuit diagram of the four-core four-mode millimeter wave voltage-controlled oscillator based on the dual-path coupled inductance in the embodiments of the application;
[0055] Figure 2 is a schematic diagram of the four-mode inductance in the embodiments of the application;
[0056] Figure 3 is a schematic diagram of the four-mode switching circuit in the embodiments of the application;
[0057] Figure 4 is a schematic diagram of the four modes of the inductance in the embodiments of the application;
[0058] Figure 5 is an impedance schematic diagram of the four-mode resonant cavity in the embodiments of the application. DETAILED DESCRIPTION
[0059] In order to make the purpose, technical solutions and advantages of the embodiments of the application clearer, the technical solutions in the embodiments of the application will be clearly and completely described below in combination with the drawings in the embodiments of the application. Obviously, the described embodiments are part of the embodiments of the application, rather than all the embodiments. The drawings are only for illustrative purposes, and cannot be understood as a limitation of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the application.
[0060] Embodiment:
[0061] A four-core four-mode millimeter wave voltage-controlled oscillator based on a two-path coupled inductor, comprising a four-mode inductor, four voltage-controlled oscillator cores and four mode switching circuits, as shown in Figures 1-5 ; ;
[0062] ; The four-mode inductor is an eight-terminal model, and the eight terminals are P1-P8, wherein P1 and P2, P3 and P4, P5 and P6, and P7 and P8 respectively form four differential ports of the four-mode inductor. ;
[0063] ; The four voltage-controlled oscillator cores are first core 1, second core 2, third core 3 and fourth core 4, the first core 1 is connected to the first differential port P1P2 of the four-mode inductor, the second core 2 is connected to the second differential port P3P4 of the four-mode inductor, the third core 3 is connected to the third differential port P5P6 of the four-mode inductor, and the fourth core 4 is connected to the fourth differential port P7P8 of the four-mode inductor, and the internal devices and parameters of the four voltage-controlled oscillator cores are consistent. ;
[0064] ; The four mode switching circuits are first mode switching circuit SW1, second mode switching circuit SW2, third mode switching circuit SW3 and fourth mode switching circuit SW4, wherein the first mode switching circuit SW1 is connected to the first core 1 and the second core 2, the second mode switching circuit SW2 is connected to the first core 1 and the third core 3, the third mode switching circuit SW3 is connected to the third core 3 and the fourth core 4, and the fourth mode switching circuit SW4 is connected to the fourth core 4 and the second core 2. ;
[0065] ; The four-core four-mode millimeter wave voltage-controlled oscillator includes multiple working modes, and each of the four mode switching circuits is provided with a switch signal, and the conversion between the multiple working modes is realized through the high and low level switching of the switch signal. ;
[0066] ; In one embodiment, as shown in Figure 2 ; , the four-mode inductor is composed of ten inductors L1-L 10 , wherein the same terminals of the first inductor L1 and the third inductor L3 are connected at point A, and the opposite terminals are respectively P1 and P3; the same terminals of the second inductor L2 and the fourth inductor L4 are connected at point B, and the opposite terminals are respectively P2 and P4; the same terminals of the fifth inductor L5 and the seventh inductor L7 are connected at point C, and the opposite terminals are respectively P5 and P7; the same terminals of the sixth inductor L6 and the eighth inductor L8 are connected at point D, and the opposite terminals are respectively P6 and P8; the same terminals of the ninth inductor L9 and the tenth inductor L 10 are respectively connected at points A and C, and the opposite terminals are respectively connected at points B and D; the coupling coefficient between L3 and L7 is K1; the coupling coefficient between L1 and L5 is K2; the coupling coefficient between L2 and L6 is K3; the coupling coefficient between L4 and L8 is K4; and the coupling coefficient between L9 and L 10 is K5.
[0067] In one embodiment, L1=L7=L2=L8, L3=L5=L4=L6.
[0068] In one embodiment, coupling coefficients K1=K2=K3=K4.
[0069] The first core 1 includes a first switched capacitor array C A1 , a first varactor C V1 , a second varactor C V2 , a first NMOS transistor M1, a second NMOS transistor M2 and a first tail current source array M T1 .
[0070] One end of C A1 is connected to P1, and the other end is connected to P2; one end of the first varactor C V1 is connected to P1, and the other end is connected to the second varactor C V2 ; one end of the second varactor C V2 is connected to P2, and the other end is connected to the first varactor C V1 ; the drain of M1 and the gate of M2 are connected to P1, the drain of M2 and the gate of M1 are connected to P2, and the sources of M1 and M2 are connected to the drain of the first tail current source array M T1 ; the source of the first tail current source array M T1 is grounded, and the gate is connected to a control voltage;
[0071] The second core 2 includes a second switched capacitor array C A2 , a third varactor C V3 , a fourth varactor C V4 , a third NMOS transistor M3, a fourth NMOS transistor M4 and a second tail current source array M T2 .
[0072] One end of C A2 is connected to P3, and the other end is connected to P4; one end of the third varactor C V3 is connected to P3, and the other end is connected to the fourth varactor C V4 ; one end of the fourth varactor C V4 is connected to P4, and the other end is connected to the third varactor C V3 ; the drain of M3 and the gate of M4 are connected to P3, the drain of M4 and the gate of M3 are connected to P4, and the sources of M3 and M4 are connected to the drain of the second tail current source array M T2 ; the source of the second tail current source array M T2 is grounded, and the gate is connected to a control voltage;
[0073] The third core 3 includes a third switched capacitor array C A3 , a fifth varactor CV5 , the sixth varactor C V6 , the fifth
[0074] NMOS transistor M5, the sixth NMOS transistor M6 and the third tail current source array M T3 ;
[0075] C A3 is connected to P5 at one end and to P6 at the other end; the fifth varactor C V5 is connected to P5 at one end and to the sixth varactor C V6 at the other end; the sixth varactor C V6 is connected to P6 at one end and to the fifth varactor C V5 at the other end; the drain of M5 and the gate of M6 are connected to P5, the drain of M6 and the gate of M5 are connected to P6, and the sources of M5 and M6 are connected to the drain of the third tail current source array M T3 ; the source of the third tail current source array M T3 is grounded and the gate is connected to the control voltage;
[0076] The fourth core 4 comprises a fourth switched capacitor array C A4 , the seventh varactor C V7 , the eighth varactor C V8 , the seventh NMOS transistor M7, the eighth NMOS transistor M8 and the fourth tail current source array M T4 ;
[0077] C A4 is connected to P7 at one end and to P8 at the other end; the seventh varactor C V7 is connected to P7 at one end and to the eighth varactor C V8 at the other end; the eighth varactor C V8 is connected to P8 at one end and to the seventh varactor C V7 at the other end; the drain of M7 and the gate of M8 are connected to P7, the drain of M8 and the gate of M7 are connected to P8, and the sources of M7 and M8 are connected to the drain of the fourth tail current source array M T4 ; the source of the fourth tail current source array M T4 is grounded and the gate is connected to the control voltage;
[0078] The cross-coupled pair of the four voltage-controlled oscillator cores, i.e. the NMOS transistors M1-M8, is used to provide negative resistance to offset the energy loss of the resonant cavity; the switched capacitor arrays C A1 -C A4 of the four voltage-controlled oscillator cores are used to tune the frequency in each mode of operation; the varactors C V1 -C V8Tail current source array M in four VCO cores for continuous frequency modulation within the step size of switched capacitor array frequency modulation T1 ~M T4 For controlling the start-up condition and the oscillation amplitude.
[0079] In one embodiment, in the VCO core, the NMOS transistors used can be replaced by PMOS transistors, complementary symmetric CMOS structure;
[0080] As shown in Figure 3 , the first mode switching circuit SW1 controls the gate end of the ninth NMOS transistor M9 and the twelfth NMOS transistor M 12 using the first switch signal S1, and controls the gate end of the tenth NMOS transistor M 10 and the eleventh NMOS transistor M 11 using the second switch signal S2;
[0081] The source end of the ninth NMOS transistor M9 is connected with the input end INP1, and the drain end is connected with the output end OUTP1;
[0082] The source end of the tenth NMOS transistor M 10 is connected with the input end INN1, and the drain end is connected with the output end OUTP1;
[0083] The source end of the eleventh NMOS transistor M 11 is connected with the input end INP1, and the drain end is connected with the output end OUTN1;
[0084] The source end of the twelfth NMOS transistor M 12 is connected with the input end INN1, and the drain end is connected with the output end OUTN1.
[0085] As shown in Figure 3 , the second mode switching circuit SW2 controls the gate end of the thirteenth NMOS transistor M 13 and the sixteenth NMOS transistor M 16 using the third switch signal S3, and controls the gate end of the fourteenth NMOS transistor M 14 and the fifteenth NMOS transistor M 15 using the fourth switch signal S4;
[0086] The source end of the thirteenth NMOS transistor M 13 is connected with the input end INP2, and the drain end is connected with the output end OUTP2;
[0087] The source end of the fourteenth NMOS transistor M 14 is connected with the input end INN2, and the drain end is connected with the output end OUTP2;
[0088] The source end of the fifteenth NMOS transistor M 15 is connected with the input end INP2, and the drain end is connected with the output end OUTN2;
[0089] The source end of the sixteenth NMOS transistor M 16 is connected with the input end INN2, and the drain end is connected with the output end OUTN2.
[0090] As shown in Figure 3 , the third mode switching circuit SW3 controls the gate end of the seventeenth NMOS transistor M 17 and the twentieth NMOS transistor M 20 by using the fifth switch signal S5, and controls the gate end of the eighteenth NMOS transistor M 18 and the nineteenth NMOS transistor M 19 by using the sixth switch signal S6;
[0091] The source end of the seventeenth NMOS transistor M 17 is connected with the input end INP3, and the drain end is connected with the output end OUTP3;
[0092] The source end of the eighteenth NMOS transistor M 18 is connected with the input end INN3, and the drain end is connected with the output end OUTP3;
[0093] The source end of the nineteenth NMOS transistor M 19 is connected with the input end INP3, and the drain end is connected with the output end OUTN3;
[0094] The source end of the twentieth NMOS transistor M 20 is connected with the input end INN3, and the drain end is connected with the output end OUTN3.
[0095] As shown in Figure 3 , the fourth mode switching circuit SW4 controls the gate end of the twenty-first NMOS transistor M 21 and the twenty-fourth NMOS transistor M 24 by using the seventh switch signal S7, and controls the gate end of the twenty-second NMOS transistor M 22 and the twenty-third NMOS transistor M 23 by using the eighth switch signal S8;
[0096] The source end of the twenty-first NMOS transistor M 21 is connected with the input end INP4, and the drain end is connected with the output end OUTP4;
[0097] The source end of the twenty-second NMOS transistor M 22 is connected with the input end INN4, and the drain end is connected with the output end OUTP4;
[0098] the twenty-third NMOS transistor M 23 has a source end connected to the input end INP4 and a drain end connected to the output end OUTN4;
[0099] the twenty-fourth NMOS transistor M 24 has a source end connected to the input end INN4 and a drain end connected to the output end OUTN4.
[0100] In one embodiment, in the mode switching circuit, the NMOS transistor used can be replaced by a PMOS transistor.
[0101] Further, INN1, INP1, OUTN1, OUTP1 of the first mode switching circuit SW1 are connected to P1, P2, P3, P4 respectively; INN2, INP2, OUTN2, OUTP2 of the second mode switching circuit SW2 are connected to P1, P2, P5, P6 respectively; INN3, INP3, OUTN3, OUTP3 of the third mode switching circuit SW3 are connected to P5, P6, P7, P8 respectively; INN4, INP4, OUTN4, OUTP4 of the fourth mode switching circuit SW4 are connected to P7, P8, P3, P4 respectively.
[0102] Further, by controlling the first switching signal S1 and the second switching signal S2 of the first mode switching circuit SW1, the third switching signal S3 and the fourth switching signal S4 of the second mode switching circuit SW2, the fifth switching signal S5 and the sixth switching signal S6 of the third mode switching circuit SW3, and the seventh switching signal S7 and the eighth switching signal S8 of the fourth mode switching circuit SW4, the following four working modes are obtained:
[0103] Working mode 1: At this time, S1, S3, S5, S7 are high, S2, S4, S6, S8 are low, there is a potential difference between A point and B point, C point and D point, and there is current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and
[0104] L8, L9 and L 10 are all in the same direction coupling;
[0105] Working mode 2: At this time, S2, S3, S6, S7 are high, S1, S4, S5, S8 are low, there is no potential difference between A point and B point, C point and D point, and there is no current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all in the same direction coupling;
[0106] Mode 3: At this time, S1, S4, S5, S8 are high level, S2, S3, S6, S7 are low level, there is a potential difference between A point and B point, C point and D point, there is current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all forward coupling. 10
[0107] Mode 4: At this time, S2, S4, S6, S8 are high level, S1, S3, S5, S7 are low level, there is no potential difference between A point and B point, C point and D point, there is no current flowing through L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all reverse coupling.
[0108] In one embodiment, as shown in Figure 4 , the four differential ports of the four-mode inductor are respectively added with excitation signals, wherein P1P2 port is connected with excitation V1, P3P4 port is connected with excitation V2, P5P6 port is connected with excitation V3, P7P8 port is connected with excitation V4, then corresponding to the aforementioned working modes, there are the following modes:
[0109] Mode 1: When V1=V2=V3=V4, there is a potential difference between A point and B point, C point and D point, there is current flowing through inductor L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8, L9 and L 10 are all forward coupling.
[0110] Mode 2: When V1=-V2=V3=-V4, there is no potential difference between A point and B point, C point and D point, there is no current flowing through inductor L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all forward coupling.
[0111] Mode 3: When V1=V2=-V3=-V4, there is a potential difference between A point and B point, C point and D point, there is current flowing through inductor L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8, L9 and L 10 are all reverse coupling.
[0112] Mode 4: When V1=-V2=-V3=V4, there is no potential difference between A point and B point, C point and D point, there is no current flowing through inductor L9 and L 10 , and L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all reverse coupling.
[0113] Through the above analysis, the four-mode inductor corresponds to the resonant cavity with four different resonant peaks, as shown in Figure 5
[0114] Based on the above principle, finally realize a kind of four-core four-mode millimeter wave voltage-controlled oscillator based on double-path coupling inductor, by controlling the switch level of four mode switching circuit, four-port excitation of four-mode inductor can be clamped in the corresponding case of working mode 1, working mode 2, working mode 3, working mode 4, so as to realize the free switching of voltage-controlled oscillator core in four oscillation modes, and achieve the purpose of ultra-wideband coverage.
[0115] The part not described in the application is the known technology of those skilled in the art.
[0116] The above describes the preferred embodiments of the application in detail. It should be understood that those skilled in the art can make many modifications and changes without creative labor according to the concept of the application. Therefore, any technical solution obtained by logical analysis, reasoning or limited experiment on the basis of the prior art by those skilled in the art shall be within the protection scope determined by the claims.
Claims
1. A four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors, characterized in that, The four-mode inductor, four voltage-controlled oscillator cores and four mode switching circuits are included. The four-mode inductor is an eight-terminal model, and the eight terminals are P1-P8, wherein P1 and P2, P3 and P4, P5 and P6 and P7 and P8 form four differential ports of the four-mode inductor respectively. The four voltage-controlled oscillator cores are first core 1, second core 2, third core 3 and fourth core 4 respectively, the first core 1 is connected to the first differential port P1P2 of the four-mode inductor, the second core 2 is connected to the second differential port P3P4 of the four-mode inductor, the third core 3 is connected to the third differential port P5P6 of the four-mode inductor, and the fourth core 4 is connected to the fourth differential port P7P8 of the four-mode inductor, and the internal devices and parameters of the four voltage-controlled oscillator cores are consistent. The four mode switching circuits are first mode switching circuit SW1, second mode switching circuit SW2, third mode switching circuit SW3 and fourth mode switching circuit SW4 respectively, wherein the first mode switching circuit SW1 is connected to the first core 1 and the second core 2, the second mode switching circuit SW2 is connected to the first core 1 and the third core 3, the third mode switching circuit SW3 is connected to the third core 3 and the fourth core 4, and the fourth mode switching circuit SW4 is connected to the fourth core 4 and the second core 2. The four-core four-mode millimeter wave voltage-controlled oscillator includes multiple working modes, and a switch signal is arranged in each of the four mode switching circuits, and the conversion between the multiple working modes is realized through the high and low level switching of the switch signal. The four-mode inductor is composed of ten inductors L1-L 10 10, wherein the same terminals of the first inductor L1 and the third inductor L3 are connected at point A, and the opposite terminals are respectively used as the P1 terminal and the P3 terminal; the same terminals of the second inductor L2 and the fourth inductor L4 are connected at point B, and the opposite terminals are respectively used as the P2 terminal and the P4 terminal; the same terminals of the fifth inductor L5 and the seventh inductor L7 are connected at point C, and the opposite terminals are respectively used as the P5 terminal and the P7 terminal; the same terminals of the sixth inductor L6 and the eighth inductor L8 are connected at point D, and the opposite terminals are respectively used as the P6 terminal and the P8 terminal; the same terminals of the ninth inductor L9 and the tenth inductor L 10 10 are respectively connected at point A and point C, and the opposite terminals are respectively connected at point B and point D; the coupling coefficient between L3 and L7 is K1; the coupling coefficient between L1 and L5 is K2; the coupling coefficient between L2 and L6 is K3; the coupling coefficient between L4 and L8 is K4; and the coupling coefficient between L9 and L 10 10 is K5.
2. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The coupling coefficients K1=K2=K3=K4.
3. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The first core 1 comprises a first switched capacitor array C A1 , a first varactor C V1 , a second varactor C V2 , a first NMOS transistor M1, a second NMOS transistor M2 and a first tail current source array M T1 ; C A1 one end is connected with P1 and the other end is connected with P2; the first varactor C V1 one end is connected with P1 and the other end is connected with the second varactor C V2 ; the second varactor C V2 one end is connected with P2 and the other end is connected with the first varactor C V1 ; the drain end of M1 and the gate end of M2 are connected with P1, the drain end of M2 and the gate end of M1 are connected with P2, and the source ends of M1 and M2 are connected with the drain end of the first tail current source array M T1 ; the source end of the first tail current source array M T1 is grounded and the gate end is connected with a control voltage; The second core 2 comprises a second switched capacitor array C A2 , a third varactor C V3 , a fourth varactor C V4 , a third NMOS transistor M3, a fourth NMOS transistor M4 and a second tail current source array M T2 ; C A2 one end is connected with P3 and the other end is connected with P4; the third varactor C V3 one end is connected with P3 and the other end is connected with the fourth varactor C V4 ; the fourth varactor C V4 one end is connected with P4 and the other end is connected with the third varactor C V3 ; the drain end of M3 and the gate end of M4 are connected with P3, the drain end of M4 and the gate end of M3 are connected with P4, and the source ends of M3 and M4 are connected with the drain end of the second tail current source array M T2 ; the source end of the second tail current source array M T2 is grounded and the gate end is connected with a control voltage; The third core 3 comprises a third switched capacitor array C A3 , a fifth varactor C V5 , a sixth varactor C V6 , a fifth NMOS transistor M5, a sixth NMOS transistor M6 and a third tail current source array M T3 ; C A3 one end is connected with P5 and the other end is connected with P6; the fifth varactor C V5 one end is connected with P5 and the other end is connected with the sixth varactor C V6 one end is connected with P6 and the other end is connected with the fifth varactor C V6 one end is connected with P6 and the other end is connected with the fifth varactor C V5 the drain end of M5 and the gate end of M6 are connected with P5, the drain end of M6 and the gate end of M5 are connected with P6, and the source ends of M5 and M6 are connected with the drain end of the third tail current source array M T3 the source end of the third tail current source array M T3 is grounded and the gate end is connected with a control voltage; The fourth core 4 comprises a fourth switched capacitor array C A4 , a seventh varactor C V7 , an eighth varactor C V8 , a seventh NMOS transistor M7, an eighth NMOS transistor M8 and a fourth tail current source array M T4 ; C A4 one end is connected with P7 and the other end is connected with P8; the seventh varactor C V7 one end is connected with P7 and the other end is connected with the eighth varactor C V8 ; the eighth varactor C V8 one end is connected with P8 and the other end is connected with the seventh varactor C V7 ; the drain end of M7 and the gate end of M8 are connected with P7, the drain end of M8 and the gate end of M7 are connected with P8, and the source ends of M7 and M8 are connected with the drain end of the fourth tail current source array M T4 ; the source end of the fourth tail current source array M T4 is grounded and the gate end is connected with a control voltage; The NMOS transistors M1-M8 in the four voltage-controlled oscillator cores are used to provide negative resistance to offset the energy loss of the resonant cavity; Switched capacitor array C in four voltage controlled oscillator cores A1 ~ c A4 to perform frequency tuning within each operating mode; Varactor C in the four voltage-controlled oscillator cores V1 ~ C V8 To perform continuous frequency modulation within the step size of the switched-capacitor array frequency modulation; tail current source array M in the four voltage-controlled oscillator cores T1 ~ M T4 To control the start-up condition and the oscillation amplitude.
4. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The first mode switching circuit SW1 controls the gate end of the ninth NMOS transistor M9 and the twelfth NMOS transistor M12 by using a first switch signal S1, and controls the gate end of the tenth NMOS transistor M10 and the eleventh NMOS transistor M11 by using a second switch signal S2. 12 10 11 The source end of the ninth NMOS transistor M9 is connected with the input end INP1, and the drain end is connected with the output end OUTP1. The tenth NMOS transistor M 10 The source terminal is connected to the input terminal INN1, and the drain terminal is connected to the output terminal OUTP1; The eleventh NMOS transistor M 11 The source end of the eleventh NMOS transistor M The twelfth NMOS transistor M 12 The source of the twelfth NMOS transistor M The drain of the twelfth NMOS transistor M 5. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The second mode switching circuit SW2 controls the gate terminal of the thirteenth NMOS transistor M 13 and the fourteenth NMOS transistor M 16 with the fourth switch signal S4, and controls the gate terminal of the fifteenth NMOS transistor M 14 and the sixteenth NMOS transistor M 15 with the third switch signal S3. The thirteenth NMOS transistor M 13 a source end connected with the input end INP2, and a drain end connected with the output end OUTP2; The fourteenth NMOS transistor M 14 a source end connected with the input end INN2, and a drain end connected with the output end OUTP2; The fifteenth NMOS transistor M 15 a source end connected with the input end INP2, and a drain end connected with the output end OUTN2; The sixteenth NMOS transistor M 16 The source end of the sixteenth NMOS transistor M 6. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The third mode switching circuit SW3 controls the gate end of the seventeenth NMOS transistor M 17 and the twentieth NMOS transistor M 20 with the fifth switching signal S5 and the sixth switching signal S6 respectively. 18 and the nineteenth NMOS transistor M 19 with the sixth switching signal S6 respectively. The seventeenth NMOS transistor M 17 a source terminal connected to the input terminal INP3, and a drain terminal connected to the output terminal OUTP3; The eighteenth NMOS transistor M 18 a source end connected with the input end INN3, and a drain end connected with the output end OUTP3; The nineteenth NMOS transistor M 19 a source end connected with the input end INP3, and a drain end connected with the output end OUTN3; The source terminal of the twentieth NMOS transistor M 20 is connected with the input terminal INN3, and the drain terminal is connected with the output terminal OUTN3.
7. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 1, wherein, The fourth mode switching circuit SW4 controls the gate end of the twenty-first NMOS transistor M 21 and the twenty-second NMOS transistor M 24 with the seventh switch signal S7, and controls the gate end of the twenty-third NMOS transistor M 22 and the twenty-fourth NMOS transistor M 23 with the eighth switch signal S8. The twenty-first NMOS transistor M 21 a source end connected with the input end INP4, and a drain end connected with the output end OUTP4; The source terminal of the twenty-second NMOS transistor M 22 is connected with the input terminal INN4, and the drain terminal is connected with the output terminal OUTP4. The source terminal of the twenty-third NMOS transistor M 23 is connected with the input terminal INP4, and the drain terminal is connected with the output terminal OUTN4. The twenty-fourth NMOS transistor M 24 The source end of the twenty-fourth NMOS transistor M 8. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors according to any one of claims 4-7, characterized in that, The INN1, INP1, OUTN1 and OUTP1 of the first mode switching circuit SW1 are connected to P1, P2, P3 and P4 respectively; the INN2, INP2, OUTN2 and OUTP2 of the second mode switching circuit SW2 are connected to P1, P2, P5 and P6 respectively; the INN3, INP3, OUTN3 and OUTP3 of the third mode switching circuit SW3 are connected to P5, P6, P7 and P8 respectively; and the INN4, INP4, OUTN4 and OUTP4 of the fourth mode switching circuit SW4 are connected to P7, P8, P3 and P4 respectively.
9. The four-core four-mode millimeter-wave voltage-controlled oscillator based on dual-path coupled inductors of claim 8, wherein, Through controlling the first switch signal S1 and the second switch signal S2 of the first mode switching circuit SW1, the third switch signal S3 and the fourth switch signal S4 of the second mode switching circuit SW2, the fifth switch signal S5 and the sixth switch signal S6 of the third mode switching circuit SW3, and the seventh switch signal S7 and the eighth switch signal S8 of the fourth mode switching circuit SW4, the following four working modes are obtained: Working mode 1: At this time, S1, S3, S5 and S7 are high level, S2, S4, S6 and S8 are low level, there is a potential difference between A point and B point, C point and D point, and there is current flowing through L9 and L 10 L1 and L5, L3 and L7, L2 and L6, L4 and L8, L9 and L 10 are all same direction coupling; Working mode 2: At this time, S2, S3, S6 and S7 are high level, S1, S4, S5 and S8 are low level, there is no potential difference between A point and B point, C point and D point, no current flows through L9 and L 10 And L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all in the same direction coupling; Working mode 3: At this time, S1, S4, S5 and S8 are high level, S2, S3, S6 and S7 are low level, there is potential difference between A point and B point, C point and D point, current flows through L9 and L 10 L1 and L5, L3 and L7, L2 and L6, L4 and L8, L9 and L 10 are all reverse coupling; Working mode 4: At this time, S2, S4, S6, S8 are high level, S1, S3, S5, S7 are low level, there is no potential difference between A point and B point, C point and D point, no current flows through L9 and L 10 And L1 and L5, L3 and L7, L2 and L6, L4 and L8 are all reverse coupling.
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