A method for enhancing bandwidth of single-carrier photodetector

Abstract

The present invention relates to the technical field of photodetectors and proposes a method for enhancing the bandwidth of a single-row carrier photodetector. The method comprises the following steps: performing a first spin-off and exposure-development operation on a UTC-PD using a photoresist, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern, thereby forming a first photoresist layer; performing electrode metal deposition, so that a metal seed layer is deposited on the surface of the first photoresist layer; performing a second spin-off and exposure-development operation, so that the metal seed layer except for an N electrode is covered with the photoresist, thereby forming a second photoresist layer; performing an electroplating operation, so that the height of the N electrode of the UTC-PD is raised; using a lift-off method, removing the UTC-PD photoresist and the metal seed layer except for the N electrode in the metal seed layer; and performing flip-chip bonding on the lift-off-treated UTC-PD and a heat sink with an inductor structure, thereby obtaining a UTC-PD with enhanced bandwidth.

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric detectors, and more particularly, to a method for enhancing the bandwidth of a single-row carrier photoelectric detector. Background Art

[0002] High-speed optical communication is a key application area in modern communication systems, which requires high-speed photodetectors to receive and demodulate high-speed optical signals. Traditional photodetectors are often affected by bandwidth limitations and signal distortion. To meet the needs of high-speed optical communication systems, researchers have proposed various photodetector designs based on carrier transport, such as high-speed single-carrier photodiodes and phototransistors. Among them, high-bandwidth, high-power single-carrier photodetectors (UTC-PDs) have been widely studied and applied due to their ability to achieve high-bandwidth, high-power optical signal detection and processing.

[0003] The structure of the single-line carrier photodetector (UTC-PD) is as follows from bottom to top: substrate, N active region and P active region, wherein the first step is formed between the top of the substrate and the top of the N active region, and the second step is formed between the top of the N active region and the top of the P active region. A layer of metal is provided on the top of the first step, which is the N electrode of the UTC-PD. A layer of metal is provided on the top of the second step, which is the P electrode of the UTC-PD.

[0004] Thermal management is crucial for high-speed, high-power UTC-PDs. Flip-chip bonding is typically used to bond the device to a heat sink with enhanced thermal conductivity. This allows for rapid heat transfer from the detector during normal operation, preventing overheating and thermal distortion from adversely affecting photodetector performance. By selecting appropriate materials and applying them appropriately during the design and fabrication of photodetectors, the detector's thermal management capabilities can be improved, ensuring stable operation and achieving higher performance levels.

[0005] Traditional flip-chip bonding schemes generally use an air bridge structure to connect the P / N structure on the UTC-PD to the planar electrode, and then align and bond the planar electrode on the UTC-PD to the pad on the heat sink. Due to the introduction of too many parasitic parameters in the process of making the air bridge structure and the planar and flip-chip bonding process, the bandwidth of the UTC-PD has decreased. To overcome this problem, some scholars have proposed reducing the parasitic parameters and carrier transmission time by reducing the size of the intrinsic region. However, this method will be highly dependent on the accuracy of the semiconductor processing technology, and it also reduces other performance parameters of the UTC-PD, such as the optical response rate. Summary of the Invention

[0006] In order to overcome the defect of the above-mentioned prior art that other performances need to be reduced in order to maintain the bandwidth size, the present invention provides a method for enhancing the bandwidth of a single-row carrier photodetector without reducing other performances.

[0007] In order to solve the above technical problems, the technical solutions of the present invention are as follows:

[0008] Using photoresist, performing a spin coating and exposure and development operation on the UTC-PD, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer;

[0009] Performing electrode metal deposition on the UTC-PD comprising a first photoresist layer, so that a metal seed layer is deposited on a surface of the first photoresist layer;

[0010] The UTC-PD after electrode metal deposition is subjected to secondary spin coating and exposure and development operations, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer;

[0011] Performing electroplating on the UTC-PD comprising two photoresist layers and a metal seed layer, raising the height of the N electrode of the UTC-PD to a preset height;

[0012] Using a lift-off method, the photoresist in the UTC-PD with the electrode height lifted and the metal seed layer except the N electrode in the metal seed layer are removed;

[0013] The lift-off treated UTC-PD is flip-chip bonded to a heat sink with an inductor structure to obtain a UTC-PD with enhanced bandwidth.

[0014] The present invention also proposes a single-row carrier photodetector bandwidth enhancement system for implementing the above-mentioned single-row carrier photodetector bandwidth enhancement method, the system comprising:

[0015] A first photoresist layer generating module is used to perform a spin coating and exposure and development operation on the UTC-PD using the photoresist, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer;

[0016] An electrode metal deposition module is used to perform electrode metal deposition on the UTC-PD including the first photoresist layer, so that the metal seed layer is deposited on the surface of the first photoresist layer;

[0017] The second photoresist layer generation module is used to perform secondary spin coating and exposure and development operations on the UTC-PD after the electrode metal deposition is completed, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer;

[0018] The electrode height raising module is used to perform electroplating operations on the UTC-PD comprising two photoresist layers and a metal seed layer, and to raise the height of the N electrode of the UTC-PD to a preset height;

[0019] A lift-off module is used to remove the photoresist in the UTC-PD after the electrode height is lifted and the metal seed layer except the N electrode in the metal seed layer by using a lift-off method;

[0020] The flip-chip bonding module is used to flip-chip bond the lift-off processed UTC-PD to a heat sink with an inductor structure to obtain a UTC-PD with enhanced bandwidth.

[0021] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0022] The N electrode of the UTC-PD is raised to a preset height, and the flip-chip bonding site originally in the P active area is transferred to the P table of the device. Compared with the traditional air bridge structure, this flip-chip bonding method introduces lower parasitic capacitance and a higher RC bandwidth of the UTC-PD. A heat sink with an inductive structure is used to introduce a compensating inductor, and the RLC parallel resonance effect is used to improve the output bandwidth of the UTC-PD, thereby achieving the comprehensive performance of high speed and high power of the UTC-PD. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a flow chart of the bandwidth enhancement method for a single-row carrier photodetector proposed in Example 1;

[0024] Figure 2 Schematic diagram of the air bridge structure of the traditional flip-chip bonding solution proposed in Example 1;

[0025] Figure 3 This is a flow chart of the sandwich electroplating process proposed in Example 1;

[0026] Figure 4 Schematic diagram of the unplated and elevated UTC-PD proposed in Example 1;

[0027] Figure 5 Schematic diagram of the UTC-PD after electroplating lifting proposed in Example 1;

[0028] Figure 6 Schematic diagram of the UTC-PD after flip-chip bonding proposed in Example 1;

[0029] Figure 7 Schematic diagram of the equivalent model of the UTC-PD proposed in Example 2 without introducing an inductor;

[0030] Figure 8Schematic diagram of the equivalent model of the UTC-PD with inductance introduced proposed in Example 2;

[0031] Figure 9 This is the layout of the heat sink with inductor structure proposed in Example 2;

[0032] Figure 10 This is a schematic diagram of an electrode on a heat sink with an inductor structure proposed in Example 2;

[0033] Figure 11 This is an overall framework diagram of a single-row carrier photodetector bandwidth enhancement system proposed in Example 3. DETAILED DESCRIPTION

[0034] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting the present embodiment;

[0035] In order to better illustrate this embodiment, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product size;

[0036] It is understandable to those skilled in the art that some well-known structures and descriptions thereof may be omitted in the drawings.

[0037] The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.

[0038] Example 1

[0039] This embodiment proposes a method for enhancing the bandwidth of a single-row carrier photodetector. Figure 1 Schematic diagram of the process of the bandwidth enhancement method of a single-row carrier photodetector of this embodiment;

[0040] A method for enhancing the bandwidth of a single-row carrier photodetector proposed in this embodiment includes the following steps:

[0041] S1: Using photoresist, performing a spinning and exposure and development operation on the UTC-PD, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer;

[0042] S2: performing electrode metal deposition on the UTC-PD comprising the first photoresist layer, so that a metal seed layer is deposited on the surface of the first photoresist layer;

[0043] S3: performing secondary spin coating and exposure and development operations on the UTC-PD after electrode metal deposition, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer;

[0044] S4: performing an electroplating operation on the UTC-PD comprising two photoresist layers and a metal seed layer, and raising the height of the N electrode of the UTC-PD to a preset height;

[0045] S5: using a lift-off method, removing the photoresist in the UTC-PD with the electrode height lifted and the metal seed layer except the N electrode in the metal seed layer;

[0046] S6: Flip-chip bonding is performed on the lift-off processed UTC-PD and the heat sink with the inductor structure to obtain a UTC-PD with enhanced bandwidth.

[0047] During implementation, the N-electrode of the UTC-PD is raised to a preset height, transferring the flip-chip bonding site originally located in the P active region to the P platform of the device. Compared to the traditional air bridge structure, this flip-chip bonding method introduces lower parasitic capacitance and a higher RC bandwidth for the UTC-PD. Furthermore, a heat sink with an inductive structure is used to introduce a compensating inductor, leveraging the RLC parallel resonance effect to increase the output bandwidth of the UTC-PD, achieving the UTC-PD's combined high-speed and high-power performance.

[0048] In this embodiment, Figure 2 Schematic diagram of the air bridge structure of the traditional flip-chip bonding solution proposed in this embodiment; the traditional flip-chip bonding solution usually connects the device P electrode and N electrode to the same plane electrode through an air bridge, and then performs flip-chip bonding with the pad on the heat sink electrode. The designed air bridge structure, such as Figure 2 As shown, parasitic capacitance will be introduced ( Figure 2 The impedance introduced by the parasitic capacitance will cause high-frequency attenuation of the signal, which will limit the bandwidth of the UTC-PD. To address this shortcoming, the present application innovatively introduces a sandwich electroplating solution to lift the N electrode of the UTC-PD, change the flip-chip bonding site, and directly flip-chip bond the mesa of the P active area of ​​the UTC-PD to the heat sink, reducing the parasitic capacitance introduced by the air bridge structure and the flip-chip process, and improving the RC (resistance-capacitance) bandwidth of the UTC-PD.

[0049] In an optional embodiment, the operation of performing a spin-off and exposure and development on the UTC-PD using a photoresist includes:

[0050] Spin-coat the photoresist on the UTC-PD so that the photoresist covers the entire UTC-PD. Pre-bake the UTC-PD covered with the photoresist to remove the solvent in the photoresist, thus achieving one-step photoresist spinning.

[0051] The UTC-PD after the solvent is removed is placed in a maskless lithography machine, and the UTC-PD in the maskless lithography machine is exposed using a preset program and a preset layout;

[0052] The UTC-PD that has completed the exposure operation is post-baked, and the developer and deionized water are used to develop the UTC-PD that has completed the post-baking operation, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer.

[0053] In an optional embodiment, when electroplating a UTC-PD comprising two photoresist layers and a metal interlayer, the electroplating operation is performed using an electroplating solution and an electroplating tank to raise the height of the N electrode of the UTC-PD to a position flush with the height of the P electrode.

[0054] In an optional embodiment, the step of removing the photoresist in the UTC-PD with the electrode height lifted and the metal seed layer except the N electrode in the metal seed layer by using a lift-off method includes:

[0055] The UTC-PD with the electrode height raised is immersed in acetone. After soaking for a preset time, the immersed UTC-PD is rinsed with isopropyl alcohol and deionized water respectively to remove the photoresist of the UTC-PD.

[0056] In this optional embodiment, Figure 3 The following is a flow chart of the sandwich electroplating process proposed in this embodiment; as an exemplary illustration, Figure 3 The specific steps of obtaining UTC-PD treated by lift-off (peeling process) are demonstrated: AZ series photoresist is spin-coated on the UTC-PD device with step difference. At this time, the photoresist will cover the surface of the entire semiconductor device. At this time, pre-baking is required to remove the solvent in the glue layer to prevent the glue layer from shrinking and the pattern from being blurred after exposure; the pre-baked device is placed in a maskless photolithography machine, exposed using a specific program and layout, and then post-baked to promote the cross-linking reaction of the photoresist, making it more stable and durable, and then developed using developer and deionized water; the developed device sample is placed in an electron beam evaporation device for electrode metal deposition. At this time, the metal electrode seed layer It will be deposited on the surface of the above-mentioned photoresist layer; the operation method of the secondary spinning, exposure and development operation is the same as the aforementioned spinning and exposure and development steps. At this time, the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer, and a sandwich structure is formed. The sandwich structure is composed of the first photoresist layer, the metal seed layer and the second photoresist layer; the device after the secondary exposure and development is placed in an electroplating tank, and the N electrode of the device is lifted using the electroplating solution; the electroplated device is soaked in acetone for more than 2 hours, and then rinsed with isopropyl alcohol and deionized water respectively to remove the photoresist and metal suspension introduced by the previous process, and a lift-off treated UTC-PD can be obtained;

[0057] in, Figure 4This is a schematic diagram of the unplated and elevated UTC-PD proposed in this embodiment. Figure 5 Schematic diagram of the UTC-PD after electroplating lifting proposed in this embodiment; Figure 6 Schematic diagram of the UTC-PD after flip-chip bonding proposed in this embodiment; the UTC-PD without electroplating and lifting is as shown in FIG. Figure 4 As shown in the figure, the second photolithography operation exposes the N electrode (not covered by photoresist), so that the N electrode can contact the plating solution during the electroplating operation, and the other parts covered by the photoresist cannot contact the plating solution; and only the part that contacts the plating solution can be electroplated and deposited with metal, so this step can achieve the height elevation of the N electrode, making the UTC-PD Figure 4 becomes Figure 5 , so that the UTC-PD flip-chip bonded to the heat sink with inductor structure is Figure 6 The device shown does not have an air bridge structure, thereby reducing parasitic capacitance and improving the RC bandwidth of the UTC-PD; wherein, by preparing a specially designed narrow transmission line on the heat sink, an inductance peak effect is introduced into the InGaAs / InP UTC-PD, wherein the narrow transmission line is the inductance structure of the heat sink with an inductance structure; the present application not only uses a heat sink to assist in heat dissipation to prevent thermal failure of the device, but also uses inductively excited resonance to improve the output bandwidth of the device, further realizing the comprehensive performance of high speed and high power of the photodetector.

[0058] As an example, the photoresist is an AZ series photoresist; the metal seed layer is sandwiched between two layers of AZ series photoresist, and from a cross-section, it looks like a sandwich, so this semiconductor layered structure is called a sandwich structure. Figure 3 The structure of the lift-off treated UTC-PD is a sandwich structure, and its metal seed layer occupies the entire plane of the device. In the later electroplating process, it is beneficial to maintain the potential of the entire working plane consistent during the electroplating process, and prevent the local potential from being too high, resulting in excessive local current, which in turn leads to different electroplating efficiency at each point, easily causing the electroplating surface to be uneven, the electroplating quality to be poor, and the macroscopic manifestation to be local blackening; during the electroplating of this application, the workpiece to be electroplated is clamped by a fixture and immersed in a container filled with thiosulfate electroplating solution, wherein the tungsten needle connected to the negative pole of the power supply pierces the top layer of photoresist on the device and contacts the metal seed layer, forming a cathode during the electroplating process; the titanium electrode is connected to the positive pole of the power supply and inserted into the electroplating tank, acting as an anode during the electroplating process; as an exemplary illustration, when the cathode current density during the electroplating process is reasonably controlled to be 0.1A / dm 2 , that is, the deposition rate can be controlled and the electroplating quality is better.

[0059] Example 2

[0060] This embodiment makes improvements based on the bandwidth enhancement method of the single-row carrier photodetector proposed in Embodiment 1.

[0061] In an optional embodiment, the expression of the 3dB bandwidth of the lift-off processed UTC-PD is:

[0062]

[0063] Where, f 3dB represents the 3dB bandwidth of the UTC-PD after lift-off processing, f τ represents the transition bandwidth of UTC-PD after lift-off processing, f RC The bandwidth of the RC equivalent circuit of the flip-chip bonded UTC-PD.

[0064] In an optional embodiment, the resonant frequency of the RLC equivalent circuit of the bandwidth-enhanced UTC-PD is expressed as:

[0065]

[0066] Where, f R represents the resonant frequency of the RLC equivalent circuit of the bandwidth-enhanced UTC-PD, L1 represents the inductance value of the inductor structure of the bandwidth-enhanced UTC-PD, C pn Represents the junction capacitance of the bandwidth-enhanced UTC-PD.

[0067] In an optional embodiment, the resonant frequency f R The size of f is related to the inductance of the heat sink with the inductor structure. When the inductance of the heat sink is L1, the f R With the optimal value f max , the L1 and f max The expressions are:

[0068]

[0069]

[0070] Where R2 represents the terminal load resistance of the test equipment connected to the bandwidth-enhanced UTC-PD from the outside, R s Represents the UTC-PD series resistance.

[0071] In an optional embodiment, the UTC-PD includes: InGaAs / InP UTC-PD.

[0072] In an optional embodiment, the heat sink includes a diamond heat sink.

[0073] Figure 7This is a schematic diagram of the equivalent model of the UTC-PD proposed in this embodiment without the introduction of inductance. Since the transit time bandwidth is related to the semiconductor epitaxial structure, Figure 7 The equivalent model only considers its parasitic effects, where R1 and C1 constitute the transition bandwidth of the UTC-PD. The UTC-PD can be regarded as a voltage-controlled current source. Rpn and Cpn represent the junction resistance and junction capacitance of the device, respectively, while the series resistance is represented by Rs. Cout represents the additional parasitic capacitance introduced by the heat sink after flip-chip bonding.

[0074] In this equivalent model, assuming that both the transition bandwidth and the RC bandwidth are Gaussian responses, the 3dB bandwidth of the device can be expressed as:

[0075]

[0076] It can be seen that tuning the RC bandwidth can indirectly improve the 3dB bandwidth of the device.

[0077] It's known that when a signal passes through an RLC resonant circuit, the circuit's impedance is minimum near the resonant frequency, meaning the circuit responds most strongly to signals at that frequency. However, for signals at other frequencies, the circuit's impedance is greater, suppressing the signal. By properly selecting the RLC circuit's parameters, such as adjusting the inductor and capacitor values, the resonant frequency can be aligned with the desired center frequency of the communication system. This enhances signal transmission near the center frequency while suppressing interfering signals at other frequencies.

[0078] Therefore, introducing the inductor L1 into the original equivalent circuit can utilize the above-mentioned resonance peak effect to improve the RC bandwidth of the device. Figure 8 This is a schematic diagram of the equivalent model of the UTC-PD with inductance introduced in this embodiment; Figure 8 Under the model shown, the RLC resonant frequency of the circuit can be expressed as:

[0079]

[0080] By deduction of the principle, it can be found that when the value of L1 meets the When f R has the optimal value, namely:

[0081]

[0082] Through the characterization of semiconductor epitaxial structure and related devices, the circuit parameters obtained are shown in Table 1. The ADS simulation software is used to construct the above circuit model simulation project.

[0083] Table 1 Device simulation parameters

[0084] Parameter name Value C1 16fF R1 30Ohm Rpn 500Ohm Cpn 92fF Rs 5Ohm Cout 8fF

[0085] Scanning the L1 parameters, compared with the m2 point without adding inductance, the m4 point added 139pH of inductance, and the bandwidth increased from 31.7GHz to 47.4GHz. Compared with the resonant frequency without introducing the inductor L1 as analyzed above, the resonant frequency after introducing the optimized inductor L1 is increased by about 41%. This result proves that it is beneficial to improve the bandwidth after InGaAs / InP UTC-PD is bonded to the diamond heat sink.

[0086] Figure 9 This is the layout of the heat sink with inductor structure proposed in this embodiment; it is impractical to add chip package inductor to the design of high-speed photodetector, but in high-frequency circuit, the short transmission line with large characteristic impedance can be approximately regarded as a series inductor. Therefore, the size of the specially designed inductor can be calculated based on the simulation results and the layout can be drawn. Figure 9 As shown, the narrow transmission line can be prepared in the diamond heat sink after maskless exposure and development and electron beam evaporation to add a specific equivalent inductance value, stimulate circuit resonance, and improve the overall RC bandwidth.

[0087] Figure 10 Schematic diagram of the electrode on the heat sink with an inductive structure proposed in this embodiment; l and h in the figure are the adjustable parameters of the inductance (narrow transmission line) of the heat sink with an inductive structure, and g and h are the adjustable parameters of the electrode portion of the heat sink. As an example, the w and g parameters are selected so that the CPW (coplanar waveguide) line meets the characteristic impedance of 50Ω, and the l / h parameters are selected so that the narrow transmission line can introduce the above-mentioned additional inductance of 139pH; the device raised by sandwich electroplating is flip-chip bonded to the heat sink using a flip-chip bonding device, and the following is obtained. Figure 6 The combination shown.

[0088] Example 3

[0089] This embodiment proposes a single-row carrier photodetector bandwidth enhancement system, which is used to implement the single-row carrier photodetector bandwidth enhancement method proposed in Example 1.

[0090] Figure 11 4 is an overall framework diagram of the single-row carrier photodetector bandwidth enhancement system of this embodiment.

[0091] The single-row carrier photodetector bandwidth enhancement system comprises:

[0092] A first photoresist layer generating module is used to perform a spin coating and exposure and development operation on the UTC-PD using the photoresist, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer;

[0093] An electrode metal deposition module is used to perform electrode metal deposition on the UTC-PD including the first photoresist layer, so that the metal seed layer is deposited on the surface of the first photoresist layer;

[0094] The second photoresist layer generation module is used to perform secondary spin coating and exposure and development operations on the UTC-PD after the electrode metal deposition is completed, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer;

[0095] The electrode height raising module is used to perform electroplating operations on the UTC-PD comprising two photoresist layers and a metal seed layer, and to raise the height of the N electrode of the UTC-PD to a preset height;

[0096] A lift-off module is used to remove the photoresist in the UTC-PD after the electrode height is lifted and the metal seed layer except the N electrode in the metal seed layer by using a lift-off method;

[0097] The flip-chip bonding module is used to flip-chip bond the lift-off processed UTC-PD to a heat sink with an inductor structure to obtain a UTC-PD with enhanced bandwidth.

[0098] It can be understood that the bandwidth enhancement system for a single-row carrier photodetector of this embodiment improves the method of embodiment 1. The options in embodiment 1 are also applicable to this embodiment, so they will not be described again here.

[0099] The same or similar reference numerals correspond to the same or similar components;

[0100] The terms used in the drawings to describe positional relationships are for illustrative purposes only and should not be construed as limiting the present embodiment.

[0101] Obviously, the above embodiments of the present invention are merely examples for the purpose of clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the claims of the present invention.

Claims

1. A method for enhancing the bandwidth of a single-line carrier photodetector, characterized in that: The following steps are involved: Using photoresist, performing a spin coating and exposure and development operation on the UTC-PD, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer; Performing electrode metal deposition on the UTC-PD comprising a first photoresist layer, so that a metal seed layer is deposited on a surface of the first photoresist layer; The UTC-PD after electrode metal deposition is subjected to secondary spin coating and exposure and development operations, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer; Performing electroplating on the UTC-PD comprising two photoresist layers and a metal seed layer, raising the height of the N electrode of the UTC-PD to a preset height; Using a lift-off method, the photoresist in the UTC-PD with the electrode height lifted and the metal seed layer except the N electrode in the metal seed layer are removed; The lift-off treated UTC-PD is flip-chip bonded to a heat sink with an inductor structure to obtain a UTC-PD with enhanced bandwidth.

2. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 1, characterized in that: Using photoresist, the operation of stripping and exposing UTC-PD includes: Spin-coat the photoresist on the UTC-PD so that the photoresist covers the entire UTC-PD. Pre-bake the UTC-PD covered with the photoresist to remove the solvent in the photoresist, thus achieving one-step photoresist spinning. The UTC-PD after the solvent is removed is placed in a maskless lithography machine, and the UTC-PD in the maskless lithography machine is exposed using a preset program and a preset layout; The UTC-PD that has completed the exposure operation is post-baked, and the developer and deionized water are used to develop the UTC-PD that has completed the post-baking operation, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer.

3. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 2, characterized in that: When electroplating the UTC-PD including two photoresist layers and a metal interlayer, the electroplating operation is performed using an electroplating solution and an electroplating tank to raise the height of the N electrode of the UTC-PD to a position flush with the height of the P electrode.

4. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 3, wherein: The steps of removing the photoresist in the UTC-PD with the electrode height lifted and the metal seed layer except the N electrode in the metal seed layer by using the lift-off method include: The UTC-PD with the electrode height raised is immersed in acetone. After soaking for a preset time, the immersed UTC-PD is rinsed with isopropyl alcohol and deionized water respectively to remove the photoresist of the UTC-PD.

5. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 4, characterized in that: The expression of the 3dB bandwidth of UTC-PD after lift-off processing is: Where, Indicates the 3dB bandwidth of UTC-PD after lift-off processing, represents the transition bandwidth of UTC-PD after lift-off processing, The bandwidth of the RC equivalent circuit of the flip-chip bonded UTC-PD.

6. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 5, characterized in that: The resonant frequency of the RLC equivalent circuit of the bandwidth-enhanced UTC-PD is expressed as: Where, represents the resonant frequency of the RLC equivalent circuit of the bandwidth-enhanced UTC-PD, Indicates the inductance value of the inductor structure of the bandwidth-enhanced UTC-PD, Represents the junction capacitance of the bandwidth-enhanced UTC-PD.

7. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 6, characterized in that: The resonant frequency The size of is related to the inductance of the heat sink with inductor structure. When the inductance of the heat sink is When Has the optimal value , and The expressions are: Where, Indicates the terminal load resistance of the test equipment connected to the bandwidth-enhanced UTC-PD from the outside. Represents the UTC-PD series resistance.

8. The method for enhancing bandwidth of a single-row carrier photodetector according to any one of claims 1 to 7, characterized in that: The UTC-PD includes: InGaAs / InP UTC-PD.

9. The method for enhancing bandwidth of a single-row carrier photodetector according to claim 8, characterized in that: The heat sink includes a diamond heat sink.

10. A single-row carrier photodetector bandwidth enhancement system, used to implement the single-row carrier photodetector bandwidth enhancement method according to any one of claims 1 to 9, characterized in that: include: A first photoresist layer generating module is used to perform a spin coating and exposure and development operation on the UTC-PD using the photoresist, so that the photoresist covers the entire surface of the UTC-PD with a preset photoresist pattern to form a first photoresist layer; An electrode metal deposition module is used to perform electrode metal deposition on the UTC-PD including the first photoresist layer, so that the metal seed layer is deposited on the surface of the first photoresist layer; The second photoresist layer generation module is used to perform secondary spin coating and exposure and development operations on the UTC-PD after the electrode metal deposition is completed, so that the metal seed layer except the N electrode is covered with photoresist to form a second photoresist layer; The electrode height raising module is used to perform electroplating operations on the UTC-PD comprising two photoresist layers and a metal seed layer, and to raise the height of the N electrode of the UTC-PD to a preset height; A lift-off module is used to remove the photoresist in the UTC-PD after the electrode height is lifted and the metal seed layer except the N electrode in the metal seed layer by using a lift-off method; The flip-chip bonding module is used to flip-chip bond the lift-off processed UTC-PD to a heat sink with an inductor structure to obtain a UTC-PD with enhanced bandwidth.

Images