EML chip and testing method

Abstract

The present invention provides an EML chip and a testing method. Part of the modulator in the modulator area of ​​the EML chip is removed to serve as a common ground line for a G electrode in a test electrode. The G electrode of the test electrode is arranged on a substrate exposed after the modulator is removed, and an S electrode and a G electrode are arranged on the modulator, thereby integrating the test electrode on the EML chip. A thin-film resistor is arranged on the G electrode and on a filling layer between the G electrode and the S electrode, thereby eliminating the COC packaging process of the EML chip and eliminating inductance and capacitance errors caused by gold wire in the COC packaging. Furthermore, a microwave probe is connected to the S electrode and switched between the thin-film resistor and the disconnection, thereby performing a DC test or a high-frequency test.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optical chips, and in particular to an EML chip and a testing method. Background Art

[0002] In traditional semiconductor optical chip manufacturing, after completing the epitaxial wafer electrode process, the epitaxial wafer needs to be cleaved into bars, coated, and then separated into individual chips for testing and screening. EML (Electroabsorption Modulated Laser) chips require not only chip-level optoelectronic performance testing, but also COC (chip on carrier) high-frequency bandwidth eye diagram testing. High-frequency testing requires the screened chips to be surface-mounted and packaged into COCs, but this wastes a lot of material and time costs during the mass production phase. Furthermore, during the COC packaging process, the chip gold wire welding is required. The length of the gold wire is related to the inductance L, and the length of the gold wire fluctuates during the production process. This fluctuation in inductance L can have a significant impact on the high-frequency characteristics of the back-end test chip.

[0003] In view of this, overcoming the defects of the prior art is an urgent problem to be solved in this technical field. Summary of the Invention

[0004] The technical problem to be solved by the present invention is how to save time and cost for COC packaging of chips before high-frequency testing, and to avoid inductance fluctuations caused by gold wires in COC packaging.

[0005] The present invention adopts the following technical solutions:

[0006] In a first aspect, an EML chip includes: a thin film resistor 1 and a test electrode 4, wherein:

[0007] The EML chip includes a laser area 2 and a modulator area 3. The modulator area 3 includes a modulation area 31 and a test area 32. The test electrode 4 and the thin film resistor 1 are both arranged in the test area 32.

[0008] The modulation area 31 is provided with a modulation electrode 7, and the modulation electrode 7 extends in a direction close to the laser area 2. The test electrode 4 includes an S electrode 41 and a G electrode 42. ， The S electrode 41 is disposed on the side of the modulation electrode 7 and is connected to the modulation electrode 7. The G electrode 42 is disposed adjacent to the S electrode 41. One end of the thin film resistor 1 is connected to the G electrode 42. A preset gap is formed between the other end of the thin film resistor 1 and the S electrode 41.

[0009] Under the action of an external probe, the other end of the thin film resistor 1 is selectively connected to the S electrode 41 to switch the test mode of the EML chip.

[0010] Preferably, the test electrode 4 includes two G electrodes 42 arranged opposite to each other, wherein one of the G electrodes 42 is arranged close to the laser area 2, and the G electrode 42 arranged close to the laser area 2 is connected to the thin film resistor 1;

[0011] The S electrode 41 is disposed between the two G electrodes 42 .

[0012] Preferably, the EML chip includes a substrate 39, on which a first contact layer 34, two oppositely arranged second contact layers 36, a third contact layer 37 and a filling layer 35 are provided. The first contact layer 34 extends to the laser region 2, one of the second contact layers 36 is provided close to the laser region 2, and the other second contact layer 36 is provided close to the edge of the substrate 39. The third contact layer 37 is provided below the modulation electrode 7 and extends to the laser region 2. The filling layer 35 is provided in the gap between the first contact layer 34, the two oppositely arranged second contact layers 36 and the third contact layer 37.

[0013] A G electrode 42 is provided on the second contact layer 36 , and an S electrode 41 is provided on the filling layer 35 located between the two second contact layers 36 .

[0014] Preferably, the two G electrodes 42 extend downward along the side surfaces of the corresponding second contact layer 36 to the substrate 39.

[0015] A connecting line is provided on the substrate 39 , and the connecting line connects the two G electrodes 42 .

[0016] Preferably, an insulating layer 5 is further provided between the G electrode 42 and the second contact layer 36 ; and an insulating layer 5 is further provided between the S electrode 41 and the filling layer 35 .

[0017] Preferably, the filling layer 35 below the S electrode 41 is higher than the first preset height of the second contact layer 36, so that the S electrode 41 above the filling layer 35 is higher than the first preset height of the G electrode 42 above the second contact layer 36, thereby ensuring good contact between the microwave probe and the test electrode 4.

[0018] Preferably, a modulator quantum well 33 is further provided between the substrate 39 and the first contact layer 34 , the second contact layer 36 , the third contact layer 37 and the filling layer 35 ; and a back metal electrode 38 is further provided below the substrate 39 .

[0019] Preferably, an isolation region 6 is provided between the modulation electrode 7 and the laser region 2 .

[0020] In a second aspect, a method for testing an EML chip, using the EML chip, includes high-frequency testing, wherein:

[0021] The microwave probes on both sides of the microwave probe are respectively connected to the G electrodes 42 at both ends of the test electrode 4, and the microwave probe in the middle of the microwave probe is simultaneously connected to the S electrode 41 of the test electrode 4 and the thin film resistor 1;

[0022] The DC probe is connected to the electrode of the laser area 2, and the optical fiber is connected to the modulator area 3;

[0023] A bias voltage and a high-frequency signal are applied to the modulator region 3 through a microwave probe, a current is applied to the laser region 2 through a DC probe, and the signal is coupled through an optical fiber to complete the high-frequency test.

[0024] Preferably, a DC test is also included, wherein:

[0025] After completing the high-frequency test, the microwave probe in the middle of the microwave probe is displaced to ensure that the microwave probe in the middle of the microwave probe is only connected to the S electrode 41 of the test electrode 4 and is separated from the thin film resistor 1;

[0026] A bias voltage is applied to the modulator region 3 through a microwave probe, a current is applied to the laser region 2 through a DC probe, and the signal is coupled by optical fiber to complete the DC test.

[0027] The present invention provides an EML chip and a testing method. Part of the modulator in the modulator area of ​​the EML chip is removed to serve as a common ground line for a G electrode in a test electrode 4. The G electrode of the test electrode 4 is arranged on a substrate exposed after the modulator is removed, and an S electrode and a G electrode are arranged on the modulator area, thereby integrating the test electrode 4 on the EML chip. A thin-film resistor is arranged on the G electrode and on a filling layer between the G electrode and the S electrode, thereby eliminating the COC packaging process of the EML chip and eliminating inductance and capacitance errors caused by gold wire in the COC packaging. Furthermore, a microwave probe is connected to the S electrode and the microwave probe is switched between disconnection and connection with the thin-film resistor, thereby performing a DC test or a high-frequency test. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0029] Figure 1 1 is a top view of an EML chip provided by an embodiment of the present invention;

[0030] Figure 2 is a top view of another EML chip provided by an embodiment of the present invention;

[0031] Figure 3 1 is a top view of another EML chip provided by an embodiment of the present invention;

[0032] Figure 4 1 is a top view of an EML chip provided by an embodiment of the present invention;

[0033] Figure 5 1 is a side view of an EML chip provided by an embodiment of the present invention;

[0034] Figure 6 1 is a top view of an EML chip provided by an embodiment of the present invention;

[0035] Figure 7 1 is a front view of an EML chip provided by an embodiment of the present invention;

[0036] Figure 8 This is a flow chart of a method for testing an EML chip provided by an embodiment of the present invention;

[0037] Figure 9 This is a connection diagram of a method for testing an EML chip provided by an embodiment of the present invention;

[0038] Figure 10 This is a flow chart of another method for testing an EML chip provided by an embodiment of the present invention;

[0039] Figure 11 This is a connection diagram of a method for testing an EML chip provided by an embodiment of the present invention;

[0040] Wherein, the reference numerals in the accompanying drawings are as follows:

[0041] Thin film resistor 1; laser region 2; modulator region 3; test electrode 4; modulation region 31; test region 32; modulator quantum well 33; first contact layer 34; filling layer 35; second contact layer 36; third contact layer 37; back metal electrode 38; substrate 39; S electrode 41; G electrode 42; insulating layer 5; isolation region 6; modulation electrode 7; laser electrode 8. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0043] In the description of the present invention, the terms "inside", "outside", "longitudinal", "lateral", "upper", "lower", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and do not require that the present invention must be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present invention.

[0044] In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0045] Embodiment 1:

[0046] Embodiment 1 of the present invention provides an EML chip; Figure 1-Figure 4 As shown, it includes: a thin film resistor 1 and a test electrode 4, wherein:

[0047] The EML chip includes a laser area 2 and a modulator area 3. The modulator area 3 includes a modulation area 31 and a test area 32. The test electrode 4 and the thin film resistor 1 are both arranged in the test area 32.

[0048] The modulation area 31 is provided with a modulation electrode 7, and the modulation electrode 7 extends in a direction close to the laser area 2. The test electrode 4 includes an S electrode 41 and a G electrode 42. ， The S electrode 41 is disposed on the side of the modulation electrode 7 and is connected to the modulation electrode 7. The G electrode 42 is disposed adjacent to the S electrode 41. One end of the thin film resistor 1 is connected to the G electrode 42. A preset gap is formed between the other end of the thin film resistor 1 and the S electrode 41.

[0049] The EML chip is cleaved into bars from an epitaxial wafer, and a single EML chip is obtained through conventional coating and cleavage. Each EML chip is a rectangular parallelepiped. The modulator area 3 is the left half of the EML chip, and the laser area 2 is the right half of the EML chip. In order to separate the modulator area 3 electrode and the laser electrode 8, an isolation area 6 is provided between them.

[0050] like Figure 5 As shown, Figure 5 for Figure 1 As shown in the side view, the modulator region 3 is composed of the back metal electrode 38, the substrate 39, the modulator quantum well 33 and the P-InP layer stacked in sequence from bottom to top, while the modulator structure is the modulator quantum well 33 and the P-InP layer.

[0051] In this embodiment, the test electrode is a GSG electrode.

[0052] In this embodiment, the substrate 39 is an N-Inp layer.

[0053] In this embodiment, the S electrode 41 is disposed on the side of the middle position of the modulation electrode 7 and is connected to the modulation electrode 7 .

[0054] In this embodiment, the preset interval should ensure that the thin film resistor 1 does not contact the S electrode 41, while the external probe can contact the thin film resistor 1 and the S electrode 41 at the same time by virtue of its own width. It can be set by personnel in this field according to the actual scenario, and all applicable interval value settings should be within the protection scope of this embodiment.

[0055] like Figure 4 As shown, the test electrode 4 includes two G electrodes 42 arranged opposite to each other, wherein one of the G electrodes 42 is arranged close to the laser area 2, and the G electrode 42 arranged close to the laser area 2 is connected to the thin film resistor 1;

[0056] The S electrode 41 is disposed between the two G electrodes 42 .

[0057] like Figure 5 and Figure 6 As shown, the EML chip includes a substrate 39, on which a first contact layer 34, two oppositely arranged second contact layers 36, a third contact layer 37 and a filling layer 35 are provided. The first contact layer 34 extends to the laser region 2, one of the second contact layers 36 is arranged close to the laser region 2, and the other second contact layer 36 is arranged close to the edge of the substrate 39. The third contact layer 37 is arranged below the modulation electrode 7 and extends to the laser region 2; the filling layer 35 is provided in the gap between the first contact layer 34, the two oppositely arranged second contact layers 36 and the third contact layer 37;

[0058] A G electrode 42 is provided on the second contact layer 36 , and an S electrode 41 is provided on the filling layer 35 located between the two second contact layers 36 .

[0059] In this embodiment, the first contact layer 34 , the two oppositely disposed second contact layers 36 , and the third contact layer 37 are all P-InP layers.

[0060] like Figure 5 As shown, the two G electrodes 42 extend downward along the side surfaces of the corresponding second contact layer 36 to the substrate 39.

[0061] A connecting line is provided on the substrate 39 , and the connecting line connects the two G electrodes 42 .

[0062] A modulator quantum well 33 is further provided between the substrate 39 and the first contact layer 34 , the second contact layer 36 , the third contact layer 37 and the filling layer 35 ; a back metal electrode 38 is further provided below the substrate 39 .

[0063] In this embodiment, the modulator structure at the lower end of the modulator area 3 is removed by a combination of dry etching and wet etching. A G electrode 42 is set above the second contact layer 36 to provide a ground line for the test electrode 4. An S electrode 41 is set above the filling layer 35. In this embodiment, the S electrode 41 of the test electrode 4 is connected to the modulation electrode 7. A P-InP layer is located below the modulation electrode 7, and an ohmic contact layer is also provided between the modulation electrode 7 and the P-InP layer.

[0064] In this embodiment, the thickness of the S electrode 41 is less than 60 μm.

[0065] The two ends of the G electrode 42 arranged above the second contact layer 36 are connected to the connecting lines arranged on the substrate 39 to connect the two G electrodes 42 and connect the two G electrodes 42 to the ground line; in this embodiment, the thickness of the G electrode 42 is less than 70um.

[0066] The two G electrodes 42 and the connecting wire are made of the same material.

[0067] In this embodiment, the G electrode 42 is only arranged in the middle part of the P-InP layer or substrate 39 thereunder, and does not fill the surface of the P-InP layer or substrate 39; the S electrode 41 is only arranged in the middle part of the filling layer 35 thereunder, and does not fill the surface of the filling layer 35, thereby ensuring the distance between the S electrode 41 and the G electrode 42.

[0068] Under the action of an external probe, the other end of the thin film resistor 1 is selectively connected to the S electrode 41 to switch the test mode of the EML chip.

[0069] In this embodiment, the thin film resistor 1 is made of metal titanium, and the resistance value of the thin film resistor 1 itself can adjust the material used and the three-dimensional height according to actual scenario requirements, so as to adapt to different scenarios. The thin film resistor 1 is only connected to one end of the G electrode 42 and has no connection with the S electrode 41.

[0070] During actual high-frequency testing, since high-frequency signals cannot pass through the thin-film resistor 1, the microwave probe can be directly connected to the S electrode 41 and the thin-film resistor 1 at the same time to transmit the high-frequency signal; however, during DC testing, since DC signals can pass through the thin-film resistor 1, the microwave probe connected to the S electrode 41 cannot be connected to the thin-film resistor 1.

[0071] In existing semiconductor optical chip processes, before high-frequency testing of EML chips, screened chips need to be surface-mounted and packaged into COCs. During mass production of chips, the COC packaging process itself wastes a lot of material and time costs. In addition, during the COC packaging process, the chip gold wire welding is required. The COC package involves a total of three gold wires. One gold wire has one end connected to the modulation electrode 7 and the other end is connected to the S electrode 41. Another gold wire is also connected to the modulation electrode 7 and the other end is connected to the ground wire. The third gold wire has one end connected to the laser electrode 8 and the other end is used to connect to the DC probe. The length of the gold wire is related to the inductance L. The length of the gold wire fluctuates during the production process. Therefore, the gold wire itself will introduce a certain amount of inductance and capacitance. Although the inductance and capacitance of the gold wire itself are usually very small, the inductance and capacitance of the modulator are usually also very small. Therefore, the inductance and capacitance introduced by the gold wire are relatively large compared to the modulator. Therefore, the inductance and capacitance introduced by the gold wire will cause a significant error in the high-frequency signal of the modulator, resulting in large errors in subsequent high-frequency test results.

[0072] In this embodiment, part of the modulator in the modulator area 3 in the EML chip is removed to serve as a common ground line for the G electrode 42 in the test electrode 4, and the G electrode 42 of the test electrode 4 is set on the P-InP layer of the EML chip and the substrate 39 exposed after removing the modulator, and the S electrode 41 of the test electrode 4 is set on the filling layer 35, so that the test electrode 4 is integrated on the EML chip, and the thin film resistor 1 is set on the G electrode 42 and the filling layer 35 between the G electrode 42 and the S electrode 41, thereby eliminating the COC packaging process of the EML chip and eliminating the inductance and capacitance errors caused by the gold wire in the COC packaging. DC testing or high-frequency testing can be performed by switching the microwave probe and the thin film resistor 1 to be disconnected or connected while the microwave probe is connected to the S electrode 41.

[0073] Since the G electrode 42 and the S electrode 41 need to be connected to a microwave probe when performing high-frequency testing, it is necessary to prevent current from directly transmitting from the electrodes to the P-InP layer or the filling layer 35 to cause a short circuit.

[0074] like Figure 5 and Figure 7 As shown, an insulating layer 5 is further provided between the G electrode 42 and the second contact layer 36 ; and an insulating layer 5 is further provided between the S electrode 41 and the filling layer 35 .

[0075] In this embodiment, the insulating layer 5 is a silicon dioxide layer. One end of the thin film resistor 1 is connected to the G electrode 42 , and the other end is separated from the filling layer 35 between the G electrode 42 and the S electrode 41 by the insulating layer 5 .

[0076] In this embodiment, since the height of the BCB material under the S electrode 41 fluctuates and the BCB material itself is relatively soft, the height of the BCB material and the height of the P-InP layer need to be adaptively adjusted accordingly.

[0077] like Figure 7 As shown, the filling layer 35 below the S electrode 41 is higher than the first preset height of the second contact layer 36, so that the S electrode 41 above the filling layer 35 is higher than the first preset height of the G electrode 42 above the second contact layer 36, thereby ensuring good contact between the microwave probe and the test electrode 4.

[0078] Since the BCB filling layer is a soft material, when the probe needs to connect with the thin film resistor 1 on the BCB filling layer and the S electrode 41 on the BCB filling layer at the same time, the S electrode 41 can be pressed to ensure that the S electrode 41 drops to the same height as the thin film resistor 1, which is more conducive to the simultaneous docking of the probe with the two objects.

[0079] In this embodiment, the first preset height is 1 um.

[0080] like Figure 6 As shown, an isolation region 6 is provided between the laser region electrode and the S electrode 41 .

[0081] The laser region 2 is provided with a P-InP layer of the laser region 2 at the same height as the P-InP layer of the modulator region 3 , and a laser electrode 8 is provided on the P-InP layer of the laser region 2 , and the height of the laser electrode 8 is consistent with the height of the modulation electrode 7 .

[0082] In this embodiment, the laser electrode 8 is made of the same material as the test electrode 4 and is substantially the same height as the test electrode 4 . The laser electrode 8 is used to connect with a DC probe during DC testing and high-frequency testing, thereby applying current to the laser region 2 .

[0083] Example 2:

[0084] The embodiment of the present invention provides an EML chip and a testing method based on the embodiment 1.

[0085] EML chips and test methods include high-frequency testing and DC testing.

[0086] In this embodiment, the test devices used for high-frequency testing and DC testing may be different test devices or the same test device;

[0087] When using different test devices, it is necessary to transfer the EML chip to the DC test device for testing after the high-frequency test is completed;

[0088] When the same test device is used, the test device can be directly adjusted after the high-frequency test is completed, and the DC signal test can be directly performed without introducing the high-frequency signal. Then, the docking relationship between the microwave probe and the thin film resistor 1 can be adjusted, and the DC test can be directly performed.

[0089] In this embodiment, the DC test and the high-frequency test use the same test device.

[0090] like Figure 8 and Figure 9 The high frequency test process is as follows:

[0091] In step 101, the microwave probes on both sides of the microwave probe are connected to the G electrodes 42 at both ends of the test electrode 4, and the microwave probe in the middle of the microwave probe is connected to the S electrode 41 of the test electrode 4 and the thin film resistor 1 at the same time;

[0092] In step 102, the DC probe is connected to the laser electrode 8, and the optical fiber is connected to the modulator area 3;

[0093] In step 103, a bias voltage and a high-frequency signal are applied to the modulator region 3 through a microwave probe, a current is applied to the laser region 2 through a DC probe, and a signal is coupled through an optical fiber to complete a high-frequency test.

[0094] like Figure 10 and Figure 11 As shown, the DC test steps are as follows:

[0095] In step 201, after the high-frequency test is completed, the microwave probe in the middle of the microwave probe is displaced to ensure that the microwave probe in the middle of the microwave probe is only connected to the S electrode 41 of the test electrode 4 and is separated from the thin film resistor 1;

[0096] In step 202, the DC probe is connected to the laser electrode 8, and the optical fiber is connected to the modulator area 3;

[0097] In step 203, a bias voltage is applied to the modulator region 3 through a microwave probe, a current is applied to the laser region 2 through a DC probe, and a signal is coupled through an optical fiber to complete a DC test.

[0098] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An EML chip, characterized in that: include: A thin film resistor (1) and a test electrode (4), wherein: The EML chip comprises a laser region (2) and a modulator region (3), the modulator region (3) comprises a modulation area (31) and a test area (32), and the test electrode (4) and the thin film resistor (1) are both arranged in the test area (32); The modulation area (31) is provided with a modulation electrode (7), the modulation electrode (7) extends in a direction close to the laser area (2), and the test electrode (4) includes an S electrode (41) and a G electrode (42). ， The S electrode (41) is arranged on the side of the modulation electrode (7), the S electrode (41) is connected to the modulation electrode (7), the G electrode (42) is arranged adjacent to the S electrode (41), one end of the thin film resistor (1) is connected to the G electrode (42), and a preset gap exists between the other end of the thin film resistor (1) and the S electrode (41); Wherein, under the action of an external probe, the other end of the thin film resistor (1) is selectively connected to the S electrode (41) to switch the test mode of the EML chip.

2. The EML chip according to claim 1, wherein: The test electrode (4) includes two G electrodes (42) arranged opposite to each other, wherein one of the G electrodes (42) is arranged close to the laser region (2), and the G electrode (42) arranged close to the laser region (2) is connected to the thin film resistor (1); The S electrode (41) is arranged between the two G electrodes (42).

3. The EML chip according to claim 2, wherein: The EML chip comprises a substrate (39), on which a first contact layer (34), two oppositely arranged second contact layers (36), a third contact layer (37) and a filling layer (35) are arranged, wherein the first contact layer (34) extends to the laser region (2), one of the second contact layers (36) is arranged close to the laser region (2), and the other second contact layer (36) is arranged close to the edge of the substrate (39), and the third contact layer (37) is arranged below the modulation electrode (7) and extends to the laser region (2); the filling layer (35) is arranged in the gap between the first contact layer (34), the two oppositely arranged second contact layers (36) and the third contact layer (37); A G electrode (42) is provided on the second contact layer (36), and an S electrode (41) is provided on the filling layer (35) located between the two second contact layers (36).

4. The EML chip according to claim 3, wherein: The two G electrodes (42) extend downward along the side surfaces of the corresponding second contact layer (36) to the substrate (39), A connecting line is provided on the substrate (39), and the connecting line connects the two G electrodes (42).

5. The EML chip according to claim 3, wherein: An insulating layer (5) is further provided between the G electrode (42) and the second contact layer (36); and an insulating layer (5) is further provided between the S electrode (41) and the filling layer (35).

6. The EML chip according to claim 3, wherein: The filling layer (35) below the S electrode (41) is higher than a first preset height of the second contact layer (36), so that the S electrode (41) above the filling layer (35) is higher than a first preset height of the G electrode (42) above the second contact layer (36), thereby ensuring good contact between the microwave probe and the test electrode (4).

7. The EML chip according to claim 3, wherein: A modulator quantum well (33) is also provided between the substrate (39) and the first contact layer (34), the second contact layer (36), the third contact layer (37) and the filling layer (35); and a back metal electrode (38) is also provided below the substrate (39).

8. The EML chip according to claim 1, wherein: An isolation region (6) is provided between the modulation electrode (7) and the laser region (2).

9. A method for testing an EML chip, characterized in that: Using the EML chip according to any one of claims 1 to 8, including high frequency testing, wherein: The microwave probes on both sides of the microwave probe are respectively connected to the G electrodes (42) at both ends of the test electrode (4), and the microwave probe in the middle of the microwave probe is simultaneously connected to the S electrode (41) of the test electrode (4) and the thin film resistor (1); The DC probe is connected to the electrode of the laser area (2), and the optical fiber is connected to the modulator area (3); A bias voltage and a high-frequency signal are applied to the modulator region (3) through a microwave probe, a current is applied to the laser region (2) through a DC probe, and the signal is coupled through an optical fiber to complete a high-frequency test.

10. The method for testing an EML chip according to claim 9, wherein: Also included are DC tests, where: After the high-frequency test is completed, the microwave probe in the middle of the microwave probe is displaced to ensure that the microwave probe in the middle of the microwave probe is only connected to the S electrode (41) of the test electrode (4) and is separated from the thin film resistor (1); A bias voltage is applied to the modulator region (3) through a microwave probe, a current is applied to the laser region (2) through a DC probe, and a signal is coupled through an optical fiber to complete a DC test.

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