Optical modules and communication equipment

Abstract

This application relates to an optical module and a communication device. The optical module includes an optical interface, optical devices, a processing chip, and an electrical interface. The optical interface includes N first transmitting interfaces for emitting optical signals and N first receiving interfaces for receiving optical signals. The optical devices include N transmitting channels and N receiving channels, where the m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel, 1 ≤ m ≤ N, where m is an integer and N > 1 and is an integer. In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces. The optical module of this application, by redefining the interface order of the optical interface and correspondingly switching the pin order of the processing chip, reduces the degree of cross-connection between the processing chip and the optical interface without increasing the cost of the processing chip.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an optical module and communication device. Background Technology

[0002] A pluggable optical module is an optoelectronic device used for photoelectric and electro-optical conversion. It mainly includes an electrical interface, a signal processing chip, optical components, an optical interface, a power supply, and a microcontroller unit (MCU). The electrical interface, signal processing chip, optical components, and optical interface are connected in series. The optical interface is used to connect to external optical fibers and has various forms. Taking a quad small form factor pluggable-double-density (QSFP-DD) multi-source agreement (MSA) optical module as an example, in one form of the optical interface, it can include optical signal transmitting interfaces TX1-TX8 and optical signal receiving interfaces RX1-RX8, where TX8 and RX8 are adjacent, and the order of TX1-TX8 in the same direction is the reverse of the order of RX1-RX8. According to the connection method corresponding to this optical interface form, each interface is connected to a pin of the signal processing chip through the optical component to form a signal transmission channel. Therefore, the transmission channels corresponding to interfaces RX1-RX4, TX5-TX8, and RX8-RX5 have multiple intersections. The crossover of lines makes processing and assembly difficult, resulting in low yield and high cost of optical modules, which in turn makes the hardware implementation of optical modules more difficult. Summary of the Invention

[0003] In view of this, an optical module and communication device are proposed. The optical module of this application redefines the interface order of the optical interface and switches the pin order of the processing chip accordingly, so as to reduce the degree of line crossing between the processing chip and the optical interface without increasing the cost of the processing chip.

[0004] In a first aspect, embodiments of this application provide an optical module, including an optical interface, an optical device, a processing chip, and an electrical interface. Optical signals received by the optical interface are converted into electrical signals by the optical device and then transmitted to the electrical interface via the processing chip. Electrical signals received by the electrical interface are transmitted to the optical device via the processing chip, converted into optical signals by the optical device, and transmitted to the optical interface. The optical interface includes N first transmitting interfaces for emitting optical signals and N first receiving interfaces for receiving optical signals. The optical device includes N transmitting channels and N receiving channels, where the m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel, 1 ≤ m ≤ N, where m is an integer and N > 1 and is an integer. In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces.

[0005] According to the optical module of the present application embodiment, by redefining the interface order of the optical interface, the optical interface includes N first transmitting interfaces for transmitting optical signals and N first receiving interfaces for receiving optical signals. The optical device includes N transmitting channels and N receiving channels. The m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel, 1≤m≤N, where m is an integer and N>1 is an integer. In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces. This allows the lines crossing from the optical device to the optical interface to only have some lines corresponding to the receiving channels crossing with some lines corresponding to the transmitting channels. Compared with the prior art where all lines corresponding to the receiving channels cross with some lines corresponding to the transmitting channels, this reduces the degree of line crossing, improves the processing yield of the optical module, and reduces costs.

[0006] Optical module packaging forms include quad small form factor pluggable-double density (QSFP-DD), octal small form factor pluggable (OSPF), and centum form-factor pluggable (CFP).

[0007] According to the first aspect, in a first possible implementation of the optical module, the processing chip includes two optical digital signal processors, each optical digital signal processor including N / 2 first transmit pins and N / 2 first receive pins, the m-th first transmit pin on the processing chip corresponds to the m-th transmit channel, and the m-th first receive pin corresponds to the m-th receive channel; in the same arrangement direction of each optical digital signal processor, the order of the p-th first receive pin is the same as the order of the first receive interface corresponding to the same receive channel, and the order of the p-th first transmit pin is the same as the order of the first transmit interface corresponding to the same transmit channel, 1≤p≤N / 2 and are integers.

[0008] In this way, each optical digital signal processor (ODS) can be used independently. Therefore, when the transmission rate of any ODS in the processing chip is greater than or equal to the required transmission rate, only one ODS in the processing chip needs to be used, without investing in a new processing chip to meet the required transmission rate. This achieves cost savings and improves the structural flexibility of the processing chip. For example, if each ODS has a transmission rate of 400 Gbps, and the optical module requires a transmission rate of 400 Gbps, only one ODS in the processing chip can be used. If the optical module requires a transmission rate of 800 Gbps, two ODS in the processing chip can be used.

[0009] According to a first possible implementation of the first aspect, in a second possible implementation of the optical module, the optical device includes at least one optical transmitter and at least one optical receiver, the m-th first transmitting interface and the m-th first transmitting pin are connected to the optical transmitter including the m-th transmitting channel; the m-th first receiving interface and the m-th first receiving pin are connected to the optical receiver including the m-th receiving channel; wherein the connections between the optical transmitter and the first transmitting pin, and between the optical receiver and the first receiving pin, do not cross.

[0010] This approach reduces the complexity of the wiring between optical devices and the processing chip. Higher wiring complexity results in more circuit board layers for the optical module, increasing its cost. Reducing the wiring complexity between optical devices and the processing chip reduces the number of circuit board layers, thereby lowering the cost of the optical module. Reducing the wiring complexity also reduces insertion loss. Compared to existing technologies, the high-speed wiring between the processing chip and the optical device in this embodiment can be reduced by 17.5%, and insertion loss can be reduced by 0.8 dB@112 Gbps.

[0011] According to the first possible implementation of the first aspect, in the third possible implementation of the optical module, the optical device includes at least one optical transceiver integrator, the optical transceiver integrator including at least one optical transmitting unit, at least one optical receiving unit, N second transmitting interfaces, and N second receiving interfaces. The m-th first transmitting pin is connected to the optical transmitting unit including the m-th transmitting channel, and the m-th second transmitting interface corresponding to the m-th transmitting channel is connected to the m-th first transmitting interface. Optical signals are transmitted between the m-th second transmitting interface and the optical transmitting unit including the m-th transmitting channel using an optical waveguide. The m-th first receiving pin is connected to the optical receiving unit including the m-th receiving channel, and the m-th second receiving interface corresponding to the m-th receiving channel is connected to the m-th first receiving interface. Optical signals are transmitted between the m-th second receiving interface and the optical receiving unit including the m-th receiving channel using an optical waveguide. The connections between the first transmitting interface and the optical transmitter, and between the first receiving interface and the optical receiver, do not cross.

[0012] In this way, crossovers only occur in the lines between the optical digital signal processor and the optical devices, and the degree of crossover between the lines between the optical digital signal processor and the optical devices is greatly reduced compared to existing technologies. This also improves the flexibility of line crossover methods in optical modules.

[0013] According to the second possible implementation of the first aspect, in the fourth possible implementation of the optical module, the optical receiver and the optical transmitter are respectively disposed on both sides of the circuit board.

[0014] This approach allows for more flexible configuration of the optical receiver and transmitter.

[0015] According to the fourth possible implementation of the first aspect, in the fifth possible implementation of the optical module, when the optical fiber between the optical receiver and the first receiving interface intersects with the optical fiber between the optical transmitter and the first transmitting interface, they intersect in the thickness direction of the circuit board.

[0016] This method reduces the difficulty of implementing line crossings.

[0017] According to the first aspect, or any possible implementation of the first aspect above, in the sixth possible implementation of the optical module, the electrical interface includes Q third transmitting interfaces and Q third receiving interfaces, where Q and N are multiples of each other.

[0018] This approach makes the electrical interface structure more flexible.

[0019] Secondly, embodiments of this application provide a communication device, including a housing, a motherboard, and one or more optical modules according to the first aspect or various possible implementations of the first aspect, wherein the motherboard is located in the housing and the optical modules are inserted into the motherboard.

[0020] Communication equipment can include top-of-rack (TOR) switches, leaf switches, spine switches, core switches, routers, wavelength division multiplexing (WDM) equipment, etc.

[0021] These and other aspects of this application will become more apparent in the description of the following embodiments(s). Attached Figure Description

[0022] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this application together with the specification and serve to explain the principles of this application.

[0023] Figure 1 Examples of various optical interface forms of optical modules employing dual-density four-channel small pluggable multi-source protocols in the prior art are shown.

[0024] Figure 2 This illustrates an example of a crossover situation between the signal processing chip and the optical interface in a prior art optical module.

[0025] Figure 3 This illustrates an example of a crossover situation between the signal processing chip and the optical interface in a prior art optical module.

[0026] Figure 4 This illustrates an example of the connection method between the pins on both sides of the optical digital signal processor in the signal processing chip of a prior art optical module.

[0027] Figure 5 This illustrates an exemplary application scenario of an optical module according to an embodiment of this application.

[0028] Figure 6a An exemplary structural diagram of an optical module 10 according to an embodiment of this application is shown.

[0029] Figure 6b This document illustrates several different arrangements of the interfaces in an optical interface according to embodiments of this application, as well as examples of the same arrangement direction under different arrangements.

[0030] Figure 7 An exemplary structural diagram of an optical digital signal processor according to an embodiment of this application is shown.

[0031] Figure 8a A schematic diagram showing the structure of an optical device 102 according to an embodiment of this application is provided.

[0032] Figure 8b A schematic diagram showing the structure of an optical device 102 according to an embodiment of this application is provided.

[0033] Figure 9 A schematic diagram of an exemplary structure of an electrical interface according to an embodiment of this application is shown.

[0034] Figure 10a An exemplary structural diagram of a communication device according to an embodiment of this application is shown.

[0035] Figure 10b An exemplary structural diagram of a communication device according to an embodiment of this application is shown. Detailed Implementation

[0036] Various exemplary embodiments, features, and aspects of this application will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0037] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0038] Furthermore, to better illustrate this application, numerous specific details are provided in the following detailed embodiments. Those skilled in the art should understand that this application can be implemented without certain specific details. In some instances, methods, means, components, and circuits well-known to those skilled in the art have not been described in detail in order to highlight the main points of this application.

[0039] A pluggable optical module is an optoelectronic device used for photoelectric and electro-optical conversion. It mainly includes an electrical interface, a signal processing chip (hereinafter referred to as the processing chip), optical components, an optical interface, a power supply, and a microcontroller unit (MCU). The electrical interface, signal processing chip (including optical digital signal processors (ODSPs), optical components, and optical interface are connected in series. The signal processing chip outputs and receives electrical signals; the optical components include an optical transmitter and an optical receiver. The optical transmitter receives electrical signals and outputs optical signals, and the optical receiver receives optical signals and outputs electrical signals; the optical interface is used to connect to external optical fibers, outputting optical signals to or receiving optical signals from the optical fiber, and comes in various forms. Figure 1Examples of various optical interface forms of optical modules employing quad small form factor pluggable-double density (QSFP-DD) multi-source agreement (MSA) in the prior art are shown.

[0040] like Figure 1 As shown, optical interface configurations can include multi-fiber push-on (MPO) connectors such as MPO-12 and MPO-16 connectors, duplex fiber connectors such as Duplex LC connectors, dual-core fiber connectors such as Dual CS, Dual SN, Dual MDC, and Dual MPO-12 connectors, duplex dual-channel fiber connectors such as Dual Duplex LC connectors, and quad-channel fiber connectors such as Quad SN and Quad MDC connectors. Each configuration includes an optical signal transmitting interface (TX) and an optical signal receiving interface (RX). Taking the MPO-16 connector as an example, its optical signal transmitting interfaces TX1 to TX8 can each connect to 8 optical fibers (not shown), and its optical signal receiving interfaces RX1 to RX8 can each connect to 8 optical fibers (not shown), allowing the MPO-16 connector to connect a total of 16 optical fibers. Interfaces TX8 and RX8 are adjacent and aligned in the same direction (for...). Figure 1 The MPO-16 connectors shown can be arranged from left to right or right to left. The order of interfaces TX1 to TX8 is the reverse of the order of interfaces RX1 to RX8. Figure 1 Taking the left-to-right arrangement as an example, the order is TX1 to TX8, and RX8 to RX1. For optical modules including optical interfaces with MPO-16 connectors, according to the connection method defined by the dual-density four-channel small form factor pluggable package multi-source protocol QSFP-DD MSA standard, the electrical interface can be implemented using gold fingers, including interfaces TX-1 to TX-8 (see examples below). Figure 2 and Figure 3 These can be respectively associated with the optical interfaces TX1 to TX8, and the electrical interfaces RX-1 to RX-8 (see examples below). Figure 2 and Figure 3 These can correspond to the optical interfaces RX1 to RX8, respectively. A signal transmission channel needs to be formed between the two corresponding interfaces via lines and devices (signal processing chip and optical devices), resulting in multiple line crossings between the signal processing chip and the optical interface. Figures 2-3 Examples of line crossings between the signal processing chip and the optical interface in existing optical modules are shown respectively.

[0041] like Figure 2 As shown, the existing technology proposes a solution where the lines (fiber optic cables) between the optical device and the optical interface cross, while the lines between the signal processing chip and the optical device do not cross. This solution uses a signal processing chip comprising two packaged optical digital signal processors (ODSP1 and ODSP2). Each optical digital signal processor has electrical signal receiving pins and electrical signal transmitting pins on both sides, arranged in groups of four, a common pin configuration. The electrical signal transmitting pins (c-1 to c-8) near the electrical interface are connected to the transmitting parts (TX-1 to TX-8) of the front and rear rows of gold fingers in the electrical interface, respectively. The electrical signal receiving pins (d-1 to d-8) near the electrical interface are connected to the receiving parts (RX-1 to RX-8) of the front and rear rows of gold fingers in the electrical interface, respectively. Thus, an electrical signal transmission channel can be formed between the electrical interface, the signal processing chip, and the optical device, and an optical signal transmission channel can be formed between the optical device and the optical interface. Figure 2 In the example, the optical devices include optical transmitters (TOSA) and optical receivers (ROSA). Each TOSA includes four transmit channels (a1-a4, a5-a8), and each ROSA includes four receive channels (b1-b4, b5-b8). Each transmit channel uniquely corresponds to one electrical signal transmission channel and one optical signal transmission channel. It can be assumed that there is a correspondence between the pins and interfaces involved in the electrical signal transmission channels and optical signal transmission channels corresponding to the same transmit channel.

[0042] Each optical digital signal processor can correspond to the same number of transmit and receive channels. Figure 2 In the example, each optical digital signal processor (ODS) could correspond to 4 transmit channels and 4 receive channels, and the sequence numbers of the transmit and receive channels can be the same. For example, ODSP1 could correspond to transmit channels a1-a4 and receive channels b1-b4, where the sequence numbers of the transmit and receive channels are the same and are 1-4. Therefore, each ODSP can be used individually or in combination. For example, if the transmission rate of each ODSP is 400Gbps (gigabits per second), and the optical module requires a transmission rate of 400Gbps, it can use either ODSP1 or ODSP2. If the optical module requires a transmission rate of 800Gbps, it can use both ODSP1 and ODSP2. Figure 2 As can be seen, the lines connecting interfaces RX1 to RX4 intersect with the lines connecting interfaces RX5 to RX8 and TX5 to TX8, respectively.

[0043] The drawback of the existing technology is that too many crosses make the optical fiber easy to break, which makes the processing and assembly of the optical module difficult, resulting in low yield and high cost, thus bringing greater difficulty to the hardware implementation of the optical module.

[0044] like Figure 3 As shown, the solution proposed in Existing Technology 2 uses integrated optical devices, allowing the wiring between the signal processing chip and the integrated optical devices to cross, while preventing the wiring (fiber optic cable) between the optical devices and the optical interface from crossing. The correspondence between the electrical and optical interfaces, and the structure of the signal processing chip, are the same as in Existing Technology 2. The structure of the integrated optical device is as follows... Figure 3 As shown. The optical device may include an optical receiving unit and an optical transmitting unit. The optical transmitting unit includes transmitting channels a1-a8, and the receiving unit includes receiving channels b1-b8. The optical transmitting unit is connected to optical signal transmitting interfaces TX1-TX8 via interfaces e1-e8, and the optical receiving unit is connected to optical signal receiving interfaces RX1-RX8 via interfaces f1-f8. Figure 3 As can be seen, the lines connected to the electrical signal receiving pins of the optical digital signal processor ODSP2 near the optical device intersect with the lines connected to the electrical signal transmitting pins (c5-c8) of the optical digital signal processor ODSP2 near the optical device, the lines connected to the electrical signal receiving pins (d1-c4) of the optical digital signal processor ODSP1 near the optical device, and the lines connected to the electrical signal transmitting pins (c1-c4) of the optical digital signal processor ODSP1 near the optical device. The lines connected to the electrical signal transmitting pins (c5-c8) of the optical digital signal processor ODSP2 near the optical device also intersect with the lines connected to the electrical signal receiving pins (d1-c4) of the optical digital signal processor ODSP1 near the optical device.

[0045] The disadvantages of the second existing technology are that, firstly, the cost and area of ​​the optical device are larger, and secondly, the line between the signal processing chip and the integrated optical device is longer, resulting in greater insertion loss in the transmission of electrical signals.

[0046] The third prior art also proposes a solution that changes the pin order of the optical digital signal processor in the signal processing chip so that the lines between the signal processing chip and the optical device, and the lines (optical fiber) between the optical device and the optical interface, do not cross. Figure 4 This illustrates an example of the connection method between the pins on both sides of the optical digital signal processor in the signal processing chip of a prior art optical module.

[0047] like Figure 4As shown, the signal processing chip is implemented using an optical digital signal processor. The order of the electrical signal receiving pins (d1-d8) and electrical signal transmitting pins (c1-c8) closest to the optical device can be set, and their order with the interfaces of the optical interface in the same arrangement direction (in...) Figure 4 In the example, the signal processing chips can be arranged one-to-one from top to bottom or from bottom to top. In this case, there are many intersections between the pins on both sides of the optical digital signal processor (between c-1 to c-8 and c1 to c8, and between d-1 to d-8 and d1 to d8).

[0048] The disadvantages of the existing technology three are as follows: First, the signal processing chip is implemented using a single optical digital signal processor, which results in poor flexibility. For example, if the optical digital signal processor has a transmission rate of 800Gbps, and the optical module requires a transmission rate of 400Gbps, it is still necessary to use an 800Gbps optical digital signal processor, or to invest in a new 400Gbps optical digital signal processor on top of the existing investment in an 800Gbps transmission rate optical digital signal processor, leading to wasted resources and increased costs. Second, the internal channel cross-connection of the optical digital signal processor is complex, making implementation difficult and resulting in significant additional insertion loss.

[0049] In summary, existing solutions cannot reduce the degree of crossover between the signal processing chip and the optical interface without increasing the cost of the signal processing chip.

[0050] In view of this, an optical module is proposed. The optical module of this application redefines the interface order of the optical interface and switches the pin order of the processing chip accordingly, so as to reduce the degree of crossover between the signal processing and the optical interface without increasing the cost of signal processing.

[0051] Figure 5 This illustrates an exemplary application scenario of an optical module according to an embodiment of this application.

[0052] like Figure 5 As shown, the optical module 10 in this embodiment may include an optical interface 101, an optical device 102, a processing chip 103, and an electrical interface 104. The optical interface is connected to one end of an optical fiber, and the other end of the optical fiber can be connected to a device 20 capable of receiving and transmitting optical signals. The electrical interface can be inserted into a device 30 capable of receiving and transmitting optical signals (such as a switch).

[0053] The optical module 10 may include multiple signal transmission channels (namely, optical signal transmission channels and electrical signal transmission channels). The optical signal transmission channels can be further divided into optical signal receiving channels and optical signal transmitting channels, and the electrical signal transmission channels can be divided into electrical signal receiving channels and electrical signal transmitting channels. In the optical signal receiving channel, the optical signal received by the optical interface 101 is output to the optical device 102 via optical fiber. After being converted into an electrical signal by the optical device 102, it is transmitted from the optical device 102 to the electrical interface 104 via the processing chip 103 and then output. In the electrical signal transmitting channel, the electrical signal received by the electrical interface 104 is transmitted to the optical device 102 via the processing chip 103. After being converted into an optical signal by the optical device 102, it is transmitted from the optical device 102 to the optical interface 101 via the optical device 102 and then output.

[0054] The transmission rate of the optical module 10 is related to the transmission rate of its included processing chip 103, and the processing chip 103 can be processed by at least one optical digital signal processor (see example). Figure 7 This is achieved by packaging each optical digital signal processor separately, where the sum of the transmission rates of each optical digital signal processor is greater than or equal to the transmission rate of the optical module. The transmission rate of the optical module in this embodiment can be 800Gbps, 1.6Tbps, 3.2Tbps, etc., and the packaging form of the optical module includes quad small form factor pluggable-double density (QSFP-DD), octal small form factor pluggable (OSPF), octal small form factor pluggable-extra dense (OSFP-XD), centum form factor pluggable (CFP), etc., and this application does not limit this.

[0055] The exemplary structures of optical interfaces, optical devices, processing chips, and electrical interfaces are described below.

[0056] Figure 6a An exemplary structural diagram of an optical module 10 according to an embodiment of this application is shown.

[0057] In one possible implementation, the optical module includes an optical interface 101, an optical device 102, a processing chip 103, and an electrical interface 104. The optical signal received by the optical interface 101 is converted into an electrical signal by the optical device 102 and then transmitted to the electrical interface 104 via the processing chip 103. The electrical signal received by the electrical interface 104 is transmitted to the optical device 102 via the processing chip 103, converted into an optical signal by the optical device 102, and then transmitted to the optical interface 101.

[0058] The optical interface 101 includes N first transmitting interfaces for transmitting optical signals and N first receiving interfaces for receiving optical signals. The optical device includes N transmitting channels and N receiving channels. The m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel. 1≤m≤N, where m is an integer and N>1 is an integer.

[0059] In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces.

[0060] like Figure 6a As shown, taking N=8 as an example, the optical interface 101 may include a first transmitting interface tx1 to tx8 for transmitting optical signals and a first receiving interface rx1 to rx8 for receiving optical signals. The first transmitting interfaces tx1 to tx8 correspond to optical signal transmitting channels 1-8 (not shown), and the first receiving interfaces rx1 to rx8 correspond to optical signal receiving channels 1-8 (not shown).

[0061] Optical device 102 may include transmitting channels A1-A8 and receiving channels B1-B8, wherein each first transmitting interface corresponds to a unique transmitting channel, and each first receiving interface corresponds to a unique receiving channel. For example, the first (m=1) first transmitting interface TX-1 corresponds to the first (m=1) transmitting channel A1, and the first (m=1) first receiving interface corresponds to the first (m=1) receiving channel. The corresponding first transmitting interfaces and transmitting channels, as well as the corresponding first receiving interfaces and receiving channels, can be directly connected via lines (see examples below). Figure 8a Alternatively, it can be connected via lines and other devices capable of transmitting optical signals (see examples below). Figure 8b ).

[0062] The channel order of the N first receiving interfaces in the same arrangement direction is the same as the channel order of the N first transmitting interfaces. The same arrangement direction is related to the arrangement of each interface in the optical interface. Figure 6b This document illustrates several different arrangements of the interfaces in an optical interface according to embodiments of this application, as well as examples of the same arrangement direction under different arrangements.

[0063] like Figure 6bAs shown in the MPO-12 package, the actual shape of the optical interface is as shown in (1), where N=4. In this case, the interfaces are arranged horizontally in a row. In this case, the same arrangement direction can refer to the arrangement direction from left to right or from right to left.

[0064] In the MPO-16 package configuration, the actual shape of the optical interface is shown in (2), where N = 8. The interfaces are arranged horizontally in a single row. In this case, the same arrangement direction can refer to either left to right or right to left.

[0065] In another packaging configuration of MPO-12, the actual shape of the optical interface is shown in (3), where N = 8. In this case, the interfaces are arranged horizontally in two rows. The same arrangement direction can refer to an arrangement direction from left to right or from right to left.

[0066] For ease of understanding, the following text will use the MPO-16 package as an example. Figure 6a The optical interface shown is an example.

[0067] exist Figure 6a In the example, the interfaces are arranged vertically, and in this case, they can be pointed to in the same direction. Figure 6a The optical interface is arranged from top to bottom. In the same arrangement direction, the channel order of the N first receiving interfaces is the same as the channel order of the N first transmitting interfaces. This can be achieved by arranging the first transmitting interfaces tx1 to tx8 and the first receiving interfaces rx1 to rx8 in a column, with the first transmitting interfaces on top and the first receiving interfaces on the bottom, allowing interface tx8 to be adjacent to interface rx1. In this case, following the top-to-bottom arrangement direction, the channel order of each interface can be tx1 to tx8 or rx1 to rx8, thus maintaining the same order.

[0068] It is understandable that when the first transmitting interface and the first receiving interface are arranged in a row, with the first transmitting interface on top and the first receiving interface on the bottom, interface TX1 and interface RX8 can be adjacent. Following the top-to-bottom arrangement, the order of the interfaces can be TX8 to TX1, or RX8 to RX1. Alternatively, the first receiving interface can be on top and the first transmitting interface on the bottom. This application embodiment does not restrict the order of the interfaces included in the optical interface.

[0069] According to the optical module of the present application embodiment, by redefining the interface order of the optical interface, the optical interface includes N first transmitting interfaces for transmitting optical signals and N first receiving interfaces for receiving optical signals. The optical device includes N transmitting channels and N receiving channels. The m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel. 1≤m≤N and are integers, N>1 and are integers. In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces. This allows the lines crossing from the optical device to the optical interface to only have some lines corresponding to the receiving channels crossing with some lines corresponding to the transmitting channels. Compared with the prior art where all lines corresponding to the receiving channels cross with some lines corresponding to the transmitting channels, this reduces the degree of line crossing, improves the processing yield of the optical module, and reduces costs.

[0070] Figure 7 An exemplary structural diagram of an optical digital signal processor according to an embodiment of this application is shown.

[0071] In one possible implementation, the processing chip 103 includes two optical digital signal processors, each of which includes N / 2 first transmit pins and N / 2 first receive pins. The m-th first transmit pin on the processing chip 103 corresponds to the m-th transmit channel, and the m-th first receive pin corresponds to the m-th receive channel.

[0072] For example, the processing chip in this embodiment can be implemented using two separately packaged optical digital signal processors, ODSP1 and ODSP2. Each optical digital signal processor can have N pins on both sides, of which N / 2 first transmit pins and N / 2 first receive pins are located on the side closer to the optical device, and N / 2 second transmit pins and N / 2 second receive pins are located on the side closer to the electrical interface. Figure 7 Taking N=8 as an example, the optical digital signal processor ODSP1 may include first transmit pins C1 to C4, first receive pins D1 to D4, second transmit pins C-1 to C-4, and second receive pins D-1 to D-4; the optical digital signal processor ODSP2 may include first transmit pins C5 to C8, first receive pins R5 to R8, second transmit pins C-5 to C-8, and second receive pins D-5 to D-8.

[0073] An electrical signal transmission channel can be formed between the electrical interface, the second transmitting pin, the first transmitting pin, and the optical transmitter; an optical signal transmission channel can be formed between the optical transmitter and the first transmitting interface; an electrical signal receiving channel can be formed between the electrical interface, the second receiving pin, the first receiving pin, and the optical receiver; and an optical signal receiving channel can be formed between the optical receiver and the first receiving interface.

[0074] The m-th first transmit pin on the processing chip 103 corresponds to the m-th transmit channel, and the m-th first receive pin corresponds to the m-th receive channel. See, for example... Figure 7 For example, of the eight first transmit pins C1 to C8 included in the processing chip 103, the first transmit pin C1 (m=1) can correspond to transmit channel A1 (m=1); ...; the eighth transmit pin C8 (m=8) can correspond to transmit channel A8 (m=4); of the eight first receive pins D1 to D8 included in the processing chip 103, the first receive pin D1 (m=1) can correspond to receive channel B1 (m=1); ...; the eighth receive pin D8 (m=4) can correspond to receive channel B8 (m=8). This allows each optical digital signal processor to be used independently.

[0075] In the same arrangement direction of each optical digital signal processor, the order of the p-th first receive pin is the same as the order of the first receive interface corresponding to the same receive channel, and the order of the p-th first transmit pin is the same as the order of the first transmit interface corresponding to the same transmit channel, where 1 ≤ p ≤ N / 2 and are integers. For example, in... Figure 7 In the example, for the optical digital signal processor ODSP1, the order of the first receiving pins can be C1 to C4, and the order of the first transmitting pins can be D1 to D4, arranged from top to bottom; for the optical digital signal processor ODSP2, the channel order of the first receiving pins can be D5 to D8, and the channel order of the first transmitting pins can be C5 to C8, arranged from top to bottom.

[0076] In existing technologies, the pin order of optical digital signal processors is usually determined according to the packaging standards of the optical and electrical interfaces, such as... Figure 2 or Figure 3 As shown, the pin order of each group on a single optical digital signal processor is consistent with the interface order of the optical interface. To ensure that the pin order of the optical digital signal processor in this embodiment is consistent with the redefined interface order of the optical interface, the order of some pins can be switched based on existing optical digital signal processor technologies. Taking a processing chip comprising two optical digital signal processors as an example, the pin order of optical digital signal processor ODSP1 before switching is as follows: Figure 2 or Figure 3As shown, it can be determined that, from top to bottom, the target order of a set of electrical signal receiving pins d4-d1 on the optical digital signal processor ODSP1 is 1-2-3-4. During switching, pin d4, originally corresponding to electrical signal receiving channel 4, can be used as the new pin D1 corresponding to electrical signal receiving channel 1; pin d3, originally corresponding to electrical signal receiving channel 3, can be used as the new pin D2 corresponding to electrical signal receiving channel 2; pin d2, originally corresponding to electrical signal receiving channel 2, can be used as the new pin D3 corresponding to electrical signal receiving channel 3; and pin d1, originally corresponding to electrical signal receiving channel 1, can be used as the new pin D4 corresponding to electrical signal receiving channel 4, and so on. The same method can be used to determine the target order of a set of electrical signal receiving pins d8-d5 for the optical digital signal processor ODSP2 and switch them until the pin order is as shown. Figure 7 As shown.

[0077] This application does not restrict the vertical position relationship of the first transmitting pin and the first receiving pin on the same optical digital signal processor. Preferably, the vertical position relationship can be selected based on the order of each signal transmission channel, minimizing the line crossings from the processing chip to the optical interface. For example, in each optical digital signal processor, the first transmitting pin can be on top and the first receiving pin on the bottom.

[0078] In this way, each optical digital signal processor (ODS) can be used independently. Therefore, when the transmission rate of any ODS in the processing chip is greater than or equal to the required transmission rate, only one ODS in the processing chip needs to be used, without investing in a new processing chip to meet the required transmission rate. This achieves cost savings and improves the structural flexibility of the processing chip. For example, if each ODS has a transmission rate of 400 Gbps, and the optical module requires a transmission rate of 400 Gbps, only one ODS in the processing chip can be used. If the optical module requires a transmission rate of 800 Gbps, two ODS in the processing chip can be used.

[0079] The following describes an exemplary structure of an optical device. Figure 8a and Figure 8b A schematic diagram showing the structure of an optical device 102 according to an embodiment of this application is provided.

[0080] In one possible implementation, the optical device 102 includes at least one optical transmitter and at least one optical receiver. The optical transmitter is capable of converting electrical signals to optical signals by modulating an electrical signal onto an optical signal, thereby establishing a correspondence between the two signals. Similarly, the optical receiver is capable of converting optical signals to electrical signals by demodulating the electrical signal onto the optical signal, thus establishing a correspondence between the two signals. Figure 8a In the example, there are two optical transmitters and two optical receivers, where TOSA1 and TOSA2 are optical transmitters and ROSA1 and ROSA2 are optical receivers. Those skilled in the art will understand that there may be more or fewer optical transmitters and receivers, and this application does not limit this.

[0081] The m-th first transmitting interface and the m-th first transmitting pin are connected to an optical transmitter that includes the m-th transmitting channel; the m-th first receiving interface and the m-th first receiving pin are connected to an optical receiver that includes the m-th receiving channel. The connections between the optical transmitter and the first transmitting pin, and between the optical receiver and the first receiving pin, do not intersect.

[0082] For example, such as Figure 8a As shown, when the optical digital signal processor uses 4 pins as a group, one group of first transmitting pins can be connected to the same optical transmitter, and one group of first receiving pins can be connected to the same optical receiver. Optical device 102 may include optical transmitters TOSA1 and TOSA2 and optical receivers ROSA1 and ROSA2. Optical transmitter TOSA1 includes transmitting channels A1-A4, optical transmitter TOSA2 includes transmitting channels A5-A8, optical receiver ROSA1 includes receiving channels B1-B and receiving channel B4, and optical receiver ROSA2 includes receiving channels B5-B8. The m-th first transmitting interface and the m-th first transmitting pin both correspond to the m-th transmitting channel, and they can be connected to the optical transmitter that includes the m-th transmitting channel. For example, when m=1, the first transmitting interface tx1 and the first transmitting pin C1 corresponding to transmitting channel A1 are connected to the optical transmitter TOSA1 corresponding to transmitting channel A1. The first receiving interface rx1 and the first receiving pin D1 corresponding to the receiving channel B1 are connected to the optical receiver ROSA1 corresponding to the receiving channel B1.

[0083] In this configuration, the optical fiber between the optical receiver and the first receiving interface can cross with the optical fiber between the optical transmitter and the first transmitting interface, while the connections between the optical transmitter and the first transmitting pin, and between the optical receiver and the first receiving pin, do not cross. See [reference needed]. Figure 8aCrossings can occur only between the optical receiver ROSA1 and the optical fibers of the first receiving interfaces rx1 to rx4, and between the optical transmitter TOSA1 and the optical fibers of the first transmitting interfaces tx5 to tx8. This reduces the complexity of the wiring crossovers between the optical devices and the processing chip. Higher wiring crossover complexity results in more circuit board layers for the optical module, increasing its cost. Reducing the complexity of the wiring crossovers between the optical devices and the processing chip reduces the number of circuit board layers, thereby reducing the cost of the optical module. Reducing the complexity of the wiring crossovers between the optical devices and the processing chip also reduces insertion loss. Compared to existing technologies, the high-speed wiring between the processing chip and the optical devices in this embodiment can be reduced by 17.5%, and insertion loss can be reduced by 0.8 dB@112 Gbps.

[0084] In one possible implementation, the optical receiver and optical transmitter can be positioned on opposite sides of the circuit board (the printed circuit board described above). This allows for more flexible placement of the optical receiver and optical transmitter.

[0085] In one possible implementation, when the optical fiber between the optical receiver and the first receiving interface crosses with the optical fiber between the optical transmitter and the first transmitting interface, the crosses can be made in the thickness direction of the circuit board of the optical module.

[0086] For example, see Figure 8a Alternatively, optical receivers TOSA1 and ROSA1 can be positioned on the same side, while optical receivers TOSA2 and ROSA2 can be positioned on the other side. In this case, the lines can cross in a direction perpendicular to the plane of the circuit board, that is, in the thickness direction of the circuit board. This reduces the difficulty of implementing line crossings.

[0087] In one possible implementation, such as Figure 8b As shown, the optical device 102 includes at least one bi-directional optical sub-assembly (BOSA). The BOSA includes at least one optical transmitting unit, at least one optical receiving unit, N second transmitting interfaces, and N second receiving interfaces.

[0088] The m-th first transmitting pin is connected to the optical transmitting unit including the m-th transmitting channel, and the m-th second transmitting interface corresponding to the m-th transmitting channel is connected to the m-th first transmitting interface. The m-th second transmitting interface and the optical transmitting unit including the m-th transmitting channel use an optical waveguide to transmit optical signals.

[0089] The m-th first receiving pin is connected to the optical receiving unit including the m-th receiving channel, and the m-th second receiving interface corresponding to the m-th receiving channel is connected to the m-th first receiving interface. The m-th second receiving interface and the optical receiving unit including the m-th receiving channel use an optical waveguide to transmit optical signals.

[0090] The connections between the first transmitting interface and the optical transmitter, and between the first receiving interface and the optical receiver, do not intersect.

[0091] For example, the optical device 102 can be implemented using a silicon photonics chip, and can be an optical transceiver integrated unit that integrates at least one optical emitting unit and at least one optical receiving unit, set as a whole in the optical module. The optical emitting unit and the optical receiving unit respectively perform the same optical-to-electrical and electro-optical conversion functions as the optical transmitter and optical receiver described above. For example, as... Figure 8b As shown, the optical device 102 may include optical transmitting units TOSA-1 and TOSA-2 and optical receiving units ROSA-1 and ROSA-2. The optical transmitting unit TOSA-1 includes transmitting channels A-1 to A-4, the optical transmitting unit TOSA-2 includes transmitting channels A-5 to A-8, the optical receiving unit ROSA-1 includes receiving channels B-1 to B-4, and the optical receiving unit ROSA-2 includes receiving channels B-5 to B-8.

[0092] exist Figure 8b Taking N=8 as an example, the optical device 102 may also include 8 second transmitting interfaces (G1 to G8) and 8 second receiving interfaces (H1 to H8). Each transmitting channel of the optical device can be connected to a unique first transmitting interface through a unique second transmitting interface, and connected to a unique first transmitting pin. That is, the m-th first transmitting pin is connected to the optical transmitting unit including the m-th transmitting channel, and the m-th second transmitting interface corresponding to the m-th transmitting channel is connected to the m-th first transmitting interface. Each receiving channel can be connected to a unique first receiving interface through a unique second receiving interface, and connected to a unique first receiving pin. That is, the m-th first receiving pin is connected to the optical receiving unit including the m-th receiving channel, and the m-th second receiving interface corresponding to the m-th receiving channel is connected to the m-th first receiving interface.

[0093] For example, when m=1, the first transmitting pin C1 is connected to the optical transmitting unit TOSA-1, which includes the first transmitting channel A-1, and the first second transmitting interface G1 corresponding to the first transmitting channel A-1 is connected to the first first transmitting interface tx1. Optical waveguides are used to transmit optical signals between the first transmitting channel A-1 and the first second transmitting interface G1.

[0094] Since the optical transmitting unit, optical receiving unit, second transmitting interface, and second receiving interface are all located inside the optical device implemented on the silicon photonics chip, optical waveguides can be used to transmit signals between the second transmitting interface and the optical transmitting unit, and between the first receiving interface and the optical receiving unit. The intersections between optical waveguides are internal to the silicon photonics chip, making them easier to implement compared to external circuitry intersections.

[0095] The order of the second transmitting interface and the first receiving interface can be adjusted accordingly based on the order of the first transmitting interface and the first receiving interface. When the order of the second transmitting interface and the second receiving interface is the same as the order of the first transmitting interface and the first receiving interface, the lines between the optical devices and the optical interfaces will not cross. Figure 8b As shown, the first transmitting interface and the first receiving interface are arranged in a column. When the order of arrangement from top to bottom is tx1 to tx8 and rx1 to rx8, the second transmitting interface and the second receiving interface can also be arranged in a column. When the order of arrangement from top to bottom is G1 to G8 and H1 to H8, the optical fibers between the optical devices and the optical interfaces do not cross.

[0096] Those skilled in the art should understand that the second transmitting interface and the second receiving interface can also be arranged in other ways to reduce the degree of fiber optic crossover between the optical device and the optical interface. This application does not limit this.

[0097] The positional relationship of optical transmitting units TOSA-1 and TOSA-2 and optical receiving units ROSA-1 and ROSA-2 in optical device 102 can be as follows: Figure 8b As shown, optical transmitting and receiving units connected to the same optical digital signal processor can be positioned closer together, while optical transmitting and receiving units connected to different optical digital signal processors can be positioned further apart to avoid signal crosstalk. Other configurations can also be used for the optical transmitting and receiving units, and this application does not impose any restrictions on them.

[0098] In this way, crossovers only occur in the lines between the optical digital signal processor and the optical devices, and the degree of crossover between the lines between the optical digital signal processor and the optical devices is greatly reduced compared to existing technologies. This also improves the flexibility of line crossover methods in optical modules.

[0099] In the above example, the optical module is a quad small form factor pluggable-double density (QSFP-DD) multi-source agreement (MSA) optical module. According to the protocol, the number of the first receiving interface, the first transmitting interface, the first transmitting pin, and the first receiving pin are the same, and are 8. Furthermore, when the optical module in this embodiment of the application is in other packaging formats, the number of the first receiving interface, the first transmitting interface, the first transmitting pin, and the second receiving pin can also be the same and equal to other values ​​N, where N is an integer greater than 1.

[0100] Figure 9 A schematic diagram of an exemplary structure of an electrical interface according to an embodiment of this application is shown.

[0101] In one possible implementation, the electrical interface includes Q third transmitting interfaces and Q third receiving interfaces, where Q is a multiple of N.

[0102] For example, electrical interface 104 may include Q third transmitting interfaces and Q third receiving interfaces, where Q and N can be multiples of each other, such as Q = N, Q = 2N, Q = 4N, or Q = 1 / 2N, etc. Figure 9 In the example, Q = N = 8. The third transmitting interface may include interfaces Tx1-Tx8, and the third receiving interface may include interfaces Rx1-Rx8. Interfaces Tx1-Tx4 and Rx1-Rx4 can be the front row of gold fingers of electrical interface 101, and interfaces Tx5-Tx8 and Rx5-Rx8 can be the rear row of gold fingers of electrical interface 101. The third transmitting interface is connected to the second transmitting pins C-1 to C-8 of processing chip 103, and the third receiving interface is connected to the second receiving pins D-1 to D-8 of processing chip 103. Specifically, the connection method can be: third transmitting interface Tx1 connected to second transmitting pin C-1; ...; third transmitting interface Tx8 connected to second transmitting pin C-8; third receiving interface Rx1 connected to second receiving pin D-1; ...; third receiving interface Rx8 connected to second receiving pin D-8. When Q = 2N, Q = 4N, or Q = 1 / 2N, the connection method between the third transmitting interface and the second transmitting pin of the processing chip 103, and the connection method between the third receiving interface and the second receiving pin of the processing chip 103 can be implemented based on existing technology, and will not be elaborated here.

[0103] This approach makes the electrical interface structure more flexible.

[0104] Figure 10a and Figure 10b An exemplary structural diagram of a communication device according to an embodiment of this application is shown.

[0105] like Figure 10a and Figure 10b As shown, this application embodiment also provides a communication device 100, including a housing 40, a motherboard 50 and the optical module 10 described above. The motherboard 50 is located in the housing 40, and the optical module 10 is inserted into the motherboard 50.

[0106] The communication equipment 100 can be a top-of-rack (TOR) switch, leaf switch, spine switch, core switch, router, wavelength division multiplexing (WDM) equipment, etc., and this application does not limit this. Exemplary operation of the optical module 10 in the communication equipment 100 can be found above and... Figure 5 According to the relevant description, communication device 100 can be Figure 5 Equipment 30.

[0107] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved.

[0108] It should also be noted that each block in the block diagram and / or flowchart, as well as combinations of blocks in the block diagram and / or flowchart, can be implemented using hardware (such as circuits or ASICs (Application Specific Integrated Circuits)) that performs the corresponding function or action, or using a combination of hardware and software, such as firmware.

[0109] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, disclosure, and appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0110] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. An optical module, characterized in that, The system includes an optical interface, optical devices, a processing chip, and an electrical interface. The optical signal received by the optical interface is converted into an electrical signal by the optical devices and then transmitted to the electrical interface via the processing chip. The electrical signal received by the electrical interface is transmitted to the optical devices via the processing chip, where it is converted back into an optical signal and transmitted to the optical interface. The optical interface includes N first transmitting interfaces for transmitting optical signals and N first receiving interfaces for receiving optical signals. The optical device includes N transmitting channels and N receiving channels. The m-th first transmitting interface corresponds to the m-th transmitting channel, and the m-th first receiving interface corresponds to the m-th receiving channel. 1≤m≤N, where m is an integer and N>1 is an integer. In the same arrangement direction, the order of the N first receiving interfaces is the same as the order of the N first transmitting interfaces.

2. The optical module according to claim 1, characterized in that, The processing chip includes two optical digital signal processors, each of which includes N / 2 first transmit pins and N / 2 first receive pins. The m-th first transmit pin on the processing chip corresponds to the m-th transmit channel, and the m-th first receive pin corresponds to the m-th receive channel. In the same arrangement direction of each optical digital signal processor, the order of the p-th first receiving pin is the same as the order of the first receiving interface of the corresponding same receiving channel, and the order of the p-th first transmitting pin is the same as the order of the first transmitting interface of the corresponding same transmitting channel, where 1≤p≤N / 2 and are integers.

3. The optical module according to claim 2, characterized in that, The optical device includes at least one optical transmitter and at least one optical receiver. The m-th first transmission interface and the m-th first transmission pin are connected to the optical transmitter that includes the m-th transmission channel; The m-th first receiving interface and the m-th first receiving pin are connected to the optical receiver that includes the m-th receiving channel; The connections between the optical transmitter and the first transmitting pin, and between the optical receiver and the first receiving pin, do not cross.

4. The optical module according to claim 2, characterized in that, The optical device includes at least one optical transceiver integrator, which includes at least one optical transmitting unit, at least one optical receiving unit, N second transmitting interfaces, and N second receiving interfaces. The m-th first transmitting pin is connected to the optical transmitting unit including the m-th transmitting channel, and the m-th second transmitting interface corresponding to the m-th transmitting channel is connected to the m-th first transmitting interface. The m-th second transmitting interface and the optical transmitting unit including the m-th transmitting channel use an optical waveguide to transmit optical signals. The m-th first receiving pin is connected to the optical receiving unit including the m-th receiving channel, and the m-th second receiving interface corresponding to the m-th receiving channel is connected to the m-th first receiving interface. The m-th second receiving interface and the optical receiving unit including the m-th receiving channel use an optical waveguide to transmit optical signals. The connections between the first transmitting interface and the optical transmitter, and between the first receiving interface and the optical receiver, do not intersect.

5. The optical module according to claim 3, characterized in that, The optical receiver and the optical transmitter are respectively disposed on both sides of the circuit board.

6. The optical module according to claim 5, characterized in that, When the optical fiber between the optical receiver and the first receiving interface intersects with the optical fiber between the optical transmitter and the first transmitting interface, they intersect in the thickness direction of the circuit board.

7. The optical module according to any one of claims 1-6, characterized in that, The electrical interface includes Q third transmitting interfaces and Q third receiving interfaces, where Q and N are multiples of each other.

8. A communication device, characterized in that, It includes a housing, a motherboard, and an optical module according to any one of claims 1-7, wherein the motherboard is located in the housing and the optical module is inserted into the motherboard.

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