Communication processing method, device, electronic device and readable storage medium

Abstract

The present application discloses a communication processing method, apparatus, electronic device, and readable storage medium, belonging to the field of communication technology. The method comprises: when the electronic device configures a signal path called by a first identity recognition module and a second identity recognition module, obtaining a path state and a configuration timing of the signal path; based on the path state and the configuration timing, configuring the value of a target control bit in first path control information to obtain second path control information, where the target control bit is the control bit other than the first control bit in the first path control information, and the first control bit corresponds to the path state; and based on the first identity recognition module and the second identity recognition module, calling a target signal path corresponding to the second path control information to perform communication processing.

Description

Technical Field

[0001] The present application belongs to the field of communication technology, and specifically relates to a communication processing method, device, electronic device and readable storage medium. Background Art

[0002] With the rapid development of communication technology, two identity recognition modules can usually be deployed in electronic devices to meet users' needs for dual SIM cards.

[0003] For the dual-SIM capabilities of existing processor and RF chip combinations, electronic devices can support a single receiver-dual SIM dual standby (SR-DSDS) mechanism, such as Figure 1 As shown, in the SR-DSDS mode, when card 2 is paging, card 1 is allowed to completely disconnect from the base station, that is, when card 2 is active, card 1 is inactive.

[0004] For SR-DSDS, it only allows electronic devices to use one frequency band at the same time in the network, while the dual receiver-dual SIM dual standby (DR-DSDS) mechanism allows electronic devices to use two different frequency bands at the same time in the network, such as the 5G network, to achieve switching between different networks, such as 4G and 5G. Figure 2 shown.

[0005] The DR-DSDS mechanism requires the processor and RF chip combination to meet certain rules. For example, when card 2 is paging, card 1 must retain the signal path for the primary antenna and release the signal path for the original diversity antenna to allow card 2 to paging. However, current processor and RF chip combinations may not meet these rules, making the DR-DSDS mechanism unfeasible.

[0006] like Figure 2 As shown, SIM1's paging monitoring of SIM2 during the DTA process, that is, when SIM1 is in the Time Division Duplexing (TDD) band, is flawed. Since the paging time of Long Time Evolution (LTE) technology lasts for 5ms, and the uplink and downlink switching time of TDD is also of similar magnitude, if SIM2's paging process happens to coincide with SIM1's switching period, the SIM1 connection may be interrupted due to the erroneous activation of the signal path during SIM2's paging process, making the DR-DSDS mechanism unavailable. Summary of the Invention

[0007] The purpose of the embodiments of the present application is to provide a communication processing method, device, electronic device and readable storage mechanism, which can solve the technical problem that the DR-DSDS mechanism cannot be implemented due to the interruption of the connection setting of card one due to the erroneous call of the signal path during the paging process of card two, thereby accurately implementing the DR-DSDS mechanism.

[0008] In a first aspect, an embodiment of the present application provides a communication processing method, applied to an electronic device, the electronic device including a first identity recognition module and a second identity recognition module, the method comprising:

[0009] When the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module, obtaining the path status of the signal path and the configuration timing of the signal path;

[0010] Based on the path state and the configuration timing, a value of a target control bit in the first path control information is configured to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path of a main antenna corresponding to the first identity identification module, and the value of the target control bit is used to control the opening of a signal path of a diversity antenna corresponding to a target identity identification module, wherein the target identity identification module is the first identity identification module or the second identity identification module;

[0011] Based on the first identity recognition module and the second identity recognition module, a target signal path corresponding to the second path control information is called for communication processing, where the target signal path includes the first signal path and a signal path of a diversity antenna corresponding to the target identity recognition module.

[0012] In a second aspect, an embodiment of the present application provides a communication processing device, applied to an electronic device, wherein the electronic device includes a first identity recognition module and a second identity recognition module, and the device includes:

[0013] an acquisition module, configured to acquire a path state of the signal path and a configuration timing of the signal path when the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module;

[0014] a first configuration module configured to configure a value of a target control bit in the first path control information based on the path state and the configuration timing to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path for a main antenna corresponding to the first identity recognition module, and the value of the target control bit is used to control the opening of a signal path for a diversity antenna corresponding to a target identity recognition module, the target identity recognition module being the first identity recognition module or the second identity recognition module;

[0015] A communication processing module is used to call a target signal path corresponding to the second path control information for communication processing based on the first identity recognition module and the second identity recognition module, wherein the target signal path includes the first signal path and the signal path of the diversity antenna corresponding to the target identity recognition module.

[0016] In a third aspect, an embodiment of the present application provides a communication processing circuit, applied to an electronic device, the circuit comprising: a switching device, a main antenna and a diversity antenna corresponding to a first identity recognition module in the electronic device, a diversity antenna corresponding to a second identity recognition module in the electronic device, a first processing module, and a second processing module;

[0017] By means of the switching device, respectively, a main antenna corresponding to the first identification module is connected to the first processing module or the second processing module, a diversity antenna corresponding to the first identification module is connected to the first processing module or the second processing module, and a diversity antenna corresponding to the second identification module is connected to the first processing module or the second processing module;

[0018] Among them, the switching device is used to control the signal path called by the first identity recognition module and the second identity recognition module, the first processing module is used to process the signal of the signal path of the main antenna, and the second processing module is used to process the signal of the signal path of the diversity antenna.

[0019] In a fourth aspect, an embodiment of the present application provides an electronic device comprising a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the steps of the communication processing method as described in the first aspect.

[0020] In a fifth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the steps of the communication processing method described in the first aspect are implemented.

[0021] In a sixth aspect, an embodiment of the present application provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, and the processor is used to run programs or instructions to implement the steps of the communication processing method described in the first aspect.

[0022] In a seventh aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the steps of the communication processing method as described in the first aspect.

[0023] In an embodiment of the present application, when an electronic device configures a signal path, the signal path status and configuration timing are obtained, and based on the signal path status and configuration timing, the value of the target control bit in the first path control information is configured to obtain the second path control information. Then, based on the first and second identity recognition modules, the target signal path corresponding to the second path control information is called for communication processing. In this way, the value of the first path control information in the register of the RF front-end device, i.e., the switch device, can be controlled bit by bit, thereby ensuring that, when the first signal path of the main antenna corresponding to the first identity recognition module is locked, the other signal path is configured according to the path status and configuration timing. Furthermore, the signal paths called by the first and second identity recognition modules can be accurately configured before and after card 2 paging, as well as during paging. This solves the technical problem of the DR-DSDS mechanism being unable to be implemented due to the interruption of card 1's connection settings due to the erroneous call of the signal path during card 2 paging, thereby accurately implementing the DR-DSDS mechanism. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a schematic diagram of the principle of the SR-DSDS mechanism;

[0025] Figure 2 This is a schematic diagram of the principle of the DR-DSDS mechanism;

[0026] Figure 3 is a flowchart of a communication processing method provided by some embodiments of the present application;

[0027] Figure 4 1 is a schematic structural diagram of a communication processing circuit according to a specific example of the present embodiment;

[0028] Figure 5 is a schematic structural diagram of a communication processing circuit provided in some embodiments of the present application;

[0029] Figure 6 is a flowchart of a communication processing method according to a specific example of the present embodiment;

[0030] Figure 7 is a schematic structural diagram of a communication processing device provided in some embodiments of the present application;

[0031] Figure 8 is a schematic structural diagram of an electronic device provided by some embodiments of the present application;

[0032] Figure 9 A schematic diagram of the hardware structure of an electronic device provided for some embodiments of the present application. DETAILED DESCRIPTION

[0033] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0034] The terms "first," "second," and the like in the specification of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification indicates at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0035] The communication processing method provided in the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0036] It should be noted that the communication processing method of this embodiment is applied to an electronic device, and the electronic device includes a first identity recognition module and a second identity recognition module.

[0037] The first identity module is SIM1, or card one, and the second identity module is SIM2, or card two. SIM1 and SIM2 can each use a frequency band, and the frequency bands used by SIM1 and SIM2 can be different. For example, SIM1 can use low frequency (LB), and SIM2 can use medium-high frequency (MHB). This dual-SIM combination is a low frequency + medium-high frequency dual-SIM combination. For another example, SIM1 uses medium-high frequency, and SIM2 uses low frequency. This dual-SIM combination is a medium-high frequency + low frequency dual-SIM combination. Alternatively, SIM1 uses high frequency (HB), and SIM2 uses low frequency.

[0038] The communication standards of SIM card 1 and SIM card 2 may also be different. For example, the communication standard of SIM card 1 may be LTE TDD, and the communication standard of SIM card 2 may be New Radio (NR). In some embodiments, the electronic device may deploy a dual-SIM card combination in which the communication standard of SIM card 1 is LTE TDD and the frequency band is HB, and the communication standard of SIM card 2 is NR and the frequency band is LB.

[0039] Figure 3 This is a flow chart of the communication processing method provided in the embodiment of the present application. Figure 3 As shown, the method includes the following steps:

[0040] Step 301 : When the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module, obtain the path status of the signal path and the configuration timing of the signal path.

[0041] The signal paths called by the first identity recognition module and the second identity recognition module can be controlled by a switch device, and the switch device is used to control the signal paths called by the first identity recognition module and the second identity recognition module when the electronic device communicates using two types of frequency bands.

[0042] The switching device may include at least three switches, which may be double-pole switches. In some embodiments, the switching device may be a double-pole, four-throw switch, such as a DP4T. The switching device may control the signal paths used by card 1 and card 2 via register values to implement the DR-DSDS mechanism. In other words, the electronic device's configuration of the signal paths used by the first and second identity recognition modules essentially configures the register values of the switching device so that the switching device switches the signal paths used by the first and second identity recognition modules according to the DR-DSDS mechanism.

[0043] In the DR-DSDS mechanism, Card 1 and Card 2 can simultaneously access their corresponding frequency bands, and Card 2 can periodically page to listen for messages. Based on the rules of the processor and RF chip combination, Card 1 can access the signal path of Card 1's corresponding primary antenna (PRx) and diversity antenna (DRx) before and after Card 2's paging to facilitate Card 1's communication processing. When Card 2 pages, Card 1 needs to retain the signal path of Card 1's primary antenna and release the signal path of its diversity antenna for Card 2's paging. PRx can also be called TRx.

[0044] Table 1 shows the signal path configuration in the DR-DSDS mechanism. 1TRx or 1PRx represents the signal path for the main antenna corresponding to card 1, referred to as the TRx path or PRx path. 1DRx represents the signal path for the diversity antenna corresponding to card 1, referred to as the DRx path for card 1. 2DRx represents the signal path for the diversity antenna corresponding to card 2, referred to as the DRx path for card 2. 2DRx and 1DRx are different signal paths.

[0045] Table 1 is the configuration table for the correct signal path in the DR-DSDS mechanism

[0046] Card-PRx pathway Card-DRx pathway Card II DRx pathway Before card 2 paging 1TRx+1DRx 1TRx+1DRx Card 2 paging time 1TRx+2DRx After card 2 paging 1TRx+1DRx 1TRx+1DRx

[0047] As shown in Table 1 above, before card two is paged, the electronic device will configure the PRx channel of card one and the DRx channel of card one separately. The electronic device can configure this through the register of the switching device. Due to the design logic of the processor and RF chip combination, the PRx channel and the DRx channel are each controlled by a separate register. When the PRx channel and the DRx channel are set, only their respective channels are set. However, the switching device may not be able to distinguish. Therefore, each setting of the PRx channel is equivalent to setting the TRx+DRx channel in full. The DRx channel will be set again when it is configured, resulting in a total of two settings. In the single-card state, the configuration written to the register twice should be the same, that is, both times the switching device switches the signal path to the 1TRx+1DRx state.

[0048] When card 2 is paging, the electronic device can configure the signal path, and card 1 can give up 1DRx and replace it with 2DRx for card 2 to use for paging.

[0049] After the paging of card 2 is completed, if there is no need to switch to the business scenario of card 2, the electronic device needs to let the switch device switch the signal path to the 1TRx+1DRx state again.

[0050] It can be seen that signal path configuration is required before, during and after card 2 paging. Among them, the signal path configuration can be performed before card 2 paging, such as when the SIM card is activated. The SIM card needs to be activated and the signal path configuration needs to be performed when the SIM card is inserted into an electronic device, the electronic device is turned on, and the electronic device is switched from flight mode to communication mode.

[0051] When an electronic device configures a signal path, the path status and configuration timing of the signal path can be obtained. Since the value in the register of the switching device reflects the connection status of the switching device, in some embodiments, if the electronic device determines that the path status has not changed, the path status can be determined by reading the value in the register of the switching device. The path status can be determined by reading the values of all or part of the control bits in the register of the switching device.

[0052] In some embodiments, due to changes in the usage environment of the electronic device, the path state may need to change from a straight-through state to a cross state, or switch from a cross state to a straight-through state. At this time, the electronic device can detect changes in the environment and determine the path state currently switched to, thereby obtaining the path state of the signal path.

[0053] The configuration timing can be determined by information sent by the base station or the card 2 paging cycle. For example, when card 1 or card 2 is activated, the base station can send some relevant information to the electronic device. Upon receiving this information, the electronic device can configure the signal path and determine that its configuration timing is before the card 2 paging cycle. For another example, when the card 2 paging cycle arrives, the configuration timing is when the card 2 paging cycle arrives. When the card 2 paging cycle ends, the configuration timing is after the card 2 paging cycle.

[0054] The path state may be determined by reading the values of some control bits in the register of the switching device. Optionally, when the electronic device determines that the path state of the signal path has not changed, step 301 specifically includes:

[0055] In a case where the first target bit in the first path control information is first preset information, determining that the path state is a cross state;

[0056] When the first target bit is not the first preset information and the second target bit in the first path control information is the second preset information, it is determined that the path state is a through state.

[0057] The first target bit refers to the bit that controls the first signal path of the main antenna corresponding to the first identity module in the crossover state, and the second target bit refers to the bit that controls the first signal path of the main antenna corresponding to the first identity module in the direct state. The first preset information indicates that the first signal path of the main antenna corresponding to the first identity module is enabled in the crossover state, and the second preset information indicates that the first signal path of the main antenna corresponding to the first identity module is enabled in the direct state.

[0058] In some embodiments, Figure 4This is a structural diagram of the communication processing circuit provided in some embodiments of the present application. The dual-card combination of the electronic device is a medium-high frequency + low-frequency dual-card combination. The switching device in the communication processing circuit can be DP4T. The purpose of the communication processing method is to control the switching device by configuring the value in the register so that the signal path in the communication processing circuit called by the first identity recognition module and the second identity recognition module satisfies the DR-DSDS mechanism.

[0059] The DP4T is a double-pole, four-throw switch. In the through state, the DP4T's conduction relationship is RF OUT2-RF IN2, enabling the PRx path of card one, and RF OUT1-RF IN1, enabling the DRx path of card one. In the crossover state, the main antenna and diversity antenna of card one swap roles. The DP4T's conduction relationship is RF OUT2-RF IN1, enabling the PRx path of card one, and RF OUT1-RF IN2, enabling the DRx path of card one.

[0060] When card two is paging, according to the rules of the processor and RF chip combination, card one needs to retain the PRX path and give up the original DRx path for card two to use for paging. The conduction relationship of DP4T can be RF OUT2-RF IN2 and RF OUT1-RFIN3 to disconnect the DRx path of card one and open the DRx path of card two.

[0061] In such Figure 4 In the communication processing circuit shown, the signal path can be set according to the value in the register of the switching device shown in Table 2 or Table 3 below.

[0062] Table 2 DP4T register truth table 1

[0063]

[0064] Table 3DP4T register truth table 2

[0065]

[0066]

[0067] In Tables 2 and 3 above, Isolation means that RF OUT is disconnected and no RF IN is connected. The first path control information may be the value of register_01.

[0068] Based on the DP4T register characteristics, bits 5 / 4 of registers 00 and 01 can control the flipping of RF OUT. As shown in Table 3, writing 1 to register 00 and 000010 to register 01 indicates that the DP4T conduction relationship is RF OUT1-isolation, and RF OUT2-RF IN2. Simultaneously, writing 1 to register 00 and 000001 to register 01 indicates that the DP4T conduction relationship is RF OUT1-isolation, and RF OUT2-RF IN1. Therefore, the TRX's pass-through state only configures bit 1 of register 01, and the crossover state only configures bit 0 of register 01. If this logic holds true in all scenarios, it can achieve an effect similar to that of separate register control.

[0069] Setting bit 1 of register_01 to 1 does not always mean RF OUT2 - RF IN2. The following possibilities can be identified:

[0070] 1. 000010, refers to RF OUT1-isolation / RF OUT2-RF IN2;

[0071] 2. 010011, refers to RF OUT1-RF IN2 / RF OUT2-RF IN1;

[0072] 3. 010110, refers to RF OUT1-RF IN3 / RF OUT2-RF IN2;

[0073] 4. 011010, refers to RF OUT1-RF IN4 / RF OUT2-RF IN2;

[0074] 5. 100011 refers to RF OUT1-RF IN1 / RF OUT2-RF IN2;

[0075] 6. 100110 refers to RF OUT1-RF IN2 / RF OUT2-RF IN3;

[0076] 7. 101010 refers to RF OUT1-RF IN2 / RF OUT2-RF IN4;

[0077] 8. 110010 refers to RF OUT1-RF IN2 / RF OUT2-isolation.

[0078] Items 2, 6, 7, and 8 cannot represent RF OUT2-RF IN2. After verification, if Figure 4In the scenario shown, only items 1, 3, and 5 exist. Therefore, setting bit 1 to 1 strictly represents RF OUT2 minus RF IN2. However, setting bit 0 to 1 does not strictly represent RF OUT2 minus RF IN1. For example, item 5 does not meet the requirements.

[0079] Through observation, it can be found that in the cross state scenario, if bits 5 / 4 / 0 of control register _01 are written as 0 / 1 / 1 respectively, according to the truth table, the following scenarios may occur:

[0080] 1. 010011, refers to RF OUT1-RF IN2 / RF OUT2-RF IN1;

[0081] 2. 010101 refers to RF OUT1-RF IN3 / RF OUT2-RF IN1;

[0082] 3. 011001 refers to RF OUT1-RF IN4 / RF OUT2-RF IN1.

[0083] These three scenarios all correspond to RF OUT2-RF IN1, that is, the PRx path in the cross state is locked.

[0084] In the cross state scenario, the BIT 5 / 4 state can be locked for the following reasons:

[0085] As shown in Table 3, when the value of register_01 is 010011, card 1 is in the cross state, and 010101 / 011001 means that when card 1 is in the cross state, its PRx path is maintained and the DRx path of card 1 is switched to the DRx path of card 2 for paging listening of card 2.

[0086] However, the pass-through state cannot lock BIT5 / 4 for the following reasons:

[0087] As shown in Table 3, when the value of register_01 is 100011, card 1 is in the pass-through state. If bits 5 / 4 / 1 are locked, in the register value of 10xx1x, that is, bits 5 / 4 remain unchanged, RF OUT1 cannot switch to the connection with RF IN3 / RF IN4 to switch to the DRx path of card 2 for paging of card 2. Therefore, the pass-through state cannot be achieved by controlling the three bits of the register.

[0088] In summary, in some embodiments, if the value of register_00 is 1, the first target bit can be BIT5 / 4 / 0, that is, the first target bit includes the sixth, fifth, and first bits of register_01. The first preset information can be 011, in which case the path state of the signal path can be determined to be a cross state. The second target bit can be BIT1, that is, the second target bit is the second bit of register_01, and the second preset information can be 1. If BIT5 / 4 / 0 is not 011, but BIT1 is 1, the path state of the signal path can be determined to be a straight-through state.

[0089] It should be noted that the first target bit, second target bit, first preset information, and second preset information can be set based on information such as the value of register_00, the number and value of control bits in register_01, and other information. The above-described settings of the first target bit, second target bit, first preset information, and second preset information are merely examples. The principle behind these settings is to summarize the values in the truth table to implement control logic such that, under these settings, one signal path, namely the PRx path of card 1, remains unchanged, while another signal path can be switched based on the path status and configuration timing.

[0090] Optionally, the first path control information is represented in binary, and the first target bit and the second target bit are any of the following:

[0091] The first target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information, and the second target bit is the second bit in the first path control information;

[0092] The first target bit is the second bit in the first path control information, and the second target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information.

[0093] In some embodiments, if the value of register_00 is 1, the first target bit is bit 5 / 4 / 0, the first preset information is 011, the second target bit is bit 1, and the second preset information is 1. In some embodiments, if the value of register_00 is 0, the first target bit is bit 1, the first preset information is 1, the second target bit is bit 5 / 4 / 0, and the second preset information is 011. The value of register_00 can be predetermined and written.

[0094] In this embodiment, the signal path status is determined by reading the values of the first target bit and the second target bit in the first path control information, thereby simplifying the acquisition of the path status. In this case, the value of the first control bit in the first path control information does not need to be reconfigured. Since the value of the first control bit can be used to control the opening of the first signal path of the primary antenna corresponding to the first identity recognition module, the PRx path of card one remains unchanged.

[0095] Step 302: Based on the path state and the configuration timing, configure the value of the target control bit in the first path control information to obtain second path control information. The target control bit is the control bit other than the first control bit in the first path control information. The first control bit corresponds to the path state. The value of the first control bit is used to control the opening of the first signal path of the main antenna corresponding to the first identity identification module. The value of the target control bit is used to control the opening of the signal path of the diversity antenna corresponding to the target identity identification module. The target identity identification module is the first identity identification module or the second identity identification module.

[0096] In related technologies, after Card 2 completes its paging, Card 1 issues a command to gain control. Specifically, it configures the PRx channel and issues a command once, allowing the switch to achieve a 1TRx+1DRx channel effect. It then configures the DRx channel and issues another command, allowing the switch to achieve a 1TRx+1DRx channel effect.

[0097] This approach essentially establishes a mapping, determining the paging command for card 2 based on the current state of card 1. However, this approach is flawed when card 1 is on the TDD band. LTE paging lasts 5ms, and TDD uplink and downlink switching takes about the same amount of time. If card 2's paging process coincides with card 1's switching period, a command conflict will occur.

[0098] As shown in Table 4 below, during the card 2 paging process, the switch device is set by two commands: the PRx path configuration of card 1 sets the switch device to the 1TRx+1DRx state, while the card 2 paging process sets the switch device to the 1TRx+2DRx state. If the PRx path configuration of card 1 ultimately occupies this paging cycle, the paging path of card 2 will be interrupted, causing the paging process to fail.

[0099] Table 4 is one of the configuration tables of the error signal path in the DR-DSDS mechanism

[0100] Card-PRx pathway Card-DRx pathway Card II DRx pathway Before card 2 paging 1TRx+1DRx 1TRx+1DRx Card 2 paging time 1TRx+1DRx 1TRx+2DRx After card 2 paging 1TRx+1DRx 1TRx+1DRx

[0101] To ensure that the PRx channel configuration instructions of card 1 and the DRx channel configuration instructions of card 2 are consistent during the paging process of card 2, the switch device can be switched to the 1TRx+2DRx state during the PRx channel configuration of card 1. The configuration table in this case is shown in Table 5 below. This command will cause the PRx channel configuration instructions of card 1 and the DRx control channel configuration instructions to conflict before and after the paging of card 2, causing card 1 to directly lose DRx channel performance.

[0102] Table 5 is the second configuration table of the error signal path in the DR-DSDS mechanism

[0103] Card-PRx pathway Card-DRx pathway Card II DRx pathway Before card 2 paging 1TRx+2DRx 1TRx+1DRx Card 2 paging time 1TRx+2DRx 1TRx+2DRx After card 2 paging 1TRx+2DRx 1TRx+1DRx

[0104] In the related art, it can be seen from Table 2 and Table 3 above that when card 2 is paging, it is necessary to carefully search the truth table to configure a DRx path for card 2 and ensure that this signal path can meet the configuration of 1TRx+2DRx.

[0105] In some embodiments, as shown in Table 2, if register_01 jumps to the state 011100, at this time, the conduction relationship of the switching devices is RF OUT2-RF IN4 and RF OUT1-RF IN3. After card 2 completes paging, the PRx path of card 1 is disconnected, which does not meet the rules of the processor and RF chip combination. Therefore, after card 2 completes paging, card 1 will be disconnected due to the disconnection of the signal path.

[0106] That is to say, since the two signal paths between the RF IN and RF OUT ports of DP4T are switched as a whole according to the value of register _01, it is not implemented through bit-by-bit control or register-by-register control. Therefore, it is impossible to simply implement the control logic of keeping one signal path, i.e., the PRx path of card one, unchanged while the other signal path is switched as required. This may cause the rules of the processor and RF chip combination to be not met due to incorrect register jumps, and the DR-DSDS mechanism cannot be implemented.

[0107] In this embodiment, when the path status is determined, the first control bit and its value can be determined. When the value of the first control bit is determined, the PRx path of card one can be guaranteed to remain unchanged. Accordingly, the target control bit in the first path control information can be determined based on the path status, and the value of the target control bit in the first path control information can be configured based on the path status and the configuration timing. In this way, by configuring the first path control information in a manner similar to bit-by-bit configuration, the PRx path of card one can be guaranteed to remain unchanged, while the control logic for another signal path, such as the DRx path of card one or the DRx path of card two, switches as required. This overcomes the regulatory restrictions of switching devices such as DP4T and the combination of processor and RF chip, achieving DR-DSDS capabilities.

[0108] It should be noted that, when the electronic device learns that the path state of the signal path has changed, such as switching from a through state to a cross state, the method may further include:

[0109] Based on the path status, a value of the first control bit in the first path control information is configured.

[0110] In this case, the value of the first control bit in the first path control information also needs to be reconfigured. In some embodiments, for example, the value of register_00 is 1, and when the path state is switched to the cross state, the first control bit is BIT5 / 4 / 0, and its value can be configured to 011 to ensure that the PRx path of card one is opened. When the path state is switched to the direct state, the first control bit is BIT1, and its value can be configured to 1 to ensure that the PRx path of card one is opened. In some embodiments, for example, the value of register_00 is 0, and when the path state is switched to the cross state, the first control bit is BIT1, and its value can be configured to 1 to ensure that the PRx path of card one is opened. When the path state is switched to the direct state, the first control bit is BIT5 / 4 / 0, and its value can be configured to 011 to ensure that the PRx path of card one is opened.

[0111] In some embodiments, if the value of register_00 is 1, when the path state is the cross state, the target control bit is BIT3 / 2 / 1; when the path state is the through state, the target control bit is BIT5 / 4 / 3 / 2 / 0.

[0112] When the value of register_00 is 0, when the path state is cross state, the target control bit is BIT5 / 4 / 3 / 2 / 0, and when the path state is straight-through state, the target control bit is BIT3 / 2 / 1.

[0113] In some embodiments, the value of the target control bit may be configured as a whole or in a split configuration.

[0114] In some embodiments, for example, when the value of register_00 is 1, optionally, step 302 specifically includes:

[0115] When the path state indicates that the signal path is in a cross state, based on the configuration timing, respectively configuring the value of the second control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the second control bit and the third control bit;

[0116] When the path state indicates that the signal path is in a straight-through state, based on the configuration timing, respectively configuring the value of the fourth control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the third control bit and the fourth control bit;

[0117] The second control bit is the second bit in the first path control information, the third control bit includes the fourth and third bits in the first path control information, and the fourth control bit includes the sixth, fifth and first bits in the first path control information.

[0118] Among them, when the path state indicates that the signal path is in a cross state, when the configuration timing is before or after the paging of card two, the value of the second control bit in the first path control information, that is, the value of BIT1, can be configured to 1, and the value of the third control bit in the first path control information, that is, BIT3 / 2, can be configured to 00, so that the second path control information is 010011, thereby opening the signal path of the diversity antenna corresponding to the first identity recognition module. As shown in Table 3, the conduction relationship of the switching devices is RF OUT2-RF IN1 (PRx path of card one) and RF OUT1-RF IN2 (DRx path of card one).

[0119] When the path status indicates that the signal path is in a cross state, when the configuration timing is card two paging, the value of the second control bit in the first path control information, i.e., the value of BIT1, can be configured to 0, and the value of the third control bit in the first path control information, i.e., BIT3 / 2, can be configured to 01 or 10, so that the second path control information is 010101 or 011001, thereby opening the signal path of the diversity antenna corresponding to the second identity recognition module. As shown in Table 3, the conduction relationship of the switching devices is RF OUT2-RF IN1 (PRx path of card one) and RF OUT1-RF IN3 (DRx path of card two), or, RF OUT2-RF IN1 (PRx path of card one) and RF OUT1-RF IN4 (DRx path of card two).

[0120] When the path status indicates that the signal path is in a direct-through state, when the configuration timing is before or after the paging of card two, the value of the fourth control bit in the first path control information, i.e., the value of BIT5 / 4 / 0, can be configured to 101, and the value of the third control bit in the first path control information, i.e., BIT3 / 2, can be configured to 00, resulting in the second path control information being 100011, thereby opening the signal path of the diversity antenna corresponding to the first identity recognition module. As shown in Table 3, the conduction relationship of the switching devices is RF OUT2-RF IN2 (PRx path of card one) and RF OUT1-RF IN1 (DRx path of card one).

[0121] When the configuration timing is card 2 paging, the value of the fourth control bit in the first path control information, i.e., BIT5 / 4 / 0, can be configured to 010, and the value of the third control bit in the first path control information, i.e., BIT3 / 2, can be configured to 01 or 10, resulting in the second path control information being 010110 / 011010, thereby opening the signal path of the diversity antenna corresponding to the second identity recognition module. As shown in Table 3, the conduction relationship of the switching devices is RF OUT2-RF IN2 (PRx path of card 1) and RF OUT1-RF IN3 (DRx path of card 2), or RF OUT2-RF IN2 (PRx path of card 1) and RF OUT1-RF IN4 (DRx path of card 2).

[0122] In this embodiment, the configuration of the target control bit value can be simplified by splitting the value of the target control bit.

[0123] In this embodiment, in the direct mode, one bit (BIT1) is controlled to maintain the PRx path of card one. In the crossover mode, three bits (BIT5 / 4 / 0) are controlled to maintain the PRx path of card one. By configuring the value of the target control bit, the logical switching of another signal path before and after the paging of card two is achieved. This can solve the technical problem of dual-card combinations such as card one LTE TDD HB + card two NR LB not supporting DR-DSDS. The coordinated application of the method in this embodiment can effectively cover and solve all low-frequency + medium-high frequency or medium-high frequency + low-frequency dual-card combination scenarios. In actual measurements, for the dual-card combinations of low-frequency + medium-high frequency or medium-high frequency + low frequency, the connection rate of card two and the throughput rate of card one were normal in the non-signaling and simulated network signaling ergodic stress tests for direct mode and crossover modes, which can confirm the robustness of this solution. Moreover, the uplink and downlink switching of card one's TDD frequency band will not interrupt the paging state of card two.

[0124] Step 303: Based on the first identity recognition module and the second identity recognition module, call the target signal path corresponding to the second path control information for communication processing, wherein the target signal path includes the first signal path and the signal path of the diversity antenna corresponding to the target identity recognition module.

[0125] When the second path control information is configured, the switching device can switch the state based on the second path control information to switch the signal path to the target signal path. Afterwards, the target signal path can be called for communication processing based on the first identity recognition module and the second identity recognition module.

[0126] Optionally, step 303 specifically includes any one of the following:

[0127] Based on the first identity recognition module, calling the first signal path and the second signal path to perform communication processing, where the second signal path is a signal path of the diversity antenna corresponding to the first identity recognition module;

[0128] Based on the first identity recognition module, the first signal path is called for communication processing, and based on the second identity recognition module, the third signal path is called for communication processing, and the third signal path is the signal path of the diversity antenna corresponding to the second identity recognition module.

[0129] When the configuration timing is before or after the card two paging, it is necessary to configure and obtain the second communication control information so that the target signal path includes the first signal path and the second signal path, and control the switching device to switch to the state of the target signal path. When the configuration timing is the card two paging, it is necessary to configure and obtain the second communication control information so that the target signal path includes the first signal path and the third signal path, thereby realizing the DR-DSDS mechanism.

[0130] In this embodiment, when an electronic device configures a signal path, it obtains the path status and configuration timing of the signal path and, based on the path status and configuration timing, configures the value of the target control bit in the first path control information to obtain second path control information. Then, based on the first and second identity recognition modules, the target signal path corresponding to the second path control information is invoked for communication processing. In this way, the value of the first path control information in the register of the RF front-end device, i.e., the switch device, can be controlled bit by bit, thereby ensuring that, while the first signal path of the primary antenna corresponding to the first identity recognition module is locked, the other signal path is configured according to the path status and configuration timing. Furthermore, the signal paths invoked by the first and second identity recognition modules can be accurately configured before and after card 2 paging, as well as during paging. This resolves the technical issue of the DR-DSDS mechanism failing to implement due to erroneous signal path invocation during card 2 paging, thereby interrupting card 1's connection setup and accurately implementing the DR-DSDS mechanism.

[0131] like Figure 5 As shown, this embodiment further provides a communication processing circuit, which is applied to an electronic device, wherein the electronic device further includes a first identity recognition module and a second identity recognition module. The circuit includes: a switch device 501, a main antenna 502 and a diversity antenna 503 corresponding to the first identity recognition module, a diversity antenna 504 corresponding to the second identity recognition module, a first processing module 505, and a second processing module 506;

[0132] Through the switch device 501, the main antenna 502 corresponding to the first identification module is connected to the first processing module 505 or the second processing module 506, the diversity antenna 503 corresponding to the first identification module is connected to the first processing module 505 or the second processing module 506, and the diversity antenna 504 corresponding to the second identification module is connected to the first processing module 505 or the second processing module 506;

[0133] Among them, the switching device 501 is used to control the signal path called by the first identity recognition module and the second identity recognition module, the first processing module 505 is used to process the signal of the signal path of the main antenna, and the second processing module 506 is used to process the signal of the signal path of the diversity antenna.

[0134] The antenna corresponding to the first identity recognition module has a different frequency band from the antenna corresponding to the second identity recognition module. The antenna frequency band corresponding to the first identity recognition module is a first frequency band, such as the MHB band, and the antenna frequency band corresponding to the second identity recognition module is a second frequency band, such as the LB band.

[0135] Optionally, the number of diversity antennas corresponding to the second identity recognition module is two, or, Figure 5 As shown, the circuit further includes a main antenna 507 corresponding to the second identity recognition module;

[0136] In which, the switching device is a double-pole four-throw switch. When the circuit also includes a main antenna corresponding to the second identity recognition module, the main antenna corresponding to the second identity recognition module is also connected to the first processing module or the second processing module through the switching device.

[0137] The role of the main antenna 507 corresponding to the second identity recognition module can also be switched to a diversity antenna.

[0138] In this embodiment, the first and second processing modules are interconnected with antennas separated by a first frequency band (e.g., the MHB band) and a second frequency band (e.g., the LB band) via a switching device such as a DP4T. The antennas can be made of die-cast aluminum. This architecture utilizes the DP4T interconnection solution to reduce architectural losses and significantly improve communication performance.

[0139] The first processing module may include a frequency selection switch such as a PH2 TXM, and the second processing module may include a single-port diversity switch device such as a DRX SP8T. The PH2 TXM and DRX SP8T can be connected to antennas separated by a first frequency band, such as the MHB band, and a second frequency band, such as the LB band, through a DP4T.

[0140] It should be noted that when the switch is controlled, the main antenna is not connected to the second processing module. When the physical antenna is connected to the second processing module, its definition changes to a diversity antenna. In other words, the main / diversity definition of an antenna changes with the processing module to which it is connected. In the logic control of the switch, the main antenna of card one is connected only to the first processing module, and the diversity antenna of card one is connected only to the second processing module. When card two is paged, the diversity antenna of card two is connected to the second processing module, and the diversity antenna of card one is disconnected from the second processing module.

[0141] Figure 4 This is a schematic diagram of the structure of a communication processing circuit of a specific example of this embodiment. Figure 4 , Table 3 as an example, the process of the communication processing method in this embodiment is described in detail. Figure 6 As shown, the specific steps are as follows:

[0142] Step 601: When the electronic device determines that the path state has not changed, it reads the information of BIT5 / 4 / 0 in the first path control information to determine whether the information is 011; if so, it executes step 602; if not, it executes step 606;

[0143] Step 602, determining that the path state is a cross state;

[0144] Step 603, determine whether the configuration timing is when the card 2 is paging; if so, execute step 604, if not, execute step 605;

[0145] Step 604: If the page is from ANT1, configure the value of BIT3 / 2 to 01; if the page is from ANT3, configure the value of BIT3 / 2 to 10; configure BIT1 to 0;

[0146] Step 605: Set the value of BIT3 / 2 to 00 and set BIT1 to 1.

[0147] Step 606, read the information of BIT1 in the first path control information and determine whether the information is 1; if so, execute step 607; if not, execute step 611;

[0148] Step 607, determining that the path state is a through state;

[0149] Step 608, determine whether the configuration timing is when the card 2 is paging; if so, execute step 609, if not, execute step 610;

[0150] Step 609: If the page is from ANT1, configure the value of BIT3 / 2 to 01; if the page is from ANT3, configure the value of BIT3 / 2 to 10; configure BIT5 / 4 / 0 to 010;

[0151] Step 610: If the page is from ANT1, configure the value of BIT3 / 2 to 01; if the page is from ANT3, configure the value of BIT3 / 2 to 10; configure BIT5 / 4 / 0 to 101;

[0152] Step 611: Determine that it is erroneous logic and is not included in the software's conversion state.

[0153] It should be noted that the communication processing method provided in the embodiments of the present application can be executed by a communication processing device, or a control module in the communication processing device for executing the communication processing method. In the embodiments of the present application, the communication processing device provided in the embodiments of the present application is described by taking the execution of the communication processing method by the communication processing device as an example.

[0154] See also Figure 7 , Figure 7 : is a structural diagram of a communication processing device provided in an embodiment of the present application. The electronic device includes a first identity recognition module and a second identity recognition module. The device includes:

[0155] An acquisition module 701 is configured to acquire a path state of the signal path and a configuration timing of the signal path when the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module;

[0156] A first configuration module 702 is configured to configure a value of a target control bit in the first path control information based on the path state and the configuration timing to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path for a main antenna corresponding to the first identity recognition module, and the value of the target control bit is used to control the opening of a signal path for a diversity antenna corresponding to a target identity recognition module, wherein the target identity recognition module is the first identity recognition module or the second identity recognition module.

[0157] The communication processing module 703 is used to call the target signal path corresponding to the second path control information for communication processing based on the first identity recognition module and the second identity recognition module, where the target signal path includes the first signal path and the signal path of the diversity antenna corresponding to the target identity recognition module.

[0158] Optionally, when the electronic device determines that the path state of the signal path has not changed, the acquiring module 701 is specifically configured to:

[0159] In a case where the first target bit in the first path control information is first preset information, determining that the path state is a cross state;

[0160] When the first target bit is not the first preset information and the second target bit in the first path control information is the second preset information, it is determined that the path state is a through state.

[0161] Optionally, the first path control information is represented in binary, and the first target bit and the second target bit are any of the following:

[0162] The first target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information, and the second target bit is the second bit in the first path control information;

[0163] The first target bit is the second bit in the first path control information, and the second target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information.

[0164] Optionally, the device further comprises:

[0165] The second configuration module is configured to configure a value of the first control bit in the first path control information based on the path status.

[0166] Optionally, the first configuration module 702 is specifically configured to:

[0167] When the path state indicates that the signal path is in a cross state, based on the configuration timing, respectively configuring the value of the second control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the second control bit and the third control bit;

[0168] When the path state indicates that the signal path is in a straight-through state, based on the configuration timing, respectively configuring the value of the fourth control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the third control bit and the fourth control bit;

[0169] The second control bit is the second bit in the first path control information, the third control bit includes the fourth and third bits in the first path control information, and the fourth control bit includes the sixth, fifth and first bits in the first path control information.

[0170] Optionally, the communication processing module 703 is specifically configured to perform any of the following:

[0171] Based on the first identity recognition module, calling the first signal path and the second signal path to perform communication processing, where the second signal path is a signal path of the diversity antenna corresponding to the first identity recognition module;

[0172] Based on the first identity recognition module, the first signal path is called for communication processing, and based on the second identity recognition module, the third signal path is called for communication processing, and the third signal path is the signal path of the diversity antenna corresponding to the second identity recognition module.

[0173] In this embodiment, when an electronic device configures a signal path, it obtains the path status and configuration timing of the signal path and, based on the path status and configuration timing, configures the value of the target control bit in the first path control information to obtain second path control information. Then, based on the first and second identity recognition modules, the target signal path corresponding to the second path control information is invoked for communication processing. In this way, the value of the first path control information in the register of the RF front-end device, i.e., the switch device, can be controlled bit by bit, thereby ensuring that, while the first signal path of the primary antenna corresponding to the first identity recognition module is locked, the other signal path is configured according to the path status and configuration timing. Furthermore, the signal paths invoked by the first and second identity recognition modules can be accurately configured before and after card 2 paging, as well as during paging. This resolves the technical issue of the DR-DSDS mechanism failing to implement due to erroneous signal path invocation during card 2 paging, thereby interrupting card 1's connection setup and accurately implementing the DR-DSDS mechanism.

[0174] The communication processing device in the embodiments of the present application can be a device, or a component, integrated circuit, or chip in the communication processing device. The communication processing device can be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. The non-mobile electronic device can be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc., and the embodiments of the present application do not specifically limit this.

[0175] The communication processing device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0176] The communication processing device provided in the embodiment of the present application can achieve Figure 3 The various processes implemented in the method embodiment achieve the same technical effect and will not be described again here to avoid repetition.

[0177] Alternatively, as Figure 8 As shown, an embodiment of the present application also provides an electronic device 800, including a processor 801, a memory 802, and a program or instruction stored in the memory 802 and executable on the processor 801. When the program or instruction is executed by the processor 801, each process of the above-mentioned communication processing method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0178] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0179] Figure 9 A schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.

[0180] The electronic device 900 includes, but is not limited to, components such as a radio frequency unit 901, a network module 902, an audio output unit 903, an input unit 904, a sensor 905, a display unit 906, a user input unit 907, an interface unit 908, a memory 909, and a processor 910. The electronic device also includes a first identity recognition module and a second identity recognition module.

[0181] Those skilled in the art will understand that the electronic device 900 may also include a power source (such as a battery) to power each component, and the power source may be logically connected to the processor 910 through a power management system, thereby implementing functions such as charging, discharging, and power consumption management through the power management system. Figure 9 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be repeated here.

[0182] Processor 910 is configured to:

[0183] When the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module, obtaining the path status of the signal path and the configuration timing of the signal path;

[0184] Based on the path state and the configuration timing, a value of a target control bit in the first path control information is configured to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path of a main antenna corresponding to the first identity identification module, and the value of the target control bit is used to control the opening of a signal path of a diversity antenna corresponding to a target identity identification module, wherein the target identity identification module is the first identity identification module or the second identity identification module;

[0185] Based on the first identity recognition module and the second identity recognition module, a target signal path corresponding to the second path control information is called for communication processing, where the target signal path includes the first signal path and a signal path of a diversity antenna corresponding to the target identity recognition module.

[0186] In this embodiment, when an electronic device configures a signal path, it obtains the path status and configuration timing of the signal path and, based on the path status and configuration timing, configures the value of the target control bit in the first path control information to obtain second path control information. Then, based on the first and second identity recognition modules, the target signal path corresponding to the second path control information is invoked for communication processing. In this way, the value of the first path control information in the register of the RF front-end device, i.e., the switch device, can be controlled bit by bit, thereby ensuring that, while the first signal path of the primary antenna corresponding to the first identity recognition module is locked, the other signal path is configured according to the path status and configuration timing. Furthermore, the signal paths invoked by the first and second identity recognition modules can be accurately configured before and after card 2 paging, as well as during paging. This resolves the technical issue of the DR-DSDS mechanism failing to implement due to erroneous signal path invocation during card 2 paging, thereby interrupting card 1's connection setup and accurately implementing the DR-DSDS mechanism.

[0187] Optionally, when the electronic device determines that the path state of the signal path has not changed, the processor 910 is further configured to:

[0188] In a case where the first target bit in the first path control information is first preset information, determining that the path state is a cross state;

[0189] When the first target bit is not the first preset information and the second target bit in the first path control information is the second preset information, it is determined that the path state is a through state.

[0190] Optionally, the first path control information is represented in binary, and the first target bit and the second target bit are any of the following:

[0191] The first target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information, and the second target bit is the second bit in the first path control information;

[0192] The first target bit is the second bit in the first path control information, and the second target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information.

[0193] Optionally, when the electronic device determines that the path state of the signal path changes, the processor 910 is further configured to:

[0194] Based on the path status, a value of the first control bit in the first path control information is configured.

[0195] Optionally, the processor 910 is further configured to:

[0196] When the path state indicates that the signal path is in a cross state, based on the configuration timing, respectively configuring the value of the second control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the second control bit and the third control bit;

[0197] When the path state indicates that the signal path is in a straight-through state, based on the configuration timing, respectively configuring the value of the fourth control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the third control bit and the fourth control bit;

[0198] The second control bit is the second bit in the first path control information, the third control bit includes the fourth and third bits in the first path control information, and the fourth control bit includes the sixth, fifth and first bits in the first path control information.

[0199] Optionally, the processor 910 is further configured to:

[0200] Based on the first identity recognition module, calling the first signal path and the second signal path to perform communication processing, where the second signal path is a signal path of the diversity antenna corresponding to the first identity recognition module;

[0201] Based on the first identity recognition module, the first signal path is called for communication processing, and based on the second identity recognition module, the third signal path is called for communication processing, and the third signal path is the signal path of the diversity antenna corresponding to the second identity recognition module.

[0202] It should be understood that in an embodiment of the present application, the input unit 904 may include a graphics processing unit (GPU) 9041 and a microphone 9042, and the graphics processor 9041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 906 may include a display panel 9061, and the display panel 9061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 907 includes a touch panel 9071 and at least one of other input devices 9072. The touch panel 9071 is also called a touch screen. The touch panel 9071 may include two parts: a touch detection device and a touch controller. Other input devices 9072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and an operating stick, which will not be repeated here.

[0203] The memory 909 can be used to store software programs and various data. The memory 909 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). In addition, the memory 909 may include a volatile memory or a non-volatile memory, or the memory 909 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DRRAM). The memory 909 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0204] Processor 910 may include one or more processing units. In some embodiments, processor 910 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 910.

[0205] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned communication processing method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0206] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer-readable storage medium, such as a computer read-only memory, a random access memory, a magnetic disk, or an optical disk.

[0207] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned communication processing method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0208] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0209] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned communication processing method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0210] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0211] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling an electronic device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0212] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A communication processing method, characterized in that: Applied to an electronic device, the electronic device includes a first identity recognition module and a second identity recognition module, and the method includes: When the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module, obtaining the path status of the signal path and the configuration timing of the signal path; Based on the path state and the configuration timing, a value of a target control bit in the first path control information is configured to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path of a main antenna corresponding to the first identity identification module, and the value of the target control bit is used to control the opening of a signal path of a diversity antenna corresponding to a target identity identification module, wherein the target identity identification module is the first identity identification module or the second identity identification module; Based on the first identity recognition module and the second identity recognition module, a target signal path corresponding to the second path control information is called for communication processing, where the target signal path includes the first signal path and a signal path of a diversity antenna corresponding to the target identity recognition module.

2. The method according to claim 1, characterized in that When the electronic device determines that the path state of the signal path has not changed, obtaining the path state of the signal path includes: In a case where the first target bit in the first path control information is first preset information, determining that the path state is a cross state; When the first target bit is not the first preset information and the second target bit in the first path control information is the second preset information, it is determined that the path state is a through state.

3. The method according to claim 2, characterized in that The first path control information is represented in binary, and the first target bit and the second target bit are any of the following: The first target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information, and the second target bit is the second bit in the first path control information; The first target bit is the second bit in the first path control information, and the second target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information.

4. The method according to claim 1, wherein When the electronic device determines that the path state of the signal path has changed, before configuring the value of the target control bit in the first path control information based on the path state and the configuration timing to obtain the second path control information, the method further includes: Based on the path status, a value of the first control bit in the first path control information is configured.

5. The method according to claim 1, wherein The configuring the value of the target control bit in the first path control information based on the path state and the configuration timing to obtain the second path control information includes: When the path state indicates that the signal path is in a cross state, based on the configuration timing, respectively configuring the value of the second control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the second control bit and the third control bit; When the path state indicates that the signal path is in a straight-through state, based on the configuration timing, respectively configuring the value of the fourth control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the third control bit and the fourth control bit; The second control bit is the second bit in the first path control information, the third control bit includes the fourth and third bits in the first path control information, and the fourth control bit includes the sixth, fifth and first bits in the first path control information.

6. The method according to claim 1, characterized in that The calling of the target signal path corresponding to the second path control information for communication processing based on the first identity recognition module and the second identity recognition module includes any one of the following: Based on the first identity recognition module, calling the first signal path and the second signal path to perform communication processing, where the second signal path is a signal path of the diversity antenna corresponding to the first identity recognition module; Based on the first identity recognition module, the first signal path is called for communication processing, and based on the second identity recognition module, the third signal path is called for communication processing, and the third signal path is the signal path of the diversity antenna corresponding to the second identity recognition module.

7. A communication processing device, characterized in that: Applied to an electronic device, the electronic device includes a first identity recognition module and a second identity recognition module, and the device includes: an acquisition module, configured to acquire a path state of the signal path and a configuration timing of the signal path when the electronic device configures the signal path called by the first identity recognition module and the second identity recognition module; a first configuration module configured to configure a value of a target control bit in the first path control information based on the path state and the configuration timing to obtain second path control information, wherein the target control bit is a control bit other than the first control bit in the control bits of the first path control information, the first control bit corresponds to the path state, the value of the first control bit is used to control the opening of a first signal path for a main antenna corresponding to the first identity recognition module, and the value of the target control bit is used to control the opening of a signal path for a diversity antenna corresponding to a target identity recognition module, the target identity recognition module being the first identity recognition module or the second identity recognition module; A communication processing module is used to call a target signal path corresponding to the second path control information for communication processing based on the first identity recognition module and the second identity recognition module, wherein the target signal path includes the first signal path and the signal path of the diversity antenna corresponding to the target identity recognition module.

8. The device according to claim 7, characterized in that When the electronic device determines that the path state of the signal path has not changed, the acquiring module is specifically configured to: In a case where the first target bit in the first path control information is first preset information, determining that the path state is a cross state; When the first target bit is not the first preset information and the second target bit in the first path control information is the second preset information, it is determined that the path state is a through state.

9. The device according to claim 8, characterized in that The first path control information is represented in binary, and the first target bit and the second target bit are any of the following: The first target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information, and the second target bit is the second bit in the first path control information; The first target bit is the second bit in the first path control information, and the second target bit includes the sixth bit, the fifth bit, and the first bit in the first path control information.

10. The device according to claim 7, characterized in that The device further comprises: The second configuration module is configured to configure a value of the first control bit in the first path control information based on the path status.

11. The device according to claim 7, characterized in that The first configuration module is specifically configured to: When the path state indicates that the signal path is in a cross state, based on the configuration timing, respectively configuring the value of the second control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the second control bit and the third control bit; When the path state indicates that the signal path is in a straight-through state, based on the configuration timing, respectively configuring the value of the fourth control bit and the value of the third control bit in the first path control information to obtain second path control information, wherein the target control bit includes the third control bit and the fourth control bit; The second control bit is the second bit in the first path control information, the third control bit includes the fourth and third bits in the first path control information, and the fourth control bit includes the sixth, fifth and first bits in the first path control information.

12. The device according to claim 7, characterized in that The communication processing module is specifically used for any of the following: Based on the first identity recognition module, calling the first signal path and the second signal path to perform communication processing, where the second signal path is a signal path of the diversity antenna corresponding to the first identity recognition module; Based on the first identity recognition module, the first signal path is called for communication processing, and based on the second identity recognition module, the third signal path is called for communication processing, and the third signal path is the signal path of the diversity antenna corresponding to the second identity recognition module.

13. A communication processing circuit, characterized in that: Applied to electronic equipment, the circuit includes: a switching device, a main antenna and a diversity antenna corresponding to a first identity recognition module in the electronic equipment, a diversity antenna corresponding to a second identity recognition module in the electronic equipment, a first processing module, and a second processing module; By means of the switching device, respectively, a main antenna corresponding to the first identification module is connected to the first processing module or the second processing module, a diversity antenna corresponding to the first identification module is connected to the first processing module or the second processing module, and a diversity antenna corresponding to the second identification module is connected to the first processing module or the second processing module; Among them, the switching device is used to control the signal path called by the first identity recognition module and the second identity recognition module, the first processing module is used to process the signal of the signal path of the main antenna, and the second processing module is used to process the signal of the signal path of the diversity antenna.

14. The circuit according to claim 13, characterized in that The number of diversity antennas corresponding to the second identity recognition module is two, or the circuit further includes a main diversity antenna corresponding to the second identity recognition module; In which, the switching device is a double-pole four-throw switch. When the circuit also includes a main antenna corresponding to the second identity recognition module, the main antenna corresponding to the second identity recognition module is also connected to the first processing module or the second processing module through the switching device.

15. A chip, characterized in that: The chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the steps of the communication processing method according to any one of claims 1 to 6.

16. An electronic device, characterized in that: The method comprises a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the steps of the communication processing method according to any one of claims 1 to 6.

17. A readable storage medium, characterized in that The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the steps of the communication processing method according to any one of claims 1 to 6 are implemented.

18. A computer program product, characterized in that The program product is stored in a storage medium, and is executed by at least one processor to implement the steps of the communication processing method according to any one of claims 1 to 6.

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