A high-voltage LED chip and its fabrication method

By stacking and connecting the light-emitting epitaxial layers of the high-voltage LED chip along the first direction, the problem of large area of ​​the high-voltage LED chip is solved, achieving smaller integrated packaging and higher luminous intensity and light emission effect.

CN118472133BActive Publication Date: 2025-10-31XIAMEN CHANGELIGHT CO LTD
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Patent Information

Application Number
CN202410201658.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-02-23
Publication Date
2025-10-31
Estimated Expiration
2044-02-23

AI Technical Summary

Technical Problem

When existing high-voltage LED chips are implemented by connecting multiple LED chips in series, the area is large, which is not conducive to integrated packaging.

Method used

The first to the Nth light-emitting epitaxial layer are stacked along the first direction and connected in series. The semiconductor layer connected by the series connection realizes the function of the high voltage LED chip. At the same time, epitaxial layers with the same or different light-emitting colors are designed to improve the light intensity and light emission effect.

Benefits of technology

It effectively reduces the area of ​​high-voltage LED chips, which is beneficial for integrated packaging and improves luminous intensity and light output.

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Abstract

This invention provides a high-voltage LED chip and its manufacturing method. A first to an Nth light-emitting epitaxial layer are stacked along a first direction, thereby minimizing the difference between the overall area of ​​the high-voltage LED chip and the area of ​​a single light-emitting epitaxial layer. This effectively reduces the area of ​​the high-voltage LED chip while achieving its function through series electrical connection of all the light-emitting epitaxial layers, facilitating integrated packaging. Furthermore, the first to Nth light-emitting epitaxial layers can be designed to emit the same color to enhance the luminous intensity of the high-voltage LED chip. Alternatively, the first to Nth light-emitting epitaxial layers can be designed to emit at least one different color to achieve light mixing, resulting in richer light emission effects.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically, to a high-voltage LED (Light-Emitting Diode) chip and a method for manufacturing the same. Background Technology

[0002] High-voltage LED chips are achieved by connecting multiple LED chips in series. At the same output power, the driving current required by a high-voltage LED chip is significantly less than that of a low-voltage LED chip. Therefore, for the same output power, the power dissipated by other loads in a high-voltage LED chip is much less than that in a low-voltage LED chip, thus reducing the heat generation of the entire module and significantly lowering the cost of the heat sink casing. Furthermore, high-voltage LED chips can significantly reduce AC / DC conversion efficiency losses, as a lower input-output voltage difference results in higher AC / DC conversion efficiency. This reduction in heat dissipation further reduces the cost of the heat sink casing. While high-voltage LED chips offer many advantages, existing high-voltage LED chips, achieved by connecting multiple LEDs horizontally, have a larger area compared to a single LED chip, which is not conducive to integrated packaging. Summary of the Invention

[0003] In view of this, the present invention provides a high-voltage LED chip and its manufacturing method, which effectively solves the technical problems existing in the prior art. The first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer are stacked and connected in series. While realizing the function of the high-voltage LED chip, the area of ​​the high-voltage LED chip is effectively reduced, which is conducive to the integration and packaging of the high-voltage LED chip.

[0004] To achieve the above objectives, the technical solution provided by the present invention is as follows:

[0005] A high-voltage LED chip, the high-voltage LED chip comprising:

[0006] A fixed substrate, a first light-emitting epitaxial layer, and an Nth light-emitting epitaxial layer are sequentially stacked along the first direction, where N is an integer not less than 2;

[0007] Any one of the first to the Nth light-emitting epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially along the first direction, and the second semiconductor layer of the i-th light-emitting epitaxial layer is bonded and electrically connected to the first semiconductor layer of the (i+1)-th light-emitting epitaxial layer, where i is a positive integer less than N.

[0008] Accordingly, the present invention also provides a method for manufacturing a high-voltage LED chip, for manufacturing the above-mentioned high-voltage LED chip, the method comprising:

[0009] Provide a first to Nth ...

[0010] The first semiconductor layer to be bonded and light-emitting epitaxial layer is fixed on a fixed substrate, and the growth substrate of the first light-emitting epitaxial layer to be bonded and light-emitting epitaxial layer is removed to obtain the first light-emitting epitaxial layer;

[0011] The first semiconductor layer of the (i+1)th light-emitting epitaxial layer to be bonded is electrically connected to the second semiconductor layer of the ith light-emitting epitaxial layer, and the growth substrate of the (i+1)th light-emitting epitaxial layer to be bonded is removed to obtain the (i+1)th light-emitting epitaxial layer, where i is a positive integer less than N.

[0012] Compared with the prior art, the technical solution provided by the present invention has at least the following advantages:

[0013] This invention provides a high-voltage LED chip and its manufacturing method. The high-voltage LED chip includes: a fixed substrate and a first light-emitting epitaxial layer to an Nth light-emitting epitaxial layer, which are stacked sequentially along a first direction, where N is an integer not less than 2; any one of the first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, which are stacked sequentially along the first direction, and the second semiconductor layer of the i-th light-emitting epitaxial layer is bonded and electrically connected to the first semiconductor layer of the (i+1)-th light-emitting epitaxial layer, where i is a positive integer less than N.

[0014] As can be seen from the above, the technical solution provided by the present invention stacks the first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer along the first direction, thereby making the difference between the overall area of ​​the high-voltage LED chip and the area of ​​a single light-emitting epitaxial layer small. Thus, while realizing the function of the high-voltage LED chip by connecting all the light-emitting epitaxial layers in series, the area of ​​the high-voltage LED chip is effectively reduced, which is beneficial to the integrated packaging of the high-voltage LED chip.

[0015] Meanwhile, the first to Nth luminescent epitaxial layers provided by this invention can be designed to emit the same color, thereby increasing the luminous intensity of the high-voltage LED chip. Alternatively, the first to Nth luminescent epitaxial layers can be designed to emit at least one color different from the others to achieve light mixing, thus achieving a richer light emission effect. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a high-voltage LED chip provided in an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of another high-voltage LED chip provided in an embodiment of the present invention;

[0019] Figure 3 A schematic diagram of the distribution of connected electrodes provided in an embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram of the structure of another high-voltage LED chip provided in an embodiment of the present invention;

[0021] Figure 5 A schematic diagram showing the distribution of a connecting electrode and an external electrode provided in an embodiment of the present invention;

[0022] Figure 6 This is a schematic diagram of the structure of another high-voltage LED chip provided in an embodiment of the present invention;

[0023] Figure 7 This is a schematic diagram of the structure of another high-voltage LED chip provided in an embodiment of the present invention;

[0024] Figure 8 This is a schematic diagram of the structure of another high-voltage LED chip provided in an embodiment of the present invention;

[0025] Figure 9 A flowchart illustrating a method for manufacturing a high-voltage LED chip according to an embodiment of the present invention;

[0026] Figures 10a to 10f for Figure 9 The corresponding structural diagrams for each step in the process. Detailed Implementation

[0027] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] As described in the background section, high-voltage LED chips are obtained by connecting multiple LED chips in series. At the same output power, the driving current required by a high-voltage LED chip is much less than that of a low-voltage LED chip. Therefore, for the same output power, the power dissipated by other loads in a high-voltage LED chip is much less than that in a low-voltage LED chip, thus reducing the heat generation of the entire module and significantly lowering the cost of the heat sink casing. Furthermore, high-voltage LED chips can significantly reduce AC / DC conversion efficiency losses because a lower input-output voltage difference results in higher AC / DC conversion efficiency. This reduction in heat dissipation further reduces the cost of the heat sink casing for high-voltage LED chips. Although high-voltage LED chips offer many advantages, existing high-voltage LED chips are implemented by connecting multiple LEDs horizontally, resulting in a larger area compared to a single LED chip, which is not conducive to the integrated packaging of high-voltage LED chips.

[0029] Based on this, the present invention provides a high-voltage LED chip and its manufacturing method, which effectively solves the technical problems existing in the prior art. The first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer are stacked and connected in series. While realizing the function of the high-voltage LED chip, the area of ​​the high-voltage LED chip is effectively reduced, which is conducive to the integration and packaging of the high-voltage LED chip.

[0030] To achieve the above objectives, the technical solutions provided by the embodiments of the present invention are as follows, in detail... Figures 1 to 10f The technical solutions provided in the embodiments of the present invention will be described in detail.

[0031] refer to Figure 1 The diagram shown is a structural schematic of a high-voltage LED chip provided in an embodiment of the present invention. The high-voltage LED chip provided in this embodiment includes:

[0032] A fixed substrate 100 and a first light-emitting epitaxial layer 201 to an Nth light-emitting epitaxial layer 20n are sequentially stacked along the first direction Y, where N is an integer not less than 2; any one of the first light-emitting epitaxial layers 201 to the Nth light-emitting epitaxial layer 20n includes a first semiconductor layer 210, a light-emitting layer 230 and a second semiconductor layer 220 sequentially stacked along the first direction Y, and the second semiconductor layer 220 of the i-th light-emitting epitaxial layer 20i is bonded and electrically connected to the first semiconductor layer 210 of the (i+1)-th light-emitting epitaxial layer 20, where i is a positive integer less than N.

[0033] Understandably, the technical solution provided by this invention bonds and electrically connects the second semiconductor layer of the i-th light-emitting epitaxial layer and the first semiconductor layer of the (i+1)-th light-emitting epitaxial layer, so that the first to N-th light-emitting epitaxial layers are connected in series, thus realizing the function of a high-voltage LED chip. Simultaneously, by stacking the first to N-th light-emitting epitaxial layers along a first direction, the difference between the overall area of ​​the high-voltage LED chip and the area of ​​a single light-emitting epitaxial layer is small, effectively reducing the area of ​​the high-voltage LED chip and facilitating its integrated packaging.

[0034] Meanwhile, in the embodiments of the present invention, the first to Nth light-emitting epitaxial layers have the same light emission color, or at least one light-emitting epitaxial layer has a different light emission color from the others. That is, the first to Nth light-emitting epitaxial layers provided in the embodiments of the present invention can be designed to have the same light emission color to improve the luminous intensity of the high-voltage LED chip. Alternatively, the first to Nth light-emitting epitaxial layers can also be designed to have at least one light emission color different from the others to achieve light mixing, thereby achieving a richer light emission effect.

[0035] Specifically, the first to the Nth luminescent epitaxial layer can all be blue luminescent epitaxial layer, which can multiply the luminous intensity of the high-voltage LED chip; or, a portion of the first to the Nth luminescent epitaxial layer can be blue luminescent epitaxial layer and another portion can be yellow luminescent epitaxial layer, and the mixing of blue and yellow light can make the high-voltage LED chip emit white light, achieving a richer light emission effect; or, a portion of the first to the Nth luminescent epitaxial layer can be red luminescent epitaxial layer and another portion can be violet luminescent epitaxial layer, etc. The embodiments of the present invention do not impose specific limitations on this, and specific design is required according to actual application.

[0036] In one embodiment of the present invention, the first semiconductor layer of the (i+1)th light-emitting epitaxial layer and the second semiconductor layer of the ith light-emitting epitaxial layer provided in this embodiment can be electrically connected by interconnecting electrodes arranged in a regular or irregular lattice. Figure 2 and Figure 3 As shown, Figure 2 This is a schematic diagram of another high-voltage LED chip provided in an embodiment of the present invention. Figure 3 This is a schematic diagram of the distribution of interconnected electrodes provided in an embodiment of the present invention. In this embodiment, the first semiconductor layer 210 of the (i+1)th light-emitting epitaxial layer 20 has a first insulating layer 311 disposed on the side facing the fixed substrate 100. The first insulating layer 311 includes a plurality of first through-holes, and a first bonding electrode 321 is disposed within each of the first through-holes and electrically connected to the first semiconductor layer 210 of the (i+1)th light-emitting epitaxial layer 20.

[0037] Furthermore, a second insulating layer 312 is provided on the second semiconductor layer 220 of the i-th light-emitting epitaxial layer 20i away from the first side of the fixed substrate 100. The second insulating layer 312 includes a plurality of second through holes, and a second bonding electrode 322 is disposed in the second through hole and electrically connected to the second semiconductor layer 220 of the i-th light-emitting epitaxial layer 20i. The first bonding electrode 321 and the second bonding electrode 322 are correspondingly bonded to form a connecting electrode 320.

[0038] As is understood, in the embodiments of the present invention, a plurality of first bonding electrodes are disposed on one side of the first semiconductor layer of the (i+1)th light-emitting epitaxial layer, and a plurality of second bonding electrodes are disposed on one side of the second semiconductor layer of the i-th light-emitting epitaxial layer. By aligning and bonding the first and second bonding electrodes to form a connecting electrode, the (i+1)th light-emitting epitaxial layer and the i-th light-emitting epitaxial layer are connected in series. The connecting electrode provided in the embodiments of the present invention has a regular or irregular dot matrix distribution, which can improve the problem of light shading by the connecting electrode affecting the light output brightness, thus ensuring higher light output brightness of the high-voltage LED chip.

[0039] Optionally, in the embodiments of the present invention, when the first bonding electrode and the second bonding electrode are aligned and bonded, the first bonding electrode and the second bonding electrode are completely matched and correspond to each other to reduce the light-shielding area of ​​the connected electrode. That is, on the plane perpendicular to the first direction, the cross-sectional shape and size of the first bonding electrode and the second bonding electrode are exactly the same, and the positions of the first bonding electrode and the second bonding electrode are completely corresponding. When the first bonding electrode and the second bonding electrode are bonded, the first bonding electrode and the second bonding electrode completely overlap and correspond to each other, thereby reducing the light-shielding area of ​​the connected electrode. Alternatively, on the plane perpendicular to the first direction, the cross-sectional shape and size of the first bonding electrode and the second bonding electrode are different. When the first bonding electrode and the second bonding electrode are bonded, the vertical projection of the larger-sized bonding electrode on the fixed substrate completely covers the vertical projection of the smaller-sized bonding electrode on the fixed substrate, thereby maximizing the reduction of the light-shielding area of ​​the connected electrode.

[0040] It should be noted that the cross-sections of the first bonding electrode and the second bonding electrode provided in the embodiments of the present invention on the plane perpendicular to the first direction can be regular cross-sectional shapes such as circles and rectangles, or other irregular cross-sectional shapes. The present invention does not impose specific limitations on these.

[0041] In one embodiment of the present invention, an external electrode is further fabricated on the second semiconductor layer of the Nth light-emitting epitaxial layer to receive the signal. Preferably, the patterned external electrode overlaps with the distribution area of ​​the connected electrode. Combined with... Figure 4 and Figure 5 As shown, Figure 4 This is a schematic diagram of another high-voltage LED chip provided in an embodiment of the present invention. Figure 5This is a schematic diagram illustrating the distribution of a connecting electrode and an external electrode according to an embodiment of the present invention. The high-voltage LED chip provided in this embodiment includes an external electrode 400 located on the side of the second semiconductor layer 220 of the Nth light-emitting epitaxial layer 20n facing away from the fixed substrate 100; in the first direction Y, the external electrode 400 overlaps with at least one of the connecting electrodes 320.

[0042] It is understood that the embodiment of the present invention provides that the external electrode is disposed in the distribution area of ​​the connecting electrode, so that the external electrode and the connecting electrode have an overlapping area in the first direction, which can improve the problem of the external electrode blocking light and affecting the light output brightness, and ensure that the light output brightness of the high voltage LED chip is higher.

[0043] Optionally, the external electrode provided in this embodiment of the invention can be designed graphically. For example, the external electrode can be designed as a structure including multiple electrically connected strip-shaped electrodes, and the multiple strip-shaped electrodes are distributed at intervals on the second semiconductor layer of the Nth light-emitting epitaxial layer. The interval difference between different strip-shaped electrodes is small or even the same. Thus, while transmitting signals through the external electrode, the uniformity of current distribution in the second semiconductor layer of the Nth light-emitting epitaxial layer can be ensured by the equally spaced strip-shaped electrodes, thereby improving the performance of the high-voltage LED chip.

[0044] It should be noted that the external electrodes provided in the embodiments of the present invention are not limited to the above-mentioned spaced strip electrode shape. In other embodiments of the present invention, they may be other shapes, and the present invention does not impose specific limitations on them.

[0045] The high-voltage LED chip provided in this embodiment of the invention can apply a signal to the second semiconductor layer side of the Nth light-emitting epitaxial layer through an external electrode; correspondingly, the high-voltage LED chip also needs to apply a signal to the first semiconductor layer side of the first light-emitting epitaxial layer through an electrode. The fixed substrate provided in this embodiment of the invention can be a conductive substrate, which can be electrically connected to the first semiconductor layer of the first light-emitting epitaxial layer to reuse the electrode; alternatively, the fixed substrate can be an insulating substrate, which can be formed by drilling holes to create through-holes to make contact with the first semiconductor layer of the first light-emitting epitaxial layer as an electrode; or, it can also be formed by leading out an electrode at the side of the high-voltage LED chip and making contact with the first semiconductor layer of the first light-emitting epitaxial layer as an electrode. This invention does not impose specific limitations on these methods.

[0046] refer to Figure 6The diagram shows a structural schematic of another high-voltage LED chip provided in an embodiment of the present invention. The high-voltage LED chip provided in this embodiment of the present invention further includes a reflector 500 located between the fixed substrate 100 and the first light-emitting epitaxial layer 201. When the first light-emitting epitaxial layer 201 to the Nth light-emitting epitaxial layer 20n emits light from the external electrode 400 side, the reflector 500 can reflect the light emitted by the first light-emitting epitaxial layer 201 to the Nth light-emitting epitaxial layer 20n back to the external electrode 400 side to emit light, thereby improving the light output brightness of the high-voltage LED chip.

[0047] In this embodiment of the invention, when the fixed substrate is a conductive substrate and the electrode electrically connected to the first semiconductor layer of the first light-emitting epitaxial layer is reused, the reflector needs to electrically connect the conductive substrate and the first semiconductor layer of the first light-emitting epitaxial layer. Optionally, when the fixed substrate provided in this embodiment of the invention is a conductive substrate, the reflector can be a metal reflector, and the conductivity of the metal reflector is used to electrically connect the first semiconductor layer of the first light-emitting epitaxial layer and the conductive substrate.

[0048] Or refer to Figure 7 The diagram shows a structural schematic of another high-voltage LED chip provided in an embodiment of the present invention. When the fixed substrate 100 provided in this embodiment is a conductive substrate, the reflector 500 includes a DBR (Distributed Bragg Reflector) layer 510 located between the first light-emitting epitaxial layer 201 and the conductive substrate 100, and an ohmic contact layer 520 located between the DBR layer 510 and the first semiconductor layer 210 of the first light-emitting epitaxial layer 201. The DBR layer 510 includes multiple contact vias, and the ohmic contact layer 520 is electrically connected to the conductive substrate 100 through the contact vias. The ohmic contact layer 520 electrically connects the first semiconductor layer 210 of the first light-emitting epitaxial layer 201 and the conductive substrate 100, thereby multiplexing the conductive substrate 100 as an electrode for applying signals to the first semiconductor layer 210 of the first light-emitting epitaxial layer 201.

[0049] Furthermore, the DBR layer in the reflector provided in this embodiment of the invention can be replaced with other reflective structures, specifically, it can be replaced with an ODR (Omni-Directional Reflector) layer. That is, the reflector provided in this embodiment of the invention includes an ODR layer located between the first light-emitting epitaxial layer and the conductive substrate, and an ohmic contact layer located between the ODR layer and the first semiconductor layer of the first light-emitting epitaxial layer, wherein the ODR layer includes a plurality of contact vias, and the ohmic contact layer is electrically connected to the conductive substrate through the contact vias.

[0050] It should be noted that the reflector provided in the embodiments of the present invention is not limited to the several reflective structures provided above. In other embodiments of the present invention, the reflector may be other reflective structures, and the present invention does not impose specific limitations on them.

[0051] In one embodiment of the present invention, one of the first semiconductor layer and the second semiconductor layer provided in this embodiment is an N-type semiconductor layer, and the other is a P-type semiconductor layer; at least one of the light-emitting epitaxial layers further includes a current spreading layer located on the side of the P-type semiconductor layer opposite to the light-emitting layer. See details. Figure 8 The diagram shows a structural schematic of another high-voltage LED chip provided in an embodiment of the present invention. The first semiconductor layer 210 is a P-type semiconductor layer, and the second semiconductor layer 220 is an N-type semiconductor layer. In at least one of the first to Nth light-emitting epitaxial layers 201 to 20n, a current spreading layer 600 is disposed on the side of the first semiconductor layer 210 opposite to its light-emitting layer 230. That is, the current spreading layer 600 is located between the first semiconductor layer 210 and the first bonding electrode 321. The current spreading layer 600 improves the current spreading in the first semiconductor layer 210, thereby improving the performance of the high-voltage LED chip.

[0052] Furthermore, the high-voltage LED chip provided in this embodiment of the invention can be further optimized to improve performance. (Continue to refer to...) Figure 8 As shown, the high-voltage LED chip provided in this embodiment of the invention further includes: a passivation layer 700 covering at least the exposed surfaces of the first light-emitting epitaxial layer 201 to the Nth light-emitting epitaxial layer 20n, wherein the passivation layer 700 is hollowed out at the location corresponding to the external electrode 400 to expose the external electrode 400 and achieve normal signal input. The passivation layer 700 protects the high-voltage LED chip from damage and improves the reliability of the high-voltage LED chip. And / or, the surface of the second semiconductor layer 220 of the Nth light-emitting epitaxial layer 20n facing away from the fixed substrate 100 is roughened to improve the light output brightness of the high-voltage LED chip. And / or, the high-voltage LED chip provided in this embodiment of the invention further includes: a conductive bonding layer 800 located between the fixed substrate 100 and the first light-emitting epitaxial layer 201; wherein, when a reflector 500 is included between the first light-emitting epitaxial layer 201 and the fixed substrate 100, the conductive bonding layer 800 is included between the fixed substrate 100 and the reflector 500.

[0053] Based on the same inventive concept, embodiments of the present invention also provide a method for manufacturing a high-voltage LED chip, used to manufacture the high-voltage LED chip provided in any of the above embodiments, wherein the manufacturing method includes:

[0054] Provide a first to Nth ...

[0055] The first semiconductor layer to be bonded for light emission epitaxy is fixed on a fixed substrate, and the growth substrate of the first light emission epitaxy to be bonded for light emission epitaxy is removed to obtain the first light emission epitaxy.

[0056] The first semiconductor layer of the (i+1)th light-emitting epitaxial layer to be bonded is electrically connected to the second semiconductor layer of the ith light-emitting epitaxial layer, and the growth substrate of the (i+1)th light-emitting epitaxial layer to be bonded is removed to obtain the (i+1)th light-emitting epitaxial layer, where i is a positive integer less than N.

[0057] In one embodiment of the present invention, bonding and electrically connecting the (i+1)th first semiconductor layer to be bonded for light emission epitaxy to the ith second semiconductor layer for light emission epitaxy includes:

[0058] A plurality of first bonding electrodes are formed on the (i+1)th first semiconductor layer to be bonded for light emission epitaxy, and a plurality of second bonding electrodes are formed on the ith second semiconductor layer to be bonded for light emission epitaxy; a first insulating layer is formed to cover the first bonding electrodes and the gap between adjacent first bonding electrodes, and a second insulating layer is formed to cover the second bonding electrodes and the gap between adjacent second bonding electrodes; the first insulating layer and the second insulating layer are thinned by a polishing process to expose the first bonding electrodes and the second bonding electrodes; the first bonding electrodes and the second bonding electrodes are aligned and bonded to form a connecting electrode.

[0059] And, after forming the Nth light-emitting epitaxial layer, the fabrication method includes: forming an external electrode on the side of the second semiconductor layer of the Nth light-emitting epitaxial layer away from the fixed substrate, wherein, in the direction from the fixed substrate to the Nth light-emitting epitaxial layer, the external electrode has an overlapping region with at least one of the connected electrodes.

[0060] The method for manufacturing a high-voltage LED chip according to an embodiment of the present invention will be described in more detail below with reference to the accompanying drawings. It should be noted that the following description uses... Figure 8 The fabrication method of the high-voltage LED chip shown is described using an example, wherein the first semiconductor layer is a P-type semiconductor layer and the second semiconductor layer is an N-type semiconductor layer; specifically combined with... Figures 9 to 10f As shown, Figure 9 This is a flowchart illustrating a method for manufacturing a high-voltage LED chip according to an embodiment of the present invention. Figures 10a to 10f for Figure 9 The structural diagrams for each step are shown below.

[0061] like Figure 10a As shown, corresponding Figure 9 In step S1, a first to Nth epitaxial layer to be bonded for light emission is provided. Any one of these epitaxial layers comprises a growth substrate 240, a second semiconductor layer 220, a light-emitting layer 230, and a first semiconductor layer 210 stacked sequentially, where N is an integer not less than 2. Further, an unintentionally doped semiconductor layer may be included between the growth substrate 240 and the second semiconductor layer 220.

[0062] The fabrication of the light-emitting epitaxial layer to be bonded provided in this embodiment of the invention involves sequentially growing a second semiconductor layer, a light-emitting layer, and a first semiconductor layer on a growth substrate. Furthermore, before growing the second semiconductor layer, an unintentionally doped semiconductor layer can be grown on the growth substrate to improve the quality of the prepared light-emitting epitaxial layer to be bonded.

[0063] In one embodiment of the present invention, the growth substrate provided can be a substrate made of sapphire or other materials, and the present invention does not impose specific limitations on this. Furthermore, the epitaxial layer to be bonded in the present invention can be a GaN-based epitaxial layer, with an unintentionally doped semiconductor layer being a U-GaN layer, a first semiconductor layer being a P-GaN layer, a second semiconductor layer being an N-GaN layer, and a light-emitting layer being a multi-quantum-well layer. The first to Nth epitaxial layer to be bonded can emit light of the same wavelength or at least one different wavelength; this requires specific design based on the actual application.

[0064] like Figure 10b As shown, corresponding Figure 9 In step S2, a reflector 500 is fabricated on the first semiconductor layer 210 of the first epitaxial layer to be bonded using photolithography and etching processes, or photolithography and lift-off processes, or other processes. A conductive bonding layer 800 is used to bond the fixed substrate 100 to the reflector 500. The growth substrate 240 and the unintentionally doped semiconductor layer 250 of the first epitaxial layer to be bonded are removed to obtain the first epitaxial layer 201.

[0065] The reflector provided in this embodiment of the invention can be a metal reflector, or a reflective structure including an ohmic contact layer and a DBR layer (or ODR layer), with the reflector electrically connected to the first semiconductor layer to be bonded for light emission epitaxy. Taking a reflector including an ohmic contact layer and a DBR layer as an example, an ohmic contact layer is first formed on the first semiconductor layer to be bonded for light emission epitaxy, then a DBR layer is fabricated on the ohmic contact layer, and contact vias are fabricated on the DBR layer, so that the ohmic contact layer and the contact vias are electrically connected. After the conductive bonding layer is subsequently fabricated, the ohmic contact layer is electrically connected to the conductive bonding layer through the contact vias, thereby achieving electrical connection with the fixed substrate. Optionally, the ohmic contact layer provided in this embodiment of the invention can be a material layer such as indium tin oxide.

[0066] After the reflector is fabricated, it can be electrically bonded to the fixed substrate using a bonding method. The fixed substrate provided in this embodiment of the invention is preferably a conductive substrate with good electrical and thermal conductivity, such as a metal substrate or a conductive Si substrate. Specifically, it can be a doped semiconductor conductive substrate such as Si, Ge, GaP, or SiC, or a metal material substrate such as Mo, Gu, or CuW.

[0067] Furthermore, the embodiments of the present invention provide a method for removing conductive growth substrates and unintentionally doped semiconductor layers, which can be achieved by methods such as laser lift-off, and the present invention does not impose specific limitations on this method.

[0068] like Figure 10c As shown, corresponding Figure 9 In step S3, a current spreading layer 600 is prepared on the first semiconductor layer 210 of the second light-emitting epitaxial layer to be bonded, and a first insulating layer 311 and a first bonding electrode 321 are prepared on the current spreading layer 600; and a second insulating layer 312 and a second bonding electrode 322 are prepared on the second semiconductor layer 220 of the first light-emitting epitaxial layer 201.

[0069] The current spreading layer provided in this embodiment of the invention is preferably a transparent electrode, such as a transparent electrode made of indium tin oxide, to achieve current spreading of the P-type semiconductor layer. The current spreading layer can be fabricated using photolithography and etching processes, or photolithography and lift-off processes. Then, a first bonding electrode can be formed on the current spreading layer using photolithography and etching processes, or photolithography and lift-off processes. Next, a first insulating layer is formed on the current spreading layer, covering the first bonding electrode. The first insulating layer is then thinned and polished using grinding and polishing processes, exposing the first bonding electrode and placing it at the same horizontal plane as the surface of the first insulating layer. The material of the first insulating layer can be silicon oxide, silicon nitride, polyimide, etc., and this invention does not impose specific limitations on this.

[0070] Similarly, photolithography and etching processes, or photolithography and lift-off processes, can be used to form a second bonding electrode on the second semiconductor layer of the first light-emitting epitaxial layer. Then, a second insulating layer is formed on the second semiconductor layer of the first light-emitting epitaxial layer, covering the second bonding electrode. Subsequently, the second insulating layer is thinned and polished using grinding and polishing processes, exposing the second bonding electrode and placing it at the same horizontal plane as the surface of the second insulating layer. The material of the second insulating layer can be silicon oxide, silicon nitride, polyimide, etc., and this invention does not impose specific limitations on this.

[0071] like Figure 10d As shown, corresponding Figure 9 In step S4, the first bonding electrode 321 and the second bonding electrode 322 are aligned and bonded to form a connecting electrode 320, and the growth substrate 240 and the unintentionally doped semiconductor layer 250 of the second light-emitting epitaxial layer to be bonded are removed to obtain the second light-emitting epitaxial layer 202.

[0072] The embodiments of the present invention provide a method for removing conductive growth substrates and unintentionally doped semiconductor layers, which can be achieved by methods such as laser lift-off, and the present invention does not impose specific limitations on this method.

[0073] like Figure 10e As shown, corresponding Figure 9 In step S5, the bonding process described above continues until the Nth luminescent epitaxial layer 20n is obtained.

[0074] like Figure 10f As shown, corresponding Figure 9 In step S6, an external electrode 400 is formed on the second semiconductor layer 220 of the Nth light-emitting epitaxial layer 20n. The surface of the second semiconductor layer 220 of the Nth light-emitting epitaxial layer 20n away from the fixed substrate 100 is roughened, and a passivation layer 700 is formed covering the exposed surfaces of the first light-emitting epitaxial layer 201 to the Nth light-emitting epitaxial layer 20n, wherein the passivation layer 700 exposes the external electrode 400.

[0075] This invention provides a high-voltage LED chip and its fabrication method. The high-voltage LED chip includes: a fixed substrate and a first light-emitting epitaxial layer to an Nth light-emitting epitaxial layer, which are stacked sequentially along a first direction, where N is an integer not less than 2; any one of the first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, which are stacked sequentially along the first direction, and the second semiconductor layer of the i-th light-emitting epitaxial layer is bonded and electrically connected to the first semiconductor layer of the (i+1)-th light-emitting epitaxial layer, where i is a positive integer less than N.

[0076] As can be seen from the above, the technical solution provided by the embodiments of the present invention stacks the first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer along the first direction, thereby making the difference between the overall area of ​​the high-voltage LED chip and the area of ​​a single light-emitting epitaxial layer small. Thus, while realizing the function of the high-voltage LED chip by connecting all the light-emitting epitaxial layers in series, the area of ​​the high-voltage LED chip is effectively reduced, which is beneficial to the integrated packaging of the high-voltage LED chip.

[0077] Meanwhile, the first to Nth light-emitting epitaxial layers provided in this embodiment of the invention can be designed to emit the same color, thereby increasing the luminous intensity of the high-voltage LED chip. Alternatively, the first to Nth light-emitting epitaxial layers can be designed to emit at least one color different from the others to achieve light mixing, thus achieving a richer light emission effect.

[0078] In the description of this invention, it should be understood that terms such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0079] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0080] In this invention, unless otherwise explicitly specified and limited, terms such as "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between components; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0081] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0082] In this invention, the terms "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0083] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A high-voltage LED chip, characterized in that, The high-voltage LED chip includes: A fixed substrate, a first light-emitting epitaxial layer, and an Nth light-emitting epitaxial layer are sequentially stacked along the first direction, where N is an integer not less than 2; Any one of the first to the Nth light-emitting epitaxial layer includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked sequentially along the first direction, and the second semiconductor layer of the i-th light-emitting epitaxial layer is bonded and electrically connected to the first semiconductor layer of the (i+1)-th light-emitting epitaxial layer, where i is a positive integer less than N. A first insulating layer is provided on the side of the first semiconductor layer of the (i+1)th light-emitting epitaxial layer facing the fixed substrate. The first insulating layer includes a plurality of first through holes, and a first bonding electrode is provided in the first through hole and electrically connected to the first semiconductor layer of the (i+1)th light-emitting epitaxial layer. The second semiconductor layer of the i-th light-emitting epitaxial layer is provided with a second insulating layer on the side opposite to the first side of the fixed substrate. The second insulating layer includes a plurality of second through holes, and a second bonding electrode is provided in the second through hole and electrically connected to the second semiconductor layer of the i-th light-emitting epitaxial layer. The first bonding electrode and the second bonding electrode are bonded together to form a connected electrode.

2. The high-voltage LED chip according to claim 1, characterized in that, The high-voltage LED chip includes: an external electrode located on the side of the second semiconductor layer of the Nth light-emitting epitaxial layer away from the fixed substrate; In the first direction, the external electrode and at least one of the connected electrodes have an overlapping area.

3. The high-voltage LED chip according to claim 1, characterized in that, The high-voltage LED chip also includes a reflector located between the fixed substrate and the first light-emitting epitaxial layer.

4. The high-voltage LED chip according to claim 3, characterized in that, The fixed substrate is a conductive substrate; The reflector is a metal reflector; Alternatively, the reflector includes a DBR layer located between the first light-emitting epitaxial layer and the conductive substrate, and an ohmic contact layer located between the DBR layer and the first semiconductor layer of the first light-emitting epitaxial layer, wherein the DBR layer includes a plurality of contact vias, and the ohmic contact layer is electrically connected to the conductive substrate through the contact vias; Alternatively, the reflector may include an ODR layer located between the first light-emitting epitaxial layer and the conductive substrate, and an ohmic contact layer located between the ODR layer and the first semiconductor layer of the first light-emitting epitaxial layer, wherein the ODR layer includes a plurality of contact vias, and the ohmic contact layer is electrically connected to the conductive substrate through the contact vias.

5. The high-voltage LED chip according to claim 1, characterized in that, One of the first semiconductor layer and the second semiconductor layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer; At least one of the light-emitting epitaxial layers further includes a current spreading layer located on the side of the P-type semiconductor layer opposite to the light-emitting layer.

6. The high-voltage LED chip according to claim 1, characterized in that, The high-voltage LED chip further includes: a passivation layer covering at least the exposed surface of the first light-emitting epitaxial layer to the Nth light-emitting epitaxial layer; And / or, the surface of the second semiconductor layer of the Nth light-emitting epitaxial layer facing away from the fixed substrate is a roughened surface; And / or, the high-voltage LED chip further includes: a conductive bonding layer located between the fixed substrate and the first light-emitting epitaxial layer.

7. A method for manufacturing a high-voltage LED chip, characterized in that, A method for manufacturing a high-voltage LED chip according to any one of claims 1-6 includes: Provide a first to Nth ... The first semiconductor layer to be bonded and light-emitting epitaxial layer is fixed on a fixed substrate, and the growth substrate of the first light-emitting epitaxial layer to be bonded and light-emitting epitaxial layer is removed to obtain the first light-emitting epitaxial layer; The first semiconductor layer of the (i+1)th light-emitting epitaxial layer to be bonded is electrically connected to the second semiconductor layer of the (i)th light-emitting epitaxial layer, and the growth substrate of the (i+1)th light-emitting epitaxial layer to be bonded is removed to obtain the (i+1)th light-emitting epitaxial layer, where i is a positive integer less than N; Bonding and electrically connecting the (i+1)th first semiconductor layer to be bonded for light emission epitaxy to the ith second semiconductor layer for light emission epitaxy includes: A plurality of first bonding electrodes are formed on the first semiconductor layer of the (i+1)th light-emitting epitaxial layer to be bonded, and a plurality of second bonding electrodes are formed on the second semiconductor layer of the i-th light-emitting epitaxial layer; A first insulating layer is formed to cover the first bonding electrode and the gap between adjacent first bonding electrodes, and a second insulating layer is formed to cover the second bonding electrode and the gap between adjacent second bonding electrodes; The first insulating layer and the second insulating layer are thinned by a grinding process to expose the first bonding electrode and the second bonding electrode; The first bonding electrode and the second bonding electrode are aligned and bonded together to form a connecting electrode.

8. The method for manufacturing a high-voltage LED chip according to claim 7, characterized in that, After forming the Nth luminescent epitaxial layer, the fabrication method includes: An external electrode is formed on the side of the second semiconductor layer of the Nth light-emitting epitaxial layer away from the fixed substrate, wherein the external electrode has an overlapping region with at least one of the connected electrodes in the direction from the fixed substrate to the Nth light-emitting epitaxial layer.

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