A compact low insertion loss bandpass filter based on multilayer technology

Abstract

The present invention discloses a compact low insertion loss bandpass filter based on multilayer technology, which relates to the field of microwave communication technology, and comprises a multilayer ceramic body (1), a circuit layer inside the ceramic body (1), and an external electrode at the bottom of the ceramic body (1), wherein the external electrode comprises an input terminal (2), a ground terminal (3), and an output terminal (4), wherein the input terminal (2), the ground terminal (3), and the output terminal (4) are symmetrically placed at the bottom of the ceramic body (1) in sequence, and are respectively connected to the circuit layer inside the ceramic body (1) via through holes. The present invention solves the problem that traditional filters cannot meet the urgent demand for small volume, low cost, and high performance filters.

Description

Technical Field

[0001] The invention relates to the technical field of microwave communications, and in particular to a compact low insertion loss bandpass filter based on multilayer technology. Background Art

[0002] With the rapid development of modern communication technology, small size, light weight and high reliability have become the inevitable trend of the development of modern communication systems. As the core frequency selection device in the transceiver system, the filter is used to extract or filter out signals of different frequencies in the communication system. The traditional microstrip low-pass filter has a large structure size, a narrow stopband and insufficient suppression, and is not easy to integrate with other compact mobile communication terminals, which limits its use in microwave communication systems. Therefore, the development of small-volume, low-insertion-loss, wide stopband and high-suppression bandpass filters has become a current research hotspot and difficulty.

[0003] Compared with traditional forms of filters, low temperature co-fired ceramic technology (LTCC) uses gold, silver, copper and other materials with low resistivity as conductive media, and buries the equivalent circuit inside the ceramic body through metal vias, which enables flexible selection of structural layout, greatly reduces the volume of passive components, and plays an important role in improving the integration, reliability and electrical performance of filters. Compared with other traditional filter forms, LTCC technology has the following advantages: good compatibility and high-frequency transmission characteristics, multi-layer wiring and various cavity structures, high integration and assembly density, small volume and weight, high reliability, low cost and short production cycle. Summary of the invention

[0004] In view of the above-mentioned deficiencies in the prior art, the present invention provides a compact low insertion loss bandpass filter based on multilayer technology, which solves the problem that traditional filters cannot meet the urgent demand for small volume, low cost and high performance filters.

[0005] In order to achieve the above-mentioned purpose of the invention, the technical solution adopted by the present invention is: a compact low insertion loss bandpass filter based on multilayer technology, including a multilayer ceramic body, a circuit layer inside the ceramic body and an external electrode at the bottom of the ceramic body, the external electrode including an input terminal, a ground terminal and an output terminal, the input terminal, the ground terminal and the output terminal are symmetrically placed at the bottom of the ceramic body in sequence, and are respectively connected to the circuit layer inside the ceramic body via through holes.

[0006] The beneficial effect of the above scheme is: the compact low insertion loss bandpass filter based on multi-layer technology provided by the present invention integrates the equivalent circuit constituting the filter inside the ceramic body, has the characteristics of compact size, excellent performance, high reliability, etc., and is suitable for various miniaturized wireless communication terminals and systems, solving the problem that traditional filters cannot meet the urgent needs of small size, low cost and high performance filters.

[0007] Further, the circuit layer includes, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer and a twelfth circuit layer;

[0008] The first circuit layer includes a first transmission line P1, a second transmission line P2, a third transmission line P3, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6;

[0009] The second circuit layer includes a fourth transmission line P4, a fifth transmission line P5, a sixth transmission line P6, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6;

[0010] The third circuit layer includes a seventh transmission line P7, an eighth transmission line P8, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7;

[0011] The fourth circuit layer includes a ninth transmission line P9, a tenth transmission line P10, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7;

[0012] The fifth circuit layer includes an eleventh transmission line P11, a twelfth transmission line P12, a first via hole H1, a second via hole H2, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6, a seventh via hole H7 and an eighth via hole H8;

[0013] The sixth circuit layer includes a thirteenth transmission line P13, a fourteenth transmission line P14, a first via hole H1, a second via hole H2, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7, an eighth via hole H8 and a ninth via hole H9;

[0014] The seventh circuit layer includes a fifteenth metal sheet P15, a sixteenth metal sheet P16, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9;

[0015] The eighth circuit layer includes a seventeenth metal sheet P17, an eighteenth metal sheet P18, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9;

[0016] The ninth circuit layer includes a nineteenth metal sheet P19, a twentieth metal sheet P20, a first via hole H1, a fourth via hole H4, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11 and a twelfth via hole H12;

[0017] The tenth circuit layer includes a twenty-first metal sheet P21, a first via hole H1, a fourth via hole H4, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12 and a thirteenth via hole H13;

[0018] The eleventh circuit layer includes a twenty-second metal sheet P22, a twenty-third metal sheet P23, a twenty-fourth metal sheet P24, a first via hole H1, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12 and a thirteenth via hole H13;

[0019] The twelfth circuit layer includes a twenty-fifth metal sheet P25, a first via hole H1, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12, a fourteenth via hole H14, a fifteenth via hole H15, a sixteenth via hole H16, a seventeenth via hole H17, an eighteenth via hole H18 and a nineteenth via hole H19;

[0020] The first transmission line P1, the fourth transmission line P4, the seventh transmission line P7, the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 are connected end to end in sequence via the first via H1, the second via H2 and the seventh via H7 to form a first equivalent inductor L1;

[0021] The second transmission line P2, the fifth transmission line P5, the eighth transmission line P8 and the tenth transmission line P10 are connected end to end in sequence via the third via H3, the fourth via H4 and the seventh via H7 to form a second equivalent inductor L2;

[0022] The third transmission line P3, the sixth transmission line P6, the twelfth transmission line P12 and the fourteenth transmission line P14 are connected end to end in sequence via the fifth via H5, the sixth via H6 and the eighth via H8 to form a third equivalent inductor L3;

[0023] The twenty-third metal sheet P23 and the twenty-fifth metal sheet P25 are vertically coupled to form a first equivalent capacitor C1;

[0024] The twenty-second metal sheet P22 and the second fifth metal sheet P25 are vertically coupled to form a second equivalent capacitor C2;

[0025] The twenty-fourth metal sheet P24 and the second fifth metal sheet P25 are vertically coupled to form a third equivalent capacitor C3;

[0026] The seventeenth metal sheet P17 and the nineteenth metal sheet P19 are vertically coupled to form a fourth equivalent capacitor C4;

[0027] The fifteenth metal sheet P15 and the seventeenth metal sheet P17 are vertically coupled to form a fifth equivalent capacitor C5;

[0028] The sixteenth metal sheet P16 and the eighteenth metal sheet P18 are vertically coupled to form a sixth equivalent capacitor C6;

[0029] The eighteenth metal sheet P18 and the twentieth metal sheet P20 are vertically coupled to form a seventh equivalent capacitor C7;

[0030] The twentieth metal sheet P20 and the twenty-first metal sheet P21 are vertically coupled to form an eighth equivalent capacitor C8.

[0031] The beneficial effect of the above further scheme is: the present invention adopts a special multi-layer circuit printing process to embed the equivalent components constituting the filter resonant unit into the twelve circuit layers of the dielectric ceramic body, and the circuits of different layers are connected through metallized vias, which can meet the requirements of extremely miniaturized system integration. By rationally utilizing the vertical coupling effect of the winding inductor, its own parasitic resistance can be reduced, the circuit quality factor can be improved, and the in-band insertion loss of less than 0.5dB can be achieved within the 5G operating frequency band.

[0032] Further, in the first equivalent inductor L1, the first transmission line P1, the fourth transmission line P4 and the seventh transmission line P7 overlap in the vertical direction, and are connected end to end via the first via H1 and the second via H2, so as to realize the parallel connection of the three transmission lines; the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 overlap in the vertical direction, and are connected end to end via the second via H2 and the seventh via H7, so as to realize the parallel connection of the three transmission lines;

[0033] In the second equivalent inductor L2, the second transmission line P2 and the fifth transmission line P5 overlap in the vertical direction, and are connected end to end via the third via H3 and the fourth via H4, so as to realize the parallel connection of the two transmission lines; the eighth transmission line P8 and the tenth transmission line P10 overlap in the vertical direction, and are connected end to end via the third via H3 and the seventh via H7, so as to realize the parallel connection of the two transmission lines;

[0034] In the third equivalent inductor L3, the third transmission line P3 and the sixth transmission line P6 overlap in the vertical direction and are connected end to end via the fifth via H5 and the sixth via H6 to achieve parallel connection of the two transmission lines.

[0035] The beneficial effect of the above further solution is that the above parallel connection method can reduce the parasitic resistance of the equivalent inductor itself, improve the quality factor of the entire filter, and achieve lower insertion loss and higher out-of-band suppression.

[0036] Further, one end of the first equivalent inductor L1 is connected to the input end on the external electrode via the first via H1 and the tenth via H10, and the other end thereof is connected to one end of the second equivalent inductor L2 via the seventh via H7, the other end of the second equivalent inductor L2 is connected to one end of the third equivalent capacitor C3 via the fourth via H4 and the thirteenth via H13, and the other end of the third equivalent capacitor C3 is connected to the ground end on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19;

[0037] One end of the first equivalent capacitor C1 is connected to the first via H1 via a short section of microstrip line, and the other end thereof is connected to the ground terminal on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19, the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 is connected to one end of the second equivalent capacitor C2 via the seventh via H7, and the other end of the second equivalent capacitor C2 is connected to the ground terminal on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19;

[0038] One end of the fourth equivalent capacitor C4 is connected to the first via H1 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7; one end of the fifth equivalent capacitor C5 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7;

[0039] One end of the sixth equivalent capacitor C6 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to one end of the third equivalent inductor L3 via the sixth via H6. The other end of the third equivalent inductor L3 is connected to the twenty-fifth metal sheet P25 via the ninth via H9. One end of the seventh equivalent capacitor C7 is connected to one end of the third equivalent inductor L3 via the sixth via H6, and the other end thereof is connected to the output end on the external electrode via the eleventh via H11 and the twelfth via H12. One end of the eighth equivalent capacitor C8 is connected to the thirteenth via H13 via a short microstrip line, and the other end thereof is connected to the output end on the external electrode via the eleventh via H11 and the twelfth via H12.

[0040] The beneficial effect of the above further solution is: an equivalent circuit of a circuit layer is formed by the above equivalent elements, each equivalent element is arranged in twelve circuit layers, and different circuit layers are connected by metallized vias.

[0041] Further, the first equivalent inductor L1, the second equivalent inductor L2, the first equivalent capacitor C1, the second equivalent capacitor C2, the third equivalent capacitor C3, the fourth equivalent capacitor C4 and the fifth equivalent capacitor C5 constitute a two-order low-pass filter;

[0042] The third equivalent inductor L3, the sixth equivalent capacitor C6, the seventh equivalent capacitor C7 and the eighth equivalent capacitor C8 form a first-order high-pass filter.

[0043] The beneficial effect of the above further scheme is that the filter is internally configured as a multi-layer circuit, including a two-order low-pass filter unit and a first-order high-pass filter unit, wherein the low-pass filter unit contains two equivalent inductors and five equivalent capacitors, and the high-pass filter unit contains one equivalent inductor and three equivalent capacitors.

[0044] Furthermore, the bandpass filter further includes a mark, and the mark is located on the top of the ceramic body.

[0045] The beneficial effect of the above further solution is that the mark on the top of the ceramic body is used to identify the position of each port.

[0046] Furthermore, the manufacturing process of the bandpass filter includes a manufacturing process based on a multi-layer printed circuit board, a manufacturing process based on a low temperature co-fired ceramic, a manufacturing process based on an IPD, or a manufacturing process based on a CMOS semiconductor.

[0047] The beneficial effect of the above further scheme is that by adopting the above manufacturing process, the multi-layer circuit of the filter can be built into the ceramic dielectric body, and various equivalent components can be integrated on the three-dimensional dielectric layer to achieve miniaturization and high density of the circuit.

[0048] Furthermore, the embedded metal material used in the circuit layer is copper or palladium silver.

[0049] The beneficial effect of the above further solution is: through the above technical solution, it is helpful to improve the quality factor of the circuit system, and palladium silver is used as the embedded metal material, which will not oxidize during the sintering process and does not require electroplating protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 Schematic diagram of the package appearance of a compact low insertion loss bandpass filter based on multi-layer technology.

[0051] Figure 2 Schematic diagram of the internal structure of a compact low insertion loss bandpass filter based on multi-layer technology.

[0052] Figure 3 This is a schematic diagram of the first-layer circuit structure.

[0053] Figure 4 This is a schematic diagram of the second-layer circuit structure.

[0054] Figure 5 This is a schematic diagram of the third-layer circuit structure.

[0055] Figure 6 This is a schematic diagram of the fourth-layer circuit structure.

[0056] Figure 7 This is a schematic diagram of the fifth-layer circuit structure.

[0057] Figure 8 This is a schematic diagram of the sixth layer circuit structure.

[0058] Fig. 9 This is a schematic diagram of the seventh-layer circuit structure.

[0059] Fig.10 This is a schematic diagram of the eighth-layer circuit structure.

[0060] Fig.11 This is a schematic diagram of the ninth layer circuit structure.

[0061] Fig.12 This is a schematic diagram of the tenth-layer circuit structure.

[0062] Fig.13 This is a schematic diagram of the circuit structure of the eleventh layer.

[0063] Fig.14 This is a schematic diagram of the twelfth-layer circuit structure.

[0064] Fig.15 The equivalent circuit diagram of a compact low insertion loss bandpass filter based on multilayer technology.

[0065] Fig.16 The electrical performance curve of a compact low insertion loss bandpass filter based on multilayer technology.

[0066] Among them: 1. Ceramic body; 2. Input terminal; 3. Ground terminal; 4. Output terminal; 5. Label. DETAILED DESCRIPTION

[0067] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0068] like Figure 1As shown, a compact low insertion loss bandpass filter based on multilayer technology includes a multilayer ceramic body 1, a circuit layer inside the ceramic body 1 and an external electrode at the bottom of the ceramic body 1, wherein the external electrode includes an input terminal 2, a ground terminal 3 and an output terminal 4, and the input terminal 2, the ground terminal 3 and the output terminal 4 are symmetrically placed at the bottom of the ceramic body 1 in sequence, and are respectively connected to the circuit layer inside the ceramic body 1 via through holes.

[0069] In this embodiment, the laminated circuit of the filter is built into a ceramic body of 1.0 mm×0.5 mm×0.4 mm and is sintered at a temperature of 885° C.±10° C.

[0070] like Figure 2 As shown, the circuit layers include, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer and a twelfth circuit layer;

[0071] like Figure 3 As shown, the first circuit layer includes a first transmission line P1, a second transmission line P2, a third transmission line P3, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6;

[0072] like Figure 4 As shown, the second circuit layer includes a fourth transmission line P4, a fifth transmission line P5, a sixth transmission line P6, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6;

[0073] like Figure 5 As shown, the third circuit layer includes a seventh transmission line P7, an eighth transmission line P8, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7;

[0074] like Figure 6 As shown, the fourth circuit layer includes a ninth transmission line P9, a tenth transmission line P10, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7;

[0075] like Figure 7 As shown, the fifth circuit layer includes an eleventh transmission line P11, a twelfth transmission line P12, a first via hole H1, a second via hole H2, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6, a seventh via hole H7 and an eighth via hole H8;

[0076] like Figure 8As shown, the sixth circuit layer includes a thirteenth transmission line P13, a fourteenth transmission line P14, a first via hole H1, a second via hole H2, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7, an eighth via hole H8 and a ninth via hole H9;

[0077] like Fig. 9 As shown, the seventh circuit layer includes a fifteenth metal sheet P15, a sixteenth metal sheet P16, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9;

[0078] like Fig.10 As shown, the eighth circuit layer includes a seventeenth metal sheet P17, an eighteenth metal sheet P18, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9;

[0079] like Fig.11 As shown, the ninth circuit layer includes a nineteenth metal sheet P19, a twentieth metal sheet P20, a first via H1, a fourth via H4, a seventh via H7, a ninth via H9, a tenth via H10, an eleventh via H11 and a twelfth via H12;

[0080] like Fig.12 As shown, the tenth circuit layer includes a twenty-first metal sheet P21, a first via H1, a fourth via H4, a seventh via H7, a ninth via H9, a tenth via H10, an eleventh via H11, a twelfth via H12 and a thirteenth via H13;

[0081] like Fig.13 As shown, the eleventh circuit layer includes a twenty-second metal sheet P22, a twenty-third metal sheet P23, a twenty-fourth metal sheet P24, a first via H1, a seventh via H7, a ninth via H9, a tenth via H10, an eleventh via H11, a twelfth via H12 and a thirteenth via H13;

[0082] like Fig.14 As shown, the twelfth circuit layer includes a twenty-fifth metal sheet P25, a first via hole H1, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12, a fourteenth via hole H14, a fifteenth via hole H15, a sixteenth via hole H16, a seventeenth via hole H17, an eighteenth via hole H18 and a nineteenth via hole H19;

[0083] The transmission lines are all metal conductor transmission lines. In this embodiment, the block-shaped ones are defined as "metal sheets" and the strip-shaped lines are directly represented by transmission lines.

[0084] The first transmission line P1, the fourth transmission line P4, the seventh transmission line P7, the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 are connected end to end in sequence via the first via H1, the second via H2 and the seventh via H7 to form a first equivalent inductor L1;

[0085] The second transmission line P2, the fifth transmission line P5, the eighth transmission line P8 and the tenth transmission line P10 are connected end to end in sequence via the third via H3, the fourth via H4 and the seventh via H7 to form a second equivalent inductor L2;

[0086] The third transmission line P3, the sixth transmission line P6, the twelfth transmission line P12 and the fourteenth transmission line P14 are connected end to end in sequence via the fifth via H5, the sixth via H6 and the eighth via H8 to form a third equivalent inductor L3;

[0087] The twenty-third metal sheet P23 and the twenty-fifth metal sheet P25 are vertically coupled to form a first equivalent capacitor C1;

[0088] The twenty-second metal sheet P22 and the second fifth metal sheet P25 are vertically coupled to form a second equivalent capacitor C2;

[0089] The twenty-fourth metal sheet P24 and the second fifth metal sheet P25 are vertically coupled to form a third equivalent capacitor C3;

[0090] The seventeenth metal sheet P17 and the nineteenth metal sheet P19 are vertically coupled to form a fourth equivalent capacitor C4;

[0091] The fifteenth metal sheet P15 and the seventeenth metal sheet P17 are vertically coupled to form a fifth equivalent capacitor C5;

[0092] The sixteenth metal sheet P16 and the eighteenth metal sheet P18 are vertically coupled to form a sixth equivalent capacitor C6;

[0093] The eighteenth metal sheet P18 and the twentieth metal sheet P20 are vertically coupled to form a seventh equivalent capacitor C7;

[0094] The twentieth metal sheet P20 and the twenty-first metal sheet P21 are vertically coupled to form an eighth equivalent capacitor C8.

[0095] In the first equivalent inductor L1, the first transmission line P1, the fourth transmission line P4 and the seventh transmission line P7 overlap in the vertical direction, and are connected end to end via the first via H1 and the second via H2, so as to realize the parallel connection of the three transmission lines; the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 overlap in the vertical direction, and are connected end to end via the second via H2 and the seventh via H7, so as to realize the parallel connection of the three transmission lines;

[0096] In the second equivalent inductor L2, the second transmission line P2 and the fifth transmission line P5 overlap in the vertical direction, and are connected end to end via the third via H3 and the fourth via H4 to achieve parallel connection of the two transmission lines; the eighth transmission line P8 and the tenth transmission line P10 overlap in the vertical direction, and are connected end to end via the third via H3 and the seventh via H7 to achieve parallel connection of the two transmission lines;

[0097] In the third equivalent inductor L3, the third transmission line P3 and the sixth transmission line P6 overlap in the vertical direction and are connected end to end via the fifth via H5 and the sixth via H6 to achieve parallel connection of the two transmission lines.

[0098] like Fig.15 As shown, one end of the first equivalent inductor L1 is connected to the input terminal 2 on the external electrode via the first via H1 and the tenth via H10, and the other end thereof is connected to one end of the second equivalent inductor L2 via the seventh via H7, the other end of the second equivalent inductor L2 is connected to one end of the third equivalent capacitor C3 via the fourth via H4 and the thirteenth via H13, and the other end of the third equivalent capacitor C3 is connected to the ground terminal 3 on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19;

[0099] One end of the first equivalent capacitor C1 is connected to the first via H1 via a short section of microstrip line, and the other end thereof is connected to the ground terminal 3 on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19, the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 is connected to one end of the second equivalent capacitor C2 via the seventh via H7, and the other end of the second equivalent capacitor C2 is connected to the ground terminal 3 on the external electrode via the fourteenth via H14, the fifteenth via H15, the sixteenth via H16, the seventeenth via H17, the eighteenth via H18 and the nineteenth via H19;

[0100] One end of the fourth equivalent capacitor C4 is connected to the first via H1 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7; one end of the fifth equivalent capacitor C5 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7;

[0101] One end of the sixth equivalent capacitor C6 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to one end of the third equivalent inductor L3 via the sixth via H6. The other end of the third equivalent inductor L3 is connected to the twenty-fifth metal sheet P25 via the ninth via H9. One end of the seventh equivalent capacitor C7 is connected to one end of the third equivalent inductor L3 via the sixth via H6, and the other end thereof is connected to the output terminal 4 on the external electrode via the eleventh via H11 and the twelfth via H12. One end of the eighth equivalent capacitor C8 is connected to the thirteenth via H13 via a short microstrip line, and the other end thereof is connected to the output terminal 4 on the external electrode via the eleventh via H11 and the twelfth via H12.

[0102] The first equivalent inductor L1, the second equivalent inductor L2, the first equivalent capacitor C1, the second equivalent capacitor C2, the third equivalent capacitor C3, the fourth equivalent capacitor C4 and the fifth equivalent capacitor C5 constitute a two-order low-pass filter;

[0103] The third equivalent inductor L3, the sixth equivalent capacitor C6, the seventh equivalent capacitor C7 and the eighth equivalent capacitor C8 form a first-order high-pass filter.

[0104] The bandpass filter further comprises a mark 5 , which is located on the top of the ceramic body 1 .

[0105] The manufacturing process of the bandpass filter includes a manufacturing process based on a multilayer printed circuit board, a manufacturing process based on a low temperature co-fired ceramic, a manufacturing process based on an IPD, or a manufacturing process based on a CMOS semiconductor.

[0106] The embedded metal material used in the circuit layer is copper or palladium silver.

[0107] In one embodiment of the present invention, the filter has a size of 1.0 mm×0.5 mm×0.4 mm and is processed into a patch component based on the lamination technology. The relative dielectric constant of the LTCC ceramic material is 7.8, and the dielectric loss angle is 0.001.

[0108] Fig.16 FIG. 1 is a schematic frequency response characteristic curve diagram of the LTCC multilayer bandpass filter in an embodiment of the present invention. Fig.16As shown in the figure, the filter works in the 5G frequency band, with a passband frequency of 5.15-5.95GHz and an insertion loss of less than 0.5dB in the passband. Out-of-band suppression greater than 30dB can be achieved in the lower stopband 2.4-2.5GHz and the upper stopband 10.3-11.9GHz and 15.45-17.85GHz, respectively. The above indicators reflect the extremely low insertion loss and high stopband suppression effect of the filter.

[0109] The compact low insertion loss bandpass filter based on multi-layer technology provided by the present invention adopts an LTCC multi-layer layout structure. By rationally utilizing the vertical coupling effect of the winding inductor, it can reduce its own parasitic resistance, improve the circuit quality factor, and achieve an in-band insertion loss of less than 0.5dB in the 5G operating frequency band. At the same time, in the Wi-Fi frequency band of the lower stop band 2.4-2.5GHz and the second and third harmonic frequency bands of the upper stop band 10.3-11.9GHz, 15.45-17.85GHz, up to 30dB of out-of-band suppression can be achieved.

[0110] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the invention.

Claims

1. A compact low insertion loss bandpass filter based on multilayer technology, characterized in that: It comprises a multilayer ceramic body (1), a circuit layer inside the ceramic body (1) and an external electrode at the bottom of the ceramic body (1), wherein the external electrode comprises an input terminal (2), a ground terminal (3) and an output terminal (4), and the input terminal (2), the ground terminal (3) and the output terminal (4) are symmetrically arranged at the bottom of the ceramic body (1) in sequence and are respectively connected to the circuit layer inside the ceramic body (1) via through holes; The circuit layers include, from top to bottom, a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer and a twelfth circuit layer; The first circuit layer includes a first transmission line P1, a second transmission line P2, a third transmission line P3, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6; The second circuit layer includes a fourth transmission line P4, a fifth transmission line P5, a sixth transmission line P6, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5 and a sixth via hole H6; The third circuit layer includes a seventh transmission line P7, an eighth transmission line P8, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7; The fourth circuit layer includes a ninth transmission line P9, a tenth transmission line P10, a first via hole H1, a second via hole H2, a third via hole H3, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6 and a seventh via hole H7; The fifth circuit layer includes an eleventh transmission line P11, a twelfth transmission line P12, a first via hole H1, a second via hole H2, a fourth via hole H4, a fifth via hole H5, a sixth via hole H6, a seventh via hole H7 and an eighth via hole H8; The sixth circuit layer includes a thirteenth transmission line P13, a fourteenth transmission line P14, a first via hole H1, a second via hole H2, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7, an eighth via hole H8 and a ninth via hole H9; The seventh circuit layer includes a fifteenth metal sheet P15, a sixteenth metal sheet P16, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9; The eighth circuit layer includes a seventeenth metal sheet P17, an eighteenth metal sheet P18, a first via hole H1, a fourth via hole H4, a sixth via hole H6, a seventh via hole H7 and a ninth via hole H9; The ninth circuit layer includes a nineteenth metal sheet P19, a twentieth metal sheet P20, a first via hole H1, a fourth via hole H4, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11 and a twelfth via hole H12; The tenth circuit layer includes a twenty-first metal sheet P21, a first via hole H1, a fourth via hole H4, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12 and a thirteenth via hole H13; The eleventh circuit layer includes a twenty-second metal sheet P22, a twenty-third metal sheet P23, a twenty-fourth metal sheet P24, a first via hole H1, a seventh via hole H7, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12 and a thirteenth via hole H13; The twelfth circuit layer includes a twenty-fifth metal sheet P25, a first via hole H1, a ninth via hole H9, a tenth via hole H10, an eleventh via hole H11, a twelfth via hole H12, a fourteenth via hole H14, a fifteenth via hole H15, a sixteenth via hole H16, a seventeenth via hole H17, an eighteenth via hole H18 and a nineteenth via hole H19; The first transmission line P1, the fourth transmission line P4, the seventh transmission line P7, the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 are connected end to end in sequence via the first via H1, the second via H2 and the seventh via H7 to form a first equivalent inductor L1; The second transmission line P2, the fifth transmission line P5, the eighth transmission line P8 and the tenth transmission line P10 are connected end to end in sequence via the third via H3, the fourth via H4 and the seventh via H7 to form a second equivalent inductor L2; The third transmission line P3, the sixth transmission line P6, the twelfth transmission line P12 and the fourteenth transmission line P14 are connected end to end in sequence via the fifth via H5, the sixth via H6 and the eighth via H8 to form a third equivalent inductor L3; The twenty-third metal sheet P23 and the twenty-fifth metal sheet P25 are vertically coupled to form a first equivalent capacitor C1; The twenty-second metal sheet P22 and the second fifth metal sheet P25 are vertically coupled to form a second equivalent capacitor C2; The twenty-fourth metal sheet P24 and the second fifth metal sheet P25 are vertically coupled to form a third equivalent capacitor C3; The seventeenth metal sheet P17 and the nineteenth metal sheet P19 are vertically coupled to form a fourth equivalent capacitor C4; The fifteenth metal sheet P15 and the seventeenth metal sheet P17 are vertically coupled to form a fifth equivalent capacitor C5; The sixteenth metal sheet P16 and the eighteenth metal sheet P18 are vertically coupled to form a sixth equivalent capacitor C6; The eighteenth metal sheet P18 and the twentieth metal sheet P20 are vertically coupled to form a seventh equivalent capacitor C7; The twentieth metal sheet P20 and the twenty-first metal sheet P21 are vertically coupled to form an eighth equivalent capacitor C8.

2. The compact low insertion loss bandpass filter based on multilayer technology according to claim 1, characterized in that: In the first equivalent inductor L1, the first transmission line P1, the fourth transmission line P4 and the seventh transmission line P7 overlap in the vertical direction, and are connected end to end via the first via H1 and the second via H2, so as to realize the parallel connection of the three transmission lines; the ninth transmission line P9, the eleventh transmission line P11 and the thirteenth transmission line P13 overlap in the vertical direction, and are connected end to end via the second via H2 and the seventh via H7, so as to realize the parallel connection of the three transmission lines; In the second equivalent inductor L2, the second transmission line P2 and the fifth transmission line P5 overlap in the vertical direction, and are connected end to end via the third via H3 and the fourth via H4 to achieve parallel connection of the two transmission lines; the eighth transmission line P8 and the tenth transmission line P10 overlap in the vertical direction, and are connected end to end via the third via H3 and the seventh via H7 to achieve parallel connection of the two transmission lines; In the third equivalent inductor L3, the third transmission line P3 and the sixth transmission line P6 overlap in the vertical direction and are connected end to end via the fifth via H5 and the sixth via H6 to achieve parallel connection of the two transmission lines.

3. The compact low insertion loss bandpass filter based on multilayer technology according to claim 2, characterized in that: One end of the first equivalent inductor L1 is connected to the input terminal (2) on the external electrode via the first via hole H1 and the tenth via hole H10, and the other end thereof is connected to one end of the second equivalent inductor L2 via the seventh via hole H7, the other end of the second equivalent inductor L2 is connected to one end of the third equivalent capacitor C3 via the fourth via hole H4 and the thirteenth via hole H13, and the other end of the third equivalent capacitor C3 is connected to the ground terminal (3) on the external electrode via the fourteenth via hole H14, the fifteenth via hole H15, the sixteenth via hole H16, the seventeenth via hole H17, the eighteenth via hole H18 and the nineteenth via hole H19; One end of the first equivalent capacitor C1 is connected to the first via hole H1 via a short section of microstrip line, and the other end is connected to the ground terminal (3) on the external electrode via the fourteenth via hole H14, the fifteenth via hole H15, the sixteenth via hole H16, the seventeenth via hole H17, the eighteenth via hole H18 and the nineteenth via hole H19; the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 is connected to one end of the second equivalent capacitor C2 via the seventh via hole H7; the other end of the second equivalent capacitor C2 is connected to the ground terminal (3) on the external electrode via the fourteenth via hole H14, the fifteenth via hole H15, the sixteenth via hole H16, the seventeenth via hole H17, the eighteenth via hole H18 and the nineteenth via hole H19; One end of the fourth equivalent capacitor C4 is connected to the first via H1 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7; one end of the fifth equivalent capacitor C5 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to the common connection point of the first equivalent inductor L1 and the second equivalent inductor L2 via a seventh via H7; One end of the sixth equivalent capacitor C6 is connected to the fourth via H4 via a short microstrip line, and the other end thereof is connected to one end of the third equivalent inductor L3 via the sixth via H6. The other end of the third equivalent inductor L3 is connected to the twenty-fifth metal sheet P25 via the ninth via H9. One end of the seventh equivalent capacitor C7 is connected to one end of the third equivalent inductor L3 via the sixth via H6, and the other end thereof is connected to the output end (4) on the external electrode via the eleventh via H11 and the twelfth via H12. One end of the eighth equivalent capacitor C8 is connected to the thirteenth via H13 via a short microstrip line, and the other end thereof is connected to the output end (4) on the external electrode via the eleventh via H11 and the twelfth via H12.

4. The compact low insertion loss bandpass filter based on multilayer technology according to claim 3, characterized in that: The first equivalent inductor L1, the second equivalent inductor L2, the first equivalent capacitor C1, the second equivalent capacitor C2, the third equivalent capacitor C3, the fourth equivalent capacitor C4 and the fifth equivalent capacitor C5 constitute a two-order low-pass filter; The third equivalent inductor L3, the sixth equivalent capacitor C6, the seventh equivalent capacitor C7 and the eighth equivalent capacitor C8 form a first-order high-pass filter.

5. The compact low insertion loss bandpass filter based on multilayer technology according to claim 1, characterized in that: The bandpass filter further comprises a mark (5), wherein the mark (5) is located on the top of the ceramic body (1).

6. The compact low insertion loss bandpass filter based on multilayer technology according to claim 1, characterized in that: The manufacturing process of the bandpass filter includes a manufacturing process based on a multi-layer printed circuit board, a manufacturing process based on a low temperature co-fired ceramic, a manufacturing process based on an IPD or a manufacturing process based on a CMOS semiconductor.

7. The compact low insertion loss bandpass filter based on multilayer technology according to claim 1, characterized in that: The embedded metal material used in the circuit layer is copper or palladium silver.

Images