Display panel, display panel detection method and display device

Abstract

The application discloses a display panel, a detection method of the display panel and a display device. The display panel comprises a substrate, a plurality of signal lines, a first detection circuit and a second detection circuit on one side of the substrate; the plurality of signal lines comprise first signal lines and second signal lines; the first signal lines and the second signal lines are arranged alternately along a first direction; the first detection circuit comprises a plurality of first switches; the plurality of first switches are connected in series with at least part of the signal lines; the second detection circuit comprises a plurality of second switches and a plurality of third switches; the plurality of second switches are connected with at least part of the first signal lines, and the plurality of third switches are connected with at least part of the second signal lines. The technical scheme can improve the line detection efficiency and realize full-line detection.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel, a detection method of the display panel and a display device. BACKGROUND

[0002] With the continuous development of display technology, display is more and more important in people's daily life, and people's demand for screen ratio is also higher and higher.

[0003] In order to pursue higher screen ratio, double-sided wiring can be realized, which involves wiring of three surfaces of the upper surface, the lower surface and the side surface of the display panel. The existing line detection method is generally Automated Optical Inspection (AOI) test and Test Key test, which cannot realize full detection of the line, has low detection efficiency, and is easy to miss detection.

[0004] Therefore, how to improve the line detection efficiency and realize full detection of the line is a technical problem to be solved at present. SUMMARY

[0005] The present application provides a display panel, a detection method of the display panel and a display device, which can improve the line detection efficiency and realize full detection of the line.

[0006] According to an aspect of the present application, a display panel is provided, comprising: a substrate and a plurality of signal lines, a first detection circuit and a second detection circuit located on one side of the substrate; the plurality of signal lines comprises a first signal line and a second signal line; along a first direction, the first signal line and the second signal line are arranged alternately;

[0007] The first detection circuit comprises a plurality of first switches; the plurality of first switches are connected in series with at least part of the signal lines;

[0008] The second detection circuit comprises a plurality of second switches and a plurality of third switches; the plurality of second switches are connected to at least part of the first signal lines, and the plurality of third switches are connected to at least part of the second signal lines.

[0009] According to another aspect of the present application, a detection method of a display panel is provided, which is used for detecting the above-mentioned display panel.

[0010] The detection method comprises:

[0011] The first switch is controlled to be turned on, and whether there is a break in the signal line is determined according to the resistance of the signal line connected in series;

[0012] The second switch and the third switch are controlled to be turned on, and whether there is a short circuit between adjacent signal lines is determined according to the resistance between the first signal line and the second signal line.

[0013] According to still another aspect of the present application, there is provided a display device comprising the above display panel.

[0014] The technical scheme of the present application, by setting the first detection circuit, the first switch of the first detection circuit can be connected in series with at least part of the signal lines, and by detecting the resistance of the series signal lines, whether the signal lines are open circuit can be detected; by setting the second detection circuit, the second switch of the second detection circuit can be connected to at least part of the first signal lines, and the third switch of the second detection circuit can be connected to at least part of the second signal lines, and by detecting the resistance between the first signal lines and the second signal lines, whether the adjacent signal lines are short-circuited can be detected; when the first switch, the second switch and the third switch are all turned off, the signal lines can be made independent of each other, and the normal signal transmission function can be realized. In this way, all signal lines can be quickly detected, the detection efficiency is improved, and the detection precision is also improved for the detection of small open circuits and small short circuits. Moreover, the detection equipment is simple, and the detection cost is low; in addition, after the line is detected, the line does not need to be processed again, that is, the line connection of the detection circuit does not need to be cut off, and only by changing the control signal, the normal transmission function of the signal line can be realized, new defects are not easily introduced, and the product yield is further improved.

[0015] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0017] Figure 1 is a structural schematic diagram of a display panel provided by an embodiment of the present application;

[0018] Figure 2 is a circuit structure schematic diagram of a detection circuit provided by an embodiment of the present application;

[0019] Figure 3 is a circuit structure schematic diagram of a first detection circuit provided by an embodiment of the present application;

[0020] Figure 4 is a structural schematic diagram of another display panel provided by an embodiment of the present application;

[0021] Figure 5 is a circuit structure schematic diagram of another first detection circuit provided by an embodiment of the present application;

[0022] Figure 6 This is a schematic diagram of the circuit structure of another first detection circuit provided in an embodiment of the present invention;

[0023] Figure 7 This is a schematic diagram of the circuit structure of another first detection circuit provided in an embodiment of the present invention;

[0024] Figure 8 This is a schematic diagram of the circuit structure of a second detection circuit provided in an embodiment of the present invention;

[0025] Figure 9 This is a schematic diagram of another display panel provided in an embodiment of the present invention;

[0026] Figure 10 This is a schematic diagram of the circuit structure of another second detection circuit provided in an embodiment of the present invention;

[0027] Figure 11 This is a schematic diagram of the circuit structure of another second detection circuit provided in an embodiment of the present invention;

[0028] Figure 12 This is a schematic diagram of the circuit structure of another second detection circuit provided in an embodiment of the present invention;

[0029] Figure 13 This is a schematic diagram of the circuit structure of another detection circuit provided in an embodiment of the present invention;

[0030] Figure 14 This is a schematic diagram of the film layer of a detection circuit provided in an embodiment of the present invention;

[0031] Figure 15 It is along Figure 14 Schematic diagram of the cross-sectional structure of section A-A';

[0032] Figure 16 This is a schematic diagram of the film layer of another detection circuit provided in an embodiment of the present invention;

[0033] Figure 17 It is along Figure 16 Schematic diagram of the cross-sectional structure of section B-B';

[0034] Figure 18 This is a schematic diagram of the circuit structure of another detection circuit provided in an embodiment of the present invention;

[0035] Figure 19 This is a schematic diagram of the film layer of another detection circuit provided in an embodiment of the present invention;

[0036] Figure 20 It is along Figure 19 Schematic diagram of the cross-sectional structure of section C-C';

[0037] Figure 21 is a second detection circuit corresponding to Figure 19 a film layer schematic view of the second detection circuit;

[0038] Figure 22 is a flow chart of a display panel detection method provided by an embodiment of the present application;

[0039] Figure 23 is a structural schematic view of a display device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to enable persons skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by persons skilled in the art without creative labor should fall within the protection scope of the present application.

[0041] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or a chronological sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to the process, method, product or device.

[0042] As the background art, the AOI test uses machine vision for optical image testing, and can only identify obvious abnormalities in a snapshot manner, and cannot identify small abnormalities. If small abnormalities are to be identified, the requirements for the AOI test equipment are high, and the test efficiency is low, so that the detection cost is high. The Test Key test needs to set test points, and can only test the electrical properties of local lines, and cannot accurately represent the conditions of all lines, and cannot achieve full line detection. When small open circuits, short circuits and the like occur in the lines, they cannot be detected in a timely, efficient and accurate manner, which causes waste of subsequent process materials, increase of production cost, and problems such as reliability risk.

[0043] To solve the above technical problems, the embodiment of the present application provides a display panel, comprising: a substrate and a plurality of signal lines, a first detection circuit and a second detection circuit located on one side of the substrate; the plurality of signal lines comprises a first signal line and a second signal line; along the first direction, the first signal line and the second signal line are arranged alternately; the first detection circuit comprises a plurality of first switches; the plurality of first switches are connected in series with at least part of the signal lines; the second detection circuit comprises a plurality of second switches and a plurality of third switches; the plurality of second switches are connected with at least part of the first signal lines, and the plurality of third switches are connected with at least part of the second signal lines.

[0044] By adopting the above technical scheme, all signal lines can be detected quickly, the detection efficiency is improved, the micro open circuit and the micro short circuit can also be detected, the detection precision is improved, the detection equipment is simple, the cost is low; in addition, after the line is detected, the line does not need to be processed again, that is, the line connection of the detection circuit does not need to be cut off, only by changing the control signal, the normal transmission function of the signal line can be realized, new defects are not easy to be introduced, and the product yield is further improved.

[0045] The above is the core idea of the present application, based on the embodiment of the present application, all other embodiments obtained by the person skilled in the art without creative labor belong to the protection scope of the present application. The technical scheme in the embodiment of the present application will be described clearly and completely in combination with the drawings in the embodiment of the present application.

[0046] Figure 1 It is a structure schematic diagram of a display panel provided by the embodiment of the present application, referring to Figure 1 The display panel 01 comprises: a substrate 10 and a plurality of signal lines 20, a first detection circuit 30 and a second detection circuit 40 located on one side of the substrate 10. The plurality of signal lines 20 comprises a first signal line 21 and a second signal line 22; along the first direction X, the first signal line 21 and the second signal line 22 are arranged alternately. The first detection circuit 30 comprises a plurality of first switches 31; the plurality of first switches 31 are connected in series with at least part of the signal lines 20; the second detection circuit 40 comprises a plurality of second switches 42 and a plurality of third switches 43, the plurality of second switches 42 are connected with at least part of the first signal lines 21, and the plurality of third switches 43 are connected with at least part of the second signal lines 22.

[0047] The display panel 01 further comprises a circuit layer on the side of the substrate 10, the circuit layer comprising pixel circuits (not shown in the figure), and in an optional embodiment, the display panel 01 further comprises light-emitting elements on the side of the circuit layer away from the substrate 10, the pixel circuits being electrically connected with the light-emitting elements (not shown in the figure). In another optional embodiment, the signal lines 20 can be electrically connected with the pixel circuits, and the signal lines 20 can be used to transmit power signals, data signals, scanning signals, touch signals and the like. The same signal line 20 can be located on the upper surface, the lower surface and the side surface of the substrate 10 at the same time, or the same signal line 20 can be located only on the upper surface or the lower surface of the substrate 10. In an optional embodiment, the signal line 20 can be a continuous wire, i.e. the signal line 20 can be a complete wire without interruption in the middle, and each wire part of the signal line 20 is an integral structure; in another optional embodiment, the signal line 20 can be a non-continuous wire, i.e. part of the wire part of the signal line 20 can be electrically connected by lapping.

[0048] Specifically, the first switch 31 of the first detection circuit 30 can connect at least part of the signal lines 20 in series to form a path, and an electrical signal is applied across the path, and by testing the resistance of the path, it can be determined whether there is an abnormal open circuit in the signal lines 20 connected in series. The second switch 42 of the second detection circuit 40 can connect at least part of the first signal lines 21, so that the electrical properties of at least part of the first signal lines 21 are the same; the third switch 43 of the second detection circuit 40 can connect at least part of the second signal lines 22, so that the electrical properties of at least part of the second signal lines 22 are the same; an electrical signal is applied to any first signal line 21 and any second signal line 22 respectively, and by testing the resistance between the first signal line 21 and the second signal line 22, it can be determined whether there is an abnormal short circuit between the first signal line 21 connected by the second switch 42 and the second signal line 22 connected by the third switch 43.

[0049] It should be noted that the second switch 42 does not need to connect the first signal lines 21 in series, and the third switch 43 does not need to connect the second signal lines 22 in series, all the second switches 42 can be connected to the wire parts on the same side of the first signal lines 21, and at the same time, all the third switches 43 can be connected to the wire parts on the same side of the second signal lines 22, as long as there is an abnormal short circuit between any adjacent first signal line 21 and second signal line 22, which can be detected by the significant reduction of the impedance between the first signal line 21 and the second signal line 22.

[0050] Exemplarily, Figure 2 is a circuit structure schematic diagram of a detection circuit provided by an embodiment of the present application, referring to Figure 2 , referring to Figure 1 and Figure 2The display panel 01 further comprises a first control line CL1, a second control line CL2 and a third control line CL3. The first control line CL1 is electrically connected to the control end of the first switch 31. The second control line CL2 is electrically connected to the control end of the second switch 42. The third control line CL3 is electrically connected to the control end of the third switch 43. In an optional embodiment, the first control line CL1 can be provided with an active pulse of the first control signal, the second control line CL2 can be provided with an inactive level of the second control signal, and the third control line CL3 can be provided with an inactive level of the third control signal. At this time, the first switch 31 is turned on, the second switch 42 and the third switch 43 are turned off, and all the signal lines 20 can be connected in series. The resistance of the signal lines 20 connected in series is detected. If the resistance of the signal lines 20 connected in series is small, it indicates that there is no abnormal disconnection between the signal lines 20 connected in series. If the resistance of the signal lines 20 connected in series is large, it indicates that there is an abnormal disconnection between the signal lines 20 connected in series.

[0051] In yet another optional embodiment, the first control line CL1 can be provided with an inactive level of the first control signal, the second control line CL2 can be provided with an active pulse of the second control signal, and the third control line CL3 can be provided with an active pulse of the third control signal. At this time, the first switch 31 is turned off, the second switch 42 and the third switch 43 are turned on, all the first signal lines 21 can be connected, and all the second signal lines 22 can be connected. The resistance between the first signal lines 21 and the second signal lines 22 is detected. If the resistance between the first signal lines 21 and the second signal lines 22 is small, it indicates that there is an abnormal short circuit between the adjacent first signal lines 21 and the second signal lines 22. If the resistance between the first signal lines 21 and the second signal lines 22 is large, it indicates that there is no abnormal short circuit between the first signal lines 21 and the second signal lines 22.

[0052] In yet another optional embodiment, the first control line CL1 can be provided with an inactive level of the first control signal, the second control line CL2 can be provided with an inactive level of the second control signal, and the third control line CL3 can be provided with an inactive level of the third control signal. At this time, the first switch 31, the second switch 42 and the third switch 43 are all turned off, so that each signal line 20 is independent of each other and can have different electrical properties. At this time, the signal line 20 can realize the function of normally transmitting a signal.

[0053] The display panel provided in this embodiment of the invention, by setting a first detection circuit, allows at least a portion of the signal lines to be connected in series with a first switch of the first detection circuit. By detecting the resistance of the series-connected signal lines, an open circuit can be detected. By setting a second detection circuit, a second switch of the second detection circuit can be connected to at least a portion of the first signal lines, and a third switch of the second detection circuit can be connected to at least a portion of the second signal lines. By detecting the resistance between the first and second signal lines, a short circuit can be detected between adjacent signal lines. When the first, second, and third switches are all turned off, each signal line can be made independent, achieving normal signal transmission. This allows for rapid detection of all signal lines, improving detection efficiency. It can also detect minor open circuits and short circuits, improving detection accuracy. Furthermore, the detection equipment is simple and the detection cost is low. In addition, after the circuit is tested, no further processing of the circuit is required; that is, there is no need to disconnect the detection circuit. Normal signal transmission can be achieved simply by changing the control signal, reducing the likelihood of introducing new defects and further improving product yield.

[0054] It should be noted that the above embodiments only exemplify that the first switch, second switch, and third switch all include switching devices. These switching devices can receive control signals via control lines to control the on / off state of the detection circuit, thereby achieving the detection function. In other optional embodiments, at least some of the first, second, and third switches can also be directly connected via wires. When disconnection is required, it can be achieved through laser cutting. This simplifies the circuit structure, reduces the size of the display panel, and facilitates the thinning and lightening of the display panel.

[0055] Optional, continue to refer to Figure 2 The first switch 31 is electrically connected to the adjacent signal line 20.

[0056] For example, signal lines 20 arranged sequentially along the first direction X are connected in series. The first signal line 20 arranged sequentially along the first direction X is the first signal line 20 connected in series, and the last signal line 20 arranged sequentially along the first direction X is the last signal line 20 connected in series. In this way, when all the first switches 31 are turned on, electrical signals can be provided to the first signal line 20 and the last signal line 20 arranged sequentially along the first direction X, respectively, to detect the resistance of the series-connected signal lines 20. It is not necessary to provide an electrical signal to the signal line 20 located in the middle position along the first direction X, which simplifies the detection process and avoids the risk of introducing new anomalies during the process of providing electrical signals to the signal lines 20. At the same time, it can also reduce the extension length of the connecting line between the first switch 31 and the signal line 20, reduce the space occupied by the first detection circuit 30, and contribute to the thinning of the display panel 01.

[0057] Optionally, Figure 3 is a circuit structure schematic diagram of a first detection circuit provided by an embodiment of the present application, referring to Figure 3 The signal line 20 includes a first wire part 29 extending along a second direction X, the second direction Y intersects the first direction X, and the first detection circuit 30 further includes a first detection electrode 39. The signal line 20 includes a first connection point N1 and a second connection point N2, one of the first connection point N1 and the second connection point N2 is electrically connected with a first switch 31, and the other is electrically connected with other first switch 31 or the first detection electrode 39. Wherein, in the same signal line 20, at least part of the first wire part 29 is located between the first connection point N1 and the second connection point N2.

[0058] Wherein, the first wire part 29 includes a wire part to be detected, for example, the first wire part 29 can include a wire part with a relatively narrow width, a relatively close distance from other signal lines, etc. The first connection point N1 and the second connection point N2 refer to the lapping position of the first detection circuit 30 and the signal line 20, for transmitting an electrical signal for detection to the signal line 20. In addition, the second direction Y can be parallel to the upper surface and the lower surface of the substrate 10, or the second direction Y can also be parallel to the side surface of the substrate 10, that is, the first wire part 29 can be located on the upper surface and / or the lower surface, or the first wire part 29 can also be located on the side surface. In other optional embodiments, the first wire part 29 can also be located on the upper surface, the lower surface and the side surface at the same time.

[0059] Specifically, when the first switches 31 are all turned on and at least part of the signal lines 21 are connected in series, at least part of the first wire part 29 between the first connection point N1 and the second connection point N2 can be connected in series to detect whether the part of the first wire part 29 is open circuit.

[0060] For example, the first wiring part 29 can be located between the first connection point N1 and the second connection point N2, and the first switch 31 can be configured to connect the first wiring part 29 in series. The first detection circuit 30 can include at least two first detection electrodes 39, which can be electrically connected to the first connection point N1 or the second connection point N2 of the first signal line 20 connected in series and the first connection point N1 or the second connection point N2 of the last signal line 20 connected in series, respectively. In this way, when the first wiring part 29 is a continuous wiring part, the continuity of the first wiring part 29 of each signal line 20 can be quickly detected by the resistance between the two first detection electrodes 39, or when the first wiring part 29 is a discontinuous wiring part, the bridging of the first wiring part 29 of each signal line 20 can be quickly detected by the resistance between the two first detection electrodes 39. The part of the signal line 20 other than the first wiring part 29 can not be detected by the first detection circuit, but can be detected by other means. For example, the part of the signal line 20 other than the first wiring part 29 can be a part with a relatively wide width and a relatively large distance from other signal lines, which is not prone to abnormal short circuit or open circuit, and can be detected by AOI testing or other means.

[0061] In an optional embodiment, continuing to refer to Figure 3 , the first connection point N1 or the second connection point N2 is electrically connected to only one first switch 31 or one first detection electrode 39.

[0062] For example, one of the first connection point N1 or the second connection point N2 of the signal line 20 is electrically connected to the first detection electrode 39, and the other is electrically connected to the first switch 31; or one of the first connection point N1 or the second connection point N2 of the signal line 20 is electrically connected to the previous signal line 20 connected in series through the first switch 31, and the other is electrically connected to the next signal line 20 connected in series through another first switch 31. In this way, it can be ensured that the first switch 31 can connect the first wiring part 29 located between the first connection point N1 and the second connection point N2 in series, and if the first wiring part 29 located between the first connection point N1 and the second connection point N2 has an abnormal open circuit, a path cannot be formed between the two first detection electrodes 39, and the abnormal open circuit of the first wiring part 29 can be detected by the large resistance between the two first detection electrodes 39.

[0063] In yet another optional embodiment, Figure 4 is another structure diagram of a display panel provided by an embodiment of the present application, referring to Figure 3 and Figure 4The first wiring part 29 is located on the side surface of the substrate 10. The first connection point N1 and the first switch 31 or the first detection electrode 39 electrically connected to the first connection point N1 are located on the first surface, and the second connection point N2 and the first switch 31 or the first detection electrode 39 electrically connected to the second connection point N2 are located on the second surface. The first surface and the second surface are adjacent to the side surface, and the first surface and the second surface are not adjacent.

[0064] The first surface can be the upper surface of the substrate 10, and the second surface can be the lower surface of the substrate 10, or the first surface can be the lower surface of the substrate 10, and the second surface can be the upper surface of the substrate 10.

[0065] Specifically, the signal line 20 can be located on different surfaces, so that part of the circuit structure of the display panel 01 can be located on the first surface, and part of the circuit structure can be located on the second surface. The first wiring part 29 can connect the part of the signal line 20 located on the upper and lower surfaces, which is beneficial to the narrow frame of the display panel 01. When the signal line 20 is located on different surfaces, the first connection point N1 and the first switch 31 or the first detection electrode 39 electrically connected to the first connection point N1 can be located on the first surface, and the second connection point N2 and the first switch 31 or the first detection electrode 39 electrically connected to the second connection point N2 can be located on the second surface, so as to ensure that the first switch 31 can connect the first wiring part 29 located on the side surface in series. The first detection circuit 30 and the second detection circuit 40 can detect the connection of the first wiring part 29 and the signal line 20 located on other surfaces at the corner (the connection corner of the first surface and the side surface, and the connection corner of the second surface and the side surface), realize fast full detection, and reduce the risk of abnormality of double-sided wiring.

[0066] In yet another optional embodiment, Figure 5 is a circuit structure schematic diagram of another first detection circuit provided by the embodiment of the application, referring to Figure 5 The signal line 20 includes the first lap joint electrode 26 and the second lap joint electrode 27, and the first wiring part 29 is located between the first lap joint electrode 26 and the second lap joint electrode 27. The first connection point N1 is located on the first lap joint electrode 26, and / or the second connection point N2 is located on the second lap joint electrode 27.

[0067] The first and second overlap electrodes 26 and 27 can be connected to the circuit structure for realizing the function of the display panel 01, for example, the display panel 01 further comprises a driving circuit and a pixel circuit located in the display area, the first overlap electrode 26 can be electrically connected to the pixel circuit, and the second overlap electrode 27 can be electrically connected to the driving circuit (not shown in the figure). The driving circuit can provide the pixel circuit with data signals, scanning signals and the like, and the signal line 20 can be used to transmit the data signals, scanning signals and the like provided by the driving circuit for the pixel circuit.

[0068] Specifically, the first and second overlap electrodes 26 and 27 can be connected to the circuit structure for realizing the function of the display panel 01, and can also be connected to the detection circuit for detecting the signal line 20. On the one hand, the overlap point of the overlap electrode and the signal line 20 can be arranged between the first and second connection points N1 and N2, that is, when the signal line 20 is connected in series, the overlap point of the overlap electrode and the signal line 20 is also connected in series in the path, so that when detecting whether the signal line 20 is abnormally disconnected, the quality of the first wire part 29 can be detected, and the overlap quality of the overlap electrode and the signal line 20 can also be detected, for example, whether the overlap point of the overlap electrode and the signal line 20 is abnormally disconnected; on the other hand, the connection point electrically connected to the detection circuit can be arranged only at the overlap electrode of the signal line 20, and no connection point needs to be arranged in the area other than the overlap electrode of the signal line 20, which is beneficial to reducing the spacing between the signal lines 20, thereby facilitating the narrow frame and thinning of the display panel 01.

[0069] On the basis of the above-mentioned embodiments, Figure 6 is another circuit structure schematic diagram of the first detection circuit provided by the embodiments of the present application, referring to Figure 6 The signal line connected in series with the first switch 31 is a first signal line group; the display panel 01 comprises a plurality of first signal line groups; and the first detection electrode 39 comprises a sub-electrode 309 electrically connected to the signal line 20. The number of the sub-electrodes 309 of the first detection electrode 39 is twice the number of the first signal line groups.

[0070] Specifically, the signal lines 20 connected in series by the first switch 31 to form a path can be taken as a first signal line group, and the signal lines 20 in the display panel 01 can be divided into a plurality of first signal line groups, and the first signal line 20 and the last signal line 20 in each first signal line group can be connected to different sub-electrodes 309. In an optional embodiment, the sub-electrodes 309 in different first signal line groups can be electrically connected, so that all the first signal line groups are connected in series, and all the signal lines 20 can be connected in series to form a path, which facilitates rapid detection of all the signal lines 20 and is conducive to improving the detection efficiency; in another optional embodiment, when an abnormal open circuit exists in a signal line 20, only the signal lines 20 in a certain first signal line group can be detected through the sub-electrodes 309 electrically connected to the same first signal line group, which facilitates troubleshooting and rapid locking of the abnormal position and is conducive to improving the detection accuracy and maintenance efficiency.

[0071] It can be understood that, Figure 6 It is only exemplarily shown in the display panel 01 that the display panel 01 includes two first signal line groups and the first detection circuit 30 includes four sub-electrodes 309, and in other optional embodiments, the display panel 01 can include three, four, five or other number of first signal line groups, and correspondingly, the first detection circuit 30 can include six, eight, ten or other number of sub-electrodes 309, and the embodiments of the present application will not be described one by one.

[0072] On the basis of the above embodiments, Figure 7 is another circuit structure diagram of a first detection circuit provided by the embodiments of the present application, and reference is made to Figure 7 The first detection electrode 39 includes a first sub-electrode 331, a second sub-electrode 332 and a third sub-electrode 333; and the first switch is connected in series with M signal lines to form a first signal line group. In the same first signal line group, the first signal line 20 connected in series is electrically connected to the first sub-electrode 331, the Mth signal line connected in series is electrically connected to the second sub-electrode 332, and the ith signal line connected in series is electrically connected to the third sub-electrode 333, 1

[0073] Specifically, the first sub-electrode 331 and the second sub-electrode 332 are respectively electrically connected with the first signal line 20 and the last signal line 20 in the same first signal line group which are connected in series through the first switch 31. By providing an electrical signal to the first sub-electrode 331 and the second sub-electrode 332, all the signal lines 20 connected in series in the first signal line group can be detected. The third sub-electrode 333 is electrically connected with the middle signal line 20 in the same first signal line group which is connected in series through the first switch 31 (the signal line 20 in the same first signal line group except the first signal line 20 and the last signal line 20). By providing an electrical signal to the first sub-electrode 331 and the third sub-electrode 333, or providing an electrical signal to the second sub-electrode 332 and the third sub-electrode 333, part of the signal lines 20 connected in series in the first signal line group can be detected.

[0074] For example, all the signal lines 20 can be connected in series through the first switch 31. The display panel 01 can only include one first signal line group, which reduces the number of the first signal line groups, is conducive to simplifying the detection method and improving the detection efficiency. For example, all the signal lines 20 can be detected through the first sub-electrode 331 and the second sub-electrode 332 first, so as to quickly detect, and then the third sub-electrode 333 can be used to lock the abnormal position. The third sub-electrode 333 arranged at the middle signal line 20 in the first signal line group can also lock the abnormal position, improve the detection accuracy and the maintenance efficiency, and reduce the number of the first detection electrodes 39, which is conducive to the thinning of the display panel 01.

[0075] It can be understood that, Figure 7 It can be understood that,

[0076] Optionally, Figure 8 is a circuit structure schematic diagram of a second detection circuit provided by an embodiment of the present application, Figure 9 is a structure schematic diagram of another display panel provided by an embodiment of the present application, which refers to Figure 8 and Figure 9The signal line 20 includes a first trace portion 29 located on the side surface of the substrate 10. The second switch 42 and the connection point of the second switch 42 and the first signal line 21 are both located on the first surface, and the third switch 43 and the connection point of the third switch 43 and the second signal line 22 are both located on the second surface; or the second switch 42, the connection point of the second switch 42 and the first signal line 21, the third switch 43, and the connection point of the third switch 43 and the second signal line 22 are all located on the first surface or the second surface. The first surface and the second surface are both adjacent to the side surface, and the first surface and the second surface are not adjacent.

[0077] The first trace portion 29 includes a trace portion to be detected. The first surface can be the upper surface of the substrate 10, and the second surface can be the lower surface of the substrate 10, or the first surface can be the lower surface of the substrate 10, and the second surface can be the upper surface of the substrate 10.

[0078] Specifically, the signal line 20 can be located on different surfaces, so that part of the circuit structure of the display panel 01 can be located on the first surface, and part of the circuit structure can be located on the second surface, which is beneficial to narrow the frame of the display panel 01. When the signal line 20 is located on different surfaces, the second switch 42 and the third switch 43 can be arranged on the first surface and the second surface respectively, or the second switch 42 and the third switch 43 can also be arranged on the first surface or the second surface. In an optional embodiment, the second switch 42, the connection point of the second switch 42 and the first signal line 21, the third switch 43, and the connection point of the third switch 43 and the second signal line 22 can all be located on the backlight side surface of the substrate 10, which is beneficial to improve the screen ratio of the display panel 01.

[0079] Optionally, continuing to refer to Figure 8 and Figure 9 The second detection circuit 40 further includes a second detection electrode 48 and a third detection electrode 49. The second detection electrode 48 can be electrically connected to any one of the first signal lines 21 and / or any one of the second switches 42, and the third detection electrode 49 can be electrically connected to any one of the second signal lines 22 and / or any one of the third switches 43. By providing an electrical signal to the second detection electrode 48 and the third detection electrode 49, the resistance between the two can be detected, and whether there is an abnormal short circuit between the adjacent first signal lines 21 and the second signal lines 22 can be detected.

[0080] In an optional embodiment, Figure 10 is a circuit structure schematic diagram of another second detection circuit provided by an embodiment of the present application, Figure 11 is a circuit structure schematic diagram of another second detection circuit provided by an embodiment of the present application, referring to Figure 10 and Figure 11The first signal lines 21 connected by the second switches 42 form a second signal line group; the second signal lines 22 connected by the third switches 43 form a third signal line group; the display panel 01 comprises a plurality of second signal line groups, and / or, the display panel comprises a plurality of third signal line groups.

[0081] Specifically, the first signal lines 21 connected by the second switches 42 and electrically identical form a second signal line group, and the second signal lines 22 connected by the third switches 43 and electrically identical form a third signal line group. In an optional embodiment, the different second signal line groups can be electrically connected, and / or, the different third signal line groups can be electrically connected, so that all the first signal lines 21 are electrically connected, and all the second signal lines 22 are electrically connected, and then the resistance between the first signal lines 21 and the second signal lines 22 is detected to quickly detect whether the adjacent signal lines 20 are abnormally short-circuited; when there is an abnormal short circuit between the first signal line 21 and the adjacent second signal line 22, the resistance between the first signal line 21 of each second signal line group and the second signal line 22 of each third signal line group is detected, and only the resistance between the first signal line 21 of a certain second signal line group and the second signal line 22 of a certain third signal line group is detected, so as to facilitate troubleshooting and quickly lock the abnormal position, and is conducive to improving the detection accuracy and the maintenance efficiency.

[0082] For example, each second signal line group can be electrically connected with a second detection electrode 48, and the number of the second signal line groups is the same as the number of the second detection electrodes 48; each third signal line group can be electrically connected with a third detection electrode 49, and the number of the third signal line groups is the same as the number of the third detection electrodes 49. By electrically connecting the second detection electrodes 48, the different second signal line groups can be electrically connected; by electrically connecting the third detection electrodes 49, the different third signal line groups can be electrically connected; by providing an electrical signal to the second detection electrodes 48 and the third detection electrodes 49, the resistance between the first signal line 21 of the second signal line group and the second signal line 22 of the third signal line group can be detected to detect whether the adjacent first signal line 21 and the second signal line 22 are abnormally short-circuited.

[0083] Optionally, continuing to refer to Figure 8 The second switches 42 are respectively electrically connected with the adjacent first signal lines 21, and / or, the third switches 43 are respectively electrically connected with the adjacent second signal lines 22. In this way, the extension length of the connecting lines between the second switches 42 and the first signal lines 21, and / or, the extension length of the connecting lines between the third switches 43 and the first signal lines 21 can be reduced, so as to reduce the space occupied by the second detection circuit 40, and facilitate the thinning of the display panel 01.

[0084] For example, with continued reference to Figure 8 The signal line 20 includes a first overlap electrode 26 and a second overlap electrode 27, the second switch 42 can be electrically connected with the first signal line 21 through the second overlap electrode 27, and / or the third switch 43 can be electrically connected with the second signal line 22 through the first overlap electrode 26. In this way, the connection points electrically connected with the detection circuit can be arranged only at the overlap electrodes of the signal line 20, without the need to arrange the connection points in the areas other than the overlap electrodes of the signal line 20, which is conducive to reducing the spacing between the signal lines 20, thereby facilitating the narrow frame and thinning of the display panel 01.

[0085] On the basis of the above-described embodiments, Figure 12 is another circuit structure schematic diagram of the second detection circuit provided by the embodiments of the present application, with reference to Figure 12 The second switch 42 multiplexes the first switch 31, and the second switch 42 is connected in series with at least part of the first signal line 21; and / or the third switch 43 multiplexes the first switch 31, and the third switch 43 is connected in series with at least part of the second signal line 22.

[0086] Specifically, part of the first switch 31 can be connected in series with the first signal line 21, and this part of the first switch 31 can be multiplexed as the second switch 42; part of the first switch 31 can be connected in series with the second signal line 22, and this part of the first switch 31 can be multiplexed as the third switch 43. Through switch multiplexing, the number of switches in the detection circuit can be reduced, thereby reducing the space occupied by the detection circuit, which is conducive to the thinning of the display panel 01.

[0087] For example, the second control line CL2 includes a first sub-control signal CL01 and a third sub-control line CL03, and the third control line CL3 includes a second sub-control signal CL02 and a fourth sub-control line CL04. The first sub-control signal CL01 can control the on / off of part of the second switches 42, and the third sub-control line CL03 can control the on / off of another part of the second switches 42; the second sub-control signal CL02 can control the on / off of part of the third switches 43, and the fourth sub-control line CL04 can control the on / off of another part of the third switches 43.

[0088] In an optional embodiment, the first sub-control signal CL01 and the third sub-control line CL03 can be provided with an effective pulse of the second control signal, at this time, the second switch 42 is turned on, and all the first signal lines 21 can be connected in series, and the resistance of the connected first signal lines 21 is detected. If the resistance of the connected first signal lines 21 is small, it indicates that there is no abnormal disconnection between the connected first signal lines 21; if the resistance of the connected first signal lines 21 is large, it indicates that there is an abnormal disconnection in the connected first signal lines 21.

[0089] Then, the third control signal is provided with an effective pulse to the second sub-control line CL02 and the fourth sub-control line CL04, at this time, the third switch 43 is turned on, all the second signal lines 22 can be connected in series, the resistance of the connected second signal lines 22 is detected, if the resistance of the connected second signal lines 22 is small, it indicates that there is no abnormal open circuit between the connected second signal lines 22; if the resistance of the connected second signal lines 22 is large, it indicates that there is an abnormal open circuit in the connected second signal lines 22.

[0090] Finally, after confirming that there is no abnormal short circuit in the first signal line 21 and the second signal line 22, the second control signal is provided with an effective pulse to the first sub-control line CL01 and the third sub-control line CL03 at the same time, and the third control signal is provided with an effective pulse to the second sub-control line CL02 and the fourth sub-control line CL04, at this time, the second switch 42 and the third switch 43 are turned on, the resistance between the first signal line 21 and the second signal line 22 is detected, if the resistance between the first signal line 21 and the second signal line 22 is small, it indicates that there is an abnormal short circuit between the adjacent first signal line 21 and the second signal line 22; if the resistance between the first signal line 21 and the second signal line 22 is large, it indicates that there is no abnormal short circuit between the adjacent first signal line 21 and the second signal line 22.

[0091] Optionally, Figure 13 is another circuit structure schematic diagram of a detection circuit provided by an embodiment of the present application, Figure 14 is a film layer schematic diagram of a detection circuit provided by an embodiment of the present application, Figure 15 is a cross-sectional structure schematic along the A-A' section of the figure, Figure 14 is a cross-sectional structure schematic along the A-A' section of the figure, Figure 13-15 The first switch 31 includes a first transistor M01, and the first transistor M01 includes a first gate M-101 and a first active layer M-102; the second switch 42 includes a second transistor M02, and the second transistor M02 includes a second gate M-201 and a second active layer M-202. In at least part of the first transistor M01, the vertical projection of the first active layer M-102 on the plane where the substrate 10 is located overlaps the vertical projection of the second active layer M-202 on the plane where the substrate 10 is located.

[0092] Specifically, along the thickness direction of the substrate 10, at least part of the structure of the first transistor M01 can overlap part of the structure of the second transistor M02 or the third transistor M03, that is, along the thickness direction of the substrate 10, the first detection circuit 30 and the second detection circuit 40 overlap, which can reduce the space occupied by the first detection circuit 30 and the second detection circuit 40, and is beneficial to the narrow frame and light thinning of the display panel 01.

[0093] Similarly, the third switch 43 includes a third transistor M03, the third transistor M03 includes a third gate and a third active layer, a vertical projection of the first active layer on a plane where the substrate substrate is located and a vertical projection of the third active layer on the plane where the substrate substrate is located overlap (not shown in the figure), and the first detection circuit and the second detection circuit can also overlap, so as to reduce the space occupied by the first detection circuit and the second detection circuit, and facilitate narrow frame and thinning of the display panel.

[0094] In other optional embodiments, when the second switch multiplexes the first switch and the third switch multiplexes the first switch, part of the first switch can be multiplexed as the second switch, and part of the first switch can be multiplexed as the third switch. If the first active layers of all the first transistors are arranged in the same layer, at this time, the first active layer can not overlap the second active layer and the third active layer in the thickness direction of the substrate substrate; if the first active layers of different first transistors can be located at different film layer positions, at this time, the first active layer can overlap the second active layer or the third active layer in the thickness direction of the substrate substrate, so as to further reduce the space occupied by the first detection circuit and the second detection circuit.

[0095] On the basis of the above-mentioned embodiments, continuing to refer to Figure 13-15 When the first active layer M-102 and the second active layer M-202 are overlapped in the vertical projection on the plane where the substrate substrate 10 is located, the first gate M-101 is located on the side of the first active layer M-102 away from the second active layer M-202, and the second gate M-201 is located on the side of the second active layer M-202 away from the first active layer M-102. By arranging the first gate M-101 and the second gate M-201 not to be located between the first active layer M-102 and the second active layer M-202, the first gate M-101 can be prevented from affecting the second active layer M-202, and the second gate M-201 can be prevented from affecting the first active layer M-102, so as to reduce signal interference and improve detection accuracy.

[0096] Similarly, when the first active layer and the third active layer are overlapped in the vertical projection on the plane where the substrate substrate is located, the first gate is located on the side of the first active layer away from the third active layer, and the third gate is located on the side of the third active layer away from the first active layer. By arranging the first gate and the third gate not to be located between the first active layer and the third active layer, the first gate can be prevented from affecting the third active layer, and the third gate can be prevented from affecting the first active layer, so as to reduce signal interference and improve detection accuracy.

[0097] Optionally, Figure 16 is a film layer schematic diagram of another detection circuit provided by the embodiments of the present application, Figure 17 is a cross-sectional structure schematic diagram along the section B-B' in FIG. 8, and reference is made to Figure 16 FIG. 8.Figure 13 、 Figure 16 and Figure 17 The signal lines include the jth signal line 20(j), and j is a positive odd number. The second transistor M02 electrically connected with the jth signal line 20(j) and the j+2th signal line 20(j+2) respectively and the second transistor M02 electrically connected with the j+2th signal line 20(j+2) and the j+4th signal line 20(j+4) are adjacent. The second active layers M-202 of the adjacent second transistors M02 are integrated structures, and the adjacent second transistors M02 are electrically connected with the j+2th signal line 20(j+2) through the same second via hole H02. In this way, the space occupied by the second detection circuit 40 can be reduced, which is beneficial to the thinning of the display panel.

[0098] Similarly, the signal lines include the kth signal line 20(k), and k is a positive odd number. The third transistor electrically connected with the kth signal line and the (k+2)th signal line and the third transistor electrically connected with the (k+2)th signal line and the (k+4)th signal line are adjacent. The third active layers of the adjacent third transistors are integrated structures, and the adjacent third transistors are electrically connected with the (k+2)th signal line through the same third via hole. Similarly, the space occupied by the second detection circuit 40 can be reduced, which is beneficial to the thinning of the display panel.

[0099] It can be understood that the second via hole and the third via hole can be an integrally formed via hole, for example, the second via hole and the third via hole can be formed at one time before the conductive material of the signal line 20 is filled into the second via hole and the third via hole. Alternatively, the second via hole and the third via hole can also be a via hole including a lapping electrode, for example, a lapping electrode electrically connected with the second active layer or the third active layer is formed first before the conductive material of the signal line is filled into the second via hole and the third via hole, then a lapping hole (not shown in the figure) exposing the lapping electrode is formed, and then the conductive material of the signal line is filled into the lapping hole, so that the signal line is electrically connected with the source / drain region of the second active layer or the third active layer.

[0100] Optionally, Figure 18 is a circuit structure schematic diagram of another detection circuit provided by an embodiment of the present application, Figure 19 is a film layer schematic diagram of the another detection circuit provided by the embodiment of the present application, Figure 20 is a cross-sectional structure schematic along the C-C' section in Figure 19 is a film layer schematic diagram of the second detection circuit corresponding to Figure 21 is a film layer schematic diagram of the second detection circuit corresponding to Figure 19 is a film layer schematic diagram of the second detection circuit corresponding to Figure 18-21The second detection circuit 40 further includes a second control line CL2 for controlling the second switch 42 and a third control line CL3 for controlling the third switch 43. The second switch 42 includes a second transistor M02, and the second transistor M02 includes a second gate M-201 and a second active layer M-202. The second gate M-201 is electrically connected to the second control line CL2. The third switch 43 includes a third transistor M03, and the third transistor M03 includes a third gate M-301 and a third active layer M-302. The third gate M-301 is electrically connected to the third control line CL3. The second gate M-201 and the third gate M-301 are in an integrated structure. The third gate M-301 and the third control line CL3 share the second control line CL2, or the second gate M-201 and the second control line CL2 share the third control line CL3.

[0101] For example, referring to Figure 18-21 The second control line CL2 can be in an integrated structure with the second gate M-201 of each second transistor M02, and transmit a second control signal to each second transistor M02 to control the on / off of the second transistor M02. In an optional embodiment, each second transistor M02 is arranged along a first direction X, and the second control line CL2 extends along the first direction X. The third active layer M-302 of the third transistor M03 can overlap the vertical projection of the second control line CL2 on the substrate 10. An electrical signal on the second control line CL2 can control the channel width of the third active layer M-302, and the third active layer M-302 can extend along a second direction Y intersecting the first direction X. The first pole of the third transistor M03 can be electrically connected to the second signal line 22, and the second pole of the third transistor M03 can be electrically connected to the second poles of other third transistors M03 through a detection connection line LL extending along the first direction X. The third gate M-301 of the third transistor M03 shares the second control line CL2 for controlling the second transistor M02, that is, the second control line CL2 can share the third gate M-301. Through structural sharing, the space occupied by the second detection circuit 40 can be reduced, which is conducive to the thinning of the display panel 01.

[0102] In an optional embodiment, continuing to refer to Figure 18-21 The second active layer M-202 and the third active layer M-302 are arranged in the same layer and are not connected, which can improve the integration of the second detection circuit 40 and is conducive to the thinning of the display panel 01.

[0103] In yet another optional embodiment, continuing to refer to Figure 18-21The detection that the connection line LL and the signal line 20 are arranged in the same layer and the detection that the connection line LL and the signal line 20 are not connected can improve the integration of the second detection circuit 40 and is beneficial to the light and thin display panel 01.

[0104] Based on the same inventive concept, the embodiment of the present application further provides a display panel detection method, Figure 22 is a flow chart of the display panel detection method provided by the embodiment of the present application, referring to Figure 22 The display panel detection method comprises the following steps.

[0105] S110, controlling the first switch to be turned on, determining whether the signal line is in open circuit according to the resistance of the signal line in series.

[0106] S120, controlling the second switch and the third switch to be turned on, determining whether there is a short circuit between the adjacent signal lines according to the resistance between the first signal line and the second signal line.

[0107] Wherein, when S110 is performed, the second switch and the third switch need to be controlled to be turned off; when S120 is performed, the first switch needs to be controlled to be turned off.

[0108] For example, when the first switch is turned on, at least part of the signal lines can be connected in series to form a path, and an electrical signal is applied to both ends of the path, and by testing the resistance of the path, it can be determined whether there is an abnormal open circuit in the signal lines connected in series. When the second switch is turned on, at least part of the first signal lines can be connected, so that the electrical properties of at least part of the first signal lines are the same; when the third switch is turned on, at least part of the second signal lines can be connected, so that the electrical properties of at least part of the first signal lines are the same; an electrical signal is applied to any first signal line connected to each other and any second signal line connected to each other, and by testing the resistance between the first signal line and the second signal line, it can be determined whether there is an abnormal short circuit between the first signal line connected by the second switch and the second signal line connected by the third switch.

[0109] Optionally, after the display panel is detected, the detection method further comprises: controlling the first switch, the second switch and the third switch to be turned off, so that each signal line 20 is independent of each other. At this time, the signal line can realize the function of normal signal transmission.

[0110] The display panel detection method provided by the embodiment of the present application can quickly detect all the signal lines of the display panel, improve the detection efficiency, detect the tiny open circuit and the tiny short circuit, improve the detection precision, and has a simple detection method and low detection cost.

[0111] The display panel detection method provided by the embodiment of the present application can quickly detect all the signal lines of the display panel, improve the detection efficiency, detect the tiny open circuit and the tiny short circuit, improve the detection precision, and has a simple detection method and low detection cost.

[0112] Based on the same inventive concept, the embodiment of the present application also provides a display device, Figure 23 is a structural schematic diagram of a display device provided by the embodiment of the present application, as shown in the figure, the display device 02 comprises the display panel 01 provided by any embodiment of the present application. Figure 23 The display device 02 provided by the embodiment of the present application can be a mobile phone as shown in the figure, or any electronic product with display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, vehicle-mounted display, medical equipment, industrial control equipment, touch interaction terminal, etc., and the embodiment of the present application does not make special limitation here. Figure 23

[0113] It should be noted that the above are only the preferred embodiments of the present application and the applied technical principles. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and those skilled in the art can make various obvious changes, readjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in more detail through the above embodiments, the present application is not limited to the above embodiments, and can include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.​

Claims

1. A display panel, characterized by, The display panel comprises: a substrate and a plurality of signal lines, a first detection circuit and a second detection circuit located on one side of the substrate; the plurality of signal lines comprises a first signal line and a second signal line; in a first direction, the first signal line and the second signal line are arranged alternately; the first detection circuit comprises a plurality of first switches; the plurality of first switches are connected in series to at least part of the signal lines; the second detection circuit comprises a plurality of second switches and a plurality of third switches; the plurality of second switches are connected to at least part of the first signal lines, and the plurality of third switches are connected to at least part of the second signal lines; the signal line comprises a first trace part extending in a second direction, and the second direction intersects the first direction; the first detection circuit further comprises a first detection electrode; the signal line comprises a first connection point and a second connection point; one of the first connection point and the second connection point is electrically connected to one of the first switches, and the other of the first connection point and the second connection point is electrically connected to the other of the first switches or the first detection electrode; wherein, in the same signal line, at least part of the first trace part is located between the first connection point and the second connection point; and the first connection point or the second connection point is electrically connected to only one of the first switches or the first detection electrode.

2. The display panel of claim 1, wherein, The first switches are respectively electrically connected to adjacent signal lines.

3. The display panel of claim 1, wherein, The first trace part is located on a side surface of the substrate; wherein, the first connection point and the first switch or the first detection electrode electrically connected to the first connection point are located on a first surface, and the second connection point and the first switch or the first detection electrode electrically connected to the second connection point are located on a second surface; the first surface and the second surface are both adjacent to the side surface, and the first surface and the second surface are not adjacent.

4. The display panel of claim 1, wherein, The signal line comprises a first overlap electrode and a second overlap electrode; the first trace part is located between the first overlap electrode and the second overlap electrode; The display panel further comprises a driving circuit and a pixel circuit located in a display area; the first overlap electrode is electrically connected to the pixel circuit, and / or the second overlap electrode is electrically connected to the driving circuit; The first connection point is located on the first overlap electrode, and / or the second connection point is located on the second overlap electrode.

5. The display panel of claim 1, wherein, The signal line connected in series by the first switches is a first signal line group; The display panel comprises a plurality of first signal line groups; The first detection electrode comprises a sub-electrode electrically connected to the signal line; wherein, the number of the sub-electrodes of the first detection electrode is twice the number of the first signal line groups.

6. The display panel of claim 1, wherein, The first detection electrode comprises a first sub-electrode, a second sub-electrode and a third sub-electrode; The first signal line group is formed by connecting M signal lines in series by the first switches; In the same first signal line group, the first signal line in series connection is electrically connected with the first sub-electrode, the Mth signal line in series connection is electrically connected with the second sub-electrode, and the ith signal line in series connection is electrically connected with the third sub-electrode, 1 < i < M, and i and M are both positive integers.

7. The display panel of claim 1, wherein, The second switch is electrically connected with adjacent first signal lines respectively, and / or the third switch is electrically connected with adjacent second signal lines respectively.

8. The display panel of claim 7, wherein, The second switch multiplexes the first switch, and the second switch is in series connection with at least part of the first signal lines. And / or, the third switch multiplexes the first switch, and the third switch is in series connection with at least part of the second signal lines.

9. The display panel of claim 1, wherein, The signal line comprises a first trace part located at a side surface of the substrate; The second switch and a connection point of the second switch and the first signal line are both located at a first surface, and the third switch and a connection point of the third switch and the second signal line are both located at a second surface; or the second switch, the connection point of the second switch and the first signal line, the third switch, and the connection point of the third switch and the second signal line are all located at the first surface or the second surface; wherein the first surface and the second surface are both adjacent to the side surface, and the first surface and the second surface are not adjacent.

10. The display panel of claim 1, wherein, The second detection circuit further comprises a second detection electrode and a third detection electrode; the second detection electrode is electrically connected with the second switch and / or the first signal line; and the third detection electrode is electrically connected with the third switch and / or the second signal line. The first signal line connected with the second switch is a second signal line group; and the second signal line connected with the third switch is a third signal line group. The display panel comprises a plurality of second signal line groups and / or a plurality of third signal line groups.

11. The display panel of claim 1, wherein, The first switch comprises a first transistor, and the first transistor comprises a first gate and a first active layer; The second switch comprises a second transistor, and the second transistor comprises a second gate and a second active layer; The third switch comprises a third transistor, and the third transistor comprises a third gate and a third active layer; In at least part of the first transistor, a vertical projection of the first active layer on a plane where the substrate is located overlaps with a vertical projection of the second active layer on the plane where the substrate is located, and / or a vertical projection of the first active layer on the plane where the substrate is located overlaps with a vertical projection of the third active layer on the plane where the substrate is located.

12. The display panel of claim 11, wherein, When the vertical projection of the first active layer on the plane where the substrate is located overlaps with the vertical projection of the second active layer on the plane where the substrate is located, the first gate is located on a side of the first active layer away from the second active layer, and the second gate is located on a side of the second active layer away from the first active layer. When the vertical projection of the first active layer on the plane where the substrate substrate is located overlaps with the vertical projection of the third active layer on the plane where the substrate substrate is located, the first gate is located on the side of the first active layer away from the third active layer, and the third gate is located on the side of the third active layer away from the first active layer.

13. The display panel of claim 1, wherein, The second switch comprises a second transistor, and the second transistor comprises a second gate and a second active layer. The third switch comprises a third transistor, and the third transistor comprises a third gate and a third active layer. The signal line comprises a jth signal line and a kth signal line; wherein j is a positive odd number, and k is a positive even number. The second transistor electrically connected with the jth signal line and the j+2th signal line respectively and the second transistor electrically connected with the j+2th signal line and the j+4th signal line respectively are adjacent to each other; the second active layers of the adjacent second transistors are in an integrated structure, and the adjacent second transistors are electrically connected with the j+2th signal line through the same second via hole. And / or, the third transistor electrically connected with the kth signal line and the k+2th signal line respectively and the third transistor electrically connected with the k+2th signal line and the k+4th signal line respectively are adjacent to each other; the third active layers of the adjacent third transistors are in an integrated structure, and the adjacent third transistors are electrically connected with the k+2th signal line through the same third via hole.

14. The display panel of claim 1, wherein, The second detection circuit further comprises a second control line for controlling the second switch and a third control line for controlling the third switch; The second switch comprises a second transistor, and the second transistor comprises a second gate and a second active layer; the second gate is electrically connected with the second control line; The third switch comprises a third transistor, and the third transistor comprises a third gate and a third active layer; the third gate is electrically connected with the third control line; The second gate and the third gate are in an integrated structure; the third gate and the third control line share the second control line, or the second gate and the second control line share the third control line.

15. The display panel of claim 14, wherein, The second active layer and the third active layer are arranged in the same layer, and the second active layer and the third active layer are not connected.

16. A method of detecting a display panel, the method comprising: applying a voltage to a display panel; and detecting a change in a current flowing through the display panel. A display panel as claimed in any one of claims 1-15 is used for detection. The detection method comprises: Controlling the first switch to be turned on, and determining whether there is a disconnection in the signal line according to the resistance of the signal line in series; Controlling the second switch and the third switch to be turned on, and determining whether there is a short circuit between adjacent signal lines according to the resistance between the first signal line and the second signal line.

17. A display device, characterized in that, Comprise: The display panel as claimed in any one of claims 1-15.

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