A server hard disk startup method, hard disk lighting method, device and system

Abstract

The present invention discloses a method for starting a server hard disk, a method for lighting a hard disk, a device and a system. The method for starting a server hard disk comprises: when the mainboard is powered on, each connector is switched on by polling through a switching circuit, and interface information is sent to a hard disk backplane through each connected connector; the IO address on the IO chip of the corresponding interface on the hard disk backplane is read; according to the IO address on the hard disk backplane that is successfully read, the target connector is determined in at least one polled connector, the pre-stored address information in the register of the hard disk backplane is read, and the pre-stored address information is compared with the cable in place information; if the comparison is consistent, the server hard disk is started. The mainboard hardware circuit of this method does not need to be changed, and the entire identification process does not need to manually adjust the dial switch or replace the custom cable, thereby improving the product yield and maintainability. In addition, the BMC allows the power-on after comparing and confirming the information such as the cable in place, thereby increasing the reliability of the solution.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a method for starting a server hard disk, a method for lighting a hard disk, a device and a system. Background Art

[0002] With the rapid increase in the amount of information, more and more data needs to be processed, and the demand for servers is also increasing. As a type of computer, servers provide computing, storage, data exchange and other services to Internet users, and are an important component of the Internet era. Servers not only have high computing speeds, long running times, and large data throughput, but also increasingly complex design solutions to meet the diverse needs of customers. As server application scenarios become more and more complex, people's requirements for the stability and reliability of server operations are also getting higher and higher.

[0003] Compared with traditional hard disks, NVMe (Non-Volatile Memory Express) hard disks have faster communication speeds, which makes NVMe hard disks play an increasingly critical role in server products. Most NVMe hard disks are directly connected to the CPU's PCIe bus as PCIe devices. This method of connecting NVMe hard disks to the system CPU through the PCIe bus greatly improves overall performance.

[0004] A dedicated hard disk backplane is often used for hard disk management. The backplane is equipped with LED indicators of different colors to display the status of each hard disk. In VMD Enable mode, the lighting information is sent by the CPU through the virtual pin port VPP (Vritual Pin Port) bus. The CPLD (Complex Programmable Logic Device) of the backplane executes the lighting command of the status indicator by parsing the VPP code sent by the CPU. Since the CPLD of the backplane needs to identify the VPP address corresponding to the hard disk first, it can accurately execute the lighting command, but the current VPP address identification method will occupy the cable sideband resources, and the methods such as the dip switch will cause the problem of low yield and difficult maintenance. Summary of the invention

[0005] In view of this, the present invention provides a server hard disk startup method, hard disk lighting method, device and system to solve the problem of low efficiency of mainboard VPP address recognition.

[0006] In a first aspect, the present invention provides a method for starting a server hard disk, which is applied to a controller on a motherboard, such as a BMC, wherein the motherboard further includes at least one connector and a switching circuit, and the method includes:

[0007] When the mainboard is powered on, each connector is switched on through polling by the switching circuit, and interface information is sent to the hard disk backplane through each connected connector;

[0008] Attempt to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each of the connected connectors;

[0009] Determine a target connector in at least one connector polled according to the IO address on the hard disk backplane that is successfully read, wherein the target connector is a connector connected to an I2C channel of the hard disk backplane;

[0010] Reading pre-stored address information in a register of the hard disk backplane, and comparing the pre-stored address information with the cable presence information;

[0011] If the comparison is consistent, the server hard disk power-on operation is initiated.

[0012] In combination with the first aspect, in a possible implementation, determining the target connector in at least one polled connector based on the IO address on the hard disk backplane that is successfully read includes: obtaining the correspondence between the IO address of the IO chip on each hard disk backplane and a connector identifier on the hard disk backplane; and determining the connector identifier corresponding to the IO address as the target connector based on the successfully read IO address and the correspondence.

[0013] In combination with the first aspect, in another possible implementation, the method further includes: if the currently turned-on connector fails in attempting to read the IO address on the hard disk backplane, determining that the currently turned-on connector is not connected to the hard disk backplane.

[0014] In combination with the first aspect, in another possible implementation, the interface information corresponds to a virtual pin port VPP address, where the VPP address is an independent address allocated by the BMC to a connector corresponding to each interface on the mainboard through I2C;

[0015] The sending of interface information to the hard disk backplane through each conductive connector includes: sending a corresponding VPP address to the hard disk backplane through each conductive connector.

[0016] In combination with the first aspect, in another possible implementation, the pre-stored address information is compared with the cable presence information, including: comparing whether the VPP address is the same as the pre-stored VPP address in the pre-stored address information; if they are the same, determining that the comparison is consistent; if they are not the same, determining that the comparison is inconsistent.

[0017] In combination with the first aspect, in another possible implementation, the at least one connector is a high-speed connector; and one or more target connectors in the at least one high-speed connector are connected to the hard disk backplane.

[0018] In combination with the first aspect, in another possible implementation, the mainboard also includes a processor CPU, and the processor is connected to the controller BMC; after the startup operation of the server hard disk, it also includes: controlling the processor to send lighting information to the hard disk backplane, and the lighting information is used by the hard disk backplane to complete the lighting operation of the hard disk that is started.

[0019] In combination with the first aspect, in another possible implementation, after determining the target connector in at least one connector being polled, it also includes: if the number of hard disk backplanes is two or more, determining based on polling that there are two or more target connectors, and the hard disk backplane to which each of the target connectors is connected.

[0020] In a second aspect, the present invention further provides a hard disk lighting method, which is applied to a CPLD on a hard disk backplane, wherein the hard disk backplane further includes at least one connector and at least one IO chip, and the method comprises:

[0021] After the receiving mainboard is powered on, polling at least one port information sent by at least one connector on the mainboard;

[0022] Determine, according to the at least one interface information, a server currently connected to the mainboard among all the connectors as a target connector, and determine a target hard disk currently connected to the CPLD;

[0023] Receive lighting information sent by the processor of the mainboard;

[0024] A lighting operation is performed on the target hard disk according to the lighting information and the target connector.

[0025] In combination with the second aspect, in a possible implementation, when at least one interface information sent by at least one connector on the mainboard is a virtual pin port VPP address corresponding to each interface, determining a server currently connected to the mainboard in all the connectors according to the at least one interface information includes:

[0026] The server currently connected to the mainboard is determined according to the VPP address corresponding to each interface and the independent VPP address rule assigned by the controller on the mainboard to each connector on the mainboard.

[0027] In a third aspect, the present invention further provides a server hard disk startup device, the device comprising:

[0028] The sending module is used to switch each connector to conduction through the switching circuit polling after the mainboard is powered on, and send interface information to the hard disk backplane through each conducting connector;

[0029] A reading module, used for attempting to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each of the connected connectors;

[0030] A determination module, configured to determine a target connector in at least one connector polled according to the IO address on the hard disk backplane that is successfully read, wherein the target connector is a connector connected to an I2C channel of the hard disk backplane;

[0031] A comparison module, configured to read the pre-stored address information in the register of the hard disk backplane through the reading module, and compare the pre-stored address information with the cable in-place information;

[0032] The execution module is used to execute the power-on operation of starting the server hard disk when the comparison by the comparison module is consistent.

[0033] In a fourth aspect, the present invention further provides a hard disk lighting device, the device comprising:

[0034] A receiving module, used for receiving at least one interface information sent by polling at least one connector on the mainboard after the mainboard is powered on;

[0035] A determination module, configured to determine, according to the at least one interface information, a server currently connected to the mainboard among all the connectors as a target connector, and to determine a target hard disk currently connected to the CPLD;

[0036] The receiving module is also used to receive lighting information sent by the processor of the mainboard;

[0037] An execution module is used to execute a lighting operation on the target hard disk according to the lighting information and the target connector.

[0038] In a fifth aspect, the present invention provides a server hard disk startup system, the system comprising: a mainboard, a hard disk backplane and at least one hard disk; wherein the mainboard comprises: a controller, at least one first connector and a switching circuit, the hard disk backplane comprises: a CPLD, at least one second connector and at least one IO chip, the at least one first connector on the mainboard is connected to the at least one second connector on the hard disk backplane via I2C, and the hard disk backplane is also connected to the at least one hard disk;

[0039] The controller is used to execute the server hard disk startup method described in the first aspect or any implementation method of the first aspect; the CPLD is used to execute the hard disk lighting method described in the second aspect.

[0040] In a sixth aspect, the present invention further provides an electronic device, comprising a memory and a processor, the memory and the processor being connected; the memory stores computer instructions, the processor executes the server hard disk startup method described in the first aspect or any embodiment of the first aspect by executing the computer instructions; the CPLD is used to execute the hard disk lighting method described in the second aspect.

[0041] In addition, the present invention also provides a computer-readable storage medium, on which computer instructions are stored; the computer instructions are used to enable a computer to execute the server hard disk startup method described in the first aspect or any embodiment of the first aspect; the CPLD is used to execute the hard disk lighting method described in the second aspect.

[0042] The server hard disk startup method provided in this embodiment can achieve the purpose of BMC broadcasting PCIe interface information without changing the mainboard hardware circuit. The entire VPP address identification process does not require manual adjustment of the DIP switch or replacement of the custom cable, thereby improving the product yield and maintainability.

[0043] In addition, after the broadcast, the BMC reads the IO address on the IO chip from the CPLD again, compares it with the hard disk in place and other information, and allows the boot after confirmation, which increases the reliability of the solution. While sending the VPP address, the motherboard can also confirm which high-speed interface on the backplane each high-speed interface corresponds to, that is, while sending the VPP address, it confirms the interface correspondence between the motherboard and the backplane, enabling the motherboard BMC to identify each connector on the hard disk backplane. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0045] Figure 1 This is a structural diagram of a mainboard backplane connection of a server according to an embodiment of the present invention;

[0046] Figure 2 It is a flow chart of a method for starting a server hard disk according to an embodiment of the present invention;

[0047] Figure 3 is a flow chart of another method for starting a server hard disk according to an embodiment of the present invention;

[0048] Figure 4is a schematic diagram of a structure in which a server mainboard is connected to multiple backplanes according to an embodiment of the present invention;

[0049] Figure 5 is a flow chart of a hard disk lighting method according to an embodiment of the present invention;

[0050] Figure 6 is a structural block diagram of a hard disk boot device according to an embodiment of the present invention;

[0051] Figure 7 is a structural block diagram of a hard disk lighting device according to an embodiment of the present invention;

[0052] Figure 8 It is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0054] To facilitate understanding of the solution of the present application, the following describes a server hard disk startup system applicable to a server hard disk startup method provided by the present application. Figure 1 As shown, Figure 1 This is a structural diagram of a server hard disk boot system provided in the present application, which includes a CPU (Central Processing Unit) and a BMC (Baseboard Management Controller) (hereinafter referred to as "controller") arranged on the mainboard, and also includes a switching circuit, such as an I2C Switch. And a CPLD (Complex Programmable Logic Device) arranged on the hard disk backplane, the mainboard and the hard disk backplane are both provided with multiple connectors suitable for I2C (Inter-Integrated Circuit, integrated circuit bus), the connector on the mainboard corresponds to the CPU PCIe (PCI-express, high-speed serial computer expansion bus) port one by one, the PCIe port of the CPU on the mainboard is connected to the connector on the hard disk backplane through the connector on the mainboard, thereby establishing a communication link between the mainboard and the hard disk backplane, so that the BMC on the mainboard and the CPLD on the hard disk backplane can complete data interaction.

[0055] like Figure 1 As shown, two connectors are provided on the hard disk backplane, which are respectively connected to the two PCIe ports on the motherboard. Each connector on the hard disk backplane corresponds to two hard disks. The hard disk here can specifically be an NVMe (Non Volatile Memory express, non-volatile memory host controller interface specification) hard disk.

[0056] Currently, for the CPU on the motherboard, the bandwidth of each PCIe Port of the CPU is x16. When the hard disk backplane is connected to the motherboard, an x8 slimline cable is usually used. The virtual pin port VPP (Vritual Pin Port) addresses of the two cables are different, that is, the backplane needs to distinguish two VPP addresses for each PCIe Port. If the CPU has 4 PCIe ports, the backplane needs to distinguish 8 VPP addresses, and then needs to use 3-bit address signals to distinguish, such as 000, 001, 010, 011, 100, 101, 110, 111, that is, each x8 slimline cable has 3 VPP address signals for transmitting specific addresses.

[0057] The VPP address setting of each CPU is the same. Common servers are two-way or four-way, that is, the motherboard has two or four CPUs. Therefore, in order to distinguish different CPUs, a 1-bit (0,1) or 2-bit CPU address signal (00,01,10,11) is required. The integration of servers is getting higher and higher, and the number of PCIe resources integrated on the CPU is also increasing. A CPU even has 5 PCIe ports. For a 4-way server equipped with such a CPU, it is necessary to distinguish 10 VPP addresses and 4 CPU addresses, requiring 4 VPP address signals and two CPU address (address) signals (00,01,10,11), a total of 6 sideband signals.

[0058] In order to distinguish different CPUs and different PCIe ports of the same CPU, a 3-bit sideband signal is required (sideband signal is VPP address signal, a general term for low-speed signals), and the VPP address occupies the few sideband resources of the slimline cable. In addition, the CPLD of the hard disk backplane needs to connect each VPP address and CPU address to the GPIO (General Purpose Input / Output) of the CPLD, which will also occupy a large number of CPLD GPIO resources.

[0059] There are often multiple identical backplanes in the server. These identical backplanes are placed in different positions and connected to different CPUs or different PCIe ports, which require different dial information to be configured on different backplanes. However, since the backplanes are identical, this operation method requires manual adjustment of the dial information according to the backplane installation position during production line assembly, which can easily lead to dial errors and mis-dialing, affecting product yield.

[0060] And, similar to the DIP switch, by pulling up or down the VPP cable internally, the CPLD obtains the relevant pull-up or pull-down signals and corresponds to different connection modes. However, this method has the problem of using different cables for different configurations, which is easy to produce cable waste, and is prone to errors during assembly and difficult to maintain.

[0061] The current way of processing cable addresses, if there are a lot of cables involved, such as a backplane structure that supports 20 or 32 hard drives, due to the problem of address encoding, a large number of pins need to be reserved at the interface, and the motherboard BMC also needs a large number of GPIOs to read this information.

[0062] In order to solve the above technical problems, the embodiments of the present invention provide a method for starting up a server hard disk and a method for lighting up a hard disk. In the method for starting up a server hard disk, the motherboard management CPU or BMC uses the I2C channel inherent in the motherboard through I2C broadcasting to send different PCIePort information to the I2C links on all slimline or MCIO connectors before booting up. The CPLD of the backplane records the received information to confirm the connection relationship between the backplane and the motherboard PCIe port. It avoids the problem of a large amount of GPIO resources occupied by the traditional VPP address and CPU address methods and the problem of squeezing out cable sideband resources, avoids the problem of low yield and difficult maintenance caused by the dip switch, and avoids the problem of obsolete materials in the cable setting, as well as low yield and difficult maintenance.

[0063] At the same time, each I2C channel on the backplane is connected to an IO expansion chip. The IO expansion chip has an 8-bit IO (input and output) port and registers, which can provide a large amount of address space. The motherboard can use this IO expansion chip to determine which high-speed interface on the backplane the current cable is plugged into.

[0064] The technical solution of the embodiment of the present invention is described in detail below.

[0065] An embodiment of the present invention provides a method for starting a server hard disk. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0066] Figure 2 is a schematic diagram of a mainboard backplane connection structure of a server according to an embodiment of the present invention, which is applied to Figure 1 The server hard disk boot system shown in the figure. There is a present signal connected from the motherboard BMC to each slimline connector, so the motherboard CPLD has the broadcast capability without changing the line. The hard disk backplane also connects the present signal connected to the slimline connector to the backplane CPLD.

[0067] When the motherboard is powered on and the motherboard CPLD works normally, the Present on all slimlines is broadcasted, and each GPIO sends the VPP address of the corresponding slimline; the backplane CPLD receives the VPP address corresponding to the slimline. When the motherboard BMC completes the broadcast, the BMC reads the VPP address in the register of the backplane CPLD through the reserved I2C channel, compares it with the cable presence information obtained by the BMC, and allows the power on after confirmation; after power on, the CPU sends the lighting information through VPP, and the CPLD parses the information sent by the VPP bus to complete the lighting operation.

[0068] Specifically, the method can be applied to the BMC of the motherboard, and the boot method flow of the server hard disk includes:

[0069] Step S101: when the mainboard is powered on, each connector is switched on through polling by a switching circuit, and interface information is sent to the hard disk backplane through each switched-on connector.

[0070] Among them, at least one connector is a high-speed connector. One or more target connectors in at least one high-speed connector are connected to the hard disk backplane. In this embodiment, six high-speed connectors are provided on the mainboard, namely slimline connectors 1 to 6. The switching circuit I2C Switch is connected to the six high-speed connectors through I2C 1 to I2C 6, respectively, and each slimline connector can be polled to be turned on and off in turn. When a slimline connector is controlled to be turned on, PCIe interface information is sent to the hard disk backplane through the slimline connector.

[0071] For example, when the switching circuit controls slimline connector 1 to be turned on, slimline connector 1 is used to send interface information 1 to the CPLD of the hard disk backplane, and the interface information 1 is used to determine a unique VPP address, such as VPP address 1. Similarly, other slimline connectors also send corresponding interface information to the hard disk backplane when they are turned on.

[0072] Among them, the Slimline connector is a connector designed for high-speed data transmission, which is characterized by compact size and efficient data transmission capability. This connector is usually used to connect high-speed storage devices and other devices that require high-speed data transmission to meet the demand for higher bandwidth electronic data transmission in compact storage applications. In this embodiment, the server motherboard and the backplane are connected through the Slimline connector.

[0073] In the motherboard hardware design commonly used in servers, the BMC needs to read hard disk information and requires an I2C link to connect to the hard disk on the backplane. Therefore, in this embodiment, the motherboard circuit does not need to be changed to have the I2C broadcast capability.

[0074] Step S102: Attempt to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each of the connected connectors.

[0075] When the motherboard is powered on and the motherboard BMC works normally, the I2C on all slimlines is broadcasted, and each I2C sends the VPP address of the corresponding slimline to the backplane CPLD. The VPP address is used to determine which slimline connector among the current slimline connectors 1 to 6 is connected to the two connectors on the backplane. In addition, the backplane CPLD also determines which slimline connectors of the motherboard are connected to it.

[0076] See also Figure 1 An IO chip is connected between each slimline connector of the backplane and the backplane CPLD. The IO chip is provided with an IO address. There is a preset corresponding relationship between the IO address and the connected slimline connector. For example, there is a first corresponding relationship between the slimline connector 11 on the backplane and the IO address 1 (such as 0x01) of the IO chip, and there is a second corresponding relationship between the slimline connector 12 and the IO address 2 (such as 0x00) of another IO chip.

[0077] Optionally, the chip number of the IO chip is 9554, and the 9554 chip records an IO address, such as 0x01, 0x00.

[0078] Step S103: determining a target connector in at least one connector polled according to the IO address on the hard disk backplane that is successfully read, wherein the target connector is a connector connected to the I2C channel of the hard disk backplane.

[0079] When polling each slimline connector, the BMC attempts to read the IO address on the hard disk backplane IO chip through the currently connected slimline connector. For example, when slimline connector 1 is turned on, IO address 2 (0x00) connected to slimline connector 12 can be successfully read. When slimline connector 2 is turned on, no IO address is read. When slimline connector 4 is turned on, IO address 1 (such as 0x01) connected to slimline connector 11 can be successfully read. When the other slimline connectors are turned on, no IO address can be read. Based on the read IO address and the preset correspondence, the BMC determines that the target connector is slimline connector 1 and slimline connector 4 connected to the hard disk backplane I2C.

[0080] Step S104: Read the pre-stored address information in the register of the hard disk backplane, and compare the pre-stored address information with the cable presence information.

[0081] Step S105: If the comparison is consistent, the server hard disk is started.

[0082] In a possible implementation, step S103 specifically includes: obtaining the correspondence between the IO address of the IO chip on each hard disk backplane and a connector identifier on the hard disk backplane; and determining the connector identifier corresponding to the IO address as the target connector based on the successfully read IO address and the correspondence.

[0083] In the above step S103, the method further includes: if the currently turned-on connector fails in attempting to read the IO address on the hard disk backplane, determining that the currently turned-on connector is not connected to the hard disk backplane.

[0084] like Figure 3 As shown, the port information corresponds to the virtual pin port VPP address, which is an independent address assigned by the BMC to the connectors corresponding to each interface on the main board through I2C. The above step S101 sends the port information to the hard disk backplane through each connected connector, specifically including:

[0085] Step S1011: when the mainboard is powered on, each connector is switched on through polling by the switching circuit, and the corresponding VPP address is sent to the hard disk backplane through each turned-on connector.

[0086] Steps S102 to S103 refer to the description of the above embodiment and will not be repeated here.

[0087] The above step S104, comparing the pre-stored address information with the cable presence information, specifically includes:

[0088] Step S1041: Compare the VPP address with the pre-stored VPP address in the pre-stored address information to see if they are the same;

[0089] If they are the same, it is determined that the comparison is consistent, and step S105 is executed. If they are not the same, it is determined that the comparison is inconsistent, and the power-on operation is not executed.

[0090] After the BMC completes the broadcast, the BMC reads the VPP address (such as the hard disk number) in the register of the backplane CPLD through the reserved I2C channel, and compares it with the cable presence information (VPP address) obtained by the BMC. After confirming that the comparison is consistent, the hard disk power-on operation is allowed. A trigger signal is sent to the CPLD. After receiving the trigger signal, the CPLD performs the power-on operation to start the CPU and memory so that the CPU can send the lighting information through the VPP bus. The CPLD parses the lighting information and completes the lighting operation. In this embodiment, after the BMC broadcasts, the relevant information is read again from the CPLD, compared with the cable presence information, and the power-on operation is allowed after confirmation, which improves the reliability and security of the system operation.

[0091] If the comparison is inconsistent, the hard disk power-on operation is not allowed.

[0092] like Figure 1 As shown, the mainboard also includes a processor (CPU), and the processor CPU is connected to the controller BMC; step S105: after starting the server hard disk boot operation, it also includes:

[0093] Step S106: the BMC controls the processor to send lighting information to the hard disk backplane, and the lighting information is used by the hard disk backplane to complete the lighting operation of the hard disk that is started.

[0094] Furthermore, after booting, the CPU sends lighting information to the backplane CPLD via the VPP bus. After receiving the lighting information, the CPLD analyzes the lighting information sent by the VPP bus and completes the lighting operation of the hard disk.

[0095] In addition, there may be multiple backplanes in the same server, such as Figure 4 As shown, when backplane 1 and backplane 2 receive their respective VPP address information, the IO addresses of the IO chips on each link of different backplanes are different, so that the mainboard can confirm which IO port of which backplane the cable of the corresponding interface of the current mainboard is specifically plugged into.

[0096] Specifically, after determining the target connector in at least one connector polled, the method further includes: if the number of hard disk backplanes is two or more, determining the existence of two or more target connectors and the hard disk backplanes to which each of the target connectors is connected according to the polling. Figure 2 or Figure 3 The method steps of the embodiment will not be repeated here.

[0097] After polling and identification, the six slimline connectors of the mainboard are determined. Slimline connector 1 reads the IO address on IO chip 1 of backplane 1, and then determines that slimline connector 1 is connected to slimline connector 11 on backplane 1; similarly, slimline connector 3 reads the IO address on IO chip 3 of backplane 2, and then determines that slimline connector 3 is connected to slimline connector 13 on backplane 2; slimline connector 4 reads the IO address on IO chip 2 of backplane 1, and then determines that slimline connector 4 is connected to slimline connector 12 on backplane 1; slimline connector 5 reads the IO address on IO chip 4 of backplane 2, and then determines that slimline connector 5 is connected to slimline connector 14 on backplane 2. Since slimline connector 2 and slimline connector 6 did not successfully read the IO address, they are not connected to any connector on the hard disk backplane.

[0098] The server hard disk startup method provided in this embodiment can achieve the purpose of BMC broadcasting PCIe interface information without changing the mainboard hardware circuit. The entire VPP address identification process does not require manual adjustment of the DIP switch or replacement of the custom cable, thereby improving the product yield and maintainability.

[0099] In addition, after the broadcast, the BMC reads the IO address on the IO chip from the CPLD again, compares it with the hard disk in place and other information, and allows the boot after confirmation, which increases the reliability of the solution. While sending the VPP address, the motherboard can also confirm which high-speed interface on the backplane each high-speed interface corresponds to, that is, while sending the VPP address, it confirms the interface correspondence between the motherboard and the backplane, enabling the motherboard BMC to identify each connector on the hard disk backplane.

[0100] In another embodiment of the invention, the present application also provides a hard disk lighting method, which is applied to a CPLD on a hard disk backplane, wherein the hard disk backplane further comprises at least one connector and at least one IO chip, and its circuit structure can be seen in Figure 1 or Figure 4 Further, see Figure 5 The hard disk lighting method provided in this embodiment includes the following steps:

[0101] Step S201: After receiving the power-on of the mainboard, at least one interface information sent by at least one connector on the mainboard is polled.

[0102] Step S202: determining a server currently connected to the mainboard among all connectors according to at least one interface information as a target connector, and determining a target hard disk currently connected to the CPLD.

[0103] For example, the VPP address allocation rules are agreed upon between the motherboard BMC and the hard disk backplane CPLD. For example, the VPP addresses assigned to slimline connectors 1 to 6 on the motherboard BMC are 000, 001, 010, 011, 100, and 101, respectively, and are assigned in sequence. The receiving-end CPLD determines which motherboard connector slimline connector 11 and slimline connector 12 are connected to based on the received broadcast VPP address. For example, if the broadcast VPP address received by slimline connector 11 is 011, then according to the VPP address allocation rules, it can be determined that it is sent by slimline connector 4 of the motherboard, and then it is determined that slimline connector 11 is connected to slimline connector 4 of the motherboard. Similarly, the broadcast VPP address received by slimline connector 12 is 000, and then it is determined that slimline connector 12 is connected to slimline connector 1 of the motherboard.

[0104] Step S203: receiving lighting information sent by the processor of the mainboard.

[0105] In one implementation, the processor CPU sends the lighting information to the CPLD via the VPP bus, and the backplane CPLD receives the lighting information sent by the CPU via the VPP bus.

[0106] Step S204: performing a lighting operation on the target hard disk according to the lighting information and the target connector.

[0107] Further, when at least one interface information sent by at least one connector on the mainboard is a VPP address corresponding to each interface, determining the server currently connected to the mainboard in all the connectors according to the at least one interface information includes:

[0108] According to the VPP address corresponding to each interface and the independent VPP address rule assigned by the controller (BMC) on the mainboard to each connector on the mainboard, the server currently connected to the mainboard is determined.

[0109] Specifically, when the mainboard is powered on and the BMC is working normally, the BMC allocates independent VPP addresses to the connectors corresponding to each PCIe port on the mainboard through I2C. As a preferred embodiment, the broadcast / polling method can be selected to allocate in sequence, that is, after the BMC starts working, an independent VPP address is allocated to each connector in sequence. For example, the first connector can be first assigned a VPP address of 001, and then the second connector can be assigned a VPP address of 002, and so on, until the VPP address is allocated to the last connector. Since the CPLD does not know which PCIE port on the mainboard the hard disk backplane is connected to at first, and in the process of BMC allocating VPP addresses in sequence, the CPLD can obtain the VPP address of the PCIE port connected to it through the I2C line connected to the mainboard, thereby determining the target port.

[0110] It is understandable that BMC broadcasts the VPP address before the system is powered on, which can avoid misoperation of PCIe devices after the system is powered on. The motherboard hardware circuit does not need to be changed, and the existing circuit can be used to achieve the purpose of BMC broadcast. The CPLD on the hard disk backplane also obtains the VPP address through I2C, avoiding the occupation of a large number of GPIO resources and squeezing out the cable sideband resources.

[0111] The method provided in this embodiment does not change the hardware link of the motherboard. Through the motherboard BMC broadcast, different PCIe Port information is sent to the present signal link on all slimline or MCIO (Modular Connector Input Output) connectors before booting. The CPLD of the backplane records the received information and confirms the connection relationship between the backplane and the motherboard PCIe Port. Each I2C channel of the motherboard corresponds to a high-speed slimline or MCIO interface. Through the IO address of the IO chip on the backplane, the PCIe Port connection relationship between the motherboard and the backplane is confirmed at the same time, thereby realizing two-way confirmation of the connection between the motherboard and the backplane interface, rather than simply motherboard broadcasting and the backplane identifying the VPP address.

[0112] In this method, since the motherboard is very clear about which interface of which backplane each of its high-speed interfaces is connected to, the motherboard can directly send instructions to the corresponding hard disk to perform operations, which provides a very convenient path for lighting up the hard disk to identify the hard disk and for capturing the debug information of the corresponding hard disk.

[0113] In this embodiment, a server hard disk startup device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0114] This embodiment provides a server hard disk startup device, which is used to implement part or all of the functions of the motherboard BMC in the above-mentioned embodiment, such as Figure 6 As shown, the starting device includes: a sending module 610, a reading module 620, a determining module 630, a comparing module 640 and an executing module 650. In addition, the device may also include other more or fewer modules, such as a storage module, etc., which is not limited in this embodiment.

[0115] The sending module 610 is used to switch each connector to conduction through the switching circuit polling after the mainboard is powered on, and send interface information to the hard disk backplane through each conducted connector.

[0116] The reading module 620 is used to try to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each conductive connector.

[0117] The determination module 630 is used to determine a target connector in at least one polled connector according to the IO address on the hard disk backplane that is successfully read, and the target connector is a connector connected to the I2C channel of the hard disk backplane.

[0118] The comparison module 640 is used to read the pre-stored address information in the register of the hard disk backplane through the reading module 620, and compare the pre-stored address information with the cable presence information.

[0119] The execution module 650 is used to execute the power-on operation of starting the server hard disk when the comparison module 640 shows a consistent result.

[0120] In addition, in another embodiment, the present invention also provides a hard disk lighting device, which is used to implement part or all of the functions of the backplane PCLD in the above embodiment, such as Figure 7 As shown, the hard disk lighting device includes:

[0121] The receiving module 710 is used to receive at least one interface information sent by polling at least one connector on the mainboard after the mainboard is powered on.

[0122] The determination module 720 is used to determine the server currently connected to the mainboard among all the connectors according to at least one interface information as the target connector, and to determine the target hard disk currently connected to the CPLD.

[0123] The receiving module 710 is also used to receive lighting information sent by the processor of the mainboard.

[0124] The execution module 730 is used to execute a lighting operation on the target hard disk according to the lighting information and the target connector.

[0125] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0126] The server hard disk startup device and hard disk lighting device in this embodiment are presented in the form of functional units, where the units refer to ASIC (Application Specific Integrated Circuit) circuits, processors and memories that execute one or more software or fixed programs, and / or other devices that can provide the above functions.

[0127] The device provided by the embodiment of the present invention does not change the hardware link of the motherboard. Through the motherboard BMC broadcast, different PCIe Port information is sent to the Present signal link on all slimline or MCIO connectors before booting. The CPLD of the backplane records the received information and confirms the connection relationship between the backplane and the motherboard PCIe Port. Each I2C of the motherboard corresponds to a high-speed slimline or MCIO interface. Through the IO address of the IO chip on the backplane, the PCIe Port connection relationship between the motherboard and the backplane is confirmed at the same time. Thus, two-way confirmation of the connection between the motherboard and the backplane interface is achieved, rather than a simple motherboard broadcast and the backplane identifying the VPP address. Through this embodiment, since the motherboard is very clear about which interface of which backplane each of its high-speed interfaces is connected to, the motherboard can directly send instructions to the corresponding hard disk for operation, which provides a very convenient path for lighting up the hard disk to identify the hard disk and for capturing the debug information of the corresponding hard disk.

[0128] The embodiment of the present invention also provides a server hard disk startup system, the system comprises: a mainboard, a hard disk backplane and at least one hard disk, the structure of the system can be seen in the above Figure 1 or Figure 4 shown.

[0129] The main board includes: a controller BMC, at least one first connector and a switching circuit (I2C Switch); the hard disk backplane includes: a CPLD, at least one second connector and at least one IO chip; at least one first connector on the main board is connected to at least one second connector on the hard disk backplane via I2C; and the hard disk backplane is also connected to at least one hard disk. Figure 1In the embodiment, the mainboard includes six first connectors, namely slimline connector 1 to slimline connector 6. The backplane includes two second connectors, namely slimline connector 11 and slimline connector 12. It should be understood that the mainboard and the backplane may include more or fewer connectors, and this embodiment does not limit this.

[0130] The controller BMC is used to execute the above Figure 2 or Figure 3 The server hard disk startup method shown in the figure, CPLD is used to execute the above Figure 5 The hard disk light method shown.

[0131] The embodiment of the present invention also provides an electronic device having the above Figure 6 The hard disk boot device shown, or Figure 7 The hard disk lighting device shown.

[0132] See also Figure 8 , is a schematic diagram of the structure of an electronic device provided by an optional embodiment of the present invention, the electronic device includes: one or more processors 10, a memory 20 and at least one communication interface 30, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other by different buses for communication, and can be installed on a common mainboard or in other ways as needed. The processor can process instructions executed in the electronic device, including instructions stored in or on the memory to display graphic information of the GUI on an external input / output device (such as a display device coupled to the interface).

[0133] In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple electronic devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 8 A processor 10 is taken as an example.

[0134] The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0135] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the server hard disk startup method and hard disk lighting method shown in the above embodiment.

[0136] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0137] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0138] The electronic device also includes an input and output device. The processor 10, the memory 20, and the input and output device can be connected via a bus or other means. Further, the input device can receive input digital or character information, and generate key signal input related to the user settings and function control of the electronic device, such as a touch screen, a keypad, a mouse, a trackpad, a touchpad, an indicator rod, one or more mouse buttons, a trackball, a joystick, etc. The output device may include a display device, an auxiliary lighting device, and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display, and a plasma display.

[0139] At least one communication interface 30 is used for the electronic device to communicate with other devices or a communication network, such as for connecting a processor CPU and a switching circuit.

[0140] Optionally, in this embodiment, the electronic device may be a BMC controller or a CPLD.

[0141] An embodiment of the present invention also provides a computer-readable storage medium, and the above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented by downloading through a network and originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware.

[0142] The storage medium may be a disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid state drive, etc.; further, the storage medium may also include a combination of the above-mentioned types of memories. It is understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the server hard disk startup method and the hard disk lighting method shown in the above embodiment are implemented.

[0143] Embodiments of the present application may also provide a computer program product, including computer program instructions, which, when executed by a processor, cause the processor to perform the steps in the above method. Wherein, the computer program product may be written in any combination of one or more programming languages ​​to perform program codes for performing the operations of the disclosed embodiments, wherein the programming languages ​​include object-oriented programming languages, such as Java, C++, etc., and also include conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on a user computing device, partially on a user device, as an independent software package, partially on a user computing device, partially on a remote computing device, or entirely on a remote computing device or server.

[0144] The above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, rather than to limit them. Although the embodiments of the present invention are described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for starting a server hard disk, characterized in that: A controller applied to a mainboard, the mainboard further comprising at least one connector and a switching circuit, the method comprising: When the mainboard is powered on, each connector is switched on through polling by the switching circuit, and interface information is sent to the hard disk backplane through each connected connector; Attempt to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each of the connected connectors; Determine a target connector in at least one connector polled according to the IO address on the hard disk backplane that is successfully read, wherein the target connector is a connector connected to an I2C channel of the hard disk backplane; Reading pre-stored address information in a register of the hard disk backplane, and comparing the pre-stored address information with the cable presence information; If the comparison is consistent, the server hard disk boot operation is started; The step of determining a target connector from at least one connector being polled according to the successfully read IO address on the hard disk backplane includes: Obtaining the correspondence between the IO address of the IO chip on each hard disk backplane and a connector identifier on the hard disk backplane; According to the successfully read IO address and the corresponding relationship, a connector identifier corresponding to the IO address is determined as the target connector.

2. The method according to claim 1, characterized in that: The method further comprises: If the currently turned-on connector fails in attempting to read the IO address on the hard disk backplane, it is determined that the currently turned-on connector is not connected to the hard disk backplane.

3. The method according to any one of claims 1 to 2, characterized in that: The interface information corresponds to a virtual pin port VPP address, and the VPP address is an independent address allocated by the controller to a connector corresponding to each interface on the main board through I2C; The sending of interface information to the hard disk backplane through each conductive connector includes: The corresponding VPP address is sent to the hard disk backplane through each conductive connector.

4. The method according to claim 3, characterized in that The comparing the pre-stored address information with the cable presence information includes: comparing the VPP address with the pre-stored VPP address in the pre-stored address information to see whether they are the same; If they are the same, the comparison is determined to be consistent; if they are not the same, the comparison is determined to be inconsistent.

5. The method according to claim 1, characterized in that The at least one connector is a high-speed connector; One or more target connectors in the at least one high-speed connector are connected to the hard disk backplane.

6. The method according to any one of claims 1-2, characterized in that: The mainboard further includes a processor, and the processor is connected to the controller; After the boot operation of the server hard disk is started, the method further includes: The processor is controlled to send lighting information to the hard disk backplane, and the lighting information is used by the hard disk backplane to complete the lighting operation of the hard disk that is started.

7. The method according to any one of claims 1-2, characterized in that: After determining the target connector in at least one connector polled, the method further includes: If the number of hard disk backplanes is two or more, it is determined according to polling that there are two or more target connectors and the hard disk backplanes to which each of the target connectors is connected.

8. A method for lighting a hard disk, characterized in that: A CPLD applied to a hard disk backplane, wherein the hard disk backplane further comprises at least one connector and at least one IO chip, and the method comprises: After the receiving mainboard is powered on, polling at least one interface information sent by at least one connector on the mainboard; Determine, according to the at least one interface information, a server currently connected to the mainboard among all the connectors as a target connector, and determine a target hard disk currently connected to the CPLD; Receive lighting information sent by the processor of the mainboard; A lighting operation is performed on the target hard disk according to the lighting information and the target connector.

9. The method according to claim 8, characterized in that When at least one interface information sent by at least one connector on the mainboard is a virtual pin port VPP address corresponding to each interface, determining the server currently connected to the mainboard in all the connectors according to the at least one interface information includes: The server currently connected to the mainboard is determined according to the VPP address corresponding to each interface and the independent VPP address rule assigned by the controller on the mainboard to each connector on the mainboard.

10. A server hard disk startup device, characterized in that: The device comprises: The sending module is used to switch each connector to conduction through the switching circuit polling after the mainboard is powered on, and send interface information to the hard disk backplane through each conducting connector; A reading module, used for attempting to read the IO address on the IO chip of the corresponding interface on the hard disk backplane through each of the connected connectors; A determination module, configured to determine a target connector in at least one connector polled according to the IO address on the hard disk backplane that is successfully read, wherein the target connector is a connector connected to an I2C channel of the hard disk backplane; A comparison module, configured to read the pre-stored address information in the register of the hard disk backplane through the reading module, and compare the pre-stored address information with the cable presence information; An execution module, used for executing a power-on operation of starting the server hard disk when the comparison result of the comparison module is consistent; Among them, the determination module is specifically used to obtain the correspondence between the IO address of the IO chip on each hard disk backplane and a connector identifier on the hard disk backplane; based on the successfully read IO address and the correspondence, determine the connector identifier corresponding to the IO address as the target connector.

11. A hard disk lighting device, characterized in that: The device comprises: A receiving module, used for receiving at least one interface information sent by polling at least one connector on the mainboard after the mainboard is powered on; A determination module, configured to determine, according to the at least one interface information, a server currently connected to the mainboard among all the connectors as a target connector, and to determine a target hard disk currently connected to the CPLD; The receiving module is also used to receive lighting information sent by the processor of the mainboard; An execution module is used to execute a lighting operation on the target hard disk according to the lighting information and the target connector.

12. A server hard disk startup system, characterized in that: The system comprises: a mainboard, a hard disk backplane and at least one hard disk; wherein the mainboard comprises: a controller, at least one first connector and a switching circuit, the hard disk backplane comprises: a CPLD, at least one second connector and at least one IO chip, the at least one first connector on the mainboard is connected to the at least one second connector on the hard disk backplane via I2C, and the hard disk backplane is also connected to the at least one hard disk; The controller is used to execute the method for starting the server hard disk according to any one of claims 1 to 7; The CPLD is used to execute the hard disk lighting method according to any one of claims 8 to 9.

13. An electronic device, characterized in that: comprising a memory and a processor, wherein the memory and the processor are connected; The memory stores computer instructions, and the processor executes the server hard disk startup method described in any one of claims 1 to 7, or executes the hard disk lighting method described in any one of claims 8 to 9 by executing the computer instructions.

14. A computer-readable storage medium, characterized in that: The computer readable storage medium has computer instructions stored thereon; The computer instructions are used to enable a computer to execute the method for starting a server hard disk as claimed in any one of claims 1 to 7, or to execute the method for lighting a hard disk as claimed in any one of claims 8 to 9.

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