Quantum error correction code construction method and device, computer device and storage medium

By constructing stable subcodes through periodic measurements of three types of detection operators, the problem of low noise tolerance threshold of quantum error-correcting codes is solved, the fault tolerance rate is improved, and its application in Majorana zero-mode topological superconducting wire systems is realized.

CN118690866BActive Publication Date: 2025-11-25SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202410902960.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-05
Publication Date
2025-11-25
Estimated Expiration
2044-07-05

AI Technical Summary

Technical Problem

Existing quantum error-correcting codes have low noise tolerance thresholds and cannot be effectively applied in topological superconducting systems with Majorana zero modes, resulting in high error rates.

Method used

A stable subcode is constructed by periodically measuring three types of detection operators. Each auxiliary qubit is coupled to only two data qubits, and the noise resistance property of Majorana zero mode is used to improve the fault tolerance.

Benefits of technology

The noise tolerance threshold of the quantum error-correcting code has been improved, avoiding the high error rate problem caused by the coupling of auxiliary qubits with multiple data qubits, and realizing its effective application in Majorana zero-mode topological superconducting wire systems.

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Abstract

The present disclosure relates to the technical field of computers, and discloses a quantum error correction code construction method and device, computer equipment and a storage medium. The method comprises: in the first round, the second round and the third round, measuring a plurality of first type detection operators, measuring a plurality of second type detection operators and measuring a plurality of third type detection operators; in the tth round, measuring a plurality of first type detection operators, taking each second type surface operator as a tth round stabilizer operator, and determining a tth round measurement result of the plurality of second type surface operators; in the t+1th round, measuring a plurality of second type detection operators, taking each third type surface operator as a t+1th round stabilizer operator, and determining a t+1th round measurement result of the plurality of third type surface operators; and in the t+2th round, measuring a plurality of third type detection operators, taking each first type surface operator as a t+2th round stabilizer operator, and determining a t+2th round measurement result of the plurality of first type surface operators.
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Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, in particular, to a quantum error-correcting code construction method and device, computer equipment and storage medium. BACKGROUND

[0002] Quantum computing is a new computing paradigm that utilizes quantum coherence, quantum entanglement and other characteristics. The basic unit of quantum information used in quantum computing is a quantum bit. In reality, quantum bits are very fragile. The presence of external environments (e.g., temperature, electromagnetic field, cosmic rays, etc.) can destroy the quantum properties of quantum bits, which may cause changes in the state of quantum bits, i.e., quantum errors. There are two types of errors in quantum computing: bit flips and phase flips. Bit flip refers to the flipping of a quantum bit from 0 to 1 or from 1 to 0; phase flip involves changes in the phase of the superposition state of a quantum bit. In actual quantum systems, more complex errors may occur, such as combinations of bit flips and phase flips, as well as amplitude attenuation. Quantum error correction is used to identify and correct these errors. The core of quantum error correction is to protect quantum information from errors by adding redundant information. Quantum error-correcting codes are widely used quantum error correction techniques for protecting quantum information. Quantum error-correcting codes encode logical quantum bits into multiple physical quantum bits, so that the integrity of the information can be maintained even when a certain number of errors occur. The stabilizer code is a widely used category of quantum error-correcting codes. In the stabilizer code, each stabilizer operator corresponds to a specific error detection operation. If a certain error changes the quantum state, the change will be detected by the error detection operation corresponding to the stabilizer operator, so that the error can be corrected by a specific quantum operation.

[0003] In related technologies, the stabilizer operator in the stabilizer code is composed of the direct product of four Pauli operators, and the ancillary quantum bits need to be coupled with four data quantum bits. In actual quantum circuits, quantum gates will contain noise, and the larger the number of coupled quantum bits, the higher the error rate. A higher error rate will result in a lower noise tolerance threshold of the quantum error-correcting code. How to improve the noise tolerance threshold of the quantum error-correcting code becomes a problem to be solved. SUMMARY

[0004] Therefore, the present disclosure provides a quantum error-correcting code construction method and device, computer equipment and storage medium.

[0005] In a first aspect, the present disclosure provides a quantum error-correcting code construction method, which comprises:

[0006] In the first round, a plurality of first type detection operators are measured to obtain first round measurement results of the plurality of first type detection operators, wherein the first round measurement result of the first type detection operator is a product of first round measurement results of two first operators corresponding to the first type detection operator;

[0007] In the second round, a plurality of second type detection operators are measured to obtain second round measurement results of the plurality of second type detection operators, wherein the second round measurement result of the second type detection operator is a product of first round measurement results of two second operators corresponding to the second type detection operator;

[0008] In the third round, a plurality of third type detection operators are measured to obtain third round measurement results of the plurality of third type detection operators, wherein the third round measurement result of the third type detection operator is a product of third round measurement results of two third operators corresponding to the third type detection operator;

[0009] In the tth round, a plurality of first type detection operators are measured to obtain tth round measurement results of the plurality of first type detection operators, and each second type surface operator is taken as a tth round stabilizer operator, and tth round measurement results of a plurality of second type surface operators are determined, t is a positive integer greater than 3, and t-1 is a multiple of 3;

[0010] In the t+1th round, a plurality of second type detection operators are measured to obtain t+1th round measurement results of the plurality of second type detection operators, and each third type surface operator is taken as a t+1th round stabilizer operator, and t+1th round measurement results of a plurality of third type surface operators are determined;

[0011] In the t+2th round, a plurality of third type detection operators are measured to obtain t+2th round measurement results of the plurality of third type detection operators, and each first type surface operator is taken as a t+2th round stabilizer operator, and t+2th round measurement results of a plurality of first type surface operators are determined.

[0012] In a possible implementation, the two first operators corresponding to the first type detection operator are two X-type operators corresponding to the first type detection operator, the first type detection operator corresponds to a first type edge, and two data quantum bits at vertices connected by the first type edge corresponding to the first type detection operator are connected by the first type edge corresponding to the first type detection operator. Each X-type operator of the two X-type operators corresponding to the first type detection operator acts on a different data quantum bit corresponding to the first type edge corresponding to the first type detection operator.

[0013] In a possible implementation, the two second operators corresponding to the second type of detection operator are two Y-type operators corresponding to the second type of detection operator, the second type of edge corresponding to the second type of detection operator connects vertices where two data quantum bits corresponding to the second type of edge are located, and each of the two Y-type operators corresponding to the second type of detection operator acts on a different data quantum bit corresponding to the second type of edge corresponding to the second type of detection operator.

[0014] In a possible implementation, the two third operators corresponding to the third type of detection operator are two Z-type operators corresponding to the third type of detection operator, the third type of edge corresponding to the third type of detection operator connects vertices where two data quantum bits corresponding to the third type of edge are located, and each of the two Z-type operators corresponding to the third type of detection operator acts on a different data quantum bit corresponding to the third type of edge corresponding to the third type of detection operator.

[0015] In a possible implementation, determining the tth round of measurement results of the plurality of second type of surface operators includes:

[0016] A product of the (t-1)th round of measurement results of each third type of detection operator on a second type of surface to which the second type of surface operator belongs and the tth round of measurement results of each first type of detection operator on the second type of surface is determined as the tth round of measurement results of the second type of surface operator.

[0017] In a possible implementation, determining the (t+1)th round of measurement results of the plurality of third type of surface operators includes:

[0018] A product of the tth round of measurement results of each first type of detection operator on a third type of surface to which the third type of surface operator belongs and the (t+1)th round of measurement results of each second type of detection operator on the third type of surface to which the third type of surface operator belongs is determined as the (t+1)th round of measurement results of the third type of surface operator.

[0019] In a possible implementation, determining the (t+2)th round of measurement results of the plurality of first type of surface operators includes:

[0020] A product of the (t+1)th round of measurement results of each second type of detection operator on a first type of surface to which the first type of surface operator belongs and the (t+2)th round of measurement results of each third type of detection operator on the first type of surface to which the first type of surface operator belongs is determined as the (t+2)th round of measurement results of the first type of surface operator.

[0021] In a possible implementation, the method further includes:

[0022] In the tth round, each of the plurality of first type detection operators is taken as a tth round stabilizer operator.

[0023] In one possible implementation, further comprising:

[0024] In the t+1th round, each of the plurality of second type detection operators is taken as a t+1th round stabilizer operator.

[0025] In one possible implementation, further comprising:

[0026] In the t+2th round, each of the plurality of third type detection operators is taken as a t+2th round stabilizer operator.

[0027] In one possible implementation, further comprising:

[0028] According to the corresponding round measurement result of each detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, a corresponding round measurement result of a logical Z operator is determined, the target topology non-trivial loop comprising a plurality of edges, the detection operator on the target topology non-trivial loop being a detection operator corresponding to an edge of the target topology non-trivial loop.

[0029] In one possible implementation, the target topology non-trivial loop is a horizontal direction topology non-trivial loop.

[0030] In one possible implementation, the target topology non-trivial loop is a vertical direction topology non-trivial loop.

[0031] In one possible implementation, determining the corresponding round measurement result of the logical Z operator according to the corresponding round measurement result of each detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure comprises: determining the mth round measurement result of the mth round logical Z operator according to the mth round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, the (m-1)th round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, and the (m-2)th round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure.

[0032] In one possible implementation, further comprising:

[0033] Determining an mth round logical X operator, wherein the mth round logical X operator commutes with each mth round stabilizer operator, and the mth round logical X operator anti-commutes with the mth round logical Z operator.

[0034] In a possible implementation, the first type of face includes 6 edges, the first type of face includes 3 edge combinations, two edges in the edge combination of the first type of face are parallel, the second type of face includes 6 edges, the second type of face includes 3 edge combinations, two edges in the edge combination of the second type of face are parallel, and the third type of face includes 6 edges, the third type of face includes 3 edge combinations, two edges in the edge combination of the third type of face are parallel.

[0035] In a second aspect, the embodiments of the present disclosure provide a quantum error correction code construction device, which comprises:

[0036] A first measurement unit is configured to measure a plurality of first type of detection operators in the first round to obtain first round measurement results of the plurality of first type of detection operators, wherein the first round measurement result of the first type of detection operator is a product of the first round measurement results of two first operators corresponding to the first type of detection operator;

[0037] A second measurement unit is configured to measure a plurality of second type of detection operators in the second round to obtain second round measurement results of the plurality of second type of detection operators, wherein the second round measurement result of the second type of detection operator is a product of the first round measurement results of two second operators corresponding to the second type of detection operator;

[0038] A third measurement unit is configured to measure a plurality of third type of detection operators in the third round to obtain third round measurement results of the plurality of third type of detection operators, wherein the third round measurement result of the third type of detection operator is a product of the third round measurement results of two third operators corresponding to the third type of detection operator;

[0039] A fourth measurement unit is configured to measure a plurality of first type of detection operators in the tth round to obtain tth round measurement results of the plurality of first type of detection operators, and take each second type of face operator as a tth round stabilizer operator respectively, and determine tth round measurement results of the plurality of second type of face operators, t is a positive integer greater than 3, and t-1 is a multiple of 3;

[0040] A fifth measurement unit is configured to measure a plurality of second type of detection operators in the t+1th round to obtain t+1th round measurement results of the plurality of second type of detection operators, and take each third type of face operator as a t+1th round stabilizer operator respectively, and determine t+1th round measurement results of the plurality of third type of face operators;

[0041] A sixth measurement unit is configured to measure a plurality of third type of detection operators in the t+2th round to obtain t+2th round measurement results of the plurality of third type of detection operators, and take each first type of face operator as a t+2th round stabilizer operator respectively, and determine t+2th round measurement results of the plurality of first type of face operators.

[0042] In a possible implementation, the two first operators corresponding to the first type of detection operator are two X-type operators corresponding to the first type of detection operator, the first type of edge corresponding to the first type of detection operator connects vertices where two data quantum bits corresponding to the first type of edge are located, and each of the two X-type operators corresponding to the first type of detection operator acts on a different data quantum bit corresponding to the first type of edge corresponding to the first type of detection operator.

[0043] In a possible implementation, the two second operators corresponding to the second type of detection operator are two Y-type operators corresponding to the second type of detection operator, the second type of edge corresponding to the second type of detection operator connects vertices where two data quantum bits corresponding to the second type of edge are located, and each of the two Y-type operators corresponding to the second type of detection operator acts on a different data quantum bit corresponding to the second type of edge corresponding to the second type of detection operator.

[0044] In a possible implementation, the two third operators corresponding to the third type of detection operator are two Z-type operators corresponding to the third type of detection operator, the third type of edge corresponding to the third type of detection operator connects vertices where two data quantum bits corresponding to the third type of edge are located, and each of the two Z-type operators corresponding to the third type of detection operator acts on a different data quantum bit corresponding to the third type of edge corresponding to the third type of detection operator.

[0045] In a possible implementation, the fourth measurement unit is further configured to determine, as a tth round of measurement result of the second type of surface operator, a product of a (t-1)th round of measurement result of each third type of detection operator on a second type of surface to which the second type of surface operator belongs and a tth round of measurement result of each first type of detection operator on the second type of surface.

[0046] In a possible implementation, the fifth measurement unit is further configured to determine, as a (t+1)th round of measurement result of the third type of surface operator, a product of a tth round of measurement result of each first type of detection operator on a third type of surface to which the third type of surface operator belongs and a (t+1)th round of measurement result of each second type of detection operator on the third type of surface to which the third type of surface operator belongs.

[0047] In a possible implementation, the sixth measurement unit is further configured to determine, as a (t+2)th round of measurement result of the first type of surface operator, a product of a (t+1)th round of measurement result of each second type of detection operator on a first type of surface to which the first type of surface operator belongs and a (t+2)th round of measurement result of each third type of detection operator on the first type of surface to which the first type of surface operator belongs.

[0048] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0049] The first determining unit is configured to take each of the plurality of first type detection operators as a t-th round stabilizer operator in the t-th round.

[0050] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0051] The second determining unit is configured to take each of the plurality of second type detection operators as a (t+1)-th round stabilizer operator in the (t+1)-th round.

[0052] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0053] The third determining unit is configured to take each of the plurality of third type detection operators as a (t+2)-th round stabilizer operator in the (t+2)-th round.

[0054] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0055] The measurement result of the logical Z operator generating unit is configured to determine a corresponding round measurement result of the logical Z operator according to a corresponding round measurement result of each detection operator on a target topological non-trivial loop in a target topological structure, the target topological non-trivial loop including a plurality of edges, and the detection operator on the target topological non-trivial loop being a detection operator corresponding to an edge on the target topological non-trivial loop.

[0056] In a possible implementation, the target topological non-trivial loop is a horizontal direction topological non-trivial loop.

[0057] In a possible implementation, the target topological non-trivial loop is a vertical direction topological non-trivial loop.

[0058] In a possible implementation, the measurement result of the logical Z operator generating unit is further configured to determine an m-th round measurement result of an m-th round logical Z operator according to an m-th round measurement result of a corresponding detection operator on the target topological non-trivial loop, an (m-1)-th round measurement result of the corresponding detection operator on the target topological non-trivial loop, and an (m-2)-th round measurement result of the corresponding detection operator on the target topological non-trivial loop in the target topological structure.

[0059] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0060] The target logic X operator determination unit is configured to determine an mth round logic X operator, wherein the mth round logic X operator commutes with each mth round stabilizer operator, and the mth round logic X operator anti-commutes with the mth round logic Z operator.

[0061] In a possible implementation, the first type of face includes 6 edges, the first type of face includes 3 edge combinations, two edges in the edge combination of the first type of face are parallel, the second type of face includes 6 edges, the second type of face includes 3 edge combinations, two edges in the edge combination of the second type of face are parallel, and the third type of face includes 6 edges, the third type of face includes 3 edge combinations, two edges in the edge combination of the third type of face are parallel.

[0062] In a third aspect, the embodiments of the present disclosure provide a computer device, including a memory and a processor, the memory and the processor are connected with each other in communication, the memory stores computer instructions, and the processor executes the computer instructions to perform the method in the first aspect or any of the corresponding embodiments.

[0063] In a fourth aspect, the embodiments of the present disclosure provide a computer readable storage medium, the computer readable storage medium stores computer instructions, and the computer instructions are used to make a computer execute the method in the first aspect or any of the corresponding embodiments.

[0064] In a fifth aspect, the present disclosure provides a computer program product, including computer instructions, and the computer instructions are used to make a computer execute the method in the first aspect or any of the corresponding embodiments.

[0065] The quantum error correction code construction method provided by the embodiments of the present disclosure can periodically measure three types of detection operators, and can construct a quantum error correction code. The quantum error correction code is a stabilizer code. In any round of measurement, the measurement result of any type of detection operator is determined by the measurement result of any round of two corresponding operators. Each of the two corresponding operators acts on different data qubits in the two corresponding data qubits. Each ancillary qubit only needs to be coupled with two corresponding data qubits. The corresponding ancillary qubit only needs to be coupled with the corresponding two data qubits, so that the corresponding ancillary qubit obtains the corresponding round measurement result of the corresponding two data qubits coupled with the corresponding ancillary qubit by measuring the corresponding two data qubits coupled with the corresponding ancillary qubit in the corresponding round, and obtains the corresponding round measurement result of the corresponding type of detection operator according to the corresponding round measurement result of the corresponding two data qubits coupled with the corresponding ancillary qubit. In any round after the first round, a corresponding stabilizer code can be formed, and the corresponding stabilizer code formed in any round after the first round is used for quantum error correction. Therefore, the noise tolerance threshold of the quantum error correction code can be improved, and the problem of high error rate caused by the need for the ancillary qubit to be coupled with four data qubits can be avoided. Since the ancillary qubit only needs to be coupled with two data qubits, the stabilizer code provided by the embodiments of the present disclosure can be implemented in a topological superconducting wire system with Majorana zero modes. Therefore, the noise tolerance of the Majorana zero mode of the topological superconducting wire system with Majorana zero modes can be used to improve the fault tolerance rate, and the problem that the ancillary qubit needs to be coupled with four data qubits in the stabilizer code scheme cannot use the topological quantum system with good noise tolerance of the Majorana zero mode of the topological superconducting wire system with Majorana zero modes. BRIEF DESCRIPTION OF DRAWINGS

[0066] In order to more clearly illustrate the technical solutions in the specific embodiments of the present disclosure or the prior art, the drawings needed in the specific embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art without creative labor.

[0067] Figure 1 is a schematic diagram of a target topological structure corresponding to the quantum error correction code provided by the embodiments of the present disclosure;

[0068] Figure 2 is a schematic diagram of the relationship between the first type of detection operator and the X-type operator;

[0069] Figure 3 is a schematic diagram of the relationship between the second type of detection operator and the Y-type operator;

[0070] Figure 4 is a schematic diagram of the relationship between the third type of detection operator and the Z-type operator;

[0071] Figure 5 is a flowchart of a quantum error correction code construction method provided by an embodiment of the present disclosure;

[0072] Figure 6 is a schematic diagram of three types of detection operators;

[0073] Figure 7 is a schematic diagram of a topological non-trivial loop in the vertical direction;

[0074] Figure 8 is a schematic diagram of a topological non-trivial loop in the horizontal direction;

[0075] Figure 9 is a structural schematic diagram of a computer device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0076] To make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present disclosure.

[0077] To solve the problem of how to improve the noise tolerance threshold of quantum error correction codes, the present disclosure provides a quantum error correction code construction method.

[0078] In the related art, the stabilizer operator is composed of the direct product of four Pauli operators, so that the ancillary quantum bits need to be coupled with four data quantum bits. In actual quantum circuits, quantum gates will contain noise, so the more the number of coupled quantum bits, the higher the error rate. The higher the error rate will result in a lower noise tolerance threshold of quantum error correction codes. In addition, the stabilizer code in the related art cannot be implemented in a topological superconducting wire system with Majorana zero modes. The topological superconducting wire system with Majorana zero modes has good noise resistance, but the basic operation of the topological superconducting wire system with Majorana zero modes is two-qubit measurement.

[0079] The quantum error correction code construction method provided in the embodiments of the present disclosure can periodically measure three types of detection operators, and can construct a quantum error correction code. The quantum error correction code is a stabilizer code. In any round of measurement, any measurement result of any type of detection operator can be determined by any measurement result of two corresponding operators. Each of the two corresponding operators acts on different data qubits in the two corresponding data qubits. Each ancillary qubit only needs to be coupled with two corresponding data qubits. The corresponding ancillary qubit only needs to be coupled with the two corresponding data qubits, so that the corresponding ancillary qubit can obtain the corresponding round measurement result of the two corresponding data qubits coupled with the corresponding ancillary qubit by coupling with the two corresponding data qubits in the corresponding round of measurement, and obtain the corresponding round measurement result of the corresponding type of detection operator according to the corresponding round measurement result of the two corresponding data qubits coupled with the corresponding ancillary qubit. In any round after the first round, a corresponding stabilizer code can be formed, and the corresponding stabilizer code formed in any round after the first round is used for quantum error correction. Thus, the noise tolerance threshold of the quantum error correction code can be improved, and the problem of high error rate caused by the need for the ancillary qubit to be coupled with four data qubits can be avoided. Since the ancillary qubit only needs to be coupled with two data qubits, the stabilizer code provided in the embodiments of the present disclosure can be implemented in a topological superconducting wire system with Majorana zero modes. Thus, the noise tolerance of the Majorana zero mode of the topological superconducting wire system with Majorana zero modes can be utilized to improve the fault tolerance rate, and the problem that the stabilizer code scheme in which the ancillary qubit needs to be coupled with four data qubits cannot utilize the topological quantum system with good noise tolerance of the Majorana zero mode of the topological superconducting wire system with Majorana zero modes is avoided.

[0080] Figure 1 A schematic diagram of a target topology corresponding to the quantum error correction code provided in the embodiments of the present disclosure is shown.

[0081] The geometric configuration of the quantum error correction code provided in the embodiments of the present disclosure is a lattice with periodic boundary conditions. The lattice with periodic boundary conditions can be a honeycomb-shaped lattice. When the lattice with periodic boundary conditions is a honeycomb-shaped lattice, the quantum error correction code can be called a honeycomb code.

[0082] The data qubits are located at the vertices of the lattice with periodic boundary conditions. The surface in the embodiments of the present disclosure can refer to the surface of the lattice. The number of the surface of the lattice can be denoted as n p . The number of the vertices of the lattice, i.e., the number of data qubits, can be denoted as 2n p . The number of edges of the lattice can be denoted as 3n p .

[0083] The faces of the lattice are classified into three types, which are first type faces, second type faces, and third type faces.

[0084] Figure 1 A plurality of faces in the target topology are shown, Figure 1 The letters in the shown faces represent the types of the faces. The first type faces can be called X-type faces, the second type faces can be called Y-type faces. The third type faces can be called Z-type faces. Figure 1 A plurality of X-type faces, a plurality of Y-type faces, and a plurality of Z-type faces in the target topology are shown. The X-type faces have X-type face operators, the Y-type faces have Y-type face operators, and the Z-type faces have Z-type face operators.

[0085] An X-type face has 6 vertices, and the X-type face has 6 edges. A corresponding edge of the X-type face is an edge between two corresponding vertices of the X-type face, one of the two corresponding vertices is taken as one end point of the corresponding edge of the X-type face, and the other of the two corresponding vertices is taken as the other end point of the corresponding edge of the X-type face.

[0086] A Y-type face has 6 vertices, and the Y-type face has 6 edges. A corresponding edge of the Y-type face is an edge between two corresponding vertices of the Y-type face, one of the two corresponding vertices is taken as one end point of the corresponding edge of the Y-type face, and the other of the two corresponding vertices is taken as the other end point of the corresponding edge of the Y-type face.

[0087] A Z-type face has 6 vertices, and the Z-type face has 6 edges. A corresponding edge of the Z-type face is an edge between two corresponding vertices of the Z-type face, one of the two corresponding vertices is taken as one end point of the corresponding edge of the Z-type face, and the other of the two corresponding vertices is taken as the other end point of the corresponding edge of the Z-type face.

[0088] An X-type face includes 6 edges, and the X-type face includes 3 edge combinations, two edges in the edge combination of the X-type face are parallel. A Y-type face includes 6 edges, and the Y-type face includes 3 edge combinations, two edges in the edge combination of the Y-type face are parallel. A Z-type face includes 6 edges, and the Z-type face includes 3 edge combinations, two edges in the edge combination of the Z-type face are parallel.

[0089] In the embodiments of the present disclosure, an edge common to one second type face (Y-type face) and one third type face (Z-type face) is called a first type edge.

[0090] For an edge, if the edge belongs to one second type face and belongs to one third type face, the edge is a first type edge.

[0091] The first operator can be an X-type operator, and the X-type operator can specifically refer to: σ x Operator.

[0092] The second operator can be a Y-type operator, and the Y-type operator can specifically refer to: σ y Operator.

[0093] The third operator can be a Z-type operator, and the Z-type operator can be specifically σ z operator.

[0094] In the embodiments of the present disclosure, the first type of detection operator corresponds to a first type of edge.

[0095] The first type of edge corresponding to the first type of detection operator is for two first type of surfaces.

[0096] The two first type of surfaces for which the first type of edge corresponding to the first type of detection operator connects are connected by the first type of edge corresponding to the first type of detection operator.

[0097] For a first type of detection operator, the first type of detection operator is a first type of detection operator on a Y-type surface to which a first type of edge corresponding to the first type of detection operator belongs.

[0098] For a first type of detection operator, the first type of detection operator is a first type of detection operator on a Z-type surface to which a first type of edge corresponding to the first type of detection operator belongs.

[0099] The two data qubits for which the first type of edge corresponding to the first type of detection operator connects are connected by the first type of edge corresponding to the first type of detection operator. That is, the two data qubits for which the first type of edge corresponding to the first type of detection operator connects are end points of the first type of edge corresponding to the first type of detection operator. The first type of detection operator corresponds to two first operators, and the two first operators corresponding to the first type of detection operator belong to the same operator type. Each of the two first operators corresponding to the first type of detection operator acts on a different data qubit for which the first type of edge corresponding to the first type of detection operator connects. That is, one of the two first operators corresponding to the first type of detection operator acts on one data qubit for which the first type of edge corresponding to the first type of detection operator connects, and the other of the two first operators corresponding to the first type of detection operator acts on the other data qubit for which the first type of edge corresponding to the first type of detection operator connects.

[0100] In the embodiments of the present disclosure, an edge common to a first type of surface, i.e., an X-type surface, and a third type of surface, i.e., a Z-type surface, is called a second type of edge. That is, for an edge, if the edge belongs to a first type of surface and belongs to a third type of surface, the edge is a second type of edge.

[0101] In the embodiments of the present disclosure, a second type of detection operator corresponds to a second type of edge. The second type of edge corresponding to the second type of detection operator is for two second type of surfaces. The two second type of surfaces for which the second type of edge corresponding to the second type of detection operator connects are connected by the second type of edge corresponding to the second type of detection operator.

[0102] For a second type of detection operator, the second type of detection operator is: the second type of detection operator on the X-type surface to which the second type of edge corresponding to the second type of detection operator belongs.

[0103] For a second type of detection operator, the second type of detection operator is: the second type of detection operator on the Z-type surface to which the second type of edge corresponding to the second type of detection operator belongs.

[0104] The second type of edge corresponding to the second type of detection operator is for two data quantum bits. The vertex where the two data quantum bits to which the second type of edge corresponding to the second type of detection operator is for are connected by the second type of edge corresponding to the second type of detection operator. Each of the two second operators corresponding to the second type of detection operator acts on a different data quantum bit to which the second type of edge corresponding to the second type of detection operator is for.

[0105] In the embodiments of the present disclosure, an edge common to the first type of surface, i.e., the X-type surface, and the second type of surface, i.e., the Y-type surface, is called a third type of edge. That is, for an edge, if the edge belongs to a first type of surface and belongs to a second type of surface, the edge is a third type of edge.

[0106] In the embodiments of the present disclosure, a third type of detection operator corresponds to the third type of edge. The third type of edge corresponding to the third type of detection operator is for two third type of surfaces. The two third type of surfaces to which the third type of edge corresponding to the third type of detection operator is for are connected by the third type of edge corresponding to the third type of detection operator.

[0107] For a third type of detection operator, the third type of detection operator is: the third type of detection operator on the X-type surface to which the third type of edge corresponding to the third type of detection operator belongs.

[0108] For a third type of detection operator, the third type of detection operator is: the third type of detection operator on the Y-type surface to which the third type of edge corresponding to the third type of detection operator belongs.

[0109] The vertex where the two data quantum bits to which the third type of edge corresponding to the third type of detection operator is for are connected by the third type of edge corresponding to the third type of detection operator. Each of the two third operators corresponding to the third type of detection operator acts on a different data quantum bit to which the third type of edge corresponding to the third type of detection operator is for.

[0110] In the embodiments of the present disclosure, the product of a plurality of detection operators on any closed loop formed by edges of the lattice forms an operator, which is commutable with any detection operator. A surface operator is composed of the product of six detection operators on the surface to which the surface operator belongs. The plurality of surface operators are all stabilizer operators. The number of surface operators is equal to the number of surfaces of the lattice, which is n p However, the product of the plurality of surface operators is a constant, so the number of independent surface operators is np -1.

[0111] In the embodiments of the present disclosure, the detection operators have the following properties: two different detection operators are commutable if there is no common data qubit; otherwise, two different detection operators are anti-commutable.

[0112] In the embodiments of the present disclosure, for a first type edge belonging to a second type face and a third type face, the first type edge corresponds to a first type detection operator on the second type face to which the first type edge belongs. The first type edge corresponds to a first type detection operator on the third type face to which the first type edge belongs.

[0113] In the embodiments of the present disclosure, for a second type edge belonging to a first type face and a third type face, the second type edge corresponds to a second type detection operator on the first type face to which the second type edge belongs. The second type edge corresponds to a second type detection operator on the third type face to which the second type edge belongs.

[0114] In the embodiments of the present disclosure, for a third type edge belonging to a first type face and a second type face, the third type edge corresponds to a third type detection operator on the first type face to which the third type edge belongs. The third type edge corresponds to a third type detection operator on the second type face to which the third type edge belongs.

[0115] Reference is made to FIG. 1, which shows a schematic diagram of a first type detection operator and an X-type operator. Figure 2 Reference is made to FIG. 1, which shows a schematic diagram of a first type detection operator and an X-type operator.

[0116] Figure 2 The black dots shown are the vertices of the X-type face. Two data qubits corresponding to a first type edge of a first type detection operator are respectively on one of the two vertices of the X-type face, and the two vertices are on the first type edge of the first type detection operator, and the two vertices are both endpoints of the first type edge of the first type detection operator. The vertices on which the two data qubits corresponding to the first type edge of the first type detection operator are located are connected by the first type edge of the first type detection operator. The first type detection operator corresponds to two X-type operators. The two X-type operators corresponding to the first type detection operator are σ x Each X-type operator in the two X-type operators acts on a different data qubit corresponding to the first type edge of the first type detection operator.

[0117] Reference is made to FIG. 2, which shows a schematic diagram of a second type detection operator and a Y-type operator. Figure 3 Reference is made to FIG. 2, which shows a schematic diagram of a second type detection operator and a Y-type operator.

[0118] Figure 3 The black dots shown are the vertices of the Y-shaped surface. Two data qubits to which a second-type edge corresponding to a second-type detection operator points are at one of the two vertices of the Y-shaped surface, and the two vertices are on the second-type edge corresponding to the second-type detection operator, and the two vertices are both endpoints of the second-type edge corresponding to the second-type detection operator. The vertices at which the two data qubits to which the second-type edge corresponding to the second-type detection operator points are connected by the second-type edge corresponding to the second-type detection operator. Each of the two Y-shaped operators corresponding to the second-type detection operator acts on a different data qubit to which a second-type edge corresponding to the second-type detection operator points.

[0119] Reference is made to Figure 4 which shows a schematic diagram illustrating the relationship between a third-type detection operator and a Z-shaped operator.

[0120] Figure 4 The black dots shown are the vertices of the Z-shaped surface. Two data qubits to which a third-type edge corresponding to a third-type detection operator points are at one of the two vertices of the Z-shaped surface, and the two vertices are on the third-type edge corresponding to the third-type detection operator, and the two vertices are both endpoints of the third-type edge corresponding to the third-type detection operator. The vertices at which the two data qubits to which the third-type edge corresponding to the third-type detection operator points are connected by the third-type edge corresponding to the third-type detection operator. Each of the two third operators corresponding to the third-type detection operator, namely σ z acts on a different data qubit to which a third-type edge corresponding to the third-type detection operator points.

[0121] Reference is made to Figure 5 which shows a flowchart of a quantum error correction code construction method provided by an embodiment of the present disclosure.

[0122] In step S501, in the first round, a plurality of first-type detection operators are measured to obtain first-round measurement results of the plurality of first-type detection operators.

[0123] The first-round measurement result of the first-type detection operator is the product of the first-round measurement results of the two first operators corresponding to the first-type detection operator.

[0124] In step S501, in the first round, two first operators corresponding to a first-type detection operator are measured to obtain first-round measurement results of the two first operators corresponding to the first-type detection operator.

[0125] For a first type of detection operator, each of the two first operators corresponding to the first type of detection operator acts on a different data qubit of the two data qubits to which the first type of edge corresponding to the first type of detection operator is incident. The two data qubits to which the first type of edge corresponding to the first type of detection operator is incident are connected by a vertex to which the first type of edge corresponding to the first type of detection operator is incident. An ancillary qubit for measuring the two first operators corresponding to the first type of detection operator is coupled to the two data qubits to which the first type of edge corresponding to the first type of detection operator is incident. In step S501, in the first round, the ancillary qubit for measuring the two first operators corresponding to the first type of detection operator measures the two first operators corresponding to the first type of detection operator to obtain a first round measurement result of the two first operators corresponding to the first type of detection operator.

[0126] In step S501, in the first round, a product of the first round measurement result of the two first operators corresponding to the first type of detection operator is calculated to obtain a first round measurement result of the first type of detection operator.

[0127] In a possible implementation, the two first operators corresponding to the first type of detection operator are two X-type operators corresponding to the first type of detection operator, the first type of edge corresponding to the first type of detection operator, the two data qubits to which the first type of edge corresponding to the first type of detection operator is incident are connected by a vertex to which the first type of edge corresponding to the first type of detection operator is incident, and each of the two X-type operators corresponding to the first type of detection operator acts on a different data qubit to which the first type of edge corresponding to the first type of detection operator is incident.

[0128] It should be noted that when the two first operators corresponding to the first type of detection operator are two X-type operators corresponding to the first type of detection operator, the first type of detection operator can be referred to as an XX-type detection operator.

[0129] As an example, the first type of detection operator is an XX-type detection operator, for an XX-type detection operator, each of the two X-type operators corresponding to the XX-type detection operator acts on a different data qubit to which the first type of edge corresponding to the first type of detection operator is incident. The two data qubits to which the first type of edge corresponding to the XX-type detection operator is incident are connected by a vertex to which the first type of edge corresponding to the XX-type detection operator is incident. An ancillary qubit for measuring the two X-type operators corresponding to the XX-type detection operator is coupled to the two data qubits to which the first type of edge corresponding to the XX-type detection operator is incident. In step S501, in the first round, the ancillary qubit for measuring the two X-type operators corresponding to the XX-type detection operator measures the two X-type operators corresponding to the XX-type detection operator to obtain a first round measurement result of the two X-type operators corresponding to the XX-type detection operator.

[0130] In step S502, in the second round, a plurality of second-type detection operators are measured to obtain second-round measurement results of the plurality of second-type detection operators.

[0131] The second-round measurement result of the second-type detection operator is a product of the second-round measurement results of the two second operators corresponding to the second-type detection operator.

[0132] In the second round, for a second-type detection operator, the two second operators corresponding to the second-type detection operator are measured to obtain second-round measurement results of the two second operators corresponding to the second-type detection operator. A product of the second-round measurement results of the two second operators corresponding to the second-type detection operator is calculated to obtain the second-round measurement result of the second-type detection operator.

[0133] In the second round, each third-type surface operator can be taken as a second-round stabilizer operator. The second-round measurement result of each third-type surface operator can be calculated. The second-round measurement result of a third-type surface operator can be a product of the first-round measurement result of each first-type detection operator on a third-type surface to which the third-type surface operator belongs and the second-round measurement result of each second-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0134] In a possible implementation, the two second operators corresponding to the second-type detection operator are two Y-type operators corresponding to the second-type detection operator, the second-type detection operator corresponds to a second-type edge, and two data quantum bits to which the second-type edge corresponding to the second-type detection operator is connected are connected by the second-type edge corresponding to the second-type detection operator. Each Y-type operator of the two Y-type operators corresponding to the second-type detection operator acts on a different data quantum bit to which the second-type edge corresponding to the second-type detection operator is connected.

[0135] In the embodiments of the present disclosure, when the two second operators corresponding to the second-type detection operator are two Y-type operators corresponding to the second-type detection operator, the second-type detection operator can be called a YY-type detection operator.

[0136] As an example, the second type of detection operator is a YY-type detection operator, for a YY-type detection operator, each of the two second operators corresponding to the YY-type detection operator acts on a different data qubit targeted by the second type edge corresponding to the YY-type detection operator. The two data qubits targeted by the second type edge corresponding to the YY-type detection operator are connected by the vertex where the two data qubits targeted by the second type edge corresponding to the YY-type detection operator are located. An ancillary qubit for measuring the two second operators corresponding to the YY-type detection operator is coupled to the two data qubits targeted by the second type edge corresponding to the YY-type detection operator. In the 2nd round, the ancillary qubit for measuring the two second operators corresponding to the YY-type detection operator measures the two second operators corresponding to the YY-type detection operator to obtain the 2nd round measurement result of the two second operators corresponding to the YY-type detection operator.

[0137] In step S503, in the 3rd round, the plurality of third type of detection operators are measured to obtain the 3rd round measurement result of the plurality of third type of detection operators.

[0138] The 3rd round measurement result of the third type of detection operator is the product of the 3rd round measurement result of the two third operators corresponding to the third type of detection operator.

[0139] In the 3rd round, the two third operators corresponding to the third type of detection operator are measured to obtain the 3rd round measurement result of the two third operators corresponding to the third type of detection operator.

[0140] In the 3rd round, for a third type of detection operator, the product of the 3rd round measurement result of the two third operators corresponding to the third type of detection operator is calculated to obtain the 3rd round measurement result of the third type of detection operator.

[0141] In the 3rd round, each first type of surface operator can be taken as a 3rd round stabilizer operator. The 3rd round measurement result of each first type of surface operator can be calculated. For a first type of surface operator, the 3rd round measurement result of the first type of surface operator can be the product of the 2nd round measurement result of each second type of detection operator on the first type of surface to which the first type of surface operator belongs and the 3rd round measurement result of each third type of detection operator on the first type of surface to which the first type of surface operator belongs.

[0142] In a possible implementation, the two third operators corresponding to the third type of detection operator are two Z-type operators corresponding to the third type of detection operator, the third type of detection operator corresponds to the third type of edge, the two data qubits targeted by the third type of edge corresponding to the third type of detection operator are connected by the vertex where the two data qubits targeted by the third type of edge corresponding to the third type of detection operator are located, and each of the two Z-type operators corresponding to the third type of detection operator acts on a different data qubit targeted by the third type of edge corresponding to the third type of detection operator.

[0143] In the embodiments of the present disclosure, when the two third operators corresponding to the third type detection operator are two Z-type operators corresponding to the third type detection operator, the third type detection operator can be called a ZZ-type detection operator.

[0144] As an example, the third type detection operator is a ZZ-type detection operator, and for a ZZ-type detection operator, each of the two third operators corresponding to the ZZ-type detection operator acts on a different data quantum bit to which a third type edge corresponding to the ZZ-type detection operator is directed. The two data quantum bits to which the third type edge corresponding to the ZZ-type detection operator is directed are connected by a vertex. An ancillary quantum bit for measuring the two third operators corresponding to the ZZ-type detection operator is coupled to the two data quantum bits to which the third type edge corresponding to the ZZ-type detection operator is directed. In step S203, in the third round, the ancillary quantum bit for measuring the two third operators corresponding to the ZZ-type detection operator measures the two third operators corresponding to the ZZ-type detection operator, to obtain the third round measurement result of the two third operators corresponding to the ZZ-type detection operator.

[0145] In step S504, in the tth round, the plurality of first type detection operators are measured to obtain the tth round measurement result of the plurality of first type detection operators, each second type surface operator is taken as a tth round stabilizer operator, and the tth round measurement result of the plurality of second type surface operators is determined.

[0146] Wherein, t is a positive integer greater than 3, and t-1 is a multiple of 3.

[0147] In the embodiments of the present disclosure, each second type surface operator is determined according to each third type detection operator on the second type surface and each first type detection operator on the second type surface.

[0148] A second type surface operator can be: the product of each third type detection operator on the second type surface to which the second type surface operator belongs and each first type detection operator on the second type surface to which the second type surface operator belongs.

[0149] The product of each third type detection operator on the second type surface to which the second type surface operator belongs and each first type detection operator on the second type surface to which the second type surface operator belongs can also be called: the product of a plurality of detection operators composed of each third type detection operator on the second type surface to which the second type surface operator belongs and each first type detection operator on the second type surface to which the second type surface operator belongs.

[0150] It should be noted that in the embodiments of the present disclosure, for a plurality of detection operators with a number of detection operators greater than 2, the product of the plurality of detection operators = the first detection operator in the plurality of detection operators * the second detection operator in the plurality of detection operators…* the last detection operator in the plurality of detection operators.

[0151] In the embodiments of the present disclosure, one second-type surface operator = the first third-type detection operator on the second-type surface to which the second-type surface operator belongs * the second third-type detection operator on the second-type surface to which the second-type surface operator belongs * the third third-type detection operator on the second-type surface to which the second-type surface operator belongs * the first first-type detection operator on the second-type surface to which the second-type surface operator belongs * the second first-type detection operator on the second-type surface to which the second-type surface operator belongs * the third first-type detection operator on the second-type surface to which the second-type surface operator belongs.

[0152] The tth round measurement result of one second-type surface operator can be determined according to the (t-1)th round measurement result of each third-type detection operator on the second-type surface to which the second-type surface operator belongs and the tth round measurement result of each first-type detection operator on the second-type surface to which the second-type surface operator belongs.

[0153] In one possible implementation, the tth round measurement result of one second-type surface operator can be the product of the (t-1)th round measurement result of each third-type detection operator on the second-type surface to which the second-type surface operator belongs and the tth round measurement result of each first-type detection operator on the second-type surface to which the second-type surface operator belongs.

[0154] The tth round measurement result of one second-type surface operator = the (t-1)th round measurement result of the first third-type detection operator on the second-type surface to which the second-type surface operator belongs * the (t-1)th round measurement result of the second third-type detection operator on the second-type surface to which the second-type surface operator belongs * the (t-1)th round measurement result of the third third-type detection operator on the second-type surface to which the second-type surface operator belongs * the tth round measurement result of the first first-type detection operator on the second-type surface to which the second-type surface operator belongs * the tth round measurement result of the second first-type detection operator on the second-type surface to which the second-type surface operator belongs * the tth round measurement result of the third first-type detection operator on the second-type surface to which the second-type surface operator belongs.

[0155] It should be noted that, in the embodiments of the present disclosure, for a plurality of detection operators with a number of detection operators greater than 2, the product of the measurement results of the corresponding rounds of the plurality of detection operators = the measurement result of the first detection operator in the plurality of detection operators of the corresponding round * the measurement result of the second detection operator in the plurality of detection operators of the corresponding round * … * the measurement result of the last detection operator in the plurality of detection operators of the corresponding round.

[0156] As an example, the third type of detection operator is a ZZ type operator, the first type of detection operator is an XX type detection operator, and the 4th round measurement result of the y type surface operator is the product of the 3rd round measurement result of each ZZ type detection operator on the y type surface operator and the 4th round measurement result of each XX type detection operator on the y type surface operator.

[0157] As another example, the third type of detection operator is a ZZ type operator, the first type of detection operator is an XX type detection operator, and the 7th round measurement result of the y type surface operator is the product of the 6th round measurement result of each ZZ type detection operator on the y type surface operator and the 7th round measurement result of each XX type detection operator on the y type surface operator.

[0158] In a possible implementation, in the tth round, each first type of detection operator is respectively taken as a tth round stabilizer operator.

[0159] As an example, the first type of detection operator is an XX type detection operator, and each XX type detection operator is respectively taken as a tth round stabilizer operator.

[0160] In the embodiments of the present disclosure, in the tth round, each XX type detection operator and each x type surface operator can be respectively taken as a stabilizer operator. The number of XX type detection operators is n p -1. Since the product of multiple XX type detection operators is equal to the product of multiple x type surface operators, the number of independent XX type detection operators is n p -1. After this round of measurement, the number of stabilizer operators is the number of multiple independent surface operators plus the number of multiple independent XX type detection operators: 2n p -2. Since the number of logical qubits is equal to the number of data qubits minus the number of independent stabilizer operators, it can be known that the current stabilizer code can encode 2n p -(2n p -2) = 2 logical qubits.

[0161] In step S505, in the t+1th round, multiple second type of detection operators are measured to obtain t+1th round measurement results of multiple second type of detection operators, each third type of surface operator is respectively taken as a t+1th round stabilizer operator, and t+1th round measurement results of multiple third type of surface operators are determined.

[0162] In the embodiments of the present disclosure, the third type of surface operator is determined according to each first type of detection operator on the third type of surface and each second type of detection operator on the third type of surface.

[0163] A third type of surface operator can be: the product of each first type of detection operator on the third type of surface to which the third type of surface operator belongs and each second type of detection operator on the third type of surface to which the third type of surface operator belongs.

[0164] The third-type surface operator = the first-type detection operator on the third-type surface to which the third-type surface operator belongs * the second-type detection operator on the third-type surface to which the third-type surface operator belongs * the third-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0165] In the embodiments of the present disclosure, the (t+1)th round measurement result of a third-type surface operator can be determined according to the tth round measurement result of each first-type detection operator on the third-type surface to which the third-type surface operator belongs and the (t+1)th round measurement result of each second-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0166] In a possible implementation, the (t+1)th round measurement result of a third-type surface operator can be a product of the tth round measurement result of the first-type detection operator on the third-type surface to which the third-type surface operator belongs and the (t+1)th round measurement result of the second-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0167] The (t+1)th round measurement result of a third-type surface operator = the tth round measurement result of the first-type detection operator on the third-type surface to which the third-type surface operator belongs * the tth round measurement result of the second-type detection operator on the third-type surface to which the third-type surface operator belongs * the (t+1)th round measurement result of the third-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0168] As an example, the first-type detection operator is an XX-type detection operator, the second-type detection operator is a YY-type detection operator, and the fifth round measurement result of a third-type surface operator is a product of the fourth round measurement result of each XX-type detection operator on the third-type surface to which the third-type surface operator belongs and the fifth round measurement result of each YY-type detection operator on the third-type surface to which the third-type surface operator belongs.

[0169] In a possible implementation, the method further includes: in the (t+1)th round, taking each second-type detection operator as a (t+1)th round stabilizer respectively.

[0170] As an example, the second-type detection operator is a YY-type detection operator, and in the (t+1)th round, each YY-type detection operator is taken as a (t+1)th round stabilizer.

[0171] In this embodiment of the disclosure, in the (t+1)th round, each YY-type detection operator and each Y-type surface operator can be used as a stable sub-operator. The number of YY-type detection operators is n. p Since the product of multiple YY-type detection operators is equal to the product of all Y-type surface operators, the number of independent YY-type detection operators is n. p -1. After this round of measurements, the number of stable sub-operators is the sum of the number of independent surface operators and the number of independent YY-type detection operators: 2n p -2. Since the number of logical qubits equals the number of data qubits minus the number of independent stable sub-operators, it can be known that the current stable subcode can encode 2^n. p -(2n p -2) = 2 logical qubits.

[0172] In step S506, in the (t+2)th round, multiple third-type detection operators are measured to obtain the (t+2)th round measurement results of multiple third-type detection operators, and each first-type surface operator is used as a stable sub-operator in the (t+2)th round, and the (t+2)th round measurement results of multiple first-type surface operators are determined.

[0173] In this embodiment of the disclosure, the first type of surface operator is determined based on each second type of detection operator on the first type of surface to which the first type of surface operator belongs, and each third type of detection operator on the first type of surface to which the first type of surface operator belongs.

[0174] A first-class surface operator can be the product of every second-class detection operator on the first-class surface to which the first-class surface operator belongs, and every third-class detection operator on the first-class surface to which the first-class surface operator belongs.

[0175] The first type of face operator = the first second type of detection operator on the first type of face operator * the second second type of detection operator on the first type of face operator * the third second type of detection operator on the first type of face operator * the first third type of detection operator on the first type of face operator * the second third type of detection operator on the first type of face operator * the third third type of detection operator on the first type of face operator.

[0176] The measurement result of the first type of surface operator in round t+2 can be determined based on the measurement result of each second type of detection operator on the first type of surface in round t+1 and the measurement result of each third type of detection operator on the first type of surface in round t+2.

[0177] In one possible implementation, the measurement result of the first type of surface operator in round t+2 can be the product of the measurement result of the second type of detection operator on the first type of surface to which the first type of surface operator belongs in round t+1 and the measurement result of the third type of detection operator on the first type of surface to which the first type of surface operator belongs in round t+2.

[0178] The measurement result of a first-class surface operator in round t+2 = the measurement result of the first second-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+1 * the measurement result of the second second-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+1 * the measurement result of the third second-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+1 * the measurement result of the first third-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+2 * the measurement result of the second third-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+2 * the measurement result of the third third-class detection operator on the first-class surface to which the first-class surface operator belongs in round t+2.

[0179] As an example, the second type of detection operator is a YY type detection operator, and the third type of detection operator is a ZZ type detection operator. The sixth round measurement result of a first type surface operator is the product of the fifth round measurement result of each YY type detection operator on the first type surface to which the first type surface operator belongs, and the sixth round measurement result of each ZZ type detection operator on the first type surface.

[0180] One possible implementation also includes: in round t+2, each third-class detection operator is used as a stable sub-operator in round t+2.

[0181] As an example, the third type of detection operator is the ZZ-type detection operator. Each ZZ-type detection operator is used as a stable sub-operator in the (t+2)th round.

[0182] In round t+2, each ZZ-type detection operator and each z-type surface operator can be used as a stable sub-operator. The number of ZZ-type detection operators is n. p Since the product of multiple ZZ-type detection operators is equal to the product of multiple Z-type surface operators, the number of independent ZZ-type detection operators is n. p -1. After this round of measurements, the number of stable sub-operators is the sum of the number of independent surface operators and the number of independent ZZ-type detection operators: 2n p -2. Since the number of logical qubits equals the number of data qubits minus the number of independent stable sub-operators, it can be known that the current stable subcode can encode 2^n. p -(2n p -2) = 2 logical qubits.

[0183] In the disclosed embodiments, the first-type face operator of the first-type face can be: the product of the first operators corresponding to each vertex on the first-type face. Wherein the first operator corresponding to the vertex is the first operator acting on the data qubit at the vertex. The second-type face operator of the second-type face can be: the product of the second operators corresponding to each vertex on the second-type face. For a vertex on the second-type face, the second operator corresponding to the vertex is the second operator acting on the data qubit at the vertex. The third-type face operator of the third-type face can be: the product of the third operators corresponding to each vertex on the third-type face. For a vertex on the third-type face, the third operator corresponding to the vertex is the third operator acting on the data qubit at the vertex.

[0184] Please refer to Figure 6 , which shows a schematic diagram of three types of detection operators.

[0185] The x-type face operator of the x-type face can be: the product of the x-type operators σ x corresponding to the 6 vertices on the x-type face.

[0186] The y-type face operator of the y-type face can be: the product of the y-type operators σ y corresponding to the 6 vertices on the y-type face.

[0187] The z-type face operator of the z-type face can be: the product of the z-type operators σ z corresponding to the 6 vertices on the z-type face.

[0188] In one possible implementation, further comprising: determining the corresponding round measurement result of the logical Z operator according to the corresponding round measurement result of each detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, the target topology non-trivial loop comprising: a plurality of edges, the detection operator on the target topology non-trivial loop being the detection operator corresponding to the edge on the target topology non-trivial loop.

[0189] Determining the corresponding round measurement result of the logical Z operator according to the corresponding round measurement result of each detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure can comprise: determining the mth round measurement result of the mth round logical Z operator according to the mth round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, the (m-1)th round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure, and the (m-2)th round measurement result of the corresponding detection operator in the plurality of detection operators on the target topology non-trivial loop in the target topology structure.

[0190] The target topology non-trivial loop is any one of the topology non-trivial loops in the target topology structure. The product of the plurality of detection operators on the target topology non-trivial loop in the target topology structure is the logical Z operator.

[0191] As an example, m is t+2. The product of the t-th round measurement results of multiple XX-type detection operators in the target topology non-trivial loop, the t+1-th round measurement results of multiple YY-type detection operators in the target topology non-trivial loop, and the t+2-th round measurement results of multiple ZZ-type detection operators in the target topology non-trivial loop is taken as the measurement result of the logic Z operator in the t+2-th round.

[0192] As another example, m is t+3. The product of the measurement results of multiple YY-type detection operators in the target topology non-trivial loop in round t+1, the measurement results of multiple ZZ-type detection operators in the target topology non-trivial loop in round t+2, and the measurement results of multiple XX-type detection operators in the target topology non-trivial loop in round t+3 is taken as the measurement result of the logic Z operator in round t+3.

[0193] As another example, m is t+4. The product of the measurement results of multiple ZZ-type detection operators in the non-trivial loop of the target topology in round t+2, the measurement results of multiple XX-type detection operators in the non-trivial loop of the target topology in round t+3, and the measurement results of multiple YY-type detection operators in the non-trivial loop of the target topology in round t+4 is taken as the measurement result of the logic Z operator in round t+4.

[0194] In related technologies, reading logical qubits requires measuring each data qubit individually, which destroys the encoded state after measurement. Alternatively, to avoid destroying the encoded quantum state during logical qubit reading, data bits on a topologically nontrivial loop need to be measured simultaneously. The large number of data qubits measured leads to a high error rate.

[0195] In this embodiment, only the measurement values ​​of the three most recent consecutive detection operators need to be recorded when reading the logical qubits. No additional measurements of the logical qubits are required. This reduces the error rate and increases the noise tolerance threshold of the error-correcting code.

[0196] In one possible implementation, the target topological non-trivial circuit is a topological non-trivial circuit in the vertical direction.

[0197] refer to Figure 7 This shows a schematic diagram of a topological non-trivial circuit in the vertical direction.

[0198] Figure 7 The solid black lines in the diagram represent topological non-trivial cycles in the vertical direction. A vertical topological non-trivial cycle has multiple edges.

[0199] The vertical direction topological non-trivial loop has a first type of edge shared by the Y-shaped surface and the Z-shaped surface, a second type of edge shared by the X-shaped surface and the Z-shaped surface, and a third type of edge shared by the X-shaped surface and the Y-shaped surface.

[0200] In a possible implementation, the target topological non-trivial loop is a horizontal direction topological non-trivial loop.

[0201] Reference is made to Figure 8 which shows a schematic diagram of a horizontal direction topological non-trivial loop.

[0202] Figure 8 The black solid line in the figure indicates the horizontal direction topological non-trivial loop. The horizontal direction topological non-trivial loop has a plurality of edges.

[0203] In a possible implementation, the method further includes determining an mth round logical X operator.

[0204] The mth round logical X operator commutes with each mth round stabilizer operator, and the mth round logical X operator anti-commutes with the mth round logical Z operator.

[0205] The mth round logical X operator can act on a logical qubit.

[0206] Embodiments of the present disclosure provide a quantum error correction code construction apparatus. The apparatus is configured to implement the above-described embodiments and preferred implementation, and will not be described again. As used below, the term "unit" can be a combination of software and / or hardware that implements a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware, or a combination of software and hardware is also possible and contemplated.

[0207] The quantum error correction code construction apparatus includes:

[0208] A first measurement unit is configured to measure a plurality of first type detection operators in a first round to obtain a first round measurement result of the plurality of first type detection operators, wherein the first round measurement result of the first type detection operator is a product of a first round measurement result of two first operators corresponding to the first type detection operator;

[0209] A second measurement unit is configured to measure a plurality of second type detection operators in a second round to obtain a second round measurement result of the plurality of second type detection operators, wherein the second round measurement result of the second type detection operator is a product of a first round measurement result of two second operators corresponding to the second type detection operator;

[0210] A third measurement unit is configured to measure a plurality of third type detection operators in a third round to obtain a third round measurement result of the plurality of third type detection operators, wherein the third round measurement result of the third type detection operator is a product of a third round measurement result of two third operators corresponding to the third type detection operator.

[0211] a fourth measurement unit configured to measure the plurality of first-type detection operators to obtain a t-th round of measurement results of the plurality of first-type detection operators, and take each second-type surface operator as a t-th round of stabilizer operator, and determine a t-th round of measurement results of the plurality of second-type surface operators, t being a positive integer greater than 3, t-1 being a multiple of 3;

[0212] a fifth measurement unit configured to measure the plurality of second-type detection operators to obtain a (t+1)-th round of measurement results of the plurality of second-type detection operators, and take each third-type surface operator as a (t+1)-th round of stabilizer operator, and determine a (t+1)-th round of measurement results of the plurality of third-type surface operators;

[0213] a sixth measurement unit configured to measure the plurality of third-type detection operators to obtain a (t+2)-th round of measurement results of the plurality of third-type detection operators, and take each first-type surface operator as a (t+2)-th round of stabilizer operator, and determine a (t+2)-th round of measurement results of the plurality of first-type surface operators.

[0214] In a possible implementation, the two first operators corresponding to the first-type detection operator are two X-type operators corresponding to the first-type detection operator, the first-type detection operator corresponds to a first-type edge, the two data qubits at the vertices connected by the first-type edge corresponding to the first-type detection operator are connected by the first-type edge corresponding to the first-type detection operator, and each of the two X-type operators corresponding to the first-type detection operator acts on a different data qubit corresponding to the first-type edge corresponding to the first-type detection operator.

[0215] In a possible implementation, the two second operators corresponding to the second-type detection operator are two Y-type operators corresponding to the second-type detection operator, the second-type detection operator corresponds to a second-type edge, the two data qubits at the vertices connected by the second-type edge corresponding to the second-type detection operator are connected by the second-type edge corresponding to the second-type detection operator, and each of the two Y-type operators corresponding to the second-type detection operator acts on a different data qubit corresponding to the second-type edge corresponding to the second-type detection operator.

[0216] In a possible implementation, the two third operators corresponding to the third-type detection operator are two Z-type operators corresponding to the third-type detection operator, the third-type detection operator corresponds to a third-type edge, the two data qubits at the vertices connected by the third-type edge corresponding to the third-type detection operator are connected by the third-type edge corresponding to the third-type detection operator, and each of the two Z-type operators corresponding to the third-type detection operator acts on a different data qubit corresponding to the third-type edge corresponding to the third-type detection operator.

[0217] In a possible implementation, the fourth measurement unit is further configured to determine a product of a (t-1)th round measurement result of each third type of detection operator on the second type of surface and a tth round measurement result of each first type of detection operator on the second type of surface as a tth round measurement result of the second type of surface operator.

[0218] In a possible implementation, the fifth measurement unit is further configured to determine a product of a tth round measurement result of each first type of detection operator on the third type of surface and a (t+1)th round measurement result of each second type of detection operator on the third type of surface to which the third type of surface operator belongs as a (t+1)th round measurement result of the third type of surface operator.

[0219] In a possible implementation, the sixth measurement unit is further configured to determine a product of a (t+1)th round measurement result of each second type of detection operator on the first type of surface and a (t+2)th round measurement result of each third type of detection operator on the first type of surface to which the first type of surface operator belongs as a (t+2)th round measurement result of the first type of surface operator.

[0220] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0221] The first determination unit is configured to take each first type of detection operator in the plurality of first type of detection operators as a tth round stabilizer operator in the tth round.

[0222] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0223] The second determination unit is configured to take each second type of detection operator in the plurality of second type of detection operators as a (t+1)th round stabilizer operator in the (t+1)th round.

[0224] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0225] The third determination unit is configured to take each third type of detection operator in the plurality of third type of detection operators as a (t+2)th round stabilizer operator in the (t+2)th round.

[0226] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0227] The measurement result generation unit of the logical Z operator is configured to determine a corresponding round measurement result of the logical Z operator according to a corresponding round measurement result of each detection operator in the plurality of detection operators on a target topological nontrivial loop in the target topological structure, the target topological nontrivial loop including a plurality of edges, and the detection operator on the target topological nontrivial loop being a detection operator corresponding to an edge of the target topological nontrivial loop.

[0228] In a possible implementation, the target topological non-trivial loop is a topological non-trivial loop in a horizontal direction.

[0229] In a possible implementation, the target topological non-trivial loop is a topological non-trivial loop in a vertical direction.

[0230] In a possible implementation, the measurement result generation unit of the logical Z operator is further configured to determine the mth round of measurement results of the mth round of logical Z operators according to the mth round of measurement results of the corresponding detection operator of the plurality of detection operators on the target topological non-trivial loop in the target topological structure, the (m-1)th round of measurement results of the corresponding detection operator of the plurality of detection operators on the target topological non-trivial loop in the target topological structure, and the (m-2)th round of measurement results of the corresponding detection operator of the plurality of detection operators on the target topological non-trivial loop in the target topological structure.

[0231] In a possible implementation, the quantum error correction code construction apparatus further includes:

[0232] a target logical X operator determination unit configured to determine an mth round of logical X operators, wherein each mth round of logical X operator commutes with each mth round of stabilizer operator, and each mth round of logical X operator anti-commutes with each mth round of logical Z operator.

[0233] In a possible implementation, the first type of face includes 6 edges, the first type of face includes 3 edge combinations, and two edges in the edge combination of the first type of face are parallel; the second type of face includes 6 edges, the second type of face includes 3 edge combinations, and two edges in the edge combination of the second type of face are parallel; and the third type of face includes 6 edges, the third type of face includes 3 edge combinations, and two edges in the edge combination of the third type of face are parallel.

[0234] In this embodiment, the apparatus is presented in the form of functional units. Here, the units refer to ASIC circuits, processors and memories executing one or more software or fixed programs, and / or other devices that can provide the above functions. Further functions of the above units are the same as those of the corresponding embodiments described above, and will not be described here.

[0235] Reference Figure 9Fig. 1 shows a structural schematic diagram of a computer device according to an embodiment of the present disclosure. The computer device includes one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components communicate with each other using different buses, and can be installed on a common motherboard or in other manners as needed. The processor can process instructions executed within the computer device, including instructions stored in the memory or on the memory to display a GUI on an external input / output device, such as a display device coupled to the interface. In some optional embodiments, multiple processors and / or buses can be used with multiple memories and multiple memory, if needed. Also, multiple computer devices can be connected, each providing part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system).

[0236] The processor 10 can be a central processor, a network processor, or a combination thereof. The processor 10 can further include a hardware chip. The hardware chip can be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device can be a complex programmable logic device, a field programmable logic device, a general array logic, or any combination thereof.

[0237] The memory 20 stores instructions executable by the at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiments.

[0238] The memory 20 can include a program storage area and a data storage area. The program storage area can store an operating system, application programs required by at least one function; and the data storage area can store data created according to the use of the computer device, etc. In addition, the memory 20 can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some optional embodiments, the memory 20 can optionally include a memory disposed remotely with respect to the processor 10, and these remote memories can be connected to the computer device through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0239] The memory 20 can include a volatile memory, such as random access memory, and / or can include a non-volatile memory, such as flash memory, hard disk, or solid state disk. The memory 20 can also include a combination of the above-mentioned types of memory. The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30, and the output device 40 can be connected through a bus or other means. The input device 30 can receive input digital or character information, and generate key signal input relating to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a trackpad, a touchpad, a pointing stick, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 can include a display device, an auxiliary lighting device (e.g., an LED), a tactile feedback device (e.g., a vibration motor), etc. The display device includes, but is not limited to, a liquid crystal display, a light emitting diode, a display, and a plasma display. In some alternative embodiments, the display device can be a touch screen.

[0240] The embodiments of the present disclosure further provide a computer readable storage medium, and the method according to the embodiments of the present disclosure can be implemented in hardware, firmware, or recorded in a storage medium, or be implemented as computer code originally stored in a remote storage medium or a non-transitory machine readable storage medium and downloaded through a network and stored in a local storage medium, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid state disk, etc. Further, the storage medium can also include a combination of the above-mentioned types of memories. It can be understood that the computer, processor, microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, processor, or hardware, the method shown in the above embodiments is implemented. Part of the embodiments of the present disclosure can be applied as a computer program product, for example, computer program instructions, when the computer program instructions are executed by a computer, the operation of the computer can call or provide the method and / or technical solution according to the present disclosure. Those skilled in the art should understand that the form of the computer program instructions in the computer readable medium includes but is not limited to source files, executable files, installation package files, etc. Correspondingly, the way of executing the computer program instructions by the computer includes but is not limited to: the computer directly executes the instructions, or the computer executes the corresponding compiled program after compiling the instructions, or the computer reads and executes the instructions, or the computer reads and installs the instructions and then executes the corresponding installed program. Here, the computer readable medium can be any available computer readable storage medium or communication medium accessible by the computer. Although the embodiments of the present disclosure are described in conjunction with the drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations fall within the scope defined by the appended claims.

Claims

1. A method for constructing quantum error-correcting codes, characterized in that, The method includes: In the first round, multiple first-class detection operators are measured to obtain the first-round measurement results of multiple first-class detection operators. The first-round measurement result of the first-class detection operator is the product of the first-round measurement results of the two first-class operators corresponding to the first-class detection operator. In the second round, multiple second-type detection operators are measured to obtain the second-round measurement results of multiple second-type detection operators. The second-round measurement result of the second-type detection operator is the product of the first-round measurement results of the two second-type operators corresponding to the second-type detection operator. In the third round, multiple third-type detection operators are measured to obtain the third-round measurement results of multiple third-type detection operators. The third-round measurement result of the third-type detection operator is the product of the third-round measurement results of the two third-type operators corresponding to the third-type detection operator. In round t, multiple first-class detection operators are measured to obtain the round t measurement results of multiple first-class detection operators. Each second-class surface operator is used as a stable sub-operator in round t, and the round t measurement results of multiple second-class surface operators are determined. t is a positive integer greater than 3, and t-1 is a multiple of 3. In round t+1, multiple second-type detection operators are measured to obtain the measurement results of multiple second-type detection operators in round t+1. Each third-type surface operator is used as a stable sub-operator in round t+1, and the measurement results of multiple third-type surface operators in round t+1 are determined. In round t+2, multiple third-class detection operators are measured to obtain the measurement results of multiple third-class detection operators in round t+2. Each first-class surface operator is used as a stable sub-operator in round t+2, and the measurement results of multiple first-class surface operators in round t+2 are determined.

2. The method according to claim 1, characterized in that, The two first operators corresponding to the first type of detection operator are the two X-type operators corresponding to the first type of detection operator. The first type of detection operator corresponds to the first type of edge. The vertices where the two data qubits targeted by the first type of edge corresponding to the first type of detection operator are located are connected through the first type of edge corresponding to the first type of detection operator. Each X-type operator in the two X-type operators corresponding to the first type of detection operator acts on different data qubits targeted by the first type of edge corresponding to the first type of detection operator.

3. The method according to claim 1, characterized in that, The two second operators corresponding to the second type of detection operator are the two Y-type operators corresponding to the second type of detection operator. The second type of detection operator corresponds to the second type edge. The vertices where the two data qubits targeted by the second type edge of the second type of detection operator are located are connected through the second type edge of the second type of detection operator. Each Y-type operator in the two Y-type operators corresponding to the second type of detection operator acts on different data qubits targeted by the second type edge of the second type of detection operator.

4. The method according to claim 1, characterized in that, The two third operators corresponding to the third type of detection operator are the two Z-type operators corresponding to the third type of detection operator. The third type of detection operator corresponds to the third type edge. The vertices where the two data qubits targeted by the third type edge of the third type of detection operator are located are connected through the third type edge of the third type of detection operator. Each Z-type operator in the two Z-type operators corresponding to the third type of detection operator acts on different data qubits targeted by the third type edge of the third type of detection operator.

5. The method according to claim 1, characterized in that, The t-th round measurement results for multiple second-class surface operators include: The product of the (t-1)th round measurement result of each third-class detection operator on the second-class surface to which the second-class surface operator belongs and the tth round measurement result of each first-class detection operator on the second-class surface is determined as the tth round measurement result of the second-class surface operator.

6. The method according to claim 1, characterized in that, The measurement results for the (t+1)th round of multiple third-type surface operators are determined as follows: The product of the t-th round measurement result of each first-class detection operator on the third-class surface to which the third-class surface operator belongs and the t+1-th round measurement result of each second-class detection operator on the third-class surface to which the third-class surface operator belongs is determined as the t+1-th round measurement result of the third-class surface operator.

7. The method according to claim 1, characterized in that, The measurement results for the (t+2)th round of multiple first-type surface operators are determined as follows: The product of the (t+1)th round measurement result of each second-class detection operator on the first-class surface to which the first-class surface operator belongs and the (t+2)th round measurement result of each third-class detection operator on the first-class surface to which the first-class surface operator belongs is determined as the (t+2)th round measurement result of the first-class surface operator.

8. The method according to claim 1, characterized in that, The method further includes: In round t, each of the plurality of first-class detection operators is used as a stable sub-operator in round t.

9. The method according to claim 1, characterized in that, The method further includes: In round t+1, each of the multiple second-type detection operators is used as a stable sub-operator in round t+1.

10. The method according to claim 1, characterized in that, The method further includes: In round t+2, each of the plurality of third-class detection operators is used as a stable sub-operator in round t+2.

11. The method according to claim 1, characterized in that, The method further includes: Based on the corresponding round measurement results of each detection operator among multiple detection operators on the target topology non-trivial circuit in the target topology structure, the corresponding round measurement results of the logic Z operator are determined. The target topology non-trivial circuit includes multiple edges, and the detection operators on the target topology non-trivial circuit are the detection operators corresponding to the edges on the target topology non-trivial circuit.

12. The method according to claim 11, characterized in that, The target topological non-trivial circuit is a horizontal topological non-trivial circuit.

13. The method according to claim 11, characterized in that, The target topological non-trivial circuit is a topological non-trivial circuit in the vertical direction.

14. The method according to claim 11, characterized in that, Based on the corresponding round measurement results of each detection operator among multiple detection operators on the non-trivial loop of the target topology, the corresponding round measurement results of the logic Z operator are determined as follows: Based on the m-th round measurement results of the corresponding detection operators among the multiple detection operators on the non-trivial loop of the target topology, the (m-1)-th round measurement results of the corresponding detection operators among the multiple detection operators on the non-trivial loop of the target topology, and the (m-2)-th round measurement results of the corresponding detection operators among the multiple detection operators on the non-trivial loop of the target topology, determine the m-th round measurement result of the logic Z operator.

15. The method according to claim 14, characterized in that, The method further includes: Determine the logic X operator for the m-th round, wherein the logic X operator for the m-th round commutes with each stable sub-operator for the m-th round, and the logic X operator for the m-th round anti-commutates with the logic Z operator for the m-th round.

16. The method according to any one of claims 1-15, characterized in that, The first type of face includes 6 edges, and the first type of face includes a combination of 3 edges, in which two edges are parallel. The second type of face includes 6 edges, and the second type of face includes a combination of 3 edges, in which two edges are parallel. The third type of face includes 6 edges, and the third type of face includes a combination of 3 edges, in which two edges are parallel.

17. A quantum error-correcting code construction device, characterized in that, The device includes: The first measurement unit is used to measure multiple first-type detection operators in the first round to obtain the first-round measurement results of multiple first-type detection operators, wherein the first-round measurement result of the first-type detection operator is the product of the first-round measurement results of the two first operators corresponding to the first-type detection operator; The second measurement unit is used to measure multiple second-type detection operators in the second round to obtain the second-round measurement results of multiple second-type detection operators. The second-round measurement result of the second-type detection operator is the product of the first-round measurement results of the two second-type operators corresponding to the second-type detection operator. The third measurement unit is used to measure multiple third-type detection operators in the third round to obtain the third-round measurement results of multiple third-type detection operators. The third-round measurement result of the third-type detection operator is the product of the third-round measurement results of the two third operators corresponding to the third-type detection operator. The fourth measurement unit is used to measure multiple first-type detection operators in round t, obtain the round t measurement results of multiple first-type detection operators, and use each second-type surface operator as a stable sub-operator in round t, and determine the round t measurement results of multiple second-type surface operators, where t is a positive integer greater than 3 and t-1 is a multiple of 3; The fifth measurement unit is used to measure multiple second-type detection operators in the (t+1)th round, obtain the measurement results of multiple second-type detection operators in the (t+1)th round, and use each third-type surface operator as a stable sub-operator in the (t+1)th round, and determine the measurement results of multiple third-type surface operators in the (t+1)th round. The sixth measurement unit is used to measure multiple third-class detection operators in the (t+2)th round, obtain the measurement results of multiple third-class detection operators in the (t+2)th round, and use each first-class surface operator as a stable sub-operator in the (t+2)th round, and determine the measurement results of multiple first-class surface operators in the (t+2)th round.

18. A computer device, characterized in that, include: A memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, the processor executing the computer instructions to perform the method of any one of claims 1 to 16.

19. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to perform the method of any one of claims 1 to 16.

20. A computer program product, characterized in that, Includes computer instructions for causing a computer to perform the method of any one of claims 1 to 16.

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