Display panel and display device

Abstract

This application provides a display panel and a display device. In the display panel provided in this application, by setting the film layer furthest from the substrate in the first support structure as a first insulating layer, the insulation path between the conductive connection portion of the first pad assembly and the test assembly can be extended. This prevents the static electricity accumulated in the first pad assembly from being conducted to the conductive connection portion of the test assembly via the first support structure, thus preventing the test assembly from being damaged by electrostatic discharge and ensuring the pass rate of the display panel. At the same time, the first support structure can effectively support the bonded control chip, preventing warping during the formation of the control chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular, the present application relates to a display panel and a display device. BACKGROUND

[0002] At present, in the binding process of the display panel, in order to guarantee the bonding effect of the control chip and the binding area in the display panel, it is usually necessary to set a support structure for supporting the control chip in the binding area, in order to facilitate the manufacture, the surface of the support structure is a conductive layer.

[0003] However, the support structure is usually located between the input pin and the test unit, so that the static electricity accumulated at the input pin is easy to hit the test unit through the support structure, which is easy to cause the display panel to appear the problem of display failure. SUMMARY

[0004] The present application is directed to the shortcomings of the prior art, and proposes a display panel and a display device to solve the technical problem that static electricity in the binding area of the display panel is easy to hit the test unit through the support structure.

[0005] In a first aspect, the embodiments of the present application provide a display panel, comprising: a display area and a binding area located outside the display area;

[0006] The binding area comprises: a first pad assembly arranged on one side of the substrate, a test assembly and at least two first support structures;

[0007] In the direction parallel to the substrate, the first support structure is located between the first pad assembly and the conductive connection part of the test assembly; the first support structure comprises at least two stacked film layers, and the film layer farthest from the substrate in the first support structure is a first insulating layer.

[0008] In a second aspect, the embodiments of the present application provide a display device, comprising a control chip and a display panel provided in the first aspect above;

[0009] The control chip comprises a binding part bound with the binding area of the display panel, the binding part comprises a third pad assembly, a fourth pad assembly and at least two third support structures; the third pad assembly is electrically connected with the first pad assembly, the fourth pad assembly is electrically connected with the conductive connection part of the test assembly, and the third support structure is in contact with the first insulating layer of the first support structure.

[0010] The technical scheme provided by the embodiments of the present application has the beneficial technical effects, including:

[0011] In the display panel provided by the embodiment of the present application, the film layer farthest from the substrate in the first support structure is set as the first insulating layer, so that the insulation path between the first pad assembly and the conductive connection part of the test assembly is extended, thereby avoiding the static electricity accumulated in the first pad assembly from being conducted to the conductive connection part of the test assembly through the first support structure, avoiding the damage of the test assembly caused by static electricity, and ensuring the yield of the display panel. Meanwhile, the first support structure can effectively support the bound control chip, and avoid the warping of the control chip.

[0012] Additional aspects and advantages of the present application will be made apparent by the following description and the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0013] The above and / or additional aspects and advantages of the present application will become apparent and be readily understood by considering the following detailed description, including the accompanying drawings, in which:

[0014] Figure 1 A top view of a display panel provided by an embodiment of the present application is shown in FIG. 1.

[0015] Figure 2 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2. Figure 1 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2.

[0016] Figure 3 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2. Figure 2 An aa-directional cross-sectional view of the binding area shown in FIG. 1 is shown in FIG. 3.

[0017] Figure 4 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2. Figure 1 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2.

[0018] Figure 5 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2. Figure 4 A structure diagram of a binding area of the display panel shown in FIG. 1 is shown in FIG. 2.

[0019] BRIEF DESCRIPTION OF DRAWINGS

[0020] 100 - substrate;

[0021] 101 - display area; 102 - binding area;

[0022] 10 - first pad assembly;

[0023] 11 - first pad; 111 - first conductive layer; 112 - first insulating layer; 113 - second conductive layer;

[0024] 20 - test assembly; 21 - conductive connection part;

[0025] 30 - first support structure; 31 - first insulating layer; 32 - first metal layer; 33 - second insulating layer; 34 - second metal layer;

[0026] 40 - second pad assembly; 41 - second pad; 411 - third conductive layer; 412 - second dielectric layer; 413 - fourth conductive layer;

[0027] 50 - second support structure;

[0028] 61 - gate; 62 - gate dielectric layer; 63 - active layer; 64 - first source / drain; 65 - second source / drain; 66 - signal wire trace; 67 - third dielectric layer; 68 - pixel electrode. DETAILED DESCRIPTION

[0029] The embodiments of the present application will be described below in conjunction with the accompanying drawings. It should be understood that the embodiments described below in conjunction with the accompanying drawings are exemplary descriptions of the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions of the embodiments of the present application.

[0030] Those skilled in the art can understand that, unless specifically stated, the singular forms "a", "an" and "the" used herein also include the plural forms. It should be further understood that the use of the term "comprise" in the specification of the present application means that the features, integers, steps and / or operations described exist, but do not exclude other features, information, data, steps, operations and / or combinations thereof supported by the present technology. The term "and / or" used herein means at least one of the items defined by the term, for example, "A and / or B" can be implemented as "A", or as "B", or as "A and B".

[0031] In order to make the purpose, technical solutions and advantages of the present application clearer, the embodiments of the present application will be described in further detail below in conjunction with the accompanying drawings.

[0032] First, the related technologies involved in the present application are described:

[0033] Since the binding part of the control chip and the display panel is flexible, in order to reduce the warping phenomenon of the binding part due to deformation, a corresponding protrusion needs to be provided on the binding part of the control chip, and correspondingly, a support structure for supporting the control chip is provided on the binding area of the display panel, and in order to facilitate manufacturing, the surface of the support structure is a conductive layer.

[0034] For the current display panel, a test unit needs to be provided to test whether the display panel meets the requirements during the test stage of the display panel. The test unit is usually provided in the binding area of the display panel, and after the test of the display panel is completed, the test unit is usually in a closed state to avoid affecting the normal work of the display panel.

[0035] At present, the support structure is usually located between the input pin and the test unit, and especially for the support structure located between the input pin and the conductive connection part of the test unit, the static electricity accumulated at the input pin is easy to conduct to the conductive connection part of the test unit through the support structure as a stepping stone, which causes the test unit to be easily electrocuted and causes the display panel to have a display problem.

[0036] The display panel and the display device provided by the present application aim to solve the above technical problems in the prior art.

[0037] The technical solutions of the present application and how the technical solutions of the present application solve the above technical problems will be described in detail below with specific embodiments. It should be pointed out that the following embodiments can be mutually referenced, borrowed or combined, and the same terms, similar features and similar implementation steps in different embodiments will not be described repeatedly.

[0038] The present application provides a display panel, a structural schematic diagram of the display panel is shown in Figure 1 , Figure 1 A structural schematic diagram of the binding area of the display panel is shown in Figure 2 , Figure 2 An aa cross-sectional view of the binding area is shown in Figure 3 . The display panel comprises a display area 101 and a binding area 102 located outside the display area 101.

[0039] In the present application, the binding area 102 comprises a first pad assembly 10, a test assembly 20 and at least two first support structures 30 arranged on one side of the substrate 100; the first support structure 30 is located between the conductive connection part 21 of the first pad assembly 10 and the test assembly 20 in a direction parallel to the substrate 100; the first support structure 30 comprises at least two stacked film layers, and the film layer farthest from the substrate in the first support structure 30 is a first insulating layer 31.

[0040] In the display panel provided by the present application, by arranging the film layer farthest from the substrate in the first support structure 30 as the first insulating layer 31, the insulating path between the conductive connection part 21 of the first pad assembly 10 and the test assembly 20 can be extended, so that the static electricity accumulated in the first pad assembly 10 can be prevented from conducting to the conductive connection part 21 of the test assembly 20 through the first support structure 30 as a stepping stone, the test assembly 20 can be prevented from being damaged by electrocution, and the yield of the display panel can be ensured. At the same time, the first support structure 30 can effectively support the bound control chip, and the warping of the control chip can be avoided.

[0041] In the present application, as Figure 1As shown, the display panel includes a display area 101 and a binding area 102. Optionally, the display panel includes the display area 101 and a non-display area, the non-display area surrounds the display area 101, and the binding area 102 is located in the non-display area.

[0042] In the embodiments of the present application, as shown in Figure 2 As shown, the binding area 102 includes a first pad assembly 10, a test assembly 20, and at least two first support structures 30. The first support structure 30 is located between the first pad assembly 10 and the test assembly 20 along a first direction, i.e., along a direction in which the first pad assembly 10 points to the test assembly 20.

[0043] Optionally, the first pad assembly 10 is electrically connected with a control chip, and the first pad assembly 10 is configured to receive an input signal; and the test assembly 20 is configured to test whether the display panel meets the requirements in a test stage of the display panel.

[0044] As shown in Figure 2 As shown, since the first pad assembly 10 is located at the edge of the binding area 102, in turn, the first pad assembly 10 is more easily affected by the outside and carries static electricity. Before the display panel is bound with the control chip, the static electricity carried by the first pad assembly 10 is difficult to release. With the accumulation of static electricity, when the accumulated static electricity reaches a certain amount, the static electricity is easy to break through the air and conduct to the adjacent conductive components.

[0045] Optionally, as shown in Figure 3 As shown, along a direction parallel to the substrate 100, the first support structure 30 is located between the first pad assembly 10 and a conductive connection part 21 of the test assembly 20, and the conductive connection part 21 is configured to be electrically connected with the control chip.

[0046] Optionally, as shown in Figure 3 As shown, the first support structure 30 includes at least two stacked film layers, wherein a film layer farthest from the substrate is a first insulating layer 31, so that in the first direction, the insulation path between the first pad assembly 10 and the conductive connection part 21 of the test assembly 20 can be extended, thereby avoiding the accumulated static electricity in the first pad assembly 10 from being conducted to the conductive connection part 21 of the test assembly 20 through the first support structure 30 as a stepping stone, avoiding the test assembly 20 from being damaged by static electricity, and ensuring the yield of the display panel.

[0047] In the embodiments of the present application, after the display panel is bound with the control chip, the first support structure 30 in the display panel can effectively support the bound control chip, and can avoid the control chip from being warped.

[0048] Optionally, in the embodiments of the present application, the material of the first insulating layer 31 includes SiNx (silicon nitride).

[0049] Optionally, such as Figure 3 As shown, in one embodiment of this application, the surfaces of the first pad assembly 10, the conductive connection portion 21 of the test assembly 20, and the first support structure 30 away from the substrate 100 are coplanar.

[0050] Optionally, in this embodiment, along a direction perpendicular to and away from the substrate 100, the surfaces of the first pad assembly 10, the conductive connection portion 21 of the test assembly 20, and the surface of the first support structure 30 away from the substrate 100 are coplanar, such that the distances from the surface of the first pad assembly 10 to the surface of the substrate 100, the distances from the surface of the conductive connection portion 21 of the test assembly 20 to the surface of the substrate 100, and the distances from the surface of the first support structure 30 to the surface of the substrate 100 are all the same.

[0051] Optionally, such as Figure 3 As shown, the conductive connection portion 21 of the first pad assembly 10 and the test assembly 20 and the first support structure 30 have the same height, so that after the control chip is bonded to the display panel, the surface of the bonding portion in the control chip is a plane, which can prevent the bonding portion in the control chip from deforming and reduce the probability of the control chip warping.

[0052] Optionally, in this embodiment of the application, since both the first pad assembly 10 and the test assembly 20 include at least two stacked film layers, by setting the first support structure 30 to include at least two stacked film layers, it is convenient to manufacture the first pad assembly 10, the test assembly 20 and the first support structure 30 simultaneously during the manufacturing process of the display panel, thereby reducing the manufacturing difficulty of the display panel, simplifying the manufacturing process of the display panel, and reducing the manufacturing cost of the display panel.

[0053] Optionally, such as Figure 3 and Figure 4 As shown, in one embodiment of this application, the first support structure 30 includes: a first insulating layer 31, a first metal layer 32, a second insulating layer 33, and a second metal layer 34.

[0054] Optionally, such as Figure 3 and Figure 4 As shown, the first support structure 30 includes four film layers, and the first metal layer 32, the second insulating layer 33, the second metal layer 34 and the first insulating layer 31 are stacked sequentially on one side of the substrate 100 along a direction perpendicular to and away from the substrate 100.

[0055] Optionally, such as Figure 3 and Figure 4As shown, the first metal layer 32 is disposed on one side of the substrate 100, the second insulating layer 33 is disposed on the side of the first metal layer 31 away from the substrate 100, and the second insulating layer 33 covers the top surface and side surface of the first metal layer 31; the second metal layer 34 is disposed on the side of the second insulating layer 33 away from the substrate 100, and the first insulating layer 31 is disposed on the side of the second metal layer 34 away from the substrate 100, and the first insulating layer 31 covers the top surface and side surface of the second metal layer 34.

[0056] It should be noted that, in order to facilitate the reader to intuitively understand the structure of the first support structure 30, Figure 3 and Figure 4 the dashed line in the first insulating layer 31 and the second insulating layer 33 represents the boundary between the first insulating layer 31 and the second insulating layer 33.

[0057] Optionally, in the embodiment of the present application, the first insulating layer 31 and the second insulating layer 33 both include SiNx, and by alternately stacking the insulating layer and the metal layer, the structural strength of the first support structure 30 can be enhanced, and the support effect of the first support structure 30 can be guaranteed.

[0058] Optionally, as shown in Figure 2 and Figure 3 in an embodiment of the present application, the first pad assembly 10 includes at least two first pads 11; the first pad 11 includes: a first conductive layer 111, a first dielectric layer 112 and a second conductive layer 113 which are sequentially stacked in the direction perpendicular to and away from the substrate 100; the first conductive layer 111 and the second conductive layer 113 are connected through a via, and the first conductive layer 111 is disposed in the same layer as the first metal layer 32.

[0059] Optionally, as shown in Figure 2 the first pad assembly 10 includes a plurality of first pads 11, and each first pad 11 includes at least two stacked film layers.

[0060] Optionally, as shown in Figure 3 the first pad 11 includes three film layers, and the first conductive layer 111, the first dielectric layer 112 and the second conductive layer 113 are sequentially stacked on one side of the substrate 100 in the direction perpendicular to and away from the substrate 100, and the first conductive layer 111 and the second conductive layer 113 are connected through a via.

[0061] Optionally, as shown in Figure 3 the first conductive layer 111 is disposed on one side of the substrate 100, the first dielectric layer 112 is disposed on the side of the first conductive layer 111 away from the substrate 100, the first dielectric layer 112 covers the top surface and side surface of the first conductive layer 111, and the second conductive layer 113 is disposed on the side of the first dielectric layer 112 away from the substrate 100. Optionally, as Figure 3As shown, the first dielectric layer 112 is provided with a via, and the first conductive layer 111 and the second conductive layer 113 are connected through the via.

[0062] Optionally, as shown in FIG. 1, the first conductive layer 111 is provided on the first metal layer 32, and the material of the first conductive layer 111 is the same as that of the first metal layer 32, so as to facilitate the simultaneous manufacturing of the first pad assembly 10 and the first support structure 30, thereby reducing the manufacturing difficulty of the display panel, simplifying the manufacturing process of the display panel, and reducing the manufacturing cost of the display panel. Figure 3

[0063] Optionally, the material of the first dielectric layer 112 includes SiNx, so as to facilitate the simultaneous manufacturing of the first dielectric layer 112 and the second insulating layer 33.

[0064] Optionally, as shown in FIG. 1, in an embodiment of the present application, the binding area 102 further includes: a second pad assembly 40, provided on one side of the substrate 100, along a direction in which the first pad assembly 10 points to the test assembly 20, the second pad assembly 40 is provided at an end of the test assembly 20 away from the first pad assembly 10. Figure 2

[0065] Optionally, as shown in FIG. 1, along the direction in which the first pad assembly 10 points to the test assembly 20, the second pad assembly 40 is provided at an end of the test assembly 20 away from the first pad assembly 10, that is, along the first direction, the first pad assembly 10, the first support structure 30, the test assembly 20 and the second pad assembly 40 are arranged in sequence. Figure 2

[0066] Optionally, in an embodiment of the present application, the second pad assembly 40 is electrically connected with the control chip, and the second pad assembly 40 is used for transmitting an output signal to the control chip.

[0067] Optionally, as shown in FIG. 1, in an embodiment of the present application, the second pad assembly 40 includes at least two second pads 41; the second pad 41 includes: a third conductive layer 411, a second dielectric layer 412 and a fourth conductive layer 413 which are sequentially stacked along a direction perpendicular to and away from the substrate 100; the third conductive layer 411 and the fourth conductive layer 413 are connected through a via, and the third conductive layer 411 is provided on the first metal layer 32. Figure 2 Figure 3 Optionally, as shown in FIG. 1, in an embodiment of the present application, the second pad assembly 40 includes at least two second pads 41; the second pad 41 includes: a third conductive layer 411, a second dielectric layer 412 and a fourth conductive layer 413 which are sequentially stacked along a direction perpendicular to and away from the substrate 100; the third conductive layer 411 and the fourth conductive layer 413 are connected through a via, and the third conductive layer 411 is provided on the first metal layer 32.

[0068] Optionally, as shown in FIG. 1, in an embodiment of the present application, the second pad assembly 40 includes at least two second pads 41; the second pad 41 includes: a third conductive layer 411, a second dielectric layer 412 and a fourth conductive layer 413 which are sequentially stacked along a direction perpendicular to and away from the substrate 100; the third conductive layer 411 and the fourth conductive layer 413 are connected through a via, and the third conductive layer 411 is provided on the first metal layer 32. Figure 2 Optionally, as shown in FIG. 1, in an embodiment of the present application, the second pad assembly 40 includes at least two second pads 41; the second pad 41 includes: a third conductive layer 411, a second dielectric layer 412 and a fourth conductive layer 413 which are sequentially stacked along a direction perpendicular to and away from the substrate 100; the third conductive layer 411 and the fourth conductive layer 413 are connected through a via, and the third conductive layer 411 is provided on the first metal layer 32.

[0069] Figure 3 ​​​​​As shown, the second pad assembly 40 includes three stacked film layers, in the direction perpendicular to and away from the substrate 100, the third conductive layer 411, the second dielectric layer 412 and the fourth conductive layer 413 are sequentially stacked on one side of the substrate 100, and the third conductive layer 411 and the fourth conductive layer 413 are connected through a via hole.

[0070] Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100. Figure 3 Figure 3 Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100.

[0071] Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100. Figure 3 Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100.

[0072] Figure 2 Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100.

[0073] Optionally, the material of the second dielectric layer 412 includes SiNx, which facilitates the simultaneous manufacturing of the second dielectric layer 412 and the second insulating layer 33.

[0074] Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100. Figure 3 and Figure 3 Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100.

[0075] Optionally, as shown in FIG. 1B, the third conductive layer 411 is provided on one side of the substrate 100, the second dielectric layer 412 is provided on the side of the third conductive layer 411 away from the substrate 100, the second dielectric layer 412 covers the top surface and the side surface of the third conductive layer 411, and the fourth conductive layer 413 is provided on the side of the second dielectric layer 412 away from the substrate 100. Figure 5 ​​As shown, the first pad 11 in the first pad assembly 10 is away from the surface of the substrate 100, the conductive connecting part 21 is away from the surface of the substrate 100, the first support structure 30 is away from the surface of the substrate 100, and the second pad 41 in the second pad assembly 40 is away from the surface of the substrate 100, so that the height of the first pad 11, the conductive connecting part 21, the first support structure 30 in the first pad assembly 10 and the second pad 41 in the second pad assembly 40 is the same, so that after the control chip is bonded with the display panel, the surface of the bonding part in the control chip is a plane, the deformation of the bonding part in the control chip can be avoided, and the probability of warping of the control chip can be reduced.

[0076] Optionally, as shown in 4, in an embodiment of the present application, the first conductive layer 111 and the third conductive layer 411 are arranged in the same layer as the gate 61 of the thin film transistor arranged in the display area 101; the second conductive layer 113 and the fourth conductive layer 413 are arranged in the same layer as the pixel electrode 68 arranged in the display area 101.

[0077] Optionally, in the embodiment of the present application, the display area 101 of the display panel is provided with a pixel circuit including a thin film transistor, a pixel electrode 68 and the like.

[0078] Optionally, in the embodiment of the present application, as shown in Figure 2 The pixel circuit located in the display area 101 includes a thin film transistor, a signal wire trace 66 and a pixel electrode 68.

[0079] Optionally, the thin film transistor includes a gate 61, a gate dielectric layer 62, an active layer 63, a first source / drain electrode 64 and a second source / drain electrode 65. Optionally, the second source / drain electrode 65 is electrically connected with the signal wire trace 66, and the pixel electrode 68 is located on the side of the third dielectric layer 67 away from the substrate 100. Optionally, the first source / drain electrode 64 includes one of a source and a drain, and the second source / drain electrode 65 includes the other of the source and the drain.

[0080] Optionally, in the embodiment of the present application, the first conductive layer 111 and the third conductive layer 411 are arranged in the same layer as the gate 61 of the thin film transistor arranged in the display area 101, and the materials of the first conductive layer 111, the third conductive layer 411 and the gate 61 are the same, so that the first conductive layer 111, the third conductive layer 411 and the gate 61 can be manufactured simultaneously, thereby reducing the manufacturing difficulty of the display panel, simplifying the manufacturing process of the display panel, and reducing the manufacturing cost of the display panel.

[0081] Optionally, in the embodiment of the present application, the second conductive layer 113 and the fourth conductive layer 413 are arranged in the same layer as the pixel electrode 68 arranged in the display area 101, and the second conductive layer 113, the fourth conductive layer 413 and the pixel electrode 68 are made of the same material, so that the second conductive layer 113, the fourth conductive layer 413 and the pixel electrode 68 can be simultaneously manufactured, thereby reducing the manufacturing difficulty of the display panel, simplifying the manufacturing process of the display panel, and reducing the manufacturing cost of the display panel.

[0082] Optionally, in the embodiment of the present application, the second conductive layer 113, the fourth conductive layer 413 and the pixel electrode 68 are made of ITO (Indium Tin Oxide, Indium Tin Oxide).

[0083] Optionally, in the embodiment of the present application, the second metal layer 34 and the signal wire trace 66 are made of the same material, so that the second metal layer 34 and the signal wire trace 66 can be simultaneously manufactured, thereby reducing the manufacturing difficulty of the display panel, simplifying the manufacturing process of the display panel, and reducing the manufacturing cost of the display panel.

[0084] Optionally, as shown in FIG. 1, Figure 2 in one embodiment of the present application, a second support structure 50 is arranged between the first support structure 30 and the test assembly 20 in the direction of the first pad assembly 10 pointing to the test assembly 20.

[0085] Optionally, as shown in FIG. 1, ​ in the first direction, a second support structure 50 is further arranged between the first support structure 30 and the test assembly 20. Optionally, in the first direction, the first pad assembly 10, the second support structure 50, the first support structure 30, the test assembly 20 and the second pad assembly 40 are arranged in sequence.

[0086] Optionally, in the embodiment of the present application, in the case of damage to the first support structure 30, the second support structure 50 can support the control chip, and by arranging the second support structure 50, the display panel can effectively support the control chip.

[0087] Based on the same inventive concept, the embodiments of the present application provide a display device, which comprises a control chip and a display panel provided by any of the above embodiments.

[0088] In the embodiment of the present application, the control chip comprises a binding part bound with the binding area 102 of the display panel, and the binding part comprises a third pad assembly, a fourth pad assembly and at least two third support structures; the third pad assembly is electrically connected with the first pad assembly 10, the fourth pad assembly is electrically connected with the conductive connection part 21 of the test assembly 20, and the third support structure is in contact with the first insulating layer 31 of the first support structure 30.

[0089] In the embodiments of the present application, the display device adopts any one of the display panels provided in the foregoing embodiments, and the principle and technical effects can be referred to the foregoing embodiments, which will not be described herein.

[0090] Optionally, in the embodiments of the present application, the display device comprises a liquid crystal display device.

[0091] Optionally, in the embodiments of the present application, the control chip comprises a binding part, which is bound with the binding area 102 of the display panel. The binding part comprises a third pad assembly, a fourth pad assembly and at least two third support structures. Optionally, each pin of the third pad assembly is electrically connected with the first pad 11 of the first pad assembly 10 of the display panel, for inputting a signal to the first pad 11 of the first pad assembly 10; each pin of the fourth pad assembly is electrically connected with the conductive connecting part 21 of the test assembly 20; and the third support structure is in contact with the first insulating layer 31 of the first support structure 30.

[0092] Optionally, the binding part further comprises a fifth pad assembly, and each pin of the fifth pad assembly is electrically connected with the second pad 41 of the second pad assembly 40 of the display panel.

[0093] By applying the embodiments of the present application, the following beneficial effects can be achieved:

[0094] In the display panel provided in the embodiments of the present application, by setting the film layer farthest from the substrate in the first support structure 30 as the first insulating layer 31, the insulation path between the first pad assembly 10 and the conductive connecting part 21 of the test assembly 20 can be extended, so that the accumulated static electricity in the first pad assembly 10 can be prevented from being conducted to the conductive connecting part 21 of the test assembly 20 by the first support structure 30 as a jumping-off point, the test assembly 20 can be prevented from being damaged by static electricity, and the yield of the display panel can be ensured. At the same time, the first support structure 30 can effectively support the bound control chip, and the warping of the control chip can be avoided.

[0095] Those skilled in the art can understand that the steps, measures and schemes in the various operations, methods and processes discussed in the present application can be alternated, changed, combined or deleted. Further, other steps, measures and schemes in the various operations, methods and processes discussed in the present application can also be alternated, changed, rearranged, decomposed, combined or deleted. Further, the steps, measures and schemes in the prior art with the various operations, methods and processes disclosed in the present application can also be alternated, changed, rearranged, decomposed, combined or deleted.

[0096] In the description of the present application, the directions or positional relationships indicated by the words "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like are based on the exemplary directions or positional relationships shown in the drawings, and are for the purpose of facilitating the description or simplifying the description of the embodiments of the present application, and do not indicate or imply that the devices or components indicated thereby must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0097] The terms "first", "second", "third", etc. are used only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated thereby. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specified.

[0098] In the description of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connection" should be understood in a broad sense, for example, can be fixed connection, can also be detachable connection, or integral connection; can be directly connected, can also be indirectly connected through an intermediate medium, can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0099] In the description of the present application, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0100] The above is only part of the embodiments of the present application, and it should be pointed out that, for those skilled in the art, without departing from the technical concept of the present application, other similar implementation means based on the technical idea of the present application also belong to the protection scope of the embodiments of the present application.

Claims

1. A display panel, comprising: The display area and a binding area outside the display area; characterized in that, The binding area comprises a first pad assembly, a test assembly and at least two first support structures arranged on one side of the substrate; In a direction parallel to the substrate, the first support structure is located between the conductive connection part of the first pad assembly and the test assembly; the first support structure comprises at least two stacked film layers, and the film layer farthest from the substrate in the first support structure is a first insulating layer.

2. The display panel of claim 1, wherein, The surface of the first pad assembly, the conductive connection part of the test assembly and the first support structure far from the substrate are coplanar.

3. The display panel of claim 1, wherein, The first support structure comprises: A first metal layer arranged on one side of the substrate; A second insulating layer arranged on one side of the first metal layer far from the substrate; A second metal layer arranged on one side of the second insulating layer far from the substrate; and the first insulating layer is arranged on one side of the second metal layer far from the substrate.

4. The display panel of claim 3, wherein, The first pad assembly comprises at least two first pads; The first pad comprises a first conductive layer, a first dielectric layer and a second conductive layer stacked in order along a direction perpendicular to and away from the substrate; the first conductive layer and the second conductive layer are connected through a via, and the first conductive layer is arranged in the same layer as the first metal layer.

5. The display panel of claim 4, wherein, The binding area further comprises a second pad assembly arranged on one side of the substrate, and the second pad assembly is arranged at one end of the test assembly away from the first pad assembly in a direction in which the first pad assembly points to the test assembly.

6. The display panel of claim 5, wherein, The second pad assembly comprises at least two second pads; The second pad comprises a third conductive layer, a second dielectric layer and a fourth conductive layer stacked in order along a direction perpendicular to and away from the substrate; the third conductive layer and the fourth conductive layer are connected through a via, and the third conductive layer is arranged in the same layer as the first metal layer.

7. The display panel of claim 5, wherein, The surface of the first pad assembly, the conductive connection part of the test assembly, the first support structure and the second pad assembly far from the substrate are coplanar.

8. The display panel of claim 6, wherein, The first conductive layer and the third conductive layer are arranged in the same layer as the gate of a thin film transistor arranged in the display area; The second conductive layer and the fourth conductive layer are arranged in the same layer as the pixel electrode arranged in the display area.

9. The display panel of claim 1, wherein, In the direction in which the first pad assembly points to the test assembly, a second support structure is arranged between the first support structure and the test assembly.

10. A display device, characterized by comprising: A display panel comprising a control chip and any one of the display panels according to claims 1-9; The control chip comprises a binding part bound with the binding area of the display panel, and the binding part comprises a third pad assembly, a fourth pad assembly and at least two third support structures; the third pad assembly is electrically connected with the first pad assembly, the fourth pad assembly is electrically connected with the conductive connection part of the test assembly, and the third support structure is in contact with the first insulating layer of the first support structure.

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