Flash memory problem source location methods, devices, media and memory

Abstract

This application relates to the field of memory technology, and more particularly to a method, apparatus, medium, and memory for locating flash memory problem sources. The method includes: dividing a unit storage cell into a data storage area and a free area; in response to each write operation to a unit storage cell, storing in the free area a status identifier corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes; if the anomaly can be reproduced, determining the write operation process performed when the anomaly occurred based on the status identifier, inserting print information into the code corresponding to the write operation process, and locating the problem source based on the obtained print log and logical unit address; if the anomaly cannot be reproduced, obtaining all information stored in the free area of ​​the flash memory to obtain free area information, and locating the problem source based on the logical unit address, cumulative number of writes, and status identifier in the free area information. Therefore, this application can solve the problem of slow speed in locating memory problem sources.

Description

Technical Field

[0001] This application relates to the field of memory technology, and in particular to a method, apparatus, medium and memory for locating flash memory problem sources. Background Technology

[0002] When receiving feedback from users about defective products, R&D personnel need to reproduce the problem scenario to determine the cause. However, due to users not following standard use cases or encountering special circumstances, it is often impossible to effectively reproduce the problem scenario, let alone effectively locate the error. Therefore, it is necessary to infer the location and information of the error. First, all the data in the NAND flash memory needs to be extracted. The existing NAND storage method is generally a data byte + spare byte storage format. The spare area usually stores ECC codes and other software information, such as wear level or logical-to-physical block mapping information. The above software information is of great help in finding error information. Then, by stepping through the above software information until the erroneous data is located, the cause of the error can be inferred by writing logic before and after. However, this method requires extracting all the data in the NAND and then stepping through the problem, which makes the problem source location slow. Summary of the Invention

[0003] In view of this, embodiments of this application provide a method, apparatus, medium, and memory for locating flash memory problem sources, which can effectively solve the problem of slow speed in locating memory problem sources.

[0004] In a first aspect, embodiments of this application provide a method for locating the source of flash memory problems, including:

[0005] Divide the unit of storage into a data storage area and a free area;

[0006] In response to each write operation to a unit of storage, the status flag corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes are stored in the free area.

[0007] If the anomaly can be reproduced, the write operation process performed when the anomaly occurred is determined according to the status identifier. Print information is inserted into the code corresponding to the write operation process, and the source of the problem is located according to the obtained print log and the logical unit address.

[0008] If the anomaly cannot be reproduced, all information stored in the free area of ​​the flash memory is obtained to obtain the free area information, and the source of the problem is located based on the logical unit address, the cumulative number of writes, and the status identifier in the free area information.

[0009] In some embodiments, the status identifier includes a host write data status identifier, a garbage collection status identifier, and a power-on rebuild status identifier;

[0010] Each write operation to a unit of storage cell stores a status identifier corresponding to the write operation process in the free area, including:

[0011] In any of the host write data process, garbage collection process, and power-on reconstruction process, each time a write operation is performed on the unit storage cell, the corresponding status identifier is stored in the free area in an orderly manner.

[0012] In some embodiments, prior to each write operation to a unit of storage, the method further includes:

[0013] The free area corresponding to the unit storage unit is divided into several sub-free areas, which are used to store error correction code information, the cumulative number of writes, the logical unit address and each of the status identifiers.

[0014] Each of the sub-free areas includes x bytes of bad blocks, n bytes of logical unit address information storage area, y bytes of error correction code information storage area, m bytes of cumulative write count storage area, and p bytes of status identifier storage area.

[0015] In some embodiments, if the exception can be reproduced, the write operation process performed when the exception occurred is determined based on the status identifier, print information is inserted into the code corresponding to the write operation process, and the source of the problem is located based on the obtained print log and the logical unit address, including:

[0016] The corresponding write operation process is determined based on the status identifier, and the determined write operation process is simulated using the replaced flash memory.

[0017] In the defined write operation process, print log information is added to the corresponding code according to the logical unit address and the error correction code information;

[0018] During the simulation of the write operation process, the output print logs are collected;

[0019] The source of the problem was determined by analyzing the printed logs.

[0020] The determined problem source is compared and verified based on the error correction code information, the status identifier, and the logical unit address.

[0021] In some embodiments, if the anomaly cannot be reproduced, all information stored in the free area of ​​the flash memory is obtained to obtain free area information, and the source of the problem is located based on the logical unit address, the cumulative number of writes, and the status identifier in the free area information, including:

[0022] From the acquired free area information, determine the free area information related to the logical unit address to obtain the relevant free area information;

[0023] Based on the cumulative write count of each piece of information in the relevant free area information, sort the pieces of information in the relevant free area information, obtain the information corresponding to the one with the largest cumulative write count, and obtain the valid information;

[0024] Based on the logical unit address and its corresponding table entry in the valid information, the logical unit address of the problem source is determined, and the write operation process is restored based on the status identifier.

[0025] In some embodiments, x = 1; y = 6; n ∈ (2, 4); m ∈ (2, 4); p ∈ (2, 5); x + y + n + m + p = 16.

[0026] In some embodiments, dividing a unit storage cell into a data storage area and a free area includes:

[0027] The flash memory is divided into several unit storage cells, each of which includes a 512-byte data storage area and a 16-byte free area.

[0028] Secondly, embodiments of this application provide a flash memory problem source location device, comprising:

[0029] The region partitioning module is used to divide a unit of storage into a data storage area and a free area;

[0030] The free area information writing module is used to respond to each write operation to a unit storage unit by storing the status identifier corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes in the free area.

[0031] The first problem source location module is used to determine the write operation process when the anomaly occurs based on the status identifier when the anomaly can be reproduced, insert print information into the code corresponding to the write operation process, and locate the problem source based on the obtained print log and the logical unit address.

[0032] The second problem source location module is used to obtain all the information stored in the free area of ​​the flash memory when the anomaly cannot be reproduced, obtain the free area information, and locate the problem source based on the logical unit address, the cumulative number of writes and the status identifier in the free area information.

[0033] Thirdly, embodiments of this application provide a computer-readable storage medium storing a computer program, which, when executed on a processor, implements a flash memory problem source localization method provided in this application.

[0034] Fourthly, embodiments of this application provide a flash memory, including: the flash memory uses a flash memory problem source localization method provided in this application to locate the problem source.

[0035] The embodiments of this application have the following beneficial effects:

[0036] This application, when a flash memory malfunctions, reads error correction code information, cumulative write counts, logical unit address data corresponding to each written data, and status identifiers corresponding to each write operation process stored in the free area of ​​the malfunctioning flash memory; and locates the source of the problem based on the error correction code information, the logical unit address data, the cumulative write counts, and the status identifiers. This application stores the status identifiers of each write operation process and the cumulative write counts, enabling rapid location of the write operation process where the problem occurs. Attached Figure Description

[0037] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This diagram illustrates a free area in the flash memory problem source localization method according to an embodiment of this application.

[0039] Figure 2 A flowchart of a flash memory problem source localization method according to an embodiment of this application is shown;

[0040] Figure 3 This paper illustrates a flowchart of a flash memory problem source localization method according to an embodiment of the present application, where the anomaly can be reproduced to locate the problem source.

[0041] Figure 4 This paper illustrates a flowchart of a flash memory problem source localization method according to an embodiment of the present application, where an anomaly cannot be reproduced to locate the problem source.

[0042] Figure 5 Another flowchart of the flash memory problem source localization method according to an embodiment of this application is shown;

[0043] Figure 6 A schematic diagram of a flash memory problem source location device according to an embodiment of this application is shown.

[0044] Explanation of key component symbols:

[0045] 110 - Logical unit address information storage area; 120 - Cumulative write count storage area; 130 - Bad block; 140 - Error correction code information storage area; 150 - Status identifier storage area; 410 - Area partitioning module; 420 - Free area information writing module; 430 - First problem source location module; 440 - Second problem source location module. Detailed Implementation

[0046] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0047] The components of the embodiments of this application described and illustrated in the accompanying drawings can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of this application provided in the drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0048] In the following text, the terms "comprising," "having," and their cognates, which may be used in various embodiments of this application, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more combinations thereof. Furthermore, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0049] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of this application pertain. Terms (such as those defined in commonly used dictionaries) shall be interpreted as having the same meaning as in their contextual meaning in the relevant technical field and shall not be construed as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of this application.

[0050] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0051] In existing technologies, locating the source of a problem requires stepwise analysis of all data in the NAND flash memory, which is slow. Therefore, this application proposes a method, apparatus, medium, and flash memory for locating flash memory problem sources, which can effectively solve the problem of slow speed in locating memory problem sources.

[0052] This application provides a memory, including flash memory, wherein the flash memory is used to locate the problem source using the flash memory problem source location method of the embodiments of this application.

[0053] A typical NAND flash memory includes a 64-byte free area for additional storage on each page (each 512-byte sector + 16 bytes). This free area can be used to store ECC (Error Correcting Code) codes and other software information, such as wear levels or logical-to-physical block mapping information.

[0054] In this application, the storage space of the free area needs to be readjusted. The free area corresponding to the unit storage unit is divided into several sub-free areas to store error correction code information, the cumulative write count, the logical unit address data, and each status identifier. Each sub-free area includes x bytes of bad block 130, n bytes of logical unit address information storage area 110, y bytes of error correction code information storage area 140, m bytes of cumulative write count storage area 120, and p bytes of status identifier storage area 150. Wherein, x = 1; y = 6; n ∈ (2, 4); m ∈ (2, 4); p ∈ (2, 5); x + y + n + m + p = 16. Preferably, x = 1; y = 6; n = 3; m = 2; p = 4; x + y + n + m + p = 16.

[0055] Exemplary, such as Figure 1 As shown, a page in flash memory can be divided into four units. Each unit includes a 512-byte data storage area and a 16-byte free area. Six bytes are used to store ECC (Error Correcting Code), and 12 bytes are used to store the Logical Unit Address (LUA) and other information. The specific division can be determined according to actual needs and solutions; this application does not impose specific limitations.

[0056] The following examples illustrate the method for locating the source of flash memory problems.

[0057] Figure 2 A flowchart illustrating a flash memory problem source localization method according to an embodiment of this application is shown. Exemplarily, the flash memory problem source localization method includes the following steps:

[0058] S10 divides the unit storage cell into a data storage area and a free area.

[0059] The flash memory is divided into several unit storage cells, each of which includes a 512-byte data storage area and a 16-byte free area.

[0060] S20, in response to each write operation to a unit storage cell, the status identifier corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes are stored in the free area.

[0061] The status identifier data includes multiple status identifiers, which are identifiers corresponding to the write operation process stored in the free area corresponding to the unit storage unit in response to each write operation to the unit storage unit during the write operation process; the logical unit address data includes multiple logical unit addresses, which are logical unit addresses corresponding to the write data stored in the free area in response to each write operation to the unit storage unit during the write operation process; the cumulative write count increases by a set step value for each write operation.

[0062] Furthermore, prior to each write operation to a unit of storage cell, the following steps are also included:

[0063] First, a portion of the spare area is released according to demand. Then, the spare area corresponding to the unit storage unit is divided into several sub-spare areas to store error correction code information of the faulty flash memory, the cumulative write count, the logical unit address data, and various status identifiers. For example, a 1-byte bad block storage area 110 is used to store bad block information, a 3-byte logical unit address information storage area 110 is used to store the logical unit address of each written data, a 6-byte error correction code information storage area 140 is used to store ECC information, a 2-byte cumulative write count storage area 120 is used to store the cumulative write count variable, and a 4-byte status identifier storage area 150 is used to store the status identifiers of each write operation process.

[0064] During a write operation, a preset amount of data is written, corresponding to one logical unit address. Therefore, a single write operation may involve multiple logical unit addresses. For example, data is written to page 0 (physical address n), followed by data being written to page 1 (physical address n+1). Then, the data on page 0 is updated, but the updated data is not overwritten. The FTL translation layer writes it to physical address (n+2) and marks (physical address n) as "invalid." In other words, the same logical unit address may correspond to different physical addresses. Therefore, this embodiment uses a `count` variable to record the number of write operations, thereby locating the data from valid write operations.

[0065] A write operation consists of multiple write operations, and naturally, the cumulative number of writes, count, will increase by a step value multiple times. Preferably, the step value is 1, and count is incremented by 1 for each write operation.

[0066] Each write operation saves a status flag corresponding to that write operation process. The stored status flags primarily represent write operation processes for complex problem-solving scenarios. This write operation process is characterized by frequent updates to NAND data.

[0067] Furthermore, the status identifiers of the write operation process include host write data status identifiers, garbage collection status identifiers, power-on reconstruction status identifiers, etc. In practice, which statuses are identified depends on the specific firmware scheme, and this invention does not make specific limitations. The boot process is a power-on startup process, which mainly includes a reconstruction process. The reconstruction process is as follows: when the last power failure occurred, the system write was interrupted, and P2L did not have time to update. After the power failure, the data on the buffer is lost, and the information that was not updated to the NAND will also be lost. Therefore, it is necessary to reconstruct the previous state at the time of the power failure as much as possible based on the information that has already been written when powering on.

[0068] Each write operation performed on a unit of storage cell stores a status identifier corresponding to the write operation process, including:

[0069] During the host write data process, garbage collection process, and power-on reconstruction process, each time a write operation is performed on the unit storage unit, the corresponding status identifier is stored in the free area in an orderly manner.

[0070] Specifically, this embodiment adds a new variable to record status identifiers. For example, the status identifier for the host data process is FC, the status identifier for the power on process is FE, and the status identifier for the GC migration process is FD. In the corresponding write operation process, the corresponding status is used to determine the variable to be written, and then stored in NAND along with the data. The status variable is stored inside a structure, and its function is to set the corresponding status so that subsequent processes can enter the process corresponding to this status.

[0071] S30, if the exception can be reproduced, the write operation process performed when the exception occurs is determined according to the status identifier, print information is inserted into the code corresponding to the write operation process, and the source of the problem is located according to the obtained print log and the logical unit address.

[0072] For example, in step S30, if the anomaly can be reproduced, the write operation procedure performed when the anomaly occurred is determined based on the status identifier. Print information is inserted into the code corresponding to the write operation procedure, and the source of the problem is located based on the obtained print log and the logical unit address. Figure 3 As shown, it includes:

[0073] S31, determine the corresponding write operation process according to the status identifier, and use the replaced flash memory to simulate the determined write operation process.

[0074] S32, in the determined write operation process, print log information is added to the corresponding code according to the logical unit address and the error correction code information;

[0075] S33, During the simulation of the write operation process, collect the output print logs;

[0076] S34, The source of the problem is determined by analyzing the printed logs;

[0077] S35, the determined problem source is compared and verified based on the error correction code information, the status identifier, and the logical unit address. For example, if the analysis determines that the problem source is at a logical unit address, then a comparison needs to be performed based on the stored logical unit address.

[0078] Specifically, if the anomaly can be reproduced, it indicates that there is a problem with the code corresponding to the write operation process. That is, the problem can be reproduced by simulating the previous experience of the firmware. Then, the problem in the firmware can be located by printing log information output by the firmware serial port, such as output to the PC. The specific source of the problem can be confirmed by the free area information (spare information) stored in the spare area.

[0079] For example, if an UNC appears in P2L (physic to logical), but improper firmware processing causes incorrect table entry information to be updated on L2P on NAND, the corresponding data information will be lost due to the incorrect table entry information. The problem determination according to the embodiments of this application includes the following steps:

[0080] Replace the hardware and re-simulate the problematic test / usage process;

[0081] Collect real-time output logs (printed logs), locate the logical address when a UNC error occurs, calculate the corresponding physical address based on the logical address at the time of the error and P2L, and read the spare information of the corresponding physical address.

[0082] Reading the logical unit address in the spare allows us to reconstruct the original information of UNC's P2l.

[0083] At the same time, the status flag stored in the spare can be compared with the printed log information output from the flash tx port in the log to determine whether the P2L update operation matches. If they do not match, it means that the error occurred and the situation needs to be traced back.

[0084] If the problem cannot be located by repeating the operation, then proceed as if the exception cannot be reproduced.

[0085] S40, if the abnormality cannot be reproduced, obtain all the information stored in the free area of ​​the flash memory to obtain the free area information, and locate the source of the problem based on the logical unit address, the cumulative number of writes and the status identifier in the free area information.

[0086] Examplely, in step S40, if the anomaly cannot be reproduced, all information stored in the free area of ​​the flash memory is obtained to acquire free area information. The source of the problem is then located based on the logical unit address, the cumulative write count, and the status identifier in the free area information. Figure 4 As shown, it includes:

[0087] S41, determine the free area information related to the logical unit address from the acquired free area information, and obtain the relevant free area information.

[0088] S42, based on the cumulative write count of each piece of information in the relevant free area information, sort the pieces of information in the relevant free area information, obtain the information corresponding to the one with the largest cumulative write count, and obtain the valid information.

[0089] S43, based on the logical unit address and its corresponding table entry in the valid information, determine the logical unit address of the problem source, and restore the write operation process based on the status identifier.

[0090] S44, determine the free area information related to the logical unit address from the acquired free area information, and obtain the relevant free area information.

[0091] S45, based on the cumulative write count of each piece of information in the relevant free area information, sort the pieces of information in the relevant free area information, obtain the information corresponding to the one with the largest cumulative write count, and obtain the valid information.

[0092] S46, based on the logical unit address and its corresponding table entry in the valid information, determine the logical unit address of the problem source, and restore the write operation process based on the status identifier.

[0093] Specifically, the inability to reproduce the anomaly generally occurs after the problem has occurred, because the firmware is still running normally without freezing, which has completely destroyed the original problem environment, making it impossible to reproduce the problem by simulating the problem test environment. Alternatively, the operating environment before the problem occurred and some special environmental factors are unknown and cannot be simulated. Therefore, in this embodiment of the application, it is necessary to obtain all the information stored in the free area of ​​the flash memory to obtain the free area information, and locate the source of the problem based on the logical unit address, the cumulative number of writes, and the status identifier in the free area information.

[0094] For example, ionizing radiation can cause soft errors. Soft errors occur when high-energy particles (electrons, protons, neutrons, or alpha particles) cause level transitions in logic or storage circuits, manifesting as changes from "0" to "1" or from "1" to "0". These transitions can also cause subsequent circuits to flip. When a soft error occurs, the circuit's error correction function cannot recover, leading to the loss or corruption of stored data.

[0095] When a bit jump occurs in the data area, all spare information in the corresponding spare area can be read, and the logical unit address information in the spare information can be obtained. Then, all the relevant spare information for that logical unit address can be found in the NAND. The count in the relevant spare information is compared, and the time order is determined by the count. The larger the count, the newer the corresponding stored information. For example, based on the first logical unit address, the counts are 3800 and 7621. The data corresponding to the logical unit address of 7621 is valid data, and the valid data is also the data corresponding to the source of the problem.

[0096] Find the latest valid data corresponding to the logical unit address, calculate which table manages the corresponding table entry information, calculate the valid data of all table entries (hardware valid data, the latest data after the update), and compare it with the valid data stored in the firmware (valid data stored in the code). Find the table entries that are different from the valid data stored in the firmware, compare and find the logical unit address where the problem occurs, sort it by time using count, and use the status identifier to reconstruct all write operation processes corresponding to the logical unit address to confirm which write operation process the data was written through. If it is a GC operation, then the corresponding data should be exactly the same as the previous data. Comparing the data differences can confirm the jump. If it is a host write, the data has already overwritten the previous data, and there is no need to locate further back.

[0097] The following section describes the flash memory problem source localization method of this application using a specific example, such as... Figure 5 As shown, it includes the following steps:

[0098] S110, release a portion of the spare area as needed.

[0099] S120, the spare area corresponding to the unit storage unit is adjusted and divided to obtain multiple sub-spare areas for storing the error correction code information, the cumulative write count, the logical unit address data, and each of the status identifiers. That is, the information written to the spare is adjusted during host writing and writing to NAND. For example, the spare storage area is adjusted as follows: a 1-byte bad block storage area 110, a 3-byte logical unit address information storage area 140, a 6-byte error correction code information storage area 120, a 2-byte cumulative write count storage area 120, and a 4-byte status identifier storage area 150.

[0100] S130, in the write operation process, in response to each write operation to a unit storage unit, error correction code information, status identifier corresponding to the write operation process, logical unit address data corresponding to each written data, and cumulative write count are stored in the free area.

[0101] S140, when locating the source of the problem, reads the error correction code information of the abnormal flash memory, the cumulative number of writes, the logical unit address data corresponding to each written data, and the status flags corresponding to each write operation process.

[0102] S150, when the anomaly can be reproduced, the write operation process performed when the anomaly occurred is determined according to the status identifier, print information is inserted into the code corresponding to the write operation process, and the source of the problem is located according to the obtained print log and the logical unit address.

[0103] If the anomaly cannot be reproduced, all information stored in the free area of ​​the flash memory is obtained to obtain the free area information, and the source of the problem is located based on the logical unit address, the cumulative number of writes, and the status identifier in the free area information.

[0104] Compared with the prior art, the embodiments of this application can determine under what write operation process the erroneous page was written, which can narrow the scope of firmware inspection and reduce the difficulty of debugging.

[0105] Figure 6 A schematic diagram of a flash memory problem source location device according to an embodiment of this application is shown. Exemplarily, the flash memory problem source location device includes: a region division module 410, a free region information writing module 420, a first problem source location module 430, and a second problem source location module 440.

[0106] The region partitioning module 410 is used to divide a unit storage cell into a data storage area and a free area.

[0107] The free area information writing module 420 is used to store the status identifier corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes in the free area in response to each write operation to a unit storage unit.

[0108] The first problem source location module 430 is used to determine the write operation process when the exception occurs based on the status identifier when the exception can be reproduced, insert print information into the code corresponding to the write operation process, and locate the problem source based on the obtained print log and the logical unit address.

[0109] The second problem source location module 440 is used to obtain all the information stored in the free area of ​​the flash memory when the abnormality cannot be reproduced, obtain the free area information, and locate the problem source according to the logical unit address, the cumulative number of writes and the status identifier in the free area information.

[0110] It is understood that the device in this embodiment corresponds to the flash memory problem source localization method in the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be described again here.

[0111] This application also provides a terminal device, exemplary of which includes a processor and a memory, wherein the memory stores a computer program, and the processor executes the computer program to enable the terminal device to perform the functions of the various modules in the above-described flash memory problem source location method or the above-described flash memory problem source location device.

[0112] The processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, including at least one of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), Network Processor (NP), Digital Signal Processor (DSP), Application-Specific Integrated Circuit (ASIC), Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor can be a microprocessor or any conventional processor, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application.

[0113] The memory can be, but is not limited to, Random Access Memory (RAM), Read Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), etc. The memory is used to store computer programs, and the processor can execute the computer programs accordingly after receiving execution instructions.

[0114] This application also provides a readable storage medium for storing the computer program used in the aforementioned terminal device.

[0115] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that, in alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0116] In addition, the functional modules or units in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0117] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a smartphone, personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0118] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A method for locating the source of a flash memory problem, characterized in that, include: Divide the unit of storage into a data storage area and a free area; In response to each write operation to a unit of storage, the status flag corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes are stored in the free area. If the anomaly can be reproduced, the write operation process performed when the anomaly occurred is determined according to the status identifier. Print information is inserted into the code corresponding to the write operation process, and the source of the problem is located according to the obtained print log and the logical unit address. If the anomaly cannot be reproduced, all information stored in the free area of ​​the flash memory is obtained to obtain free area information. The source of the problem is located based on the logical unit address, the cumulative write count, and the status identifier in the free area information. Specifically, this includes: determining the free area information related to the logical unit address from the obtained free area information to obtain relevant free area information; sorting each piece of information in the relevant free area information according to the cumulative write count of each piece of information, obtaining the information corresponding to the one with the largest cumulative write count to obtain valid information; determining the logical unit address of the problem source based on the logical unit address in the valid information and its corresponding table entry, and reconstructing the write operation process based on the status identifier.

2. The flash memory problem source localization method according to claim 1, characterized in that, The status identifiers include host write data status identifier, garbage collection status identifier, and power-on rebuild status identifier; Each write operation to a unit of storage cell stores a status identifier corresponding to the write operation process in the free area, including: In any of the host write data process, garbage collection process, and power-on reconstruction process, each time a write operation is performed on the unit storage cell, the corresponding status identifier is stored in the free area in an orderly manner.

3. The flash memory problem source localization method according to claim 1, characterized in that, Prior to each write operation to a unit of storage, the following is also included: The free area corresponding to the unit storage unit is divided into several sub-free areas, which are used to store error correction code information, the cumulative number of writes, the logical unit address and each of the status identifiers. Each of the sub-free regions includes x Bad blocks of bytes n The logical unit address information storage area of ​​a byte y Byte error correction code information storage area m The cumulative number of writes per byte and the storage area p The storage area for the status identifier of a byte.

4. The flash memory problem source localization method according to claim 3, characterized in that, If the anomaly can be reproduced, the write operation process performed when the anomaly occurred is determined based on the status identifier. Print information is inserted into the code corresponding to the write operation process. The source of the problem is located based on the obtained print log and the logical unit address, including: The corresponding write operation process is determined based on the status identifier, and the determined write operation process is simulated using the replaced flash memory. In the defined write operation process, print log information is added to the corresponding code according to the logical unit address and the error correction code information; During the simulation of the write operation process, the output print logs are collected; The source of the problem was determined by analyzing the printed logs. The determined problem source is compared and verified based on the error correction code information, the status identifier, and the logical unit address.

5. The flash memory problem source localization method according to claim 3, characterized in that, x =1； y =6； n ∈（2，4）； m ∈（2，4）； p ∈（2，5）； x + y+n + m + p =16。 6. The flash memory problem source localization method according to claim 1, characterized in that, The process of dividing a unit storage cell into a data storage area and a free area includes: The flash memory is divided into several unit storage cells, each of which includes a 512-byte data storage area and a 16-byte free area.

7. A flash memory problem source location device, characterized in that, include: The region partitioning module is used to divide a unit of storage into a data storage area and a free area; The free area information writing module is used to respond to each write operation to a unit storage unit by storing the status identifier corresponding to the write operation process, the logical unit address corresponding to the written data, and the cumulative number of writes in the free area. The first problem source location module is used to determine the write operation process when the anomaly occurs based on the status identifier when the anomaly can be reproduced, insert print information into the code corresponding to the write operation process, and locate the problem source based on the obtained print log and the logical unit address. The second problem source localization module is used to obtain all information stored in the free area of ​​the flash memory when the anomaly cannot be reproduced, to obtain free area information, and to locate the problem source based on the logical unit address, the cumulative write count, and the status identifier in the free area information; the second problem source localization module is specifically used to: determine the free area information related to the logical unit address in the obtained free area information, to obtain relevant free area information; sort the information in the relevant free area information according to the cumulative write count of each piece of information in the relevant free area information, and obtain the information corresponding to the one with the largest cumulative write count, to obtain valid information; Based on the logical unit address and its corresponding table entry in the valid information, the logical unit address of the problem source is determined, and the write operation process is restored based on the status identifier.

8. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed on a processor, implements the flash memory problem source localization method according to any one of claims 1-6.

9. A memory, including flash memory, characterized in that, The flash memory is located using the flash memory problem source location method described in any one of claims 1-6.

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