A gate control signal detection method

Abstract

The present invention belongs to the field of chips and provides a method for detecting a gate control signal. The method includes: receiving an input reference signal provided by an input reference signal source and receiving first and second control signals provided by a control signal source; determining the order of the rising edges of the first and second control signals. When the first control signal appears as a pulse first, it is determined that the current is an odd frame mode, the first control signal is used as the rising start source, and the second control signal is used as the falling shutdown source. When the input reference signal is at a high level and the first control signal is at a rising edge, the drive signal is raised to a high level. When the second control signal appears as a rising edge, the drive signal is switched to a low level; when the second control signal appears as a pulse first, it is determined that the current is an even frame mode, and the operations opposite to those in the odd frame mode are performed. The present invention performs calculations using a single chip to switch between odd frame or even frame output types and can complete the required output timing, which will reduce costs and power consumption.

Description

Technical Field

[0001] The present invention relates to the field of chips, and in particular, to a method for detecting a gate control signal. Background Art

[0002] Currently, in large-size displays, different gate switches require driving signals with different phases in different frames. However, when implementing the general odd-even frame phase splitting mode in current chips, an additional detection signal Frame_det and a chip with two or more different output signals are required. Frame_det is a discrimination signal generated additionally in a module, and uses Frame_det being 0 or 1 to discriminate odd frames or even frames, so as to control the startup of different chips and then release waveforms with different phases.

[0003] The prior art requires multiple chips to complete the output signals of waveforms with different phases, and a new Frame_det detection signal is added. After external discrimination, multiple chip systems are switched to output to complete the requirements, resulting in increased design complexity, increased required board area, and increased process cost and power consumption. Summary of the Invention

[0004] In view of the above technical problems, the present invention provides a method for detecting a gate control signal to solve the problem in the prior art that multiple chips are required to output driving signals with different phases for different gates of a display.

[0005] Other features and advantages of the present disclosure will become apparent through the following detailed description, or be partially learned through the practice of the present disclosure.

[0006] The present invention discloses a method for detecting a gate control signal. The method is applied to a single chip, and the chip is used to output a driving signal to drive a gate switch of a display to operate in an odd frame mode or an even frame mode. The method includes:

[0007] Receiving an input reference signal provided by an input reference signal source, and receiving a first control signal and a second control signal provided by a control signal source. The first control signal and the second control signal are periodic pulse square waveforms with different phases;

[0008] Judging the order of the rising edges of the first control signal and the second control signal. When the first control signal appears as a pulse first, judging that the current is the odd frame mode, using the first control signal as the rising start source and the second control signal as the falling shutdown source. When the input reference signal is at a high level and the first control signal is at a rising edge, making the driving signal rise to a high level. When the second control signal appears as a rising edge, switching the driving signal to a low level;

[0009] When a pulse first appears in the second control signal, it is determined that the current is the even frame mode. Using the second control signal as the rising enable source and the first control signal as the falling disable source, when the input reference signal is at a high level and there is a rising edge of the second control signal, the corresponding drive signal is raised to a high level. When a rising edge appears in the first control signal, the drive signal is switched to a low level.

[0010] Further, the drive signals are periodic signals and there are N of them. In the odd frame mode, the changes of the N drive signals are as follows:

[0011] The first drive signal starts with the input reference signal and is switched by the first control signal and the second control signal. After the rising edge of the input reference signal is turned on, the rising edge of the first group of pulse waveforms of the first control signal is detected. The first drive signal follows and generates a rising edge. When the rising edge of the first group of pulse waveforms of the second control signal is detected, the first drive signal follows and switches to a falling edge. The second group of waveforms of the first drive signal starts with the Nth drive signal. When the rising edges of the N+1th groups of the first control signal and the second control signal are detected, a rising edge is generated and switched to a falling edge respectively. In the subsequent, starting with the high potential of the m-1th group of the Nth drive signal, when the rising edge of the N*m+1th group of pulse waveforms of the first control signal is detected, the signal source is followed to generate a rising edge, and the N*m+1th group of the second control signal follows the signal source to switch to a falling edge;

[0012] The nth drive signal is switched by the (n-1)th drive signal, the first control signal, and the second control signal; after the rising edge of the (n-1)th drive signal is turned on, the rising edge of the N*0+nth group of pulse waveforms of the first control signal is detected, and the signal source is followed to generate a rising edge. When the rising edge of the N*0+nth group of pulse waveforms of the second control signal is detected, the signal source is followed to switch to a falling edge; the second group of waveforms of the nth drive signal starts with the (n-1)th drive signal. When the rising edges of the N*1+nth groups of the first control signal and the second control signal are detected, a rising edge and a falling edge are generated respectively; when the rising edge of the N*m+nth group of pulse waveforms of the first control signal is detected, the signal source is followed to generate a rising edge, and the N*m+nth group of the second control signal follows the signal source to switch to a falling edge;

[0013] Where m, N, and n are positive integers, m is set according to the actual display resolution requirements, N is set according to the required width, and n is less than N.

[0014] Further, the drive signals are periodic signals and there are N of them. In the even frame mode, the changes of the N drive signals are as follows:

[0015] The Nth driving signal is switched from the input reference signal, the first control signal, and the second control signal. After the rising edge of the input reference signal is turned on, the rising edge of the first group of pulse waveforms of the second control signal is detected, and the signal source follows to generate a rising edge. When the rising edge of the first group of pulse waveforms of the first control signal is detected, the signal source follows and switches to a falling edge; the second group of waveforms of the Nth driving signal starts from the first driving signal. When the rising edges of the N + 1th groups of the second control signal and the first control signal are detected, rising edges and a falling-edge switch are generated respectively. When the rising edge of the (N*m + 1)th group of pulse waveforms of the second control signal is detected, the signal source follows to generate a rising edge, and the (N*m + 1)th group of the first control signal follows the signal source and switches to a falling edge;

[0016] The nth driving signal is switched from the (n + 1)th driving signal, the first control signal, and the second control signal. After the rising edge of the (n + 1)th driving signal is turned on, the rising edge of the (N*0 + n)th group of pulse waveforms of the second control signal is detected, and the signal source follows to generate a rising edge. When the rising edge of the (N*0 + n)th group of pulse waveforms of the first control signal is detected, the signal source follows and switches to a falling edge; the second group of waveforms of the nth driving signal starts from the (n + 1)th driving signal. When the rising edges of the (N*1 + n)th groups of the second control signal and the first control signal are detected, rising edges and a falling-edge switch are generated respectively; when the rising edge of the (N*m + n)th group of pulse waveforms of the first control signal is detected, the signal source follows to generate a rising edge, and the (N*m + n)th group of the second control signal follows the signal source and switches to a falling edge;

[0017] Where m, N, and n are positive integers. m is set according to the actual display resolution requirements, N is set according to the required width, and n is less than N.

[0018] The technical solution of the present disclosure has the following beneficial effects:

[0019] Using the internal logic of a single chip for calculation, and the internal mechanism performs operations in the order of the first control signal and the second control signal, the output type can be correctly determined, and the required output timing can be completed. Without an additional chip, the cost can be reduced and the power consumption can be reduced. If you want to change different frame output modes, you can complete it by issuing commands, which increases the application convenience, reduces the complexity of the board design, and further reduces the board area and production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a flowchart of a gate control signal detection method in an embodiment of this specification;

[0021] Figure 2It is a reference diagram of the input / output waveform in the odd frame mode in the embodiments of this specification;

[0022] Figure 3 It is a reference diagram of the input / output waveform in the even frame mode in the embodiments of this specification;

[0023] Figure 4 It is a reference diagram of other types of input / output waveforms in the embodiments of this specification;

[0024] Figure 5 It is a reference diagram of other types of input / output waveforms in the embodiments of this specification;

[0025] Figure 6 It is a reference diagram of other types of input / output waveforms in the embodiments of this specification. Detailed implementation manners

[0026] Now, example embodiments will be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of the embodiments of the present disclosure. However, those skilled in the art will realize that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. can be used. In other cases, well-known technical solutions are not shown or described in detail to avoid obscuring the various aspects of the present disclosure.

[0027] As Figure 1 shown, the embodiments of this specification provide a method for detecting a gate control signal. The method is applied to a single chip, and the chip is used to output a driving signal to drive the gate switch of the display to operate in an odd frame mode or an even frame mode. The method specifically includes steps S101 - 103:

[0028] In step S101, an input reference signal provided by an input reference signal source is received, and a first control signal and a second control signal provided by a control signal source are received. The first control signal and the second control signal are periodic pulse square waveforms with different phases;

[0029] In step S102, determine the order of the rising edges of the first control signal and the second control signal. When the first control signal appears as a pulse first, determine that the current is the odd frame mode. Use the first control signal as the rising start source and the second control signal as the falling shutdown source. When the input reference signal is at a high level and the first control signal has a rising edge, make the drive signal rise to a high level. When the second control signal has a rising edge, switch the drive signal to a low level;

[0030] In step S103, when the second control signal appears as a pulse first, determine that the current is the even frame mode. Use the second control signal as the rising start source and the first control signal as the falling shutdown source. When the input reference signal is at a high level and the second control signal has a rising edge, make the corresponding drive signal rise to a high level. When the first control signal has a rising edge, switch the drive signal to a low level.

[0031] When the above method is executed in a single chip, two or more output requirements can be achieved without adding external components and extra signal requirements to the chip. The first control signal and the second control signal output by the control signal source can be generated internally in the chip or provided externally, and are used to control the state or behavior of the circuit. The input reference signal can be a synchronization signal, a clock signal, a data signal, etc.

[0032] In one embodiment, the drive signal is a periodic signal and there are N of them. In the odd frame mode, the changes of the N drive signals are as follows:

[0033] The first drive signal starts with the input reference signal and is switched by the first control signal and the second control signal. After the rising edge of the input reference signal is turned on, detect the rising edge of the first group of pulse waveforms of the first control signal. The first drive signal follows and generates a rising edge. When the rising edge of the first group of pulse waveforms of the second control signal is detected, the first drive signal follows and switches to a falling edge. The second waveform of the first drive signal starts with the Nth drive signal. When detecting the N + 1th rising edges of the first control signal and the second control signal, a rising edge is generated and switched to a falling edge respectively. Subsequently, starting from the m - 1th high potential of the Nth drive signal, when the N * m + 1th rising edge of the first control signal is detected, follow the signal source to generate a rising edge, and the N * m + 1th follow signal source of the second control signal is switched to a falling edge;

[0034] The nth driving signal is switched from the (n - 1)th driving signal, the first control signal, and the second control signal; after the rising edge of the (n - 1)th driving signal is turned on, the rising edge of the N*0 + nth pulse waveform of the first control signal is detected, and the signal source follows to generate a rising edge. When the rising edge of the N*0 + nth pulse waveform of the second control signal is detected, the signal source follows and switches to a falling edge; the second waveform of the nth driving signal starts from the (n - 1)th driving signal. When the rising edges of the N*1 + nth of the first control signal and the second control signal are detected, a rising edge and a falling edge switch are generated respectively; when the rising edge of the N*m + nth pulse waveform of the first control signal is detected, the signal source follows to generate a rising edge, and the N*m + nth of the second control signal follows the signal source and switches to a falling edge;

[0035] where m, N, and n are positive integers. m is set according to the actual display resolution requirements, N is set according to the required width, and n is less than N.

[0036] Moreover, in the even frame mode, the changes of the N driving signals are as follows:

[0037] The Nth driving signal is switched from the input reference signal, the first control signal, and the second control signal. After the rising edge of the input reference signal is turned on, the rising edge of the first pulse waveform of the second control signal is detected, and the signal source follows to generate a rising edge. When the rising edge of the first pulse waveform of the first control signal is detected, the signal source follows and switches to a falling edge; the second waveform of the Nth driving signal starts from the first driving signal. When the rising edges of the N + 1th of the second control signal and the first control signal are detected, a rising edge and a falling edge switch are generated respectively. When the rising edge of the N*m + 1th pulse waveform of the second control signal is detected, the signal source follows to generate a rising edge, and the N*m + 1th of the first control signal follows the signal source and switches to a falling edge;

[0038] The nth driving signal is switched from the (n + 1)th driving signal, the first control signal, and the second control signal. After the rising edge of the (n + 1)th driving signal is turned on, the rising edge of the N*0 + n group of pulse waveforms of the second control signal is detected, and the signal source follows to generate a rising edge. When the rising edge of the N*0 + n group of pulse waveforms of the first control signal is detected, the signal source follows and switches to a falling edge; the second waveform of the nth driving signal starts with the (n + 1)th driving signal. When detecting the rising edges of the N*1 + n groups of the second control signal and the first control signal, a rising edge and a falling edge switch are generated respectively; when the rising edge of the N*m + n group of pulse waveforms of the first control signal is detected, the signal source follows to generate a rising edge, and the N*m + n group of the second control signal follows the signal source and switches to a falling edge;

[0039] where m, N, and n are positive integers. m is set according to the actual display resolution requirements, N is set according to the required width, and n is less than N.

[0040] The following is a description of the mode setting according to general application requirements. For the convenience of description, CKI1 is referred to as the first control signal, CKI2 is referred to as the second control signal, STI1 is referred to as the input reference signal, STO1 is referred to as the output reference signal, and the N driving signals are respectively referred to as CK01 to CKON. For example, the 3rd driving signal is referred to as CKO3. Then the entire input-output timing includes STI1, CKI1, CKI2, and the output reference signal STO1, and multiple driving signals CKO1 to CKON; CKO1 is the first driving signal, CKON is the Nth driving signal, and the variable N can be a positive integer such as 1, 2, 3, 4... Here, N = 12 is used as the description basis. The phase of STO1 follows the periodic pulse square waveforms with different phases of STI1, CKI1, and CKI2 respectively. In this mode, CKI2 starts the same periodic pulse square waveform after 5 groups of square wave pulses from CKI1. The number of square wave pulses between CKI2 and CKI1 can be determined according to the required width of the actual driving signal application.

[0041] The internal mechanism of the chip performs operations in the order of the CKI1 and CKI2 signals. When the chip internally receives that STO1 is at a high potential and the rising edge of the CKI1 pulse waveform, it can determine that this frame is an odd frame, start the input-output waveform of the odd frame mode, and set CKI1 as the rising start source of the Nth driving signal CKON, and CKI2 as the falling close source of the Nth driving signal CKON, and then send out the odd frame phase mode. The input-output waveform reference Figure 2 .

[0042] When the chip detects that CKI1 has a pulse first, the first driving signal CKO1 is output as a periodic signal starting from STI1 and switched by CKI1 and CKI2; after the rising edge of STI1 or STO1 is turned on, the rising edge of the first group of pulse waveforms of CKI1 is detected, and the rising edge is generated following this signal source. When the rising edge of the first group of pulse waveforms of CKI2 is detected, it is switched to the falling edge following this signal source. The second group of waveforms of the first driving signal CKO1 starts from the 12th driving signal CKO12. When the 12 + 1th group of rising edges of CKI1 and CKI2 are detected, the rising edge and the falling edge are generated respectively. Subsequently, starting from the m - 1th group of high potentials of CKO12, when the rising edge of the 12*m + 1th group of pulse waveforms of CKI1 is detected, the rising edge is generated following this signal source, and the 12*m + 1th group of CKI2 is switched to the falling edge following this signal source, where the variable m is adjusted according to the actual display resolution requirements and can be integers such as 0, 1, 2, 3...m.

[0043] CKO2 is a periodic signal switched by CKO1, CKI1 and CKI2; after the rising edge of CKO1 is turned on, the rising edge of the second group of pulse waveforms of CKI1 is detected, and the rising edge is generated following this signal source. When the rising edge of the second group of pulse waveforms of CKI2 is detected, it is switched to the falling edge following this signal source. The second group of waveforms of CKO2 starts from CKO1. When the 12 + 2th group of rising edges of CKI1 and CKI2 are detected, the rising edge and the falling edge are generated respectively. Subsequently, starting from the m - 1th group of high potentials of CKO1, when the rising edge of the 12*m + 2th group of pulse waveforms of CKI1 is detected, the rising edge is generated following this signal source, and the 12*m + 2th group of CKI2 is switched to the falling edge following this signal source.

[0044] CKO3 is a periodic signal switched by CKO2, CKI1 and CKI2; after the rising edge of CKO2 is turned on, the rising edge of the third group of pulse waveforms of CKI1 is detected, and the rising edge is generated following this signal source. When the rising edge of the third group of pulse waveforms of CKI2 is detected, it is switched to the falling edge following this signal source. The second group of waveforms of CKO3 starts from CKO2. When the 12 + 3th group of rising edges of CKI1 and CKI2 are detected, the rising edge and the falling edge are generated respectively. Subsequently, starting from the m - 1th group of high potentials of CKO2, when the rising edge of the 12*m + 3th group of pulse waveforms of CKI1 is detected, the rising edge is generated following this signal source, and the 12*m + 3th group of CKI2 is switched to the falling edge following this signal source.

[0045] CKO4 is a periodic signal switched from CKO3, CKI1, and CKI2. After the rising edge of CKO3 is turned on, the rising edge of the 4th group of pulse waveforms of CKI1 is detected, following the signal source to generate a rising edge. When the rising edge of the 4th group of pulse waveforms of CKI2 is detected, following the signal source to switch to a falling edge. The 2nd group of waveforms of CKO4 starts from CKO3. When detecting the rising edges of the 12 + 4th groups of CKI1 and CKI2, a rising edge and a falling edge switch are generated respectively. That is, when the rising edge of the 12*m + 4th group of pulse waveforms of CKI1 is detected, following the signal source to generate a rising edge, and the 12*m + 4th group of CKI2 follows the signal source to switch to a falling edge.

[0046] CKOn is a periodic signal switched from CKOn-1, CKI1, and CKI2. After the rising edge of CKOn-1 is turned on, the rising edge of the 12*0 + nth group of pulse waveforms of CKI1 is detected, following the signal source to generate a rising edge. When the rising edge of the 12*0 + nth group of pulse waveforms of CKI2 is detected, following the signal source to switch to a falling edge. The 2nd group of waveforms of CKON starts from CKOn-1. When detecting the rising edges of the 12*1 + nth groups of CKI1 and CKI2, a rising edge and a falling edge switch are generated respectively. That is, when the rising edge of the 12*m + nth group of pulse waveforms of CKI1 is detected, following the signal source to generate a rising edge, and the 12*m + nth group of CKI2 follows the signal source to switch to a falling edge.

[0047] Among them, the starting source of CKO1, except for the first waveform starting from STI1, starts from CKO12 after the 2nd group.

[0048] When the rising edge of the CKI2 pulse waveform is received first inside the chip, it can be determined that this frame is an even frame mode. Set CKI2 as the rising start source of CKON and CKI1 as the falling close source of CKON, and its input and output waveforms are as Figure 3 .

[0049] The following describes that when the chip detects CKI2 as the first-occurring pulse, the output CKO12 is a periodic signal switched from STI1, CKI2, and CKI1. After the rising edge of STI1 / STO1 is turned on, the rising edge of the 1st group of pulse waveforms of CKI2 is detected, following the signal source to generate a rising edge. When the rising edge of the 1st group of pulse waveforms of CKI1 is detected, following the signal source to switch to a falling edge. The 2nd group of waveforms of CKO12 starts from CKO1. When detecting the rising edges of the 12 + 1st groups of CKI2 and CKI1, a rising edge and a falling edge switch are generated respectively. That is, when the rising edge of the 12*m + 1st group of pulse waveforms of CKI2 is detected, following the signal source to generate a rising edge, and the 12*m + 1st group of CKI1 follows the signal source to switch to a falling edge.

[0050] CKO11 is a periodic signal switched by CKO12, CKI2, and CKI1. After the rising edge of CKO12 is turned on, the rising edge of the second group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge. When the rising edge of the second group of pulse waveforms of CKI1 is detected, following this signal source to switch to a falling edge. The second group of waveforms of CKO11 starts from CKO12. When detecting the rising edges of the 12 + 2th groups of CKI2 and CKI1, a rising edge and a falling edge are generated respectively. That is, when the rising edge of the 12*m + 2th group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge, and the 12*m + 2th group of pulse waveforms of CKI1 follows this signal source to switch to a falling edge.

[0051] CKO10 is a periodic signal switched by CKO11, CKI2, and CKI1. After the rising edge of CKO11 is turned on, the rising edge of the third group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge. When the rising edge of the third group of pulse waveforms of CKI1 is detected, following this signal source to switch to a falling edge. The second group of waveforms of CKO10 starts from CKO11. When detecting the rising edges of the 12 + 3th groups of CKI2 and CKI1, a rising edge and a falling edge are generated respectively. That is, when the rising edge of the 12*m + 3th group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge, and the 12*m + 3th group of CKI1 follows this signal source to switch to a falling edge.

[0052] CKO9 is a periodic signal switched by CKO10, CKI2, and CKI1. After the rising edge of CKO10 is turned on, the rising edge of the fourth group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge. When the rising edge of the fourth group of pulse waveforms of CKI1 is detected, following this signal source to switch to a falling edge. The second group of waveforms of CKO9 starts from CKO10. When detecting the rising edges of the 12 + 4th groups of CKI2 and CKI1, a rising edge and a falling edge are generated respectively. That is, when the rising edge of the 12*m + 4th group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge, and the 12*m + 4th group of CKI1 follows this signal source to switch to a falling edge.

[0053] CKOn is a periodic signal switched by CKOn + 1, CKI1, and CKI2. After the rising edge of CKOn + 1 is turned on, the rising edge of the 12*0 + nth group of pulse waveforms of CKI2 is detected, following this signal source to generate a rising edge. When the rising edge of the 12*0 + nth group of pulse waveforms of CKI1 is detected, following this signal source to switch to a falling edge. The second group of waveforms of CKON starts from CKOn + 1. When detecting the rising edges of the 12*1 + nth groups of CKI2 and CKI1, a rising edge and a falling edge are generated respectively. That is, when the rising edge of the 12*m + nth group of pulse waveforms of CKI1 is detected, following this signal source to generate a rising edge, and the 12*m + nth group of CKI2 follows this signal source to switch to a falling edge.

[0054] Among them, for the starting source of CKO12, except that the first waveform starts from STI1, starting from the second group, CKO1 is used as the starting source.

[0055] In an embodiment, as Figure 4 shown, the waveform CKOn output in each of the above modes can be switched and output according to different requirements. For example, CKO2 follows CKO1, CKO4 follows CKO3, CKO6 follows CKO5, CKO8 follows CKO7, CKO10 follows CKO9, and CKO12 follows CKO11.

[0056] Or as Figure 5 shown, CKO3 follows CKO1, CKO4 follows CKO2, CKO7 follows CKO5, CKO8 follows CKO6, KO11 follows CKO9, and CKO12 follows CKO10.

[0057] Or as Figure 6 shown, CKO1 to CKO12 are output in different phases and different orders.

[0058] Beneficial effects:

[0059] By using the internal logic of a single chip for calculation, and the internal mechanism performs operations in the order of the first control signal and the second control signal, the output type can be correctly discriminated, and the required output timing can be completed without an additional chip, which will reduce costs and power consumption, etc. If you want to change the different frame output modes, it can be completed by the following instructions, which increases the application convenience, etc., reduces the complexity of the board design, and thus reduces the board area and production cost.

[0060] Those skilled in the art will readily think of other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the claims.

Claims

1. A gate control signal detection method, characterized in that: The method is applied to a single chip, the chip is used to output a driving signal to drive a gate switch of a display so that the display operates in an odd frame mode or an even frame mode, and the method includes: Receiving an input reference signal provided by an input reference signal source, and receiving a first control signal and a second control signal provided by a control signal source, wherein the first control signal and the second control signal are periodic pulse square waveforms with different phases; Determine the order of occurrence of the rising edges of the first control signal and the second control signal, and when the first control signal first appears a pulse, determine that the current mode is the odd frame mode, use the first control signal as a rising start source, and use the second control signal as a falling close source, and when the input reference signal is at a high level and the first control signal is at a rising edge, make the drive signal rise to a high level, and when the second control signal appears a rising edge, switch the drive signal to a low level; When a pulse appears first in the second control signal, it is determined that the current mode is the even frame mode, the second control signal is used as a rising start source, and the first control signal is used as a falling close source. When the input reference signal is at a high level and the second control signal has a rising edge, the corresponding drive signal is increased to a high level. When a rising edge appears in the first control signal, the drive signal is switched to a low level.

2. The gate control signal detection method according to claim 1, characterized in that: The driving signal is a periodic signal and there are N of them. In the odd frame mode, the changes of the N driving signals are as follows: The first driving signal is started by the input reference signal and is switched by the first control signal and the second control signal. When the input reference signal starts the rising edge, the first group of pulse waveform rising edges of the first control signal are detected, and the first driving signal follows and generates a rising edge. When the first group of pulse waveform rising edges of the second control signal are detected, the first driving signal follows and switches to a falling edge. The second group of waveforms of the first driving signal is started by the Nth driving signal. When the N+1th groups of rising edges of the first control signal and the second control signal are detected, a rising edge is generated and switched to a falling edge respectively. Subsequently, starting from the m-1th group of high potential of the Nth driving signal, the N*m+1th group of pulse waveform rising edges of the first control signal are detected, and the rising edge of the following signal source is generated, and the N*m+1th group of the following signal source is switched to a falling edge of the second control signal. The nth driving signal is formed by switching the n-1th driving signal, the first control signal and the second control signal; when the n-1th driving signal starts the rising edge, the N*0+nth group of pulse waveforms of the first control signal are detected, and the rising edge is generated by following the signal source, and when the N*0+nth group of pulse waveforms of the second control signal are detected, the signal source is switched to the falling edge; the second group of waveforms of the nth driving signal is started by the n-1th driving signal, and when the N*1+nth groups of rising edges of the first control signal and the second control signal are detected, a rising edge is generated and a falling edge is switched respectively; when the N*m+nth group of pulse waveforms of the first control signal are detected, a rising edge is generated by following the signal source, and the N*m+nth group of the second control signal follows the signal source to switch to the falling edge; Wherein m, N, and n are positive integers, m is set according to the actual display resolution requirement, N is set according to the required width, and n is less than N.

3. The gate control signal detection method according to claim 1, characterized in that: The driving signal is a periodic signal and there are N of them. In the even frame mode, the changes of the N driving signals are as follows: The Nth driving signal is formed by switching the input reference signal, the first control signal and the second control signal. When the input reference signal starts the rising edge, the first group of pulse waveforms of the second control signal is detected, and the rising edge is generated by following the signal source. When the first group of pulse waveforms of the first control signal is detected, the rising edge is switched to the falling edge by following the signal source. The second group of waveforms of the Nth driving signal is started by the first driving signal. When the N+1th group of rising edges of the second control signal and the first control signal are detected, a rising edge is generated and a falling edge is switched respectively. When the N*m+1th group of pulse waveforms of the second control signal is detected, the rising edge is generated by following the signal source, and the N*m+1th group of the first control signal follows the signal source to switch to the falling edge. The nth driving signal is formed by switching the n+1th driving signal, the first control signal and the second control signal. When the n+1th driving signal starts the rising edge, the rising edge of the N*0+nth group of pulse waveforms of the second control signal is detected, and the rising edge is generated by following the signal source. When the rising edge of the N*0+nth group of pulse waveforms of the first control signal is detected, the signal source is switched to the falling edge. The second group of waveforms of the nth driving signal is started from the n+1th driving signal, and when the N*1+nth rising edges of the second control signal and the first control signal are detected, a rising edge and a switching falling edge are respectively generated; when the N*m+nth group of pulse waveforms of the first control signal are detected to be a rising edge, the rising edge is generated following the signal source, and the N*m+nth group of the second control signal follows the signal source to switch to a falling edge; Wherein m, N, and n are positive integers, m is set according to the actual display resolution requirement, N is set according to the required width, and n is less than N.

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