Display driving circuit, display driving method and display device

Abstract

The present application discloses a display driving circuit, a display driving method and a display device, wherein a compensation unit in the display driving circuit provides a compensation voltage for a scan line, and the compensation unit includes a first transistor, an inverter, a second transistor and a third transistor, wherein the first input end of the inverter is connected to a reference voltage line, and the second input end of the inverter is connected to the output end of the first transistor; the input end of the second transistor is connected to the output end of the inverter, the control end of the second transistor is connected to a corresponding scan line, and the output end of the second transistor is connected to a corresponding scan line; when a scan voltage is provided to a current scan line, the first transistor and the second transistor are turned off, and the third transistor is turned on; when a line blanking voltage is provided to a current scan line, the first transistor and the second transistor are turned on, and the third transistor is turned off. Through the above design, it is possible to avoid the occurrence of false triggering of LEDs.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display driving circuit, a display driving method and a display device. Background Art

[0002] With the development of fine pitch, the Light Emitting Diode (LED) display screen has put forward higher requirements for row drivers, from simple metal oxide field effect transistor (P-type Metal-Oxide-Semiconductor Field-Effect Transistor) to realize row switching, to a multifunctional row driver with higher integration and stronger functions.

[0003] LEDs are usually driven by passive matrix (PM). In PM driving mode, the LEDs in this row will light up only when the current row scan line is turned on. If the LEDs in this row light up when the current row scan line is not turned on, it is triggered by mistake. Since there is parasitic capacitance between the data line and the scan line, there is also parasitic capacitance between the cathode and anode of the LED. When a row of scan lines is turned on, the voltage on the data line will affect the scan lines in other rows, increasing the voltage difference between the cathode and anode of the LEDs in other rows, resulting in the problem of false triggering. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a display driving circuit, a display driving method and a display device to avoid false triggering of LEDs.

[0005] The embodiment of the present application discloses a display driving circuit, the display driving circuit includes a data driving unit and a scan driving unit, the data driving unit provides a data voltage for a data line, the scan driving unit provides a scan voltage for a scan line, the display driving circuit also includes a plurality of compensation units, the compensation units are connected to the scan lines one by one, and provide compensation voltages for the scan lines, the compensation units include a first transistor, an inverter, a second transistor, and a third transistor, the control end of the first transistor is connected to the corresponding scan line, the input end of the first transistor is connected to the collection point on the corresponding scan line, and receives the collection point voltage; the first input end of the inverter is connected to a reference voltage line, the reference voltage line provides a line blanking voltage, the second input end of the inverter is connected to the output end of the first transistor; the input end of the second transistor is connected to the output end of the inverter, the control end of the second transistor is connected to the corresponding scan line, and the output end of the second transistor is connected to the corresponding scan line; the input end of the third transistor is connected to the reference voltage line, the control end of the third transistor is connected to the corresponding scan line, and the output end of the third transistor is connected to the second input end of the inverter.

[0006] Among them, the switch types of the first transistor and the second transistor are the same, and the switch types of the first transistor and the third transistor are different; when a scan voltage is provided to the current row scan line, in the compensation unit connected to the current row scan line, the first transistor is turned off, the second transistor is turned off, and the third transistor is turned on; when a row blanking voltage is provided to the current row scan line, in the compensation unit connected to the current row scan line, the first transistor is turned on, the second transistor is turned on, and the third transistor is turned off.

[0007] Optionally, the compensation unit also includes a first resistor and a second resistor, at least one of the first resistor and the second resistor is an adjustable resistor, and the first resistor is arranged on a line between the output terminal of the third transistor and the second input terminal of the inverter; one end of the second resistor is connected to the second input terminal of the inverter, and the other end of the second resistor is connected to the output terminal of the inverter.

[0008] Optionally, the row blanking voltage is defined as V1, the collection point voltage is defined as V2, the resistance value of the first resistor is defined as R1, the resistance value of the second resistor is defined as R2, and the compensation voltage is R2 (V2-V1) / R1.

[0009] Optionally, the collection point on the scan line is located at a middle point on the scan line, the input end of the first transistor is connected to the middle point corresponding to the scan line, and the control end of the first transistor is connected to the input end corresponding to the scan line.

[0010] Optionally, the output end of the second transistor is electrically connected to the input end and the output end of the corresponding scan line at the same time.

[0011] Optionally, the compensation unit further includes an external wire, two ends of which are respectively connected to the input end and the output end of the corresponding scan line, and the output end of the second transistor is connected to the output end of the corresponding scan line.

[0012] Optionally, the external line is arranged between the corresponding scan line and the adjacent scan line.

[0013] The embodiment of the present application further discloses a display driving method, which is used to drive the display driving circuit as described above, and the display driving method includes:

[0014] Scan time period: the first transistor and the second transistor are turned off, the third transistor is turned on, and the first input terminal of the inverter is connected to the line blanking voltage;

[0015] Compensation time period: the first transistor and the second transistor are turned on, the third transistor is turned off, the first input terminal of the inverter is connected to the row blanking voltage, the second input terminal of the inverter is connected to the collection point voltage, and the output terminal of the inverter outputs the compensation voltage.

[0016] An embodiment of the present application also discloses a display device, which includes a display panel and a display driving circuit as described above, wherein the display panel includes multiple light-emitting diodes, multiple data lines and multiple scan lines, the multiple data lines and the multiple scan lines are divided into multiple pixel areas, and the multiple light-emitting diodes are arranged in the multiple pixel areas in a one-to-one correspondence, and are respectively connected to the corresponding data lines and scan lines; the display driving circuit includes a data driving unit, a scan driving unit and multiple compensation units, the data driving unit is connected to the multiple data lines, the scan driving unit is connected to the multiple scan lines, and the compensation unit is connected to the scan lines in a one-to-one correspondence.

[0017] Optionally, the display panel includes a diode chip, the diode chip includes a plate and the plurality of light-emitting diodes, the light-emitting diodes are arranged on the front side of the plate, and the compensation unit is arranged on the back side of the plate.

[0018] The beneficial effects of the embodiments of the present application are as follows: the embodiments of the present application add a compensation unit in the display driving circuit, and use the compensation unit to provide a compensation voltage for each row of scanning lines. When the scanning voltage is provided to the current row of scanning lines, since the first transistor and the second transistor are turned off, the compensation unit cannot output the compensation voltage, and the light-emitting diode on the current row of scanning lines emits light normally; when scanning to other row of scanning lines, the original scanning line receives the row blanking voltage, and the first transistor and the second transistor are turned on. After the inverter receives the row blanking voltage and the collection point voltage for comparison and calculation, the compensation voltage is output to the original scanning line, and the abnormal voltage on the original scanning line due to the presence of parasitic capacitance is reversely compensated, so as to avoid the problem of false triggering caused by excessive voltage difference between the cathode and anode of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0020] Figure 1 is a schematic diagram of a display device without a compensation unit;

[0021] Figure 2 is based on Figure 1 Timing diagram of

[0022] Figure 3 is a schematic diagram of a display device provided in an embodiment of the present application;

[0023] Figure 4 is a schematic diagram of a first display driving circuit provided in an embodiment of the present application;

[0024] Figure 5 is based on Figure 4 Timing diagram of

[0025] Figure 6 is a flow chart of a display driving method provided by an embodiment of the present application;

[0026] Figure 7 is a schematic diagram of a second display driving circuit provided in an embodiment of the present application;

[0027] Figure 8 is a schematic diagram of a second display driving circuit provided in an embodiment of the present application;

[0028] Fig. 9 It is a partial schematic diagram of another display device provided in an embodiment of the present application.

[0029] 10. Display device; 100. Display panel; scan, scan line; data, data line; 110. Diode chip; 111. Plate; LED, light emitting diode; 200. Display drive circuit; 210. Data drive unit; 220. Scan drive unit; 230. Compensation unit; T1, first transistor; T2, second transistor; T3, third transistor; 231, inverter; 232, first resistor; 233, second resistor; 234, external connection; 235, reference voltage line. DETAILED DESCRIPTION

[0030] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.

[0031] In addition, unless otherwise clearly specified or limited, "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internally connected between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0032] like Figure 1 and Figure 2 As shown, there is a parasitic capacitor C1 between the cathode and anode of the LED, and a parasitic capacitor C2 between the data line and the scan line. As an example, when scan2 is turned on, the voltage on the data line will affect sacn1 (of course, it will also affect the scan lines of other rows, and sacn1 is just used as an example here). During the scan2 opening time, when the rising / falling edge of the data line data1 (all data lines will exist, and the impact amount is the superposition of all data lines, and data1 is just used as an example here) comes, because of the effect of C1 and C2, scan1 will also be affected (except scan2, other scan lines will be affected, and scan1 is just used as an example here), resulting in voltage fluctuations on scan1. For details, see Figure 2 The uneven part in the scan1 timing. At this time, if the voltage difference between the anode and cathode of LED1 (except the LED controlled by scan2, other LEDs may have this possibility, and LED1 is used as an example here) is greater than the threshold voltage of the LED, there will be a risk of false triggering, and the LED will emit light when it is not needed, resulting in abnormal images.

[0033] Based on the above problems, an embodiment of the present application provides a display device to avoid the problem of false triggering of LEDs and ensure that when the LEDs in the current row are turned on, the LEDs in other rows will not emit light.

[0034] like Figure 3 As shown, the display device 10 includes a display panel 100 and a display driving circuit 200, the display panel 100 includes a plurality of light emitting diodes LED, a plurality of data lines data and a plurality of scan lines scan, the plurality of data lines data and the plurality of scan lines scan are divided into a plurality of pixel areas, the plurality of light emitting diodes LED are arranged one by one in the plurality of pixel areas, and are respectively connected to the corresponding data lines data and scan lines scan; wherein the cathode in the light emitting diode LED is connected to the scan line scan, and the anode in the light emitting diode LED is connected to the data line data.

[0035] The display driving circuit 200 includes a data driving unit 210, a scan driving unit 220 and a plurality of compensation units 230. The data driving unit 210 is connected to the plurality of data lines data to provide data voltages for the data lines data; the scan driving unit 220 is connected to the plurality of scan lines scan to provide scan voltages for the scan lines scan; the compensation units 230 are the same in number as the scan lines scan, and are respectively connected to the corresponding scan lines scan to provide compensation voltages for the scan lines scan; wherein each compensation unit 230 is an independent structure, and performs targeted compensation according to the actual voltage fluctuation on each scan line scan to ensure the quality of compensation.

[0036] like Figure 4 It should be noted that the figure only takes scan2 and the corresponding compensation unit 230 as an example for illustration, and does not limit the compensation unit 230 to be connected only to scan2. Similarly, the subsequent Figure 7 and Figure 8 The compensation unit 230 includes a first transistor T1, an inverter 231, a second transistor T2 and a third transistor T3, wherein the control end of the first transistor T1 is connected to the corresponding scan line scan, and the input end of the first transistor T1 is connected to the collection point Q on the corresponding scan line scan to receive the collection point voltage; it should be noted that the collection point Q is a position on the scan line scan, and the shape and connection of the scan line scan are not changed.

[0037] The first input terminal of the inverter 231 is connected to the reference voltage line 235, and the reference voltage line 235 provides a line blanking voltage. The second input terminal of the inverter 231 is connected to the output terminal of the first transistor T1, and the inverter 231 is used to invert the phase of the received signal. The first input terminal of the inverter 231 is the "+" phase input terminal of the inverter 231, the second input terminal of the inverter 231 is the "-" phase input terminal of the inverter 231, and the blanking voltage source corresponds to the blanking voltage after the scanning line scan is turned off.

[0038] The input end of the second transistor T2 is connected to the output end of the inverter 231 , the control end of the second transistor T2 is connected to the corresponding scan line scan, and the output end of the second transistor T2 is connected to the corresponding scan line scan.

[0039] The input end of the third transistor T3 is connected to the reference voltage line 235 , the control end of the third transistor T3 is connected to the corresponding scan line scan, and the output end of the third transistor T3 is connected to the second input end of the inverter 231 .

[0040] Among them, the switch types of the first transistor T1 and the second transistor T2 are the same, and the switch types of the first transistor T1 and the third transistor T3 are different; when a scan voltage is provided to the current row scan line scan, in the compensation unit 230 connected to the current row scan line scan, the first transistor T1 is turned off, the second transistor T2 is turned off, and the third transistor T3 is turned on; when a row blanking voltage is provided to the current row scan line scan, in the compensation unit 230 connected to the current row scan line scan, the first transistor T1 is turned on, the second transistor T2 is turned on, and the third transistor T3 is turned off.

[0041] contrast Figure 2 and Figure 5 As shown, as an example, when scan2 is turned on and the rising / falling edge of the data line data1 comes, the voltage fluctuation occurs on scan1 due to the action of C1 and C2. The embodiment of the present application provides a reverse compensation voltage a to scan1 through the compensation unit 230, so as to neutralize the voltage fluctuation on scan1 originally caused by the existence of C1 and C2, so that the waveform b of scan1 after superposition is smooth and will not be disturbed, so that the voltage on scan1 is stable, thereby reducing the voltage difference between the anode and cathode of the light-emitting diode LED on scan1, and avoiding the risk of false triggering of the LED.

[0042] Therefore, the embodiment of the present application adds a compensation unit 230 in the display driving circuit 200, and uses the compensation unit 230 to provide a compensation voltage for each row of scanning lines. When providing a scanning voltage for the current row of scanning lines, since the first transistor T1 and the second transistor T2 are turned off, the compensation unit 230 cannot output the compensation voltage, and the light-emitting diode LED on the current row of scanning lines emits light normally; when scanning to other row of scanning lines scan, the original scanning line receives the row blanking voltage, and the first transistor T1 and the second transistor T2 are turned on. The inverter 231 receives the row blanking voltage and the collection point voltage for comparison and calculation, and then outputs the compensation voltage to the original scanning line, and reversely compensates the abnormal voltage caused by the presence of parasitic capacitance on the original scanning line, so as to avoid the problem of false triggering caused by excessive voltage difference between the cathode and the anode of the light-emitting diode LED. Since the display device 10 provided by the embodiment of the present application can reduce the risk of LED being falsely triggered, the possibility of voltage stability on the scanning line is increased, the display quality is increased, and the product competitiveness is improved.

[0043] Moreover, by adding the third transistor T3, even when the compensation unit 230 does not output the compensation voltage, the two input terminals of the inverter 231 can receive electrical signals, thereby avoiding the inverter 231 from being abnormal or damaged, thereby ensuring the service life of the device.

[0044] Correspondingly, such as Figure 6 As shown, the embodiment of the present application further provides a display driving method for driving the above-mentioned display driving circuit 200, and the display driving method includes:

[0045] Scan time period: the first transistor and the second transistor are turned off, the third transistor is turned on, and the first input terminal of the inverter is connected to the line blanking voltage;

[0046] Compensation time period: the first transistor and the second transistor are turned on, the third transistor is turned off, the first input terminal of the inverter is connected to the row blanking voltage, the second input terminal of the inverter is connected to the collection point voltage, and the output terminal of the inverter outputs the compensation voltage.

[0047] In the scanning time period, the second input end of the inverter 231 is connected to the line blanking voltage passing through the third transistor T3 and the first resistor 232, the output end of the compensation unit 230 is disconnected from the scanning line, the compensation unit 230 does not work, and the LED lights up according to the voltage on the data line. In the compensation time period, the second input end of the inverter 231 is connected to the collection point voltage passing through the first resistor 232.

[0048] Among them, the time of each scan line in each frame is divided into two stages: the scan time period and the compensation time period. Take scan1 as the current scan line as an example. At this time, scan1 is in the scan time period, and when scanning scan2, scan3, scan4 and the following scan lines, scan1 is in the compensation time period, so that scan1 is in the compensation stage during the non-row scan time of a frame time. Since the row line voltage is compensated in real time, and the data does not need to be compensated when the row is turned on, the data can be compensated all the time when the row is closed, which corresponds to the actual application and achieves the purpose of compensation. As a result, scan1 will not have abnormal voltage fluctuations during the non-row scan time of a frame time, and the LED of this row will not light up during the non-row scan stage. The same is true for other rows, which will not be elaborated here.

[0049] Moreover, the embodiment of the present application performs compensation in each frame to ensure that the light emitting diode LED will not be falsely triggered in each frame. Of course, compensation can also be performed once at intervals, or in the blank period between two adjacent frames. The specific selection is based on the actual situation and is not limited here.

[0050] In the embodiment of the present application, the acquisition point Q on the scan line is located at the middle point of the scan line, the input end of the first transistor T1 is connected to the middle point of the corresponding scan line, and the control end of the first transistor T1 is connected to the input end of the corresponding scan line. The embodiment of the present application uses the middle point of the scan line as the input of the inverter 231 to facilitate the acquisition of the affected row line voltage. Moreover, compared with the two ends and other positions of the scan line, the middle point of the scan line can better reflect the overall voltage fluctuation on the scan line. By acquiring the voltage at the middle point of the scan line, the calculated compensation voltage can be made more accurate.

[0051] Of course, in other embodiments, the acquisition point Q on the scan line is located at the input end, the output end, or other positions on the scan line.

[0052] In some embodiments, the first transistor T1 and the second transistor T2 are both P-type MOS transistors, and the third transistor T3 is an N-type MOS transistor; in other embodiments, the first transistor T1 and the second transistor T2 are both N-type MOS transistors, and the third transistor T3 is a P-type MOS transistor. The above two situations are determined according to the architecture of the pixel, that is, whether the LED and the scan line scan share a common cathode or a common anode, as long as the corresponding compensation unit 230 does not provide a compensation voltage when the current row scan line is turned on, and provides a compensation voltage when the current row scan line is turned off.

[0053] In some embodiments, Figure 7 As shown, the compensation unit 230 further includes a first resistor 232 and a second resistor 233, at least one of which is an adjustable resistor, for example: the first resistor 232 is an adjustable resistor, and the second resistor 233 is a non-adjustable resistor; the first resistor 232 is a non-adjustable resistor, and the second resistor 233 is an adjustable resistor; the first resistor 232 and the second resistor 233 are both adjustable resistors. It is sufficient that the resistance ratio between the first resistor 232 and the second resistor 233 is adjustable.

[0054] The first resistor 232 is arranged on the connection line between the output terminal of the third transistor T3 and the second input terminal of the inverter 231. When the first transistor T1 is turned on, the voltage output by the first transistor T1 enters the second input terminal of the inverter 231 through the first resistor 232; when the third transistor T3 is turned on, the voltage output by the third transistor T3 enters the second input terminal of the inverter 231 through the first resistor 232. One end of the second resistor 233 is connected to the second input terminal of the inverter 231, and this connection end is located between the first resistor 232 and the second input terminal of the inverter 231; and the other end of the second resistor 233 is connected to the output terminal of the inverter 231.

[0055] By setting the first resistor 232 and the second resistor 233, the voltage output by the inverter 231 can be amplified or reduced according to actual needs. Initially, the resistance value of the first resistor 232 is equal to the resistance value of the second resistor 233. If the compensation voltage provided to the scan line is over-compensated or under-compensated during actual use, the ratio between the first resistor 232 and the second resistor 233 can be adjusted by adjusting the resistance value of the first resistor 232, or the resistance value of the second resistor 233, or the resistance value of the first resistor 232 and the second resistor 233, so as to obtain a suitable compensation ratio, thereby obtaining a better compensation voltage and making the compensation effect more ideal.

[0056] Specifically, if the line blanking voltage is defined as V1, the collection point voltage is defined as V2, the resistance value of the first resistor 232 is defined as R1, and the resistance value of the second resistor 233 is defined as R2, then the compensation voltage is R2 (V2-V1) / R1. The collection point voltage is the voltage that appears on the scan line scan of the non-scanning line when the data line data transmits a signal due to the existence of the parasitic capacitor C1 between the data line data and the scan line scan and the parasitic capacitor C2 at both ends of the anode and cathode of the LED.

[0057] The embodiment of the present application reversely compensates the voltage appearing on the non-scanning line to reduce the voltage difference between the cathode and anode of the LED on the non-scanning line, and obtains a suitable compensation ratio by adjusting the ratio of R2 and R1 to achieve an ideal compensation state, so that all light-emitting diodes LED in the entire display panel 100 will not have the problem of false triggering.

[0058] In some embodiments, the output end of the second transistor T2 is electrically connected to the input end and the output end of the corresponding scan line at the same time, that is, the compensation unit 230 simultaneously inputs the compensation voltage from both ends of the corresponding scan line. Compared with the solution that the output end of the second transistor T2 is only connected to one end of the scan line, this embodiment avoids the compensation voltage from being transmitted from one end of the scan line to the other end. Due to the existence of the scan line resistance, the compensation voltage is attenuated, resulting in uneven compensation effect, so that the light emitting diode LED far away from the output end of the second transistor T2 does not receive enough compensation voltage, and a slight false triggering problem may still occur.

[0059] Of course, in other embodiments, the output end of the second transistor T2 may also be connected to only one position of the corresponding scan line, such as the output end of the scan line, the input end of the scan line, the middle point of the scan line or other places, which can be selected according to actual conditions.

[0060] Specifically, Figure 8 As shown, the compensation unit 230 further includes an external wire 234, two ends of which are respectively connected to the input end and the output end of the corresponding scan line, and the output end of the second transistor T2 is also connected to the output end of the corresponding scan line.

[0061] The external wiring 234 can be designed in the same layer as the scan line, so that the external wiring 234 is arranged between the corresponding scan line and the adjacent scan line. In this way, in the entire display panel 100, there is an external wiring 234 between two rows of scan lines connected, which is convenient for wiring design, and the production of the scan line and the external wiring 234 is completed at the same time through an etching process, thereby improving the process efficiency. Of course, all the external wirings 234 can also be made at the upper end and / or lower end of the display panel 100 and located in the non-display area, thereby avoiding the problem of a decrease in the aperture ratio of the display panel 100 due to the existence of the external wirings 234.

[0062] In other embodiments, the external wire 234 and the scan line may be located on both sides of the diode chip 110, respectively. The external wire 234 is manufactured through back wiring design, and then the external wire 234 and the scan line are connected through a punching process.

[0063] like Fig. 9As shown, in some embodiments, the display device 10 includes a diode chip 110, the diode chip 110 includes a plate 111 and the plurality of light-emitting diodes LED, the plurality of light-emitting diodes LED, the data lines and the scan lines are all arranged on the front of the plate 111, and the plurality of compensation units 230 are arranged on the back of the plate 111; wherein the front of the plate 111 faces the light-emitting surface of the display panel 100, and the back of the plate 111 is away from the light-emitting surface of the display panel 100. Through this design, the wiring in the compensation unit 230 is prevented from interfering with the data lines and the scan lines on the front of the plate 111, avoiding the risk of wiring interference and short circuit, and also helping to prevent the aperture ratio of the display panel 100 from decreasing.

[0064] In some embodiments, the compensation unit 230 can also be placed on the front side of the plate 111, between the scan drive unit 220 and the display panel 100, to avoid the complex design of metal wiring and punching on the back side of the plate 111; the compensation unit 230 can even be integrated into the scan drive unit 220 to improve the integration of the circuit.

[0065] It should be noted that the limitations on the various steps involved in this solution are not considered to limit the order of the steps without affecting the implementation of the specific solution. The steps written in front can be executed first, or later, or even simultaneously. The solutions of different implementation embodiments can be combined and applied without conflict. As long as this solution can be implemented, it should be regarded as belonging to the scope of protection of this application.

[0066] The above content is a further detailed description of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. A display driving circuit, comprising a data driving unit and a scan driving unit, wherein the data driving unit provides a data voltage for a data line, and the scan driving unit provides a scan voltage for a scan line, wherein: The display driving circuit further includes a plurality of compensation units, each of which is connected to the scan lines in a one-to-one correspondence to provide a compensation voltage for the scan lines. The compensation units include: A first transistor, wherein a control terminal of the first transistor is connected to a corresponding scan line, and an input terminal of the first transistor is connected to a collection point on the corresponding scan line to receive a voltage at the collection point; an inverter, wherein a first input terminal of the inverter is connected to a reference voltage line, the reference voltage line provides a row blanking voltage, and a second input terminal of the inverter is connected to an output terminal of the first transistor; a second transistor, wherein an input terminal of the second transistor is connected to an output terminal of the inverter, a control terminal of the second transistor is connected to a corresponding scan line, and an output terminal of the second transistor is connected to a corresponding scan line; and a third transistor, wherein an input terminal of the third transistor is connected to the reference voltage line, a control terminal of the third transistor is connected to a corresponding scan line, and an output terminal of the third transistor is connected to the second input terminal of the inverter; Among them, the switch types of the first transistor and the second transistor are the same, and the switch types of the first transistor and the third transistor are different; when a scan voltage is provided to the current row scan line, in the compensation unit connected to the current row scan line, the first transistor is turned off, the second transistor is turned off, and the third transistor is turned on; when a row blanking voltage is provided to the current row scan line, in the compensation unit connected to the current row scan line, the first transistor is turned on, the second transistor is turned on, and the third transistor is turned off.

2. The display driving circuit according to claim 1, characterized in that: The compensation unit further includes a first resistor and a second resistor, at least one of the first resistor and the second resistor is an adjustable resistor, and the first resistor is arranged on a line between the output terminal of the third transistor and the second input terminal of the inverter; One end of the second resistor is connected to the second input end of the inverter, and the other end of the second resistor is connected to the output end of the inverter.

3. The display driving circuit according to claim 2, characterized in that: The line blanking voltage is defined as V1, the collection point voltage is defined as V2, the resistance value of the first resistor is defined as R1, the resistance value of the second resistor is defined as R2, and the compensation voltage is R2 (V2-V1) / R1.

4. The display driving circuit according to any one of claims 1 to 3, characterized in that: The collection point on the scan line is located at the middle point of the scan line, the input end of the first transistor is connected to the middle point of the corresponding scan line, and the control end of the first transistor is connected to the input end of the corresponding scan line.

5. The display driving circuit according to any one of claims 1 to 3, characterized in that: The output end of the second transistor is electrically connected to the input end and the output end of the corresponding scan line at the same time.

6. The display driving circuit according to claim 5, characterized in that: The compensation unit further includes an external wire, two ends of which are respectively connected to an input end and an output end of a corresponding scan line, and an output end of the second transistor is connected to an output end of the corresponding scan line.

7. The display driving circuit according to claim 6, wherein: The external line is arranged between the corresponding scanning line and the adjacent scanning line.

8. A display driving method, for driving the display driving circuit according to any one of claims 1 to 7, characterized in that: The display driving method comprises: Scan time period: the first transistor and the second transistor are turned off, the third transistor is turned on, and the first input terminal of the inverter is connected to the line blanking voltage; Compensation time period: the first transistor and the second transistor are turned on, the third transistor is turned off, the first input terminal of the inverter is connected to the row blanking voltage, the second input terminal of the inverter is connected to the collection point voltage, and the output terminal of the inverter outputs the compensation voltage.

9. A display device, characterized in that: A display panel and a display driving circuit as claimed in any one of claims 1 to 7, wherein the display panel comprises a plurality of light emitting diodes, a plurality of data lines and a plurality of scan lines, the plurality of data lines and the plurality of scan lines are divided into a plurality of pixel regions, the plurality of light emitting diodes are arranged in a one-to-one correspondence in the plurality of pixel regions, and are respectively connected to the corresponding data lines and scan lines; The display driving circuit comprises a data driving unit, a scan driving unit and a plurality of compensation units, the data driving unit is connected to the plurality of data lines, the scan driving unit is connected to the plurality of scan lines, and the compensation units are connected to the scan lines in a one-to-one correspondence.

10. The display device according to claim 9, characterized in that The display panel includes a diode chip, the diode chip includes a plate and the plurality of light emitting diodes, the plurality of light emitting diodes are arranged on the front side of the plate, and the plurality of compensation units are arranged on the back side of the plate.

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