A three-level energy storage inverter common-mode voltage suppression prediction control method and device
By using a common-mode voltage suppression prediction control method for three-level energy storage inverters, and optimizing voltage vector selection using the Lagrange extrapolation theorem and the deadbeat principle, the problem of high complexity in common-mode voltage suppression of three-level inverters is solved, and effective suppression of common-mode voltage and improvement of current quality are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-07
- Publication Date
- 2026-03-27
AI Technical Summary
Existing common-mode voltage suppression methods for three-level inverters are complex and costly, making it difficult to effectively reduce common-mode voltage and affecting system reliability and current quality.
A common-mode voltage suppression predictive control method for three-level energy storage inverters is adopted. By collecting state variables, a discrete-domain mathematical model is constructed. The reference voltage vector is calculated using the Lagrange extrapolation theorem and the deadbeat principle. The optimal voltage vector is selected and the gate drive signal is applied, which reduces the computational burden and optimizes the current quality.
While ensuring the balance of the midpoint voltage, the common-mode voltage is limited to within udc/6, which improves the grid current quality, reduces computational complexity, and enhances system stability and current tracking performance.
Smart Images

Figure CN118763882B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of three-level inverter control, and particularly relates to a common-mode voltage suppression prediction control method and device for a three-level energy storage inverter. Background Technology
[0002] With the increasing proportion of photovoltaic and wind power generation, the power system is showing a trend towards a high proportion of new energy sources and a high degree of power electronics integration. Power electronic inverters, as the interface between the power grid and new energy sources, play a crucial role in this new power system. T-type three-level inverters, with their advantages of good output power quality, high energy density, and low switching losses, are widely used in fields such as mine hoisting, electrified transportation, and new energy power generation. These new application areas present new challenges to the control methods of power electronic inverters.
[0003] Model predictive control, as a novel control strategy, offers advantages such as robustness, fast dynamic response, and high flexibility. It can handle multivariable constraints and achieve multivariable control within a single control loop. Common-mode voltage plays a crucial role in system performance and stability, particularly in motor drive systems and photovoltaic power generation systems.
[0004] Current improved pulse-width modulation-based low common-mode voltage vector control is quite complex and relatively difficult to implement. Some hardware-based strategies for reducing common-mode voltage increase system size and cost, and reduce system reliability.
[0005] To address the aforementioned problems, there is an urgent need for a new, low-cost, and low-complexity solution to suppress common-mode voltage. Summary of the Invention
[0006] The purpose of this invention is to provide a common-mode voltage suppression predictive control method and device for T-type three-level energy storage inverters, addressing the problems of high algorithm complexity and poor current quality in traditional methods. This invention achieves common-mode voltage suppression and current quality optimization for T-type three-level energy storage inverters.
[0007] This invention provides a common-mode voltage suppression prediction control method for a three-level energy storage inverter, the method comprising:
[0008] The state variables of the T-type three-level inverter at time k are collected; the state variables include grid current, grid-side voltage, and capacitor voltage.
[0009] In the two-phase stationary α-β coordinate system, a discrete domain mathematical model of a three-level energy storage inverter is constructed, and the reference value of the grid current at time k+1 is calculated according to the Lagrange extrapolation theorem.
[0010] The reference voltage vector and the sector in which the reference voltage vector is located are calculated using the deadbeat principle.
[0011] The candidate voltage vectors of the sector where the reference voltage vector is located are determined, and the corresponding set of candidate voltage vectors is selected based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval.
[0012] A cost function is constructed based on the current control objective, and the cost function values of all candidate voltage vectors in the candidate voltage vector set are calculated. The voltage vector with the smallest cost function value is selected as the optimal voltage vector.
[0013] The gate drive signal corresponding to the optimal voltage vector is applied to the power electronic semiconductor device of the three-level energy storage inverter.
[0014] In one implementation, the reference value of the grid current at time k+1 calculated according to the Lagrange extrapolation theorem is:
[0015]
[0016] In the formula, These are reference values for the grid current at times k, k-1, and k-2.
[0017] In one embodiment, the step of calculating the reference voltage vector and the sector where the reference voltage vector is located using the deadbeat principle includes:
[0018] Let the predicted value of the grid current at time k+1 be equal to the reference value of the grid current at time k+1 obtained by the Lagrange extrapolation theorem;
[0019] Based on the deadbeat principle, the reference voltage vector and the phase angle of the reference voltage vector of the three-level energy storage inverter at time k are calculated.
[0020] Based on the phase angle relationship between the sector and the reference voltage vector, the sector corresponding to the reference voltage vector is selected.
[0021] In one embodiment, the reference voltage vector is:
[0022]
[0023] The phase angle of the reference voltage vector is:
[0024]
[0025] In the formula, These are the components of the reference voltage vector along the α and β axes, respectively. Let i represent the components of the reference current along the α and β axes at time k+1. α (k), i β (k) represents the sampled value of the grid current in the α-β coordinate system at time k, e α(k), e β (k) represents the sampled grid voltage value in the α-β coordinate system at time k.
[0026] In one embodiment, the phase angle relationship between the sector and the reference voltage vector is as follows:
[0027] The phase angle of the reference voltage vector corresponding to sector I is: -π / 6≤θ≤π / 6;
[0028] The phase angle of the reference voltage vector corresponding to sector II is: π / 6<θ≤π / 2;
[0029] The phase angle of the reference voltage vector corresponding to sector III is: π / 2 < θ ≤ 5π / 6
[0030] The phase angle of the reference voltage vector corresponding to sector IV is: 5π / 6<θ≤π、-π≤θ<-5π / 6;
[0031] The phase angle of the reference voltage vector corresponding to sector V is: -5π / 6 ≤ θ < -π / 2;
[0032] The phase angle of the reference voltage vector corresponding to sector VI is: -π / 2≤θ<-π / 6.
[0033] In one implementation, determining the candidate voltage vector of the sector where the reference voltage vector is located, and selecting the corresponding set of candidate voltage vectors based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval, includes:
[0034] Based on the distribution of voltage vectors in the three-level energy storage inverter, the voltage vectors directly connected to the small voltage vectors in each sector are taken as candidate voltage vectors for each sector.
[0035] Based on the correspondence between the voltage vector and common-mode voltage of the three-level energy storage inverter, common-mode voltages greater than u are filtered out. dc / 6 voltage vector, pre-select candidate voltage vectors;
[0036] Based on the influence of small and medium voltage vectors on the midpoint potential, the pre-selected candidate voltage vectors are divided into P-type voltage vectors and N-type voltage vectors; the P-type voltage vector can increase the midpoint voltage, and the N-type voltage vector can decrease the midpoint voltage.
[0037] Based on the midpoint voltage satisfaction interval, three candidate voltage vector sets are extracted for each sector.
[0038] In one implementation, the method for extracting three candidate voltage vector sets in each sector based on the midpoint voltage satisfaction interval is as follows:
[0039] When the DC side midpoint voltage is within the satisfactory range, the DC side voltage balance problem is not considered, and all voltage vectors in the corresponding region are taken as candidate voltage vectors.
[0040] Only when the DC-side midpoint voltage exceeds the satisfactory range will a suitable voltage vector be selected to balance the DC-side midpoint voltage, specifically:
[0041] When the midpoint voltage exceeds the upper limit threshold, the P-type voltage vector is removed from the candidate voltage vector set;
[0042] When the midpoint voltage is below the lower threshold, the N-type voltage vector is removed from the candidate voltage vector set.
[0043] In one implementation, the set of three candidate voltage vectors extracted from each sector is as follows:
[0044] Sector I:
[0045] When the midpoint voltage is uo > δuo, the candidate voltage vector set is V1, V6, V 14 V 22 ;
[0046] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V4, V6, V 14 V 16 V 21 V 22 ;
[0047] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V 16 V 21 V 22 ;
[0048] Sector II:
[0049] When the midpoint voltage is uo > δuo, the candidate voltage vector set is V1, V6, V 16 V 17 V 23 ;
[0050] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V4, V6, V8, V 16 V 17 V 23 ;
[0051] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V8, V 23 ;
[0052] Sector III:
[0053] When the midpoint voltage is uo > δuo, the candidate voltage vector set is V1, V6, V 10 V 24 ;
[0054] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V6, V8, V 10 V 17 V 18 V 24 ;
[0055] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V8, V 17 V 18 V 24 ;
[0056] Sector IV:
[0057] When the midpoint voltage is uo > δuo, the candidate voltage vector set is V1, V 10 V 18 V 19 V 25 ;
[0058] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V8, V 10 V 12 V 18 V 19 V 25 ;
[0059] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V8, V 12 V 25 ;
[0060] Sector V:
[0061] The midpoint voltage is uo > δ uo At that time, the candidate voltage vector set is V1, V 10 V 14 V 26 ;
[0062] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V 10 V 12 V 14 V 19 V 20 V 26 ;
[0063] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V 12V 19 V 20 V 26 ;
[0064] Sector VI:
[0065] When the midpoint voltage is uo > δuo, the candidate voltage vector set is V1, V 14 V 20 V 21 V 27 ;
[0066] When the midpoint voltage is -δuo≤uo≤δuo, the candidate voltage vector set is V1, V4, V 12 V 14 V 20 V 21 V 27 ;
[0067] When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V 12 V 27 .
[0068] In one implementation, the construction cost function is:
[0069]
[0070] in, Let i represent the components of the reference current along the α and β axes at time k+1. α (k+1), i β (k+1) represents the predicted grid current in the α-β coordinate system at time k+1.
[0071] The present invention also provides a common-mode voltage suppression prediction control device for a three-level energy storage inverter, the device comprising:
[0072] The acquisition module is used to acquire the status information of the three-level energy storage inverter at time k; the status information includes grid current, grid voltage, and DC side upper and lower bus capacitor voltage.
[0073] The three-level energy storage inverter mathematical model construction module is used to construct a discrete domain mathematical model of the three-level energy storage inverter in a two-phase stationary α-β coordinate system, and calculate the reference value of the grid current at time k+1 according to the Lagrange extrapolation theorem.
[0074] The sector determination module is used to calculate the reference voltage vector and the sector in which the reference voltage vector is located using the deadbeat principle.
[0075] The candidate voltage vector set selection module is used to determine the candidate voltage vectors of the sector where the reference voltage vector is located, and select the corresponding candidate voltage vector set based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval.
[0076] The voltage vector selection module is used to construct a cost function based on the current control objective, calculate the cost function value of each voltage vector in the candidate voltage vector set, and select the voltage vector with the minimum cost function value as the optimal voltage vector.
[0077] The action module is used to apply the gate drive signal corresponding to the determined optimal voltage vector to the power electronic semiconductor switching transistors of the three-level energy storage inverter.
[0078] The technical solutions provided in this application embodiment may include the following beneficial effects:
[0079] This invention can limit the common-mode voltage to u while achieving voltage balance and stable operation at the midpoint of a three-level energy storage inverter. dc Within a range of 6, the hazards caused by high common-mode voltage are avoided. Based on sector division and the deadbeat principle, this invention considers only four to seven voltage vectors in each control cycle, reducing the computational burden. The proposed current quality optimization strategy based on the voltage satisfaction range can further improve the grid current quality while ensuring the relative stability of the DC side voltage. Attached Figure Description
[0080] The accompanying drawings, as part of this invention, are provided to further illustrate the invention. The illustrative embodiments and descriptions of the invention are used to explain the invention, but do not constitute an undue limitation thereof. Clearly, the drawings described below are merely some embodiments, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0081] Figure 1 This is a topology diagram of a three-level energy storage inverter;
[0082] Figure 2 This is a voltage vector distribution diagram of a three-level energy storage inverter provided in an embodiment of the present invention;
[0083] Figure 3 This is a flowchart of the common-mode voltage suppression prediction control method for a three-level energy storage inverter provided in this embodiment of the invention;
[0084] Figure 4 These are candidate voltage vector diagrams for each sector provided in the embodiments of the present invention;
[0085] Figure 5 This is a diagram showing the relationship between sectors and grid current provided in an embodiment of the present invention;
[0086] Figure 6 This is a diagram showing the relationship between the voltage satisfaction range and the candidate voltage vector provided in an embodiment of the present invention.
[0087] Figure 7 This is a comparison chart of power grid current quality experiments provided in an embodiment of the present invention; wherein, Figure 7 (a) is the experimental waveform of traditional model predictive control. Figure 7 (b) shows the experimental waveforms of the predictive control using the traditional common-mode voltage suppression model. Figure 7 (c) is the experimental waveform of the present invention, which includes phase a grid voltage, three-phase grid current, and current THD;
[0088] Figure 8 This is a comparison chart of capacitor voltage and midpoint voltage experiments provided in an embodiment of the present invention; wherein, Figure 8 (a) is the experimental waveform of traditional model predictive control. Figure 8 (b) shows the experimental waveforms of the predictive control using the traditional common-mode voltage suppression model. Figure 8 (c) is the experimental waveform of the present invention, which includes DC side voltage, upper bus capacitor voltage, lower bus voltage, and DC side midpoint voltage;
[0089] Figure 9 This is a comparison chart of line voltage, phase voltage, and common-mode voltage experiments provided in an embodiment of the present invention; wherein, Figure 9 (a) is the experimental waveform of traditional model predictive control. Figure 9 (b) shows the experimental waveforms of the predictive control using the traditional common-mode voltage suppression model. Figure 9 (c) is the experimental waveform of the present invention, which includes the line voltage between phase a and phase b, the phase voltage of phase a, and the common-mode voltage;
[0090] Figure 10 This is a comparison chart of dynamic response experiments provided in an embodiment of the present invention; wherein, Figure 10 (a) is the experimental waveform of traditional model predictive control. Figure 10 (b) shows the experimental waveforms of the predictive control using the traditional common-mode voltage suppression model. Figure 10 (c) is the experimental waveform of the present invention, which includes the a-phase grid voltage, a-phase grid current, DC side voltage, and DC side midpoint voltage.
[0091] Figure 11 This is a comparison chart of the computation time of the algorithm provided in the embodiments of the present invention. Detailed Implementation
[0092] To enhance understanding of the present invention, the technical solution of the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. The following embodiments are explanations of the present invention, but the present invention is not limited to the following embodiments.
[0093] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0094] Figure 1 The topology of a T-type three-level energy storage inverter is given. Each phase arm consists of four power electronic semiconductor devices. The DC side is composed of capacitors C1 and C2 connected in series, with identical parameters for C1 and C2. The midpoint of the DC side is defined as o, with zero potential. The grid-side filtering stage consists of a single L-type filter, with resistor R being the equivalent resistance of the filter. Each arm of the T-type three-level energy storage inverter has three effective switching states: S... x ∈{1, 0, -1}, x = (a, b, c). Assuming the capacitor voltages are balanced, i.e., the voltage across each capacitor is equal to half the DC voltage, then the output voltage generated by these three switching states is u. xo ∈{u dc / 2, 0, -u dc Table 1 summarizes the relationship between the output voltage, switching state, and gate signal generated by the converter.
[0095] Table 1 shows the relationship between output voltage, switching state, and gate signal, where x = (a, b, c).
[0096]
[0097] To establish a mathematical model for a T-type three-level energy storage inverter, it is assumed that all power electronic semiconductor devices are ideal switching devices, and nonlinear effects such as on-state voltage drop and switching delay of power electronic semiconductor devices are ignored.
[0098] According to Kirchhoff's voltage law, the dynamic response of the grid current in a three-phase stationary coordinate system is as follows:
[0099]
[0100] In the formula, e x and i x These are the grid voltage and grid current, respectively. on The voltage between the DC side midpoint and the grid midpoint is defined as the common-mode voltage V. CN It can be calculated:
[0101]
[0102]
[0103] The switching states of the T-type three-level inverter are totaled 27 (3)3 ) types, such as Figure 2 As shown. In the α-β coordinate system, these switching states generate a total of 19 non-redundant voltage vectors and 8 redundant voltage vectors. Based on the magnitude of the output voltage, the voltage vectors are divided into zero vectors (V1-V3), small vectors (V4-V5), and small vectors (V6-V7). 15 ), medium vector (V) 16 -V 21 ) and large vector (V) 22 -V 27 There is only one type of zero vector, and two redundant vectors exist; there are six types of small vectors, and each type has one redundant vector; there are six types of medium and large vectors, and no redundant vectors exist.
[0104] As can be seen from the common-mode voltage calculation formula, the voltage vector generates seven common-mode voltage values, namely 0, ±u dc / 6, ±2u dc / 6, ±3u dc / 6. The common-mode voltages generated by each voltage vector are shown in Table 2.
[0105] Table 2 Common-mode voltages corresponding to voltage vectors
[0106]
[0107] like Figure 3 As shown in the figure, this disclosure provides a common-mode voltage suppression prediction control method for a three-level energy storage inverter, which specifically includes the following steps:
[0108] Step S100: Collect the state variables of the T-type three-level inverter at time k.
[0109] Specifically, the grid current i at time k is collected using voltage and current sensors. a (k), i b (k), i c (k), grid-side voltage e a (k), e b (k), e c (k), capacitor voltage u C1 (k), u C2 (k).
[0110] Step S200: In the two-phase stationary α-β coordinate system, construct a discrete domain mathematical model of the three-level energy storage inverter, and calculate the reference value of the grid current at time k+1 according to the Lagrange extrapolation theorem.
[0111] A three-phase stationary coordinate system can be converted to a two-phase stationary coordinate system using the Clarke transformation. The Clarke transformation is as follows:
[0112]
[0113] The mathematical model of a three-level energy storage inverter in a two-phase stationary coordinate system is as follows:
[0114]
[0115] Using the forward Euler method, the discrete mathematical model of the T-type three-level energy storage inverter in a two-phase stationary coordinate system is as follows:
[0116]
[0117] In the formula, L and R are the inductance of the filter inductor and its equivalent resistance, respectively, and T is the value of the filter inductor. s i is the sampling period; α (k), i β (k) represents the sampled value of the grid current in the α-β coordinate system at time k; i α (k+1), i β (k+1) represents the predicted grid current in the α-β coordinate system at time k+1; e α (k), e β (k) represents the sampled value of the grid voltage in the α-β coordinate system at time k; u α (k), u β (k) represents the AC output voltage of the inverter in the α-β coordinate system at time k.
[0118]
[0119] The DC side midpoint voltage is:
[0120] u o =u C2 -u C1
[0121] Assuming equal capacitor voltages and balanced grid currents, the dynamic process of the DC side midpoint voltage can be modeled as follows:
[0122]
[0123] i o The DC midpoint current is given by the following formula:
[0124] i o =|S abc |i abc
[0125] In the formula, |S abc |=[1-|S a |,1-|S b |,1-|S c |],i abc =[i a ib i c ].
[0126] Small and medium vectors affect the balance of the midpoint voltage. Small vectors at the same location have opposite effects on the midpoint voltage.
[0127] According to the Lagrange extrapolation theorem, in the α-β coordinate system, the reference value of the grid current at time k+1 is:
[0128]
[0129] In the formula, These are reference values for the grid current at times k, k-1, and k-2.
[0130] Step S300: Calculate the reference voltage vector and the sector where the reference voltage vector is located using the deadbeat principle.
[0131] In the application embodiment, the reference voltage vector and the sector where the reference voltage vector is located are calculated using the deadbeat principle, including:
[0132] Step S310: Set the predicted value of the grid current at time k+1 to be equal to the reference value of the grid current at time k+1 obtained by the Lagrange extrapolation theorem.
[0133] Step S320: Based on the deadbeat principle, calculate the reference voltage vector and phase angle of the three-level energy storage inverter at time k.
[0134] Specifically, based on the mathematical model derived from S200, the reference voltage vector can be calculated using the deadbeat principle, and then the sector where the reference voltage vector is located can be calculated.
[0135] The deadbeat principle states that the predicted value of the grid-side current at time k+1 is equal to the reference value of the grid current obtained through the Lagrange extrapolation theorem, and then the reference voltage vector of the inverter at time k is calculated as follows:
[0136]
[0137] In the formula, These are the components of the reference voltage along the α and β axes, respectively.
[0138] The phase angle θ of the reference voltage vector is:
[0139]
[0140] Step S330: Select the sector corresponding to the reference voltage vector based on the relationship between the sector and the phase angle of the reference voltage vector.
[0141] Specifically, based on the phase angle of the reference voltage vector and referring to Table 3, the corresponding sub-region is selected.
[0142] Table 3 Relationship between sector and reference voltage vector phase angle
[0143] sector Phase angle of the reference voltage vector I -π / 6≤θ≤π / 6 II π / 6<θ≤π / 2 III π / 2<θ≤5π / 6 IV 5π / 6<θ≤π;-π≤θ<-5π / 6 V -5π / 6 ≤ θ < -π / 2 VI -π / 2≤θ<-π / 6
[0144] Step S400: Determine the candidate voltage vector of the sector where the reference voltage vector is located, and select the corresponding set of candidate voltage vectors based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval.
[0145] In the application embodiment, candidate voltage vectors for the sector where the reference voltage vector is located are determined, and a corresponding set of candidate voltage vectors is selected based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval, including:
[0146] Step S410: Based on the distribution of the voltage vector of the three-level energy storage inverter, the voltage vector directly connected to the small voltage vector in each sector is taken as the candidate voltage vector of each sector.
[0147] Specifically, in combination Figure 2 The voltage vector directly connected to the small voltage vector in each sector is used as the candidate voltage vector for each sector.
[0148] Step S420: Based on the correspondence between the voltage vector and common-mode voltage of the three-level energy storage inverter, filter out common-mode voltages greater than u. dc / 6 voltage vector, pre-select candidate voltage vectors.
[0149] Specifically, based on the correspondence between voltage vectors and common-mode voltages in Table 2, voltage vector pre-selection is used to filter out common-mode voltages greater than u. dc The voltage vector is / 6. Therefore, the voltage vectors V2, V3, V5, V7, V9, V 11 V 13 V 15 Removed. Candidate voltage vectors for each sector are as follows: Figure 4 As shown.
[0150] Step S430: Based on the influence of small voltage vector and medium voltage vector on the midpoint potential, the pre-selected candidate voltage vectors are divided into P-type voltage vectors and N-type voltage vectors.
[0151] Specifically, the small voltage vector and the medium voltage vector can affect the midpoint voltage, and the corresponding midpoint current i. o As shown in Table 4.
[0152] Table 4 Relationship between voltage vector and midpoint current
[0153]
[0154] The correspondence between grid current and each sector is as follows: Figure 5 As shown in Table 5, based on the dynamic mathematical model of the DC-side midpoint voltage derived in step S200, the small voltage vector and the midpoint voltage vector can be divided into P-type voltage vectors and N-type voltage vectors. The P-type voltage vector can increase the midpoint voltage, while the N-type voltage vector can decrease it, as shown in Table 5. This voltage vector division eliminates the use of weighting factors in the cost function of model predictive control, reducing algorithm complexity.
[0155] Table 5 Classification of Voltage Vectors
[0156] sector Small voltage vector Medium voltage vector I <![CDATA[V4(P)、V6(N)、V 14 (N)]]> <![CDATA[V 16 (P)、V 21 (P)]]> II <![CDATA[V6(N)、V4(P)、V8(P)]]> <![CDATA[V 16 (N)、V 17 (N)]]> III <![CDATA[V8(P)、V6(N)、V10(N)]]> <![CDATA[V 17 (P)、V 18 (P)]]> IV <![CDATA[V 10 (N)、V8(P)、V 12 (P)]]> <![CDATA[V 18 (N)、V 19 (N)]]> V <![CDATA[V 12 (P)、V 10 (N)、V 14 (N)]]> <![CDATA[V 19 (P)、V 20 (P)]]> VI <![CDATA[V 14 (N)、V4(P)、V 12 (P)]]> <![CDATA[V 20 (N)、V 21 (N)]]>
[0157] Step S440: Based on the midpoint voltage satisfaction interval, extract three candidate voltage vector sets for each sector.
[0158] Although the division into N-type and P-type voltage vectors achieves a balance of DC-side midpoint potential without weighting factors, this also leads to the exclusion of voltage vectors with the best current tracking performance in certain situations, thereby reducing current quality. To address this issue, this invention proposes a current quality optimization strategy based on the satisfactory range of DC-side midpoint voltage.
[0159] Furthermore, based on the satisfactory midpoint voltage range, the method for extracting three candidate voltage vector sets in each sector is as follows:
[0160] When the DC side midpoint voltage is within the satisfactory range, the DC side voltage balance problem is not considered, and all voltage vectors in the corresponding region are taken as candidate voltage vectors.
[0161] Only when the DC-side midpoint voltage exceeds the satisfactory range will a suitable voltage vector be selected to balance the DC-side midpoint voltage, specifically:
[0162] When the midpoint voltage exceeds the upper limit threshold, the P-type voltage vector is removed from the candidate voltage vector set;
[0163] When the midpoint voltage is below the lower threshold, the N-type voltage vector is removed from the candidate voltage vector set.
[0164] Specifically, when the DC-side midpoint voltage is within the satisfactory range, the DC-side voltage balance problem is not considered, and all voltage vectors in the corresponding region are used as candidate voltage vectors. Only when the DC-side midpoint voltage exceeds the satisfactory range will a suitable voltage vector be selected to balance the DC-side midpoint voltage, such as... Figure 6 As shown in Table 6, when the midpoint voltage exceeds the upper threshold, the P-type voltage vector is removed from the candidate voltage vector set; when the midpoint voltage is below the lower threshold, the N-type voltage vector is removed from the candidate voltage vector set.
[0165] Table 6. Set of candidate voltage vectors based on the voltage satisfaction interval
[0166]
[0167]
[0168] Step S500: Construct a cost function based on the current control objective, calculate the cost function values of all candidate voltage vectors in the candidate voltage vector set, and select the voltage vector with the smallest cost function value as the optimal voltage vector.
[0169] The candidate voltage vector set in step S400 takes into account the voltage balance control of the medium-voltage system, so the use of weighting factors can be omitted in the cost function proposed in this embodiment.
[0170] Furthermore, the cost function is defined as:
[0171]
[0172] in, Let i represent the components of the reference current along the α and β axes at time k+1. α (k+1), i β (k+1) represents the grid current value in the α-β coordinate system at time k+1.
[0173] For each voltage vector in the candidate voltage vector set selected in S400, calculate its cost function value, and select the voltage vector with the lowest cost function value as the optimal voltage vector.
[0174] Step S600: Apply the gate drive signal corresponding to the optimal voltage vector to the power electronic semiconductor device of the three-level energy storage inverter.
[0175] After a series of calculations in steps S100-S500, the control cycle value, comparison value and other information are transmitted to the FPGA through the DSP's communication module. The FPGA is then used to implement functions such as pulse distribution and dead-time delay for the power devices.
[0176] The following is an embodiment of the common-mode voltage suppression prediction and control device for a three-level energy storage inverter of the present invention, which can be used to execute the embodiment of the common-mode voltage suppression prediction and control method for a three-level energy storage inverter of the present invention. For details not disclosed in the embodiment of the common-mode voltage suppression prediction and control device for a three-level energy storage inverter of the present invention, please refer to the embodiment of the common-mode voltage suppression prediction and control method for a three-level energy storage inverter of the present invention.
[0177] In one embodiment, a common-mode voltage suppression prediction control device for a three-level energy storage inverter is proposed, the device comprising:
[0178] The acquisition module is used to acquire the status information of the three-level energy storage inverter at time k; the status information includes grid current, grid voltage, and DC side upper and lower bus capacitor voltage.
[0179] The three-level energy storage inverter mathematical model construction module is used to construct a discrete domain mathematical model of the three-level energy storage inverter in a two-phase stationary α-β coordinate system, and calculate the reference value of the grid current at time k+1 according to the Lagrange extrapolation theorem.
[0180] The sector determination module is used to calculate the reference voltage vector and the sector in which the reference voltage vector is located using the deadbeat principle.
[0181] The candidate voltage vector set selection module is used to determine the candidate voltage vectors of the sector where the reference voltage vector is located, and select the corresponding candidate voltage vector set based on the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval.
[0182] The voltage vector selection module is used to construct a cost function based on the current control objective, calculate the cost function value of each voltage vector in the candidate voltage vector set, and select the voltage vector with the minimum cost function value as the optimal voltage vector.
[0183] The action module is used to apply the gate drive signal corresponding to the optimal voltage vector to the power electronic semiconductor devices of the three-level energy storage inverter.
[0184] It should be noted that the three-level energy storage inverter common-mode voltage suppression prediction control device provided in the above embodiments is only illustrated by the division of the above functional modules when executing the three-level energy storage inverter common-mode voltage suppression prediction control method. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the three-level energy storage inverter common-mode voltage suppression prediction control device and the three-level energy storage inverter common-mode voltage suppression prediction control method embodiments are based on the same concept, and the implementation process is detailed in the three-level energy storage inverter common-mode voltage suppression prediction control method embodiments, which will not be repeated here.
[0185] As a specific embodiment of the present invention, a three-level energy storage inverter experimental platform was built to test and verify the invention. The three-level energy storage inverter is connected to a 220V AC grid on the AC side and powered by a battery on the DC side at 720V. The sampling and control cycle is 100μs. To highlight the advantages of the present invention in common-mode voltage suppression and improved current quality, a comparative experiment was conducted on three control algorithms: the traditional model predictive control algorithm (denoted as MPC 1), the traditional model predictive control algorithm with common-mode voltage suppression (denoted as MPC 2), and the model predictive control algorithm proposed in this invention (denoted as MPC 3).
[0186] Figure 7 This paper compares the grid current quality of three model predictive control algorithms when the grid reference current is 40A. The total harmonic distortion (THD) of the grid current was obtained by a power quality analyzer. The THDs obtained by the three algorithms were 3.6%, 4.4%, and 4.1%, respectively. Compared with MPC 2, the proposed MPC 3 improves the current quality while suppressing common-mode voltage.
[0187] Figure 8 The experimental results for DC voltage, capacitor voltage, and neutral voltage are shown for the three algorithms. The DC voltage was 720V, and the voltages of the two capacitors fluctuated around 360V. All three algorithms can control the neutral voltage within ±20V, thus ensuring the inverter's output performance and stable operation.
[0188] Figure 9 Experimental waveforms of line voltage, phase voltage, and common-mode voltage for three model predictive control algorithms are shown. MPC 1 and MPC2 can limit the common-mode voltage to ±u. dc Within ±6, it exhibits good common-mode voltage suppression. However, MPC 1 does not suppress common-mode voltage, and its common-mode voltage significantly exceeds ±u. dc / 6.
[0189] Figure 10 The experimental waveforms for three model predictive control algorithms are shown. When the current reference value jumps from 20A to 40A, the dynamic response time of the three control strategies is approximately 2ms. When the current reference value jumps from 40A to 20A, the dynamic response time of the three control strategies is approximately 0.5ms. The experimental results show that regardless of the current change trend, the output current can quickly track the current command change, indicating that the present invention has a fast dynamic response.
[0190] Figure 11Experimental waveforms showing the computation time of three model predictive control algorithms in a DSP are presented. The computation times for MPC 1, MPC 2, and MPC3 are 12.4 μs, 8 μs, and 8.8 μs, respectively. Compared to MPC 1, the computation time of this invention is reduced by 3.6 μs. Compared to MPC 2, the computation time of this invention increases only slightly, by 0.8 μs.
[0191] The functional modules in this embodiment of the invention can be integrated into one processing module, or each unit can exist as a separate physical entity, or two or more units can be integrated into one module. The integrated module can be implemented in hardware or as a software functional module.
[0192] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-described technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the invention without departing from the scope of the present invention shall still fall within the scope of the present invention.
Claims
1. A three-level energy storage inverter common-mode voltage suppression predictive control method, characterized in that, The method comprises: Collecting state variables of the T-type three-level inverter at time k; the state variables comprise grid current, grid-side voltage and capacitor voltage; In a two-phase static alpha-beta coordinate system, a discrete-domain mathematical model of the three-level energy storage inverter is constructed, and a reference value of the grid current at time k+1 is calculated according to Lagrange extrapolation theorem; The reference value of the grid current at time k+1 calculated according to the Lagrange extrapolation theorem is: , wherein , , are the components of the reference current at the instants k, k-1, k-2 on the α, β axes respectively. A reference voltage vector and a sector in which the reference voltage vector is located are calculated through the deadbeat principle; The reference voltage vector and the sector in which the reference voltage vector is located are calculated through the deadbeat principle, comprising: The predicted value of the grid current at time k+1 is equal to the reference value of the grid current at time k+1 obtained through the Lagrange extrapolation theorem; A reference voltage vector of the three-level energy storage inverter at time k and a phase angle of the reference voltage vector are calculated according to the deadbeat principle; According to the relationship between the sector and the phase angle of the reference voltage vector, a sector corresponding to the reference voltage vector is selected; The reference voltage vector is: , The phase angle of the reference voltage vector is: , wherein, , are the components of the reference voltage vector on the α, β axes, respectively, , are the components of the reference current at instant k+1 on the α, β axes, respectively, , are the grid current sample values in the α-β coordinate system at instant k, respectively, , are the grid voltage sample values in the α-β coordinate system at instant k, respectively. Candidate voltage vectors in the sector where the reference voltage vector is located are determined, and a corresponding candidate voltage vector set is selected according to the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval; A cost function is constructed based on the current control target, and the cost function values of all candidate voltage vectors in the candidate voltage vector set are calculated, and the voltage vector with the minimum cost function value is selected as the optimal voltage vector; The gate drive signal corresponding to the optimal voltage vector is applied to the power electronic semiconductor device of the three-level energy storage inverter.
2. The predictive control method of three-level energy storage inverter common-mode voltage suppression according to claim 1, characterized in that, The relationship between the sector and the phase angle of the reference voltage vector is: The sector I corresponding reference voltage vector phase angle is: ; The sector II corresponding reference voltage vector phase angle is: ; The sector III corresponds to the reference voltage vector phase angle of: ; The sector IV corresponds to the reference voltage vector phase angle of: , ; The sector V corresponding reference voltage vector phase angle is: ; The sector VI corresponding reference voltage vector phase angle is: .
3. The predictive control method of three-level energy storage inverter common-mode voltage suppression according to claim 1, wherein, The candidate voltage vectors in the sector where the reference voltage vector is located are determined, and the corresponding candidate voltage vector set is selected according to the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval, comprising: In combination with the distribution of the voltage vectors of the three-level energy storage inverter, the voltage vectors directly connected to the small voltage vectors in each sector are selected as the candidate voltage vectors of the sectors; According to the corresponding relationship between the voltage vectors of the three-level energy storage inverter and the common-mode voltage, the common-mode voltage greater than u dc / 6 is screened out, and candidate voltage vectors are preselected. According to the influence of the small voltage vectors and the medium voltage vectors on the midpoint potential, the preselected candidate voltage vectors are divided into P-type voltage vectors and N-type voltage vectors; the P-type voltage vectors can increase the midpoint voltage, and the N-type voltage vectors can decrease the midpoint voltage; Based on the midpoint voltage satisfaction interval, three candidate voltage vector sets are extracted in each sector.
4. The predictive control method of three-level energy storage inverter common-mode voltage suppression according to claim 3, characterized in that, The method for extracting the three candidate voltage vector sets in each sector based on the midpoint voltage satisfaction interval is: When the DC side midpoint voltage is within the satisfaction interval, the DC side voltage balance problem is not considered, and all voltage vectors in the corresponding region are selected as candidate voltage vectors; Only when the DC side midpoint voltage exceeds the satisfaction interval, the appropriate voltage vector is selected to balance the DC side midpoint voltage, specifically: When the midpoint voltage exceeds the upper threshold, the P-type voltage vector is removed from the candidate voltage vector set; when the midpoint voltage is lower than the lower threshold, the N-type voltage vector is removed from the candidate voltage vector set.
5. The predictive control method of three-level energy storage inverter common-mode voltage suppression according to claim 4, characterized in that, The three candidate voltage vector sets extracted in each sector are: Sector I: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V6, V 14 , 22 ; The candidate voltage vector set is V1, V4, V6, V 14 , V 16 , V 21 , V 22 ; When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V 16 , V 21 , V 22 ; Sector II: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V6, V 16 , V 17 , V 23 ; The candidate voltage vector set is V1, V4, V6, V8, V 16 , V 17 , V 23 ; When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V8, V 23 ; Sector III: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V6, V 10 , 24 ; The candidate voltage vector set is V1, V6, V8, V 10 , V 17 , V 18 , V 24 ; The midpoint voltage is uo < -δuo, and the candidate voltage vector set is V1, V8, V 17 , V 18 , V 24 ; Sector IV: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V 10 , V 18 , V 19 , V 25 ; The candidate voltage vector set is V1, V8, V 10 , V 12 , V 18 , V 19 , V 25 ; The midpoint voltage is uo < -δuo, and the candidate voltage vector set is V1, V8, V 12 ; and 25 V Sector V: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V 10 , V 14 , V 26 ; The midpoint voltage is -δuo ≤ uo ≤ δuo, and the candidate voltage vector set is V1, V 10 , V 12 , V 14 , V 19 , V 20 , V 26 ; When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V 12 , V 19 , V 20 , V 26 ; Sector VI: The midpoint voltage is uo > δuo, and the candidate voltage vector set is V1, V 14 , V 20 , V 21 , V 27 ; The midpoint voltage is -δuo ≤ uo ≤ δuo, and the candidate voltage vector set is V1, V4, V 12 , V 14 , V 20 , V 21 , V 27 ; When the midpoint voltage is uo < -δuo, the candidate voltage vector set is V1, V4, V 12 , V 27 .
6. The predictive control method of three-level energy storage inverter common-mode voltage suppression according to claim 1, wherein, The construction cost function is: , wherein, , are the components of the reference current in the α, β axes at the instant k+1 respectively, , are the predicted values of the grid current in the α-β coordinate system at the instant k+1 respectively.
7. A three-level energy-storage inverter common-mode voltage suppression predictive control device, characterized in that, The device comprises: The acquisition module is configured to acquire state information of the three-level energy storage inverter at time k; the state information comprises grid current, grid voltage, and DC side upper and lower bus capacitor voltage; The three-level energy storage inverter mathematical model construction module is configured to construct a mathematical model of the three-level energy storage inverter in a discrete domain under a two-phase static α-β coordinate system, and calculate a reference value of the grid current at time k+1 according to Lagrange extrapolation theorem; The reference value of the grid current at time k+1 calculated according to the Lagrange extrapolation theorem is: , wherein , , are the components of the reference current at the instants k, k-1, k-2 respectively on the α, β axes. The sector judgment module is configured to calculate a reference voltage vector and a sector in which the reference voltage vector is located according to a zero-error principle; The calculation of the reference voltage vector and the sector in which the reference voltage vector is located according to the zero-error principle comprises: Let the predicted value of the grid current at time k+1 be equal to the reference value of the grid current at time k+1 obtained by the Lagrange extrapolation theorem; According to the zero-error principle, the reference voltage vector of the three-level energy storage inverter at time k and the phase angle of the reference voltage vector are calculated; According to the relationship between the sector and the phase angle of the reference voltage vector, the sector corresponding to the reference voltage vector is selected; The reference voltage vector is: , The phase angle of the reference voltage vector is: , wherein, , are the components of the reference voltage vector on the α, β axes, respectively, , are the components of the reference current at the instant k+1 on the α, β axes, respectively, , are the grid current sample values in the α-β coordinate system at the instant k, respectively, , are the grid voltage sample values in the α-β coordinate system at the instant k, respectively. The candidate voltage vector set selection module is configured to determine candidate voltage vectors in the sector in which the reference voltage vector is located, and select a corresponding candidate voltage vector set according to the relationship between the actual value of the midpoint voltage and the voltage satisfaction interval; The voltage vector selection module is configured to construct a cost function based on a current control target, calculate cost function values of each voltage vector in the candidate voltage vector set, and select a voltage vector corresponding to the minimum cost function value as an optimal voltage vector; The action module is configured to apply a gate drive signal corresponding to the optimal voltage vector to a power electronic semiconductor device of the three-level energy storage inverter.
Citation Information
Patent Citations
Low common mode predictive control method for three-level inverter based on discrete space vector modulation
CN115133798A
PWM method, modulator and system for three-level rectifier suppressing common mode voltage
WO2020082762A1