A Bridge Arm Reuse Hybrid MMDCT Topology and Its Control Method

Abstract

The present invention discloses a bridge-arm multiplexing hybrid MMDCT topology and a control method. The topology structure includes: the AC sides of converter A and converter B are connected; converter A includes phase-a, phase-b, and phase-c bridge arms, and each phase bridge arm includes an upper bridge arm, a multiplexing bridge arm, and a lower bridge arm connected in sequence; the method includes: when the AC port voltage is 0, N HSMs are inserted into both the upper and lower bridge arms; when it is greater than 0, K1 is turned on and K2 is turned off, and the N HSMs in the multiplexing bridge arm are incorporated into the lower bridge arm; when it is less than 0, K1 is turned off and K2 is turned on, and the N HSMs in the multiplexing bridge arm are incorporated into the lower bridge arm; when the AC port voltage is V dc / 2, the lower bridge arm and the multiplexing bridge arm are blocked; when it is -V dc / 2, the upper bridge arm and the multiplexing bridge arm are blocked.

Description

Technical Field

[0001] The present invention relates to the technical field of power systems, and particularly to a bridge-arm multiplexing hybrid MMDCT topology and a control method thereof. Background Art

[0002] With the rapid growth of DC power sources represented by photovoltaic power generation and DC loads represented by electric vehicles in the power system, DC distribution networks have become the main development direction for future distribution network construction. As an implementer of important functions such as power transmission, voltage matching, and current isolation, DC transformers are the core equipment of DC distribution networks.

[0003] Limited by the voltage withstand capacity of current semiconductor devices, the two-level DAB scheme is difficult to be directly applied to medium- and high-voltage scenarios. Current research on medium- and high-voltage DC transformers mainly focuses on the fields of input-series output-parallel of DAB modules, input-series output-series, and modular multilevel DC transformers. The use of DAB module series-parallel schemes requires complex port voltage and current equalization control. In addition, the use of a large number of high-frequency transformers also makes the overall cost of the device relatively high. In contrast, modular multilevel DC transformers (MMDCTs) have received extensive attention from researchers because they use centralized transformers and do not require complex balancing control. However, the use of a large number of sub-modules and energy storage capacitors in the traditional MMDCT topology also makes the MMDCT face problems such as small power density and high cost. Summary of the Invention

[0004] In view of this, the present invention provides a bridge-arm multiplexing hybrid MMDCT topology and a control method thereof, which are used to at least solve the problems of small power density and high cost of MMDCTs in the prior art.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] A bridge-arm multiplexing hybrid MMDCT topology includes: converter A and converter B. Converter A adopts a novel converter structure, converter B adopts a novel converter structure or a traditional converter structure, and the AC sides of converter A and converter B are connected.

[0007] The novel converter structure includes a, b, and c phase bridge arms, and each phase bridge arm includes an upper bridge arm, a multiplexing bridge arm, and a lower bridge arm connected in sequence.

[0008] The upper arm, the multiplexing arm, and the lower arm each include N series-connected half-bridge sub-modules HSM. The two IGBTs in each HSM are S1 and S2 respectively. The node jointly led out by the emitter of S1 and the collector of S2 is port 1, and the node led out by the emitter of S2 is port 2;

[0009] The port 1 of the first HSM of the upper arm and the port 2 of the Nth HSM of the lower arm are respectively connected to the DC side ports, and the other HSMs are sequentially connected in series through port 1 and the port 2 of the previous HSM; Connect the node of the port 2 of the Nth HSM of the upper arm and the port 1 of the first HSM of the multiplexing arm to the input end of the arm switching switch K1, and connect the node of the port 2 of the Nth HSM of the multiplexing arm and the port 1 of the first HSM of the lower arm to the input end of the arm switching switch K2, and the node of the output ends of the arm switching switch K1 and the arm switching switch K2 is connected to the AC side j-phase port; where j is a, b, or c; Both the arm switching switch K1 and the arm switching switch K2 include N IGBTs, and at least one of them uses a form of anti-series connection with other IGBTs to block bidirectional current.

[0010] Preferably, the novel converter structure further includes two DC side inductors L dc and split capacitors C dc , where one ends of the two DC side inductors are respectively connected to the two DC side ports, two split capacitors are connected in series between the other ends of the two DC side inductors, and the nodes of the DC side inductors and the split capacitors are the upper split node and the lower split node respectively. The upper arms of the a, b, and c phase arms are all connected to the upper split node through the upper arm inductor L p , and the lower arms of the a, b, and c phase arms are all connected to the lower split node through the lower arm inductor L n .

[0011] A topology control method for an arm multiplexing hybrid MMDCT includes the following steps:

[0012] Obtain the AC port voltage u jA ;

[0013] When the AC port voltage is 0, N HSMs are put into both the upper arm and the lower arm to achieve the balance of the a, b, and c phase arms and the DC side voltage;

[0014] When the AC port voltage is greater than 0, turn on the corresponding K1 of the current converter, turn off K2, and incorporate the N HSMs in the multiplexing arm into the lower arm;

[0015] When the AC port voltage is less than 0, turn off the corresponding K1 of the current converter, turn on K2, and incorporate the N HSMs in the multiplexing arm into the upper arm;

[0016] When the AC port voltage is V dc / 2, the lower arm and the multiplexed arm enter the locked state, and S1 and S2 of all HSMs in the lower arm and the multiplexed arm are turned off; where V dc is the DC side port voltage;

[0017] When the AC port voltage is -V dc / 2, the upper arm and the multiplexed arm enter the locked state, and S1 and S2 of all HSMs in the upper arm and the multiplexed arm are turned off;

[0018] When the AC port voltage is between V dc / 2 and -V dc / 2, the phase arm outputs a stepped wave voltage for transition, and the duration of each step is T d ;

[0019] The expression of the AC port voltage is:

[0020]

[0021] where T t is the time difference of the alternating voltages generated by converter A and converter B.

[0022] Preferably, the switching function of the HSM is:

[0023]

[0024] where x = p, m or n, p is the upper arm, m is the multiplexed arm, n is the lower arm; i = 1, 2,..., N;

[0025] The equivalent upper arm switching function is:

[0026]

[0027] The equivalent lower arm switching function is:

[0028]

[0029] ]>Through the above technical solutions, compared with the prior art, the present invention discloses a bridge arm multiplexing hybrid MMDCT topology and control method, which has the following beneficial effects:

[0030] (1) The novel bridge arm multiplexing MMDCT (Arm Multiplexing MMDCT, AM-MMDCT) in the present invention can effectively reduce the capacitor usage by 25% compared with the traditional MMDCT, and improve the utilization rate of the HSM sub-module;

[0031] (2) To improve the reliability of the arm switching switch, a soft-switching strategy for the arm switching switch is proposed, realizing the ZVS turn-on and ZVS turn-off of the series devices in the high-voltage arm switching switch, and greatly improving the reliability of the AM-MMDCT. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0033] Figure 1 Schematic diagram of the AM-MMDCT topology structure provided by the embodiment of the present invention; among them, (a) is the AM-MMDCT topology structure, (b) is the structure diagram of the HSM; (c) is the structure diagram of the arm switching switch K1 or K2;

[0034] Figure 2 Schematic diagram of the traditional MMDCT topology structure provided by the embodiment of the present invention;

[0035] Figure 3 Schematic diagrams of three states of the HSM provided by the embodiment of the present invention; among them, (a) is the input state, (b) is the cut-off state; (c) is the locked state;

[0036] Figure 4 Schematic diagram of the AM-MMDCT modulation strategy provided by the embodiment of the present invention;

[0037] Figure 5 Schematic diagram of the working mode of the multiplexed arm provided by the embodiment of the present invention; among them, (a) is the upper-arm multiplexed state (b) is the lower-arm multiplexed state;

[0038] Figure 6 Schematic diagram of the AM-MMDCT arm switching strategy provided by the embodiment of the present invention;

[0039] Figure 7 Schematic diagram of the AM-MMDCT simulation results provided by the embodiment of the present invention; among them, (a) is the waveform diagram of the a-phase output voltage of converter A and converter B; (b) is the waveform diagram of the a-phase output current of converter A and converter B; (c) is the waveform diagram of the DC voltage on both sides of converter A and B; (d) is the waveform diagram of the DC-side current; (e) is the waveform diagram of the active power measured on both sides of A and B;

[0040] Figure 8The AM-MMDCT a-phase current waveform diagram provided by the embodiment of the present invention; wherein, (a) is the current waveform diagram of the upper and lower bridge arms of Converter A; (b) is the current waveform diagram of the bridge arm switching switches AK1 and AK2 of Converter A K1 ;

[0041] Figure 9 The AM-MMDCT sub-module capacitor voltage waveform diagram provided by the embodiment of the present invention; wherein, (a), (b), and (c) are the capacitor voltage waveform diagrams of the upper bridge arm, the multiplexing bridge arm, and the lower bridge arm sub-modules respectively. Detailed implementation manners

[0042] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0043] The present invention provides a bridge arm multiplexing hybrid MMDCT topology, as Figure 1 shown, including: Converter A and Converter B. Converter A adopts a new converter structure, and Converter B adopts a new converter structure or a traditional converter structure. The AC sides of Converter A and Converter B are connected.

[0044] The new converter structure includes a-phase, b-phase, and c-phase bridge arms, and each phase bridge arm includes a sequentially connected upper bridge arm, a multiplexing bridge arm, and a lower bridge arm;

[0045] The upper bridge arm, the multiplexing bridge arm, and the lower bridge arm all include N series-connected half-bridge sub-modules HSM. The two IGBTs in each HSM are S1 and S2 respectively. The node commonly led out by the emitter of S1 and the collector of S2 is Port 1, and the node led out by the emitter of S2 is Port 2;

[0046] The Port 1 of the first HSM of the upper bridge arm and the Port 2 of the Nth HSM of the lower bridge arm are respectively connected to the DC side ports, and the other HSMs are sequentially connected in series through Port 1 and the Port 2 of the previous HSM; the node connecting the Port 2 of the Nth HSM of the upper bridge arm and the Port 1 of the first HSM of the multiplexing bridge arm is connected to the input end of the bridge arm switching switch K1, and the node connecting the Port 2 of the Nth HSM of the multiplexing bridge arm and the Port 1 of the first HSM of the lower bridge arm is connected to the input end of the bridge arm switching switch K2. Moreover, the node at the output ends of the bridge arm switching switch K1 and the bridge arm switching switch K2 is connected to the AC side j-phase port; where j is a, b, or c; both the bridge arm switching switch K1 and the bridge arm switching switch K2 include N IGBTs, and at least one of them adopts a form of anti-series connection with other IGBTs to block bidirectional current.

[0047] To further implement the above technical solution, the novel converter structure further includes two DC-side inductors L dc and split capacitors C dc . One end of the two DC-side inductors is respectively connected to the two DC-side ports, and two split capacitors are connected in series between the other ends of the two DC-side inductors. The nodes of the DC-side inductors and the split capacitors are the upper split node and the lower split node respectively. The upper arms of the a, b, and c phase bridge arms are all connected to the upper split node through the upper arm inductor L p , and the lower arms of the a, b, and c phase bridge arms are all connected to the lower split node through the lower arm inductor L n .

[0048] It should be noted that:

[0049] The topological structure of the traditional MMDCT is as Figure 2 shown, where the two sides are respectively the traditional converter structure. The use of a large number of sub-modules and energy storage capacitors makes the MMDCT face the problems of low power density and high cost. To improve the power density of the MMDCT and reduce the cost, the present invention provides a novel arm multiplexing MMDCT (Arm Multiplexing MMDCT, AM-MMDCT) topological structure.

[0050] The topology of the AM-MMDCT is as Figure 1 (a) shown, and it is composed of two AC / DC converters, namely converter A (Converter-A, A side) and converter B (Converter-B, B side), which are arranged face to face. Converter-B can adopt other AC / DC converter structures for the voltage levels in various application scenarios. In the present invention, Converter-B has the same structure as the A side.

[0051] In this embodiment, the converter structure is specifically described taking the A side as an example:

[0052] All the bridge arms on the A side adopt half-bridge sub-modules (Half-bridge Sub-Module, HSM), and the specific structure of the HSM is as Figure 1 (b) shown. The bridge arm switching switches A K1 , AK2 on the A side can be composed of N common collector or common emitter IGBTs connected in series, as Figure 1 (c) shown. Among them, L dcA is the DC-side inductor on the A side, C dcA is the DC-side split capacitor on the A side, L p and L n are the phase bridge arm inductors on the A side; i pjA is the current of the upper arm of each phase on the A side, i njAis the current of the lower arm of each phase on the A side, u jA is the output voltage of the AC side of each phase on the A side, j = a, b, c; V dcA is the DC voltage of the input side, V dcB is the DC voltage of the output side; U c is the given value of the DC side voltage of the sub-module on the A side, and U c = V dcA / 2N, where N is the number of sub-modules in the arm; C SM is the DC side capacitor of the sub-module.

[0053] The three-phase upper and lower arm structures of the DC / AC converter on the A side are symmetric, and the specific connection method is as follows: Taking the a-phase arm as an example, each HSM consists of a DC side capacitor C SM and a single-phase half-bridge converter. The output port 1 is led out from the emitter node of S1 and the collector node of S2 and connected to the previous HSM; the output port 2 is led out from the emitter node of S2 and connected to the next HSM. The DC energy storage capacitor C SM is installed on the DC side of the half-bridge circuit, with the positive pole connected to the collector node of S1 and the negative pole connected to the emitter node of S2. The three states of the HSM are as Figure 3 shown, (a) is the input state, (b) is the cut-off state; (c) is the locked state.

[0054] There are N HSMs in the upper arm, the multiplexing arm, and the lower arm connected in series in the same way. The port 1 of the first HSM in the upper arm is connected to the upper arm inductor L p , the other end of the upper arm inductor L p is connected to the positive pole of the DC bus. The port 2 of the Nth HSM is connected to the node formed by the port 1 of the first HSM in the multiplexing arm and the arm switching switch AS1. The port 2 of the Nth HSM in the multiplexing arm is connected to the node formed by the port 1 of the first HSM in the lower arm and the arm switching switch AS2. The port 2 of the Nth HSM in the lower arm is connected to the lower arm inductor L n , the other end of the lower arm inductor L n [[ID=3�]]is connected to the negative pole of the DC bus. The a-phase AC output port is led out from the node formed by the arm switching switch AS1 and the arm switching switch AS2.

[0055] A topological control method for an arm multiplexing hybrid MMDCT includes the following steps:

[0056] Obtain the AC port voltage u jA ;

[0057] When the AC port voltage is 0, N HSMs are input in both the upper arm and the lower arm to achieve the balance of the a, b, and c-phase arms and the DC side voltage;

[0058] When the AC port voltage is greater than 0, turn on K1 corresponding to the current converter and turn off K2, and incorporate N HSMs in the multiplexed bridge arm into the lower bridge arm;

[0059] When the AC port voltage is less than 0, turn off K1 corresponding to the current converter and turn on K2, and incorporate N HSMs in the multiplexed bridge arm into the upper bridge arm;

[0060] When the AC port voltage is V dc / 2, the lower bridge arm and the multiplexed bridge arm enter the locking state, and S1 and S2 of all HSMs in the lower bridge arm and the multiplexed bridge arm are turned off; where V dc is the DC side port voltage;

[0061] When the AC port voltage is -V dc / 2, the upper bridge arm and the multiplexed bridge arm enter the locking state, and S1 and S2 of all HSMs in the upper bridge arm and the multiplexed bridge arm are turned off;

[0062] When the AC port voltage is between V dc / 2 and -V dc / 2, the phase bridge arm outputs a stepped wave voltage for transition, and the duration of each step is T d ;

[0063] The expression of the AC port voltage is:

[0064]

[0065] where T t is the time difference between the alternating voltages generated by converter A and converter B.

[0066] To further implement the above technical solution, the switching function of HSM is:

[0067]

[0068] where x = p, m or n, p is the upper bridge arm, m is the multiplexed bridge arm, n is the lower bridge arm; i = 1, 2,..., N;

[0069] The equivalent upper bridge arm switching function is:

[0070]

[0071] The equivalent lower bridge arm switching function is:

[0072]

[0073] It should be noted that:

[0074] Taking the A side as an example for analysis, according to the MMC principle, the expression of the AC port output voltage on the A side of the AM-MMDCT is:

[0075]

[0076] Where: N p is the number of sub - modules put into the upper bridge arm; N n is the number of sub - modules put into the lower bridge arm. In addition, to achieve the balance of the DC - side and phase - bridge - arm voltages, the following should also be satisfied

[0077] N p + N n = 2N

[0078] Therefore, when the AC - port voltage is equal to 0, N sub - modules need to be put into both the upper and lower bridge arms to achieve the balance of the phase - bridge - arm and DC - side voltages. When the AC - port voltage is greater than 0, there is

[0079] N n > N p

[0080] So there is

[0081] N n > N

[0082] However, there are only N HSMs in the lower bridge arm. Therefore, at this time, AS1 should be turned on and AS2 should be turned off, and N sub - modules in the multiplexed bridge arm should be incorporated into the lower bridge arm to achieve the voltage output of the AC port. Similarly, when the AC - port voltage is less than 0, there is

[0083] N p > N n

[0084] So there is

[0085] N p > N

[0086] However, there are only N HSMs in the upper bridge arm. Therefore, at this time, AS1 should be turned off and AS2 should be turned on, and N sub - modules in the multiplexed bridge arm should be incorporated into the upper bridge arm to achieve the voltage output of the AC port.

[0087] When converters A and B adopt the same structure, they can be regarded as two inverters with the same structure. Converter A generates an alternating voltage on the left side of the transformer leakage inductance, and converter B equivalently generates an alternating voltage with the same frequency but a phase shift on the primary side of the transformer (i.e., on the right side of the leakage inductance). The amplitude of the alternating voltage equivalently generated by converter B on the primary side of the transformer is equal to the amplitude generated by converter A, and the only difference between the two is the phase. From this perspective, inverter A outputs power on the DC side, and inverter B inputs power on the DC side. By adjusting the phase, the transmitted power can be adjusted. Therefore, the switching process of converter B is the same as that of converter A, except for the difference in the action time, to generate the phase difference of the alternating voltage.

[0088] Similar to the traditional two-level modular multilevel DC transformer, the AM-MMDCT adopts trapezoidal wave modulation and adjusts the transmission power by controlling the phase shift angle between the AC side voltages.

[0089] The modulation strategy of the AM-MMDCT is as Figure 4 shown. When the AC port voltage is less than 0, the multiplexing arm is incorporated into the upper arm, AS1 is turned off, and AS2 is turned on, that is, the upper arm multiplexing state, as Figure 5 (a) shown; when the AC port voltage is greater than 0, the multiplexing arm is incorporated into the lower arm, AS1 is turned on, and AS2 is turned off, that is, the lower arm multiplexing state, as Figure 5 (b) shown. When the AC port voltage is V dcA / 2, the lower arm and the multiplexing arm enter the blocking state, that is, S1 and S2 of all HSMs are turned off; when the AC port voltage is -V dcA / 2, the upper arm and the multiplexing arm enter the blocking state.

[0090] To avoid damage to the insulation of the transformer caused by excessive voltage change rate, when the AC port voltage is between V dcA / 2 and -V dcA / 2, the phase bridge arm outputs a stepped wave voltage for transition, and the duration of each step is T d .

[0091] The stability of the module capacitor voltage is the premise for the stable operation of the AM-MMDCT. To ensure the stability of the sub-module capacitor voltage, the present invention adopts the traditional sorting equalization algorithm, and when the number of sub-modules put into operation changes, the sub-module trigger signals are re-distributed according to the relative magnitudes of the sub-module capacitor voltages and the direction of the arm current.

[0092] To withstand the output voltage of the multiplexing arm, the arm switching switch needs to adopt IGBTs connected in series. However, limited by the time difference of the drive circuit trigger signals and the device parameter differences, the devices in the arm switching switch cannot achieve simultaneous conduction or turn-off. Therefore, it is possible that the voltage between the collector and emitter of the IGBT is greater than the reverse blocking voltage, thereby reducing the reliability of the arm switching switch. Therefore, it is necessary to design a specific arm switching strategy to solve the dynamic equalization problem during the conduction and turn-off processes of the arm switching switch and improve its reliability.

[0093] To reduce unnecessary switching operations, the input state of the redundant arm needs to be changed when the AC port voltage is 0. At this time, the number of input sub-modules in the upper and lower arms is equal, and both are N. Therefore, when the AC port voltage is 0, if all N HSMs in the upper arm and the lower arm are input, and all HSMs in the redundant arm are bypassed. At this time, the output voltage of the redundant arm is 0. If the switch is switched at this time, the ZVS can be achieved for the arm switching switch, avoiding the dynamic voltage equalization problem. To sum up, the arm switching strategy of AM-MMDCT is as follows: when the AC port voltage is equal to 0, all HSMs in the redundant arm are bypassed, and AS1 and AS2 are all turned on first; thereafter, the state of the arm switching switch is determined according to the input state of the redundant arm next. If the redundant arm is incorporated into the upper arm, AS1 is turned off; if the redundant arm is incorporated into the lower arm, AS2 is turned off. The switching process of the redundant arm from being input to the lower arm to being input to the upper arm is as Figure 6 shown.

[0094] Next, the present invention will be verified in combination with simulation examples. According to the Figure 2 AM-MMDCT topology shown, taking the new converter structure adopted on both the left and right sides as an example, a simulation platform is built in MATLAB / Simulink, and the simulation parameters are shown in Table 1.

[0095] Table 1 Main simulation parameters

[0096]

[0097] The simulation output waveforms of AM-MMDCT are as Figure 7 shown. The phase-a output voltages of Converter-A and Converter-B are as Figure 7 (a) shown. It can be seen that the pole voltages of the trapezoidal-wave phase voltages v aA and v aB are respectively half of V dcA and V dcB , and the phase of v aA is advanced, and the energy flows from Converter-A to Converter-B. The phase-a output currents of Converter-A and Converter-B are as Figure 7 (b) shown. The DC voltages on both sides of A and B are as Figure 7 (c) shown. The DC-side current is as Figure 7 (d) shown. The measured active powers on both sides of A and B are as Figure 7 (e) shown. It can be seen that the active powers on both sides are almost equal, and there is a slight deviation between them due to the existence of internal losses in the converter.

[0098] The currents of the upper and lower arms of Convereter-A are as Figure 8 (a) shown. Since when the AC port voltage reaches VdcA When it reaches -V / 2, the lower arm enters the locked state; when the AC port voltage reaches -V / 2, the upper arm enters the locked state. Therefore, only in the transition state do currents flow through both the upper and lower arms, while in the pole voltage state, only one arm has current flowing through it. dcA / 2, the upper arm enters the locked state. Therefore, only in the transition state do currents flow through both the upper and lower arms, while in the pole voltage state, only one arm has current flowing through it. Figure 8 (b) shows the current waveforms of the converter-A arm switching switches AS1 and AS2. It can be seen that when the AC port voltage is greater than 0, the multiplexing arm is incorporated into the lower arm and the AC port current flows through AS1; conversely, the AC port current flows through AS1.

[0099] The capacitor voltage waveforms of the converter-A a-phase sub-modules are as Figure 9 shown. Figure 9 (a), (b), and (c) are the capacitor voltages of the upper arm, multiplexing arm, and lower arm sub-modules respectively. Since the multiplexing arm is constantly operating between the upper and lower arms, the frequency of the capacitor voltage fluctuation of its sub-modules is twice that of the upper and lower arms. In addition, the fluctuation amplitude of the capacitor voltage of the multiplexing arm sub-modules is also smaller than that of the upper and lower arm sub-modules.

[0100] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included within the protection scope of the present application.

Claims

1. A bridge-arm multiplexing hybrid MMDCT topology control method, based on the bridge-arm multiplexing hybrid MMDCT topology, is characterized in that The arm-reused hybrid MMDCT topology includes: converter A and converter B. Converter A adopts a novel converter structure, and converter B adopts a novel converter structure or a traditional converter structure. The AC sides of converter A and converter B are connected. The novel converter structure includes phase-a, phase-b, and phase-c arms, and each arm includes an upper arm, a reused arm, and a lower arm connected in sequence. The upper arm, the reused arm, and the lower arm each include N series-connected half-bridge sub-modules (HSMs). The two IGBTs in each HSM are S1 and S2 respectively. The node jointly led out by the emitter of S1 and the collector of S2 is port 1, and the node led out by the emitter of S2 is port 2. The port 1 of the first HSM of the upper arm and the port 2 of the Nth HSM of the lower arm are respectively connected to the DC-side ports. The other HSMs are sequentially connected in series through port 1 and the port 2 of the previous HSM. The node connecting the port 2 of the Nth HSM of the upper arm and the port 1 of the first HSM of the reused arm is connected to the input end of the arm switching switch K1. The node connecting the port 2 of the Nth HSM of the reused arm and the port 1 of the first HSM of the lower arm is connected to the input end of the arm switching switch K2. And the node of the output ends of the arm switching switch K1 and the arm switching switch K2 is connected to the AC-side phase-j port, where j is a, b, or c. Both the arm switching switch K1 and the arm switching switch K2 include N IGBTs, and at least one of them adopts a form of anti-series connection with other IGBTs to block bidirectional current. The control method of the arm-reused hybrid MMDCT topology includes the following steps: Obtain the AC port voltage u of converter A jA ; When the AC port voltage is 0, both the upper arm and the lower arm are put into N HSMs to achieve the balance between the phase-a, phase-b, and phase-c arms and the DC-side voltage. When the AC port voltage is greater than 0, the K1 is turned on, K2 is turned off, and N HSMs in the multiplexed bridge arm are incorporated into the lower bridge arm; When the AC port voltage is less than 0, turn off the corresponding K1 one, turn on K2, and incorporate N HSMs in the multiplexed bridge arm into the upper bridge arm; When the AC port voltage is V dc / 2, the lower bridge arm and the multiplexing bridge arm enter the locked state, and S1 and S2 of all HSMs in the lower bridge arm and the multiplexing bridge arm are turned off; where V dc is the DC side port voltage; When the AC port voltage is -V dc / 2, the upper bridge arm and the multiplexing bridge arm enter the blocking state, and S1 and S2 of all HSMs in the upper bridge arm and the multiplexing bridge arm are turned off; When the AC port voltage is between V dc / 2 and -V dc / 2, the phase bridge arm outputs a stepped wave voltage for transition, and the duration of each step is T d ; The expression of the AC port voltage on the side of converter A is: Among them, T t is the time difference between the alternating voltages generated by converter A and converter B.

2. A method for regulating a bridge-arm multiplexing hybrid MMDCT topology according to claim 1, characterized in that , The novel converter structure further includes two DC-side inductors L dc and split capacitors C dc . One ends of the two DC-side inductors are respectively connected to the two DC-side ports, and two split capacitors are connected in series between the other ends of the two DC-side inductors. The nodes of the DC-side inductors and the split capacitors are respectively the upper split node and the lower split node. The upper arms of the a, b, and c phase bridge arms are all connected to the upper split node through the upper arm inductor L p , and the lower arms of the a, b, and c phase bridge arms are all connected to the lower split node through the lower arm inductor L n .

3. A method for regulating a bridge arm multiplexing hybrid MMDCT topology according to claim 1, characterized in that, The switching function of the HSM is: Where x = p, m, or n, p is the upper arm, m is the reused arm, n is the lower arm; i = 1, 2,..., N. The equivalent switching function of the upper arm is: The equivalent switching function of the lower arm is:

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