IO pin multiplexing circuit, control method, chip and electronic equipment
By using an I/O pin multiplexing circuit to write control words during chip startup and transmit digital signals during normal operation, the problems of pin resource consumption and speed bottleneck in existing technologies are solved, reducing hardware cost and complexity.
Patent Information
- Application Number
- CN202510977304.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-16
- Publication Date
- 2025-11-11
AI Technical Summary
Existing chip control word writing solutions have bottlenecks in pin resource consumption and speed. The SPI interface consumes a lot of pins, the I2C speed is insufficient, and GPIO parallel writing requires multiple pins, which increases hardware complexity and cost.
The circuit employs an IO pin multiplexing circuit and uses an enable signal switching function to realize control word writing during chip startup and digital signal transmission during normal operation, thereby reducing pin resource consumption. Function switching is achieved by using a gating module, a control word encoding module, and an ESD module in conjunction with enable signal switching.
Control word writing is implemented during chip startup, and digital signal transmission is implemented during normal operation, reducing hardware costs, pin resource consumption, writing speed, and reducing digital resources and chip area.