Pattern and current-voltage linkage test method, test machine and storage medium

Abstract

The application discloses a pattern and current-voltage linkage test method, a test machine and a storage medium, and belongs to the technical field of semiconductor testing, wherein the pattern and current-voltage linkage test method comprises the following steps: a trigger processing module acquires a trigger command sent by an upper computer, and according to the trigger command, corresponding pre-stored patterns are called from a memory; the pre-stored patterns comprise pattern waveforms and current-voltage microinstructions; when the trigger processing module identifies the pattern waveforms, the trigger processing module sends the pattern waveforms to a pattern module, and the pattern module controls an electronic pin array to output the pattern waveforms according to the pattern waveforms; if the trigger processing module identifies the current-voltage microinstructions, the trigger processing module sends the current-voltage microinstructions to a current-voltage test module, and the current-voltage test module controls the electronic pin array to perform current-voltage testing according to the current-voltage microinstructions. The method does not pass through the upper computer, realizes the pattern and current-voltage linkage test in a business FPGA, saves communication time, and improves test efficiency.

Description

Technical Field

[0001] This application belongs to the field of semiconductor testing technology, specifically relating to a pattern-current-voltage linkage testing method, a testing machine, and a storage medium. Background Technology

[0002] Digital test machines are primarily used in the semiconductor, optoelectronic, integrated circuit, and packaging industries for testing. They are widely applied in the research and development of precision electrical measurements for complex, high-speed devices, aiming to ensure quality and reliability while reducing R&D time and device manufacturing costs.

[0003] Pattern and current / voltage (DC) testing are two functions in digital testers. The main function of pattern testing is to output a specific waveform based on user-defined waveform data. The function of current / voltage testing is to perform voltage-to-current (FVMI) and current-to-voltage (FIMV) measurements. In existing technology, pattern and current / voltage testing functions operate independently. Summary of the Invention

[0004] The purpose of this application is to provide a pattern and current / voltage linkage testing method, testing machine, and storage medium to simplify the pattern and current / voltage testing process. Through trigger commands issued by the host computer, pattern and current / voltage linkage testing can be realized within the business FPGA, thereby improving the efficiency of current / voltage testing.

[0005] According to a first aspect of the embodiments of this application, a pattern-current-voltage linkage testing method is provided. This method is applied to a service FPGA, which includes a trigger processing module, a pattern module, and a current-voltage testing module. The trigger processing module is connected to both the pattern module and the current-voltage testing module. The pattern-current-voltage linkage testing method includes:

[0006] The trigger processing module obtains the trigger command sent from the host computer and retrieves the corresponding pre-stored pattern from the memory according to the trigger command; the pre-stored pattern includes pattern waveform and current and voltage micro-instructions;

[0007] When the trigger processing module recognizes the pattern waveform, it sends the pattern waveform to the pattern module. The pattern module then controls the electronic pin array to output the pattern waveform based on the pattern waveform.

[0008] If the trigger processing module recognizes the current and voltage micro-instruction, it sends the current and voltage micro-instruction to the current and voltage test module. The current and voltage test module then controls the electronic pin array to perform current and voltage tests based on the current and voltage micro-instruction.

[0009] In some optional embodiments of this application, the current and voltage micro-instructions include current and voltage output micro-instructions; if the trigger processing module recognizes the current and voltage micro-instructions, the trigger processing module sends the current and voltage micro-instructions to the current and voltage testing module, and the current and voltage testing module controls the electronic pin array to perform current and voltage testing according to the current and voltage micro-instructions includes the following steps:

[0010] If the trigger processing module recognizes the current and voltage output micro-instruction, the trigger processing module addresses the corresponding current and voltage output number from the memory according to the current and voltage output micro-instruction. The current and voltage test module triggers the first digital channel corresponding to the current and voltage output number according to the current and voltage output micro-instruction, and outputs the current and voltage to the chip under test through the first digital channel via the electronic pin array.

[0011] In some optional embodiments of this application, the current and voltage micro-instructions include current and voltage test micro-instructions; if the trigger processing module recognizes the current and voltage micro-instructions, the trigger processing module sends the current and voltage micro-instructions to the current and voltage test module, and the current and voltage test module controls the electronic pin array to perform current and voltage testing according to the current and voltage micro-instructions, the step further includes:

[0012] If the trigger processing module recognizes the current and voltage test micro-instruction, the trigger processing module addresses the corresponding current and voltage test number from the memory according to the current and voltage test micro-instruction. The current and voltage test module triggers the second digital channel corresponding to the current and voltage test number according to the current and voltage test micro-instruction, and performs current and voltage tests on the chip under test through the second digital channel via the electronic pin array.

[0013] In some optional embodiments of this application, the pre-stored pattern further includes waiting for microinstructions; after the step of triggering the processing module to recognize the current and voltage output microinstruction, and before the step of triggering the processing module to recognize the current and voltage test microinstruction, it further includes:

[0014] If the trigger processing module recognizes a waiting microinstruction, it sends the waiting microinstruction to the pattern module. The pattern module then controls the electronic pin array to cyclically output a waiting pattern waveform with a preset time to the chip under test through the third digital channel, based on the waiting microinstruction.

[0015] In some optional embodiments of this application, if the trigger processing module recognizes a current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module. Before the step where the current-voltage test module controls the electronic pin array to perform current-voltage testing according to the current-voltage micro-instruction, the method further includes:

[0016] The trigger processing module controls the electronic pin array to stop outputting the pattern waveform to the chip under test.

[0017] In some optional embodiments of this application, if the trigger processing module recognizes a current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module, and after the current-voltage test module controls the electronic pin array to perform current-voltage testing according to the current-voltage micro-instruction, the method further includes:

[0018] After the current and voltage test is completed, the current and voltage test module acquires the current and voltage test results and stores them in the storage module of the business FPGA.

[0019] In some optional embodiments of this application, before the step of the trigger processing module obtaining the trigger command sent from the host computer and retrieving the corresponding pre-stored pattern from the memory according to the trigger command, the method further includes:

[0020] The trigger processing module loads the pattern and the current and voltage test environment, both of which carry index tags.

[0021] According to a second aspect of the embodiments of this application, a test machine pattern and current-voltage linkage test method is provided. The method is applied to a test machine, the test machine including multiple digital boards, each of the digital boards including a main control module and multiple service modules, each of the service modules including a service FPGA, the service FPGA being used to execute the steps of implementing the pattern and current-voltage linkage test method as described in any embodiment of the first aspect;

[0022] Before the business FPGA executes the step of implementing the pattern and current-voltage linkage test method according to any embodiment of the first aspect, the test machine pattern and current-voltage linkage test method further includes:

[0023] The pattern module and current / voltage test module of multiple digital boards are synchronized.

[0024] According to a third aspect of the embodiments of this application, a test machine is provided, which uses the pattern and current-voltage linkage test method described in any embodiment of the first aspect or the test machine pattern and current-voltage linkage test method described in the embodiments of the second aspect to perform linked testing on the chip under test.

[0025] According to a third aspect of the embodiments of this application, a readable storage medium is provided, on which a program or instructions are stored, which, when executed by a processor, implement the steps of the pattern and current-voltage linkage test method as described in any embodiment of the first aspect or the test machine pattern and current-voltage linkage test method as described in the embodiments of the second aspect.

[0026] According to a fourth aspect of the embodiments of this application, a readable storage medium is provided, wherein when the instructions in the storage medium are executed by a processor of an information processing device or a server, the information processing device or server implements the pattern and current-voltage linkage test method as shown in any embodiment of the first aspect or the test machine pattern and current-voltage linkage test method as described in the embodiments of the second aspect.

[0027] The above-mentioned technical solution of this application has the following beneficial technical effects:

[0028] The method in this application incorporates current and voltage micro-instructions into a pre-stored pattern stored in memory. During pattern function testing, when the trigger processing module recognizes the inserted current and voltage micro-instructions, it is no longer necessary to notify the host computer to control the current and voltage test function. The current and voltage test is performed directly using the current and voltage module inside the business FPGA based on the pre-stored pattern, realizing pattern and current and voltage linkage testing. This reduces the intermediate steps of notifying the host computer to perform current and voltage testing, simplifies the steps of pattern and current and voltage linkage testing, saves communication time, and improves current and voltage testing efficiency. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the pattern and current-voltage linkage test method in an exemplary embodiment of this application;

[0030] Figure 2 This is a schematic diagram of the service FPGA structure in an exemplary embodiment of this application;

[0031] Figure 3 This is a schematic diagram of the pattern and current-voltage linkage test method in a specific embodiment of this application;

[0032] Figure 4It is a schematic structural diagram of a digital board card in an exemplary embodiment of the present application;

[0033] Figure 5 It is a schematic structural diagram of a testing machine in an exemplary embodiment of the present application. Detailed implementation manners

[0034] To make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the detailed implementation manners and with reference to the accompanying drawings. It should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present application. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of the present application.

[0035] In the accompanying drawings, a schematic diagram of a layer structure according to an embodiment of the present application is shown. These figures are not drawn to scale, where for the purpose of clarity, some details are enlarged and some details may be omitted. The shapes of various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art can design regions / layers with different shapes, sizes and relative positions according to actual needs.

[0036] Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts fall within the scope of protection of the present application.

[0037] In the description of the present application, it should be noted that the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0038] In addition, the technical features involved in different implementation manners of the present application described below can be combined with each other as long as they do not conflict with each other.

[0039] When a user actually tests a product, there is a need for linkage between the Pattern function and the current-voltage test function. The user needs to switch to the current-voltage test during the operation of Pattern. Pattern returns the control right to the host computer and the bottom software. The host computer and the bottom software control the current-voltage function test. After the current-voltage test is completed, switch back to the operation of Pattern. The switching process is very cumbersome, and the complex test process reduces the efficiency of the current-voltage test. For this reason, the present application provides a method, a testing machine and a storage medium for the linkage test of Pattern and current voltage.

[0040] The following description, in conjunction with the accompanying drawings, details the pattern and current-voltage linkage testing method, testing machine, and storage medium provided in this application through specific embodiments and application scenarios.

[0041] like Figure 1 As shown, in a first aspect of this application, a method for testing pattern-current-voltage linkage is provided. This method is applied to a business FPGA, such as... Figure 2 As shown, it includes a trigger processing module, a pattern module, and a current and voltage testing module. The trigger processing module is connected to both the pattern module and the current and voltage testing module. The pattern and current / voltage linkage testing method includes the following steps:

[0042] Step S110: The trigger processing module obtains the trigger command sent from the host computer and retrieves the corresponding pre-stored pattern from the memory (DDR) according to the trigger command; the pre-stored pattern includes pattern waveform and current and voltage micro-instructions;

[0043] Step S121: When the trigger processing module recognizes the pattern waveform, the trigger processing module sends the pattern waveform to the pattern module, and the pattern module controls the electronic pin array (PEIC) to output the pattern waveform according to the pattern waveform.

[0044] Step S122: During the output pattern waveform, if the trigger processing module recognizes the current and voltage micro-instruction, the trigger processing module sends the current and voltage micro-instruction to the current and voltage test module. The current and voltage test module controls the electronic pin array to perform current and voltage testing according to the current and voltage micro-instruction.

[0045] This embodiment adds current and voltage micro-instructions to the pre-stored pattern stored in memory. During pattern function testing, when the trigger processing module recognizes the current and voltage micro-instructions, it no longer needs to notify the host computer and the underlying software to control the current and voltage test function. It directly utilizes the current and voltage module inside the business FPGA to perform current and voltage testing based on the pre-stored pattern. This achieves pattern and current / voltage linkage testing, reduces the intermediate step of notifying the host computer for current and voltage testing, enables seamless switching between pattern testing and current / voltage testing at the nanosecond level, simplifies the steps of pattern and current / voltage linkage testing, saves communication time, and improves current and voltage testing efficiency.

[0046] It should be noted that the pre-stored pattern is written to the host computer in advance by technical engineers or clients and stored in memory. Current and voltage micro-instructions (DC micro-instructions) are additional micro-instructions inserted when the pattern is written to the host computer. For example, after the previous pattern waveform has run, the business FPGA trigger processing module automatically recognizes the current and voltage micro-instructions and can then react. When starting to run the pre-stored pattern, the first cycle corresponds to one pattern waveform, and the current and voltage micro-instructions can be inserted into the second cycle or any subsequent cycle.

[0047] As an example, the pre-stored pattern contains multiple sets of patterns; the first set of patterns corresponds to cycle 1, with no microinstructions, and the pattern module outputs pattern waveform 1; the second set of patterns corresponds to cycle 2, with DC microinstructions inserted, and the current and voltage test module outputs current and voltage test waveforms; the third set of patterns corresponds to cycle 3, with no microinstructions, and the pattern module outputs pattern waveform 2. This application does not impose restrictions on the microinstructions and waveform categories corresponding to each cycle.

[0048] In one embodiment, the service FPGA further includes a communication module connected to the trigger processing module, which is used to parse the trigger command issued by the host computer to generate a trigger command that can be recognized within the service FPGA; the trigger processing module retrieves a pre-stored pattern according to the received recognizable trigger command.

[0049] In some embodiments, the current and voltage micro-instructions include current and voltage output micro-instructions (TrigForce); Step S122: If the trigger processing module recognizes the current and voltage micro-instruction, the trigger processing module sends the current and voltage micro-instruction to the current and voltage test module. The current and voltage test module controls the electronic pin array to perform current and voltage testing according to the current and voltage micro-instruction, including the following steps:

[0050] Step S1221: If the trigger processing module recognizes the current and voltage output micro-instruction, the trigger processing module addresses the corresponding current and voltage output number from the memory according to the current and voltage output micro-instruction. The current and voltage test module triggers the first group of digital channels corresponding to the current and voltage output number according to the current and voltage output micro-instruction, and outputs the current and voltage to the chip under test through the first group of digital channels via the electronic pin array.

[0051] In this implementation, the current and voltage output numbers, addresses, and output digital channels can be loaded into the memory before the chip under test is tested using the pattern. During the test, the current and voltage can be tested sequentially according to the current and voltage output numbers, or the corresponding current and voltage can be triggered by the micro-instruction of the current and voltage output, which will trigger the corresponding first group of digital channels to output the current and voltage.

[0052] In some embodiments, the current and voltage micro-instructions include current and voltage test micro-instructions (TrigMeasure); Step S122: If the trigger processing module recognizes the current and voltage micro-instruction, the trigger processing module sends the current and voltage micro-instruction to the current and voltage test module, and the current and voltage test module controls the electronic pin array to perform current and voltage testing according to the current and voltage micro-instruction, and further includes the following steps:

[0053] Step S1223: If the trigger processing module recognizes the current and voltage test micro-instruction, the trigger processing module addresses the corresponding current and voltage test number from the memory according to the current and voltage test micro-instruction. The current and voltage test module triggers the second group of digital channels corresponding to the current and voltage test number according to the current and voltage test micro-instruction, and performs current and voltage tests on the chip under test through the second group of digital channels via the electronic pin array.

[0054] In the above embodiments, the trigger processing module identifies the current and voltage test micro-instruction or the current and voltage output micro-instruction, thereby addressing the corresponding current and voltage output number or the current and voltage test number. The current and voltage test module executes the current and voltage test waveform corresponding to the output number or the current and voltage test waveform corresponding to the test number, respectively. There is no need to communicate with the host computer and the underlying software. The business FPGA directly controls the pattern test and DC test, reducing the intermediate links of the interaction between the existing technology and the host computer and improving the efficiency of DC test.

[0055] In some embodiments, the pre-stored pattern further includes waiting for microinstructions; after step S1221: when the trigger processing module recognizes the current and voltage output microinstruction, and before step S1223: when the trigger processing module recognizes the current and voltage test microinstruction, the following steps are further included:

[0056] Step S1222: If the trigger processing module recognizes a waiting microinstruction, the trigger processing module sends the waiting microinstruction to the pattern module. The pattern module controls the electronic pin array to cyclically output a waiting pattern waveform with a preset time to the chip under test through the third group of digital channels according to the waiting microinstruction.

[0057] It should be noted that the waiting pattern waveform can be the pattern waveform used for the pattern test function mentioned above or other types of pattern waveforms, all of which are used to test the electrical parameters of the chip under test. Since there is a period of idle time between the current and voltage output and the current and voltage test, the pattern waveform is output during this idle time to further improve the testing efficiency of the tester. This also allows time to be reserved for the current and voltage test, ensuring stable output of current and voltage and testing of the chip under test.

[0058] In one embodiment, the first group of digital channels, the second group of digital channels, and the third group of digital channels may be the same group of digital channels or different groups of digital channels.

[0059] In some embodiments, step S122: during the output pattern waveform, if the trigger processing module recognizes a current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module. Before the current-voltage test module controls the electronic pin array to output the current-voltage test waveform according to the current-voltage micro-instruction, the following steps are also included:

[0060] Step S1210: The trigger processing module controls the electronic pin array to stop outputting the pattern waveform to the chip under test.

[0061] In this embodiment, the trigger processing module controls the electronic pin array to stop outputting the pattern waveform to the chip under test, thus preventing the continuous output of the pattern waveform and affecting the accuracy of the current and voltage test results.

[0062] In some embodiments, step S122: During the output of the pattern waveform, if the trigger processing module recognizes a current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module. After the current-voltage test module controls the electronic pin array to perform current-voltage testing according to the current-voltage micro-instruction, the method further includes:

[0063] Step S123: After the current and voltage test is completed, the current and voltage test module acquires the current and voltage test results and stores them in the memory module (RAM) of the business FPGA.

[0064] By using the storage module of the business FPGA to store the current and voltage test results, it is easier to analyze and trace the test results later.

[0065] In some embodiments, before step S110: the trigger processing module obtains the trigger command sent from the host computer and retrieves the corresponding pre-stored pattern from the memory according to the trigger command, the following steps are also included:

[0066] Step S100: The trigger processing module loads the pattern and the current and voltage test environment. Both the pattern and the current and voltage test environment carry index tags.

[0067] In this embodiment, the index label is used to address the pattern or current and voltage test environment. For example, it can address the pattern waveform, the current and voltage test mode, the output channel, and the configuration value of applying voltage to measure current and applying current to measure voltage.

[0068] Since the parameters for current and voltage testing are pre-loaded onto the digital board, the index tags can be directly selected during the testing process, eliminating the intermediate step of notifying the host computer to perform current and voltage testing, thus improving the efficiency of current and voltage testing.

[0069] like Figure 3 As shown, in one specific embodiment, this application also provides a pattern-current-voltage linkage testing method. This method is applied to a business FPGA, which includes a trigger processing module, a pattern module, and a current-voltage testing module. The trigger processing module is connected to both the pattern module and the current-voltage testing module. The pattern-current-voltage linkage testing method includes:

[0070] Step S310: The trigger processing module loads the pattern and the current and voltage test environment;

[0071] Step S320: The trigger processing module obtains the trigger command sent from the host computer and retrieves the corresponding pre-stored pattern from the memory according to the trigger command; there are multiple trigger commands, and different trigger commands correspond to different pre-stored patterns.

[0072] Step S330: The trigger processing module sends the pattern waveform to the pattern module, and the pattern module controls the electronic pin array to output the pattern waveform according to the pattern waveform;

[0073] Step S340: The trigger processing module controls the electronic pin array to stop outputting the pattern waveform to the chip under test;

[0074] Step S350: When the trigger processing module recognizes the current and voltage output micro-instruction, the trigger processing module addresses the corresponding current and voltage output number from the memory according to the current and voltage output micro-instruction. The current and voltage test module triggers the first group of digital channels corresponding to the current and voltage output number according to the current and voltage output micro-instruction, and outputs the current and voltage to the chip under test through the first group of digital channels via the electronic pin array.

[0075] Step S360: When the trigger processing module recognizes the waiting micro-instruction, the trigger processing module sends the waiting micro-instruction to the pattern module. The pattern module controls the electronic pin array to cyclically output the waiting pattern waveform with a preset time to the chip under test through the third group of digital channels according to the waiting micro-instruction.

[0076] Step S370: When the trigger processing module recognizes the current and voltage test micro-instruction, the trigger processing module addresses the corresponding current and voltage test number from the memory according to the current and voltage test micro-instruction. The current and voltage test module triggers the second group of digital channels corresponding to the current and voltage test number according to the current and voltage test micro-instruction, and performs current and voltage tests on the chip under test through the second group of digital channels via the electronic pin array.

[0077] Step S380: After the current and voltage test is completed, the current and voltage test module acquires the current and voltage test results and stores them in the RAM of the business FPGA.

[0078] In this embodiment, current and voltage micro-instructions are added to the pre-stored pattern stored in the memory. In this way, when the trigger processing module recognizes the current and voltage micro-instructions during the pattern function test, it is not necessary to notify the host computer to control the current and voltage test function. The current and voltage module in the business FPGA is used directly to perform the current and voltage test, realizing the linkage test between the pattern and the current and voltage. This reduces the intermediate steps of notifying the host computer to perform the current and voltage test, saves communication time, and improves test efficiency.

[0079] In some embodiments, the pre-stored Pattern may also include current and voltage event micro-instructions. When the trigger module recognizes the current and voltage event micro-instruction, the Pattern module controls the electronic pin array to cyclically output the pattern waveform to the chip under test. At this time, the host computer can obtain that the current state is a current and voltage event, and therefore runs the user code to perform more complex or temporary operations by the user.

[0080] The microinstructions in the above embodiments can appear multiple times in the pre-stored Pattern, and the number of times all microinstructions are executed is recorded in the Pattern execution result status.

[0081] In a second aspect of this application, a method for testing a tester pattern in conjunction with current and voltage is provided. This method is applied to a tester, which includes multiple digital boards, each of which is as follows: Figure 4As shown, each includes a main control module and multiple service modules. Each service module includes a service FPGA, which is used to execute the steps of implementing the pattern and current-voltage linkage test method as described in any embodiment of the first aspect.

[0082] Before the business FPGA executes the step of implementing the pattern and current-voltage linkage test method of any embodiment of the first aspect, the test machine pattern and current-voltage linkage test method further includes:

[0083] Step S10: Synchronize the pattern module and current / voltage test module of multiple digital boards.

[0084] In this embodiment, all digital channels on all digital boards have synchronous counters, and each digital channel starts executing the pattern and current-voltage linkage test at the same counter value. Because all digital boards are synchronized, during the pattern execution, the service FPGAs in the service modules of all digital boards will recognize the microinstructions.

[0085] The main control FPGA includes a trigger collection unit, a trigger processing unit, and a trigger sending unit, with the trigger processing unit connected to both trigger collection and trigger sending. First, the trigger collection unit within the main control FPGA collects trigger commands sent from the host computer. Then, the trigger processing unit processes these commands and transmits them to the trigger sending unit. Simultaneously, the trigger sending unit sends the commands to the communication modules of each service FPGA for parsing. Finally, the trigger processing modules in each service FPGA simultaneously retrieve the corresponding pre-stored pattern from memory based on the trigger command. When a trigger processing module recognizes a pattern waveform, it sends the pattern waveform to the pattern module. The pattern module controls the electronic pin array to output the pattern waveform based on the pattern waveform. When a service FPGA's trigger processing module recognizes a current / voltage output micro-instruction, it finds the index tag in the currently selected current / voltage test item and begins execution. When a trigger processing module recognizes a current / voltage test micro-instruction, it finds the index tag in the currently selected current / voltage test item and triggers the corresponding channel for measurement, storing the test results in the service FPGA's RAM. When a trigger processing module recognizes a wait micro-instruction, it cycles through the current pattern waveform according to the wait time, thus achieving the waiting state.

[0086] Since the test machine pattern and current-voltage linkage test method in this embodiment includes all the processes of the pattern and current-voltage linkage test method embodiment and can achieve the same technical effect, it will not be described again here to avoid repetition.

[0087] It should be noted that the execution entity of the pattern and current-voltage linkage test method provided in this application embodiment can be a pattern and current-voltage linkage test device, or a control module in the pattern and current-voltage linkage test device for executing the pattern and current-voltage linkage test method. This application embodiment uses the pattern and current-voltage linkage test device executing the pattern and current-voltage linkage test method as an example to illustrate the device for pattern and current-voltage linkage testing provided in this application embodiment.

[0088] The test pattern and current-voltage linkage test method provided in this application can be executed by a test pattern and current-voltage linkage test device, or a control module within that device for executing the test pattern and current-voltage linkage test method. This application uses the test pattern and current-voltage linkage test device executing the test pattern and current-voltage linkage test method as an example to illustrate the device provided in this application for test pattern and current-voltage linkage test.

[0089] The pattern-current-voltage linkage testing device and testing machine in this application embodiment can be a device, or a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network-attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This application embodiment does not specifically limit the scope of the device.

[0090] The pattern-current-voltage linkage testing device and testing machine in this application embodiment can be devices with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0091] The pattern and current-voltage linkage testing device and testing machine provided in this application embodiment can achieve... Figure 1 The various processes implemented in the method implementation examples will not be described again here to avoid repetition.

[0092] In a third aspect of the embodiments of this application, a test machine is provided, which uses the pattern and current-voltage linkage test method of any embodiment of the first aspect or the test machine pattern and current-voltage linkage test method of the second aspect to test the chip under test.

[0093] Optionally, such as Figure 5 As shown, the test machine 500 provided in this application embodiment includes a processor 501, a memory 502, and a program or instruction stored in the memory 502 that can be run on the processor 501. When the program or instruction is executed by the processor 501, it implements the various processes of the above-described pattern and current-voltage linkage test method and test machine pattern and current-voltage linkage test method embodiments, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0094] It should be noted that the electronic devices in the embodiments of this application include the aforementioned mobile electronic devices and non-mobile electronic devices.

[0095] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A pattern and current-voltage linkage test method, characterized in that, The application is applied to a service FPGA, the service FPGA includes a trigger processing module, a pattern module and a current voltage test module, the trigger processing module is connected with the pattern module and the current voltage test module respectively, and the pattern and current voltage linkage test method includes: The trigger processing module acquires a trigger command sent by an upper computer and calls a corresponding pre-stored pattern from a memory according to the trigger command; the pre-stored pattern includes a pattern waveform and a current voltage micro instruction; When the trigger processing module identifies the pattern waveform, the trigger processing module sends the pattern waveform to the pattern module, and the pattern module controls an electronic pin array to output the pattern waveform according to the pattern waveform; If the trigger processing module identifies the current voltage micro instruction, the trigger processing module sends the current voltage micro instruction to the current voltage test module, and the current voltage test module controls the electronic pin array to perform current voltage test according to the current voltage micro instruction.

2. The linked testing method of claim 1, wherein, The current voltage micro instruction includes a current voltage output micro instruction; if the trigger processing module identifies the current voltage micro instruction, the trigger processing module sends the current voltage micro instruction to the current voltage test module, and the current voltage test module controls the electronic pin array to perform current voltage test according to the current voltage micro instruction, including: If the trigger processing module identifies the current voltage output micro instruction, the trigger processing module addresses a corresponding current voltage output number from the memory according to the current voltage output micro instruction, and the current voltage test module triggers a first group of digital channels corresponding to the current voltage output number according to the current voltage output micro instruction, and outputs current voltage to a chip to be tested through the first group of digital channels of the electronic pin array.

3. The linked testing method of claim 2, wherein, The current voltage micro instruction includes a current voltage test micro instruction; if the trigger processing module identifies the current voltage micro instruction, the trigger processing module sends the current voltage micro instruction to the current voltage test module, and the current voltage test module controls the electronic pin array to perform current voltage test according to the current voltage micro instruction, including: If the trigger processing module identifies the current voltage test micro instruction, the trigger processing module addresses a corresponding current voltage test number from the memory according to the current voltage test micro instruction, and the current voltage test module triggers a second group of digital channels corresponding to the current voltage test number according to the current voltage test micro instruction, and performs current voltage test on the chip to be tested through the second group of digital channels of the electronic pin array.

4. The linked testing method of claim 3, wherein, The pre-stored pattern also includes a waiting micro instruction; after the step of identifying the current voltage output micro instruction by the trigger processing module and before the step of identifying the current voltage test micro instruction by the trigger processing module, the method further includes: If the trigger processing module identifies the waiting micro-instruction, the trigger processing module sends the waiting micro-instruction to the pattern module, and the pattern module controls the electronic pin array to output a waiting pattern waveform with a preset time to the chip under test through a third group of digital channels according to the waiting micro-instruction.

5. The linked testing method according to any one of claims 1-4, wherein, If the trigger processing module identifies the current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module, and the current-voltage test module further comprises the following steps before controlling the electronic pin array to perform the current-voltage test according to the current-voltage micro-instruction: The trigger processing module controls the electronic pin array to stop outputting the pattern waveform to the chip under test.

6. The linked testing method according to any one of claims 1-4, wherein, If the trigger processing module identifies the current-voltage micro-instruction, the trigger processing module sends the current-voltage micro-instruction to the current-voltage test module, and the current-voltage test module further comprises the following steps after controlling the electronic pin array to perform the current-voltage test according to the current-voltage micro-instruction: After the current-voltage test is completed, the current-voltage test module obtains the current-voltage test result and stores the current-voltage test result in the storage module of the business FPGA.

7. The linked testing method according to any one of claims 1-4, wherein, The trigger processing module obtains the trigger command sent by the host computer, and before the step of retrieving the corresponding pre-stored pattern from the storage according to the trigger command, the trigger processing module further comprises the following steps: The trigger processing module loads the pattern and the current-voltage test environment, and the pattern and the current-voltage test environment both carry an index label.

8. A test machine pattern and current-voltage linkage test method, characterized in that, The test machine comprises a plurality of digital board cards, each of which comprises a master control module and a plurality of business modules, and each of the business modules comprises a business FPGA, which is used to execute the steps of the pattern and current-voltage linkage test method according to any one of claims 1-7. Before the business FPGA executes the steps of the pattern and current-voltage linkage test method according to any one of claims 1-7, the test machine pattern and current-voltage linkage test method further comprises the following steps: Synchronize the pattern modules and the current-voltage test modules of the plurality of digital board cards.

9. A testing machine characterized by, The test machine uses the pattern and current-voltage linkage test method according to any one of claims 1-7 or the test machine pattern and current-voltage linkage test method according to claim 8 to test the chip under test.

10. A readable storage medium, characterized by, The readable storage medium stores programs or instructions, and when the programs or instructions are executed by a processor, the steps of the pattern and current-voltage linkage test method according to any one of claims 1-7 or the test machine pattern and current-voltage linkage test method according to claim 8 are implemented.

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