High-precision bit error rate statistics method and receiving device

Abstract

The embodiments of the present disclosure provide a method and device for high-precision bit error rate statistics. The method includes decoding the input data entering the decoder to obtain output data, the output data includes decoded data and error indication information corresponding to the decoded data, wherein it is determined whether each decoded data unit of the decoded data changes according to the error correction information of the decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes, each error indication information unit has an original value or an error correction indication value; after the decoding of the decoder is completed, the number of error correction indication values ​​in the error indication information is counted based on the statistical error time window to calculate the bit error rate. The method for high-precision bit error rate statistics disclosed in the present disclosure can obtain a high-precision bit error rate while saving computing and storage resources.

Description

Technical Field

[0001] The present disclosure relates to the field of communications, and in particular to a method and a receiving device for high-precision bit error rate statistics. Background Art

[0002] With the massive data applications such as 5G, high-definition video, big data, and chat GPT, the network bandwidth of data centers (DCs) as data carriers is constantly upgrading and evolving, and its industry empowerment value is gradually becoming more prominent. With the substantial increase in network complexity, both data center networks and operator networks have put forward higher requirements for real-time monitoring of the system and network fault prediction. The bit error rate calculated using the forward error correction code (FEC) decoding information is a key indicator of network quality and the most reliable physical layer indicator of future intelligent networks.

[0003] Figure 5 Figure 1 is a schematic diagram of a typical communication system, which can adopt the KP4 FEC codeword structure of the IEEE 802.bs / ck standard with a single lane rate of 50Gbps / 100Gbps. The KP4 FEC codeword can be composed of 5140 bits of information bits and 300 bits of check bits. The transmitter uses the KP4 encoder to encode the input signal I into a 5440-bit codeword C, and modulates it into a signal X and sends it to the transmission medium. When the demodulator of the receiver inputs the 5440-bit C' with error information to the KP4 decoder, the 5440-bit I' output by the KP4 decoder is XORed with the 5440-bit C' input with error information, and the number of corrected bits can be obtained, and then the bit error rate can be calculated. It is worth noting that the bit error rate is accurate only when the number of errors entering the decoder is less than or equal to the error correction capability of the KP4 decoder. If the number of errors entering the decoder is greater than the error correction capability of the KP4 decoder, the bit error rate obtained will be too large.

[0004] Under the IEEE 802.3 800G / 1.6T standard, the rate of a single channel can reach 200Gbps, and a cascade code scheme is introduced for this purpose. In the cascade code scheme, the traditional method of calculating the bit error rate requires huge storage resources. For chips, huge storage resources mean that the memory needs to occupy more chip area, especially in scenarios with large interleaver depths. The traditional method is no longer applicable. If the bit error rates of the inner and outer codes are calculated separately and then added together, there is a problem of inaccurate calculation. In the scenario of data center networks, since the pre-correction bit error rate of FEC is low, inaccurate bit error rate statistics will have a greater impact. At the same time, the above bit error rate calculation process also consumes a lot of computing resources. Summary of the invention

[0005] In order to solve at least one problem existing in the prior art and obtain a high-precision bit error rate, the present disclosure provides a high-precision bit error rate statistics method and a receiving device.

[0006] According to one aspect, an embodiment of the present disclosure provides a method for high-precision bit error rate statistics, which includes decoding input data entering a decoder to obtain output data, the output data including decoded data and error indication information corresponding to the decoded data determined according to the error correction information of the decoder, wherein whether each decoded data unit of the decoded data changes is determined according to the error correction information of the decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes, and each error indication information unit has an original value or an error correction indication value; after the decoding of the decoder is completed, the number of error correction indication values ​​in the error indication information is counted according to the error statistics time window to calculate the bit error rate. Here, the number of error correction indication values ​​in the corresponding error indication information can be counted according to the code block size, and then accumulated according to the error statistics time window.

[0007] By introducing error indication information in the decoding process, the method does not need to perform XOR calculation on the input and output data of the decoder, nor does it need storage space to store the input data of the decoder. In addition, since the error indication information records the changes of each decoded data unit, the method can accurately count the error-corrected codewords, thereby obtaining a high-precision bit error rate.

[0008] Optionally, according to an embodiment of one aspect of the present disclosure, when the decoder adopts an iterative decoding algorithm, it is determined whether the end condition of the iterative decoding is met. When it is determined that the end condition of the iterative decoding is met, the iterative decoding is exited and the decoding of the decoder ends; if the end condition of the iterative decoding is not met, the current iterative decoding is performed; in this iterative decoding, the input decoding data includes one or more code blocks to be decoded, and for the code blocks that fail to decode, the output decoding data is equal to the input decoding data, and the error indication information remains unchanged. For the code blocks that are decoded normally, the error indication information of the decoding data corresponding to the code block is updated according to the error correction information of the decoder. For the iterative decoding algorithm, this method can also accurately count the corrected code words.

[0009] Optionally, according to an embodiment of one aspect of the present disclosure, when the decoder does not adopt an iterative decoding algorithm, if the decoding fails, the decoded data is equal to the input data of the decoder, its corresponding error indication information remains unchanged, and the code block uncorrectable information is reported.

[0010] Optionally, according to an embodiment of one aspect of the present disclosure, each decoded data unit corresponds to one bit error indication information unit. For each decoded data unit, only one bit error indication information unit may be required, which occupies very little storage space.

[0011] Optionally, according to an embodiment of one aspect of the present disclosure, the bit error rate is equal to the ratio of the number of error correction indication values ​​in the statistical error indication information to the number of decoded data units decoded normally within the statistical error time window. The number of decoded data units decoded normally may be the number of bits of decoded data excluding uncorrectable code blocks.

[0012] According to an embodiment of another aspect of the present disclosure, a method for high-precision bit error rate statistics is provided, which includes decoding first input data entering a first decoder to obtain first output data, the first output data including first decoded data and first error indication information corresponding to the first decoded data, wherein the first error indication information is determined according to error correction information of the first decoder; deinterleaving the first output data of the first decoder to obtain deinterleaved first decoded data and deinterleaved first error indication information; a second decoder receives the deinterleaved first decoded data and the deinterleaved first error indication information, decodes the deinterleaved first decoded data, outputs second decoded data, and determines second error indication information according to the error correction information of the second decoder and the deinterleaved first error indication information, wherein the initial value of the second error indication information is the deinterleaved first error indication information; after decoding by the second decoder is completed, the bit error rate is calculated based on the statistical error time window and the second error indication information.

[0013] For the cascade code scheme, the method disclosed in the present invention does not need to consume huge storage resources and computing resources in order to obtain an accurate bit error rate, and at the same time avoids outputting an erroneous bit error rate when the bit error statistics are inaccurate. The above method can count the bit error rates of the inner code and the outer code as a whole, without the need to count the bit error rates of the inner code and the outer code separately, eliminating the inaccuracy of the method of counting the bit error rates separately and then adding them. Since a large amount of XOR operations and storage space are not required, the method disclosed in the present invention reduces the complexity of hardware circuit implementation while outputting a high-precision bit error rate.

[0014] Optionally, according to an embodiment of another aspect of the present disclosure, determining first error indication information based on the error correction information of the first decoder includes determining whether each decoded data unit of the first decoded data changes based on the error correction information of the first decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes; determining second error indication information based on the error correction information of the second decoder and the deinterleaved first error indication information includes determining whether each decoded data unit of the second decoded data changes based on the error correction information of the second decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes.

[0015] Optionally, according to an embodiment of another aspect of the present disclosure, each bit of the first error indication information and the second error indication information has an original value or an error correction indication value. After decoding by the second decoder is completed, the bit error rate is calculated based on the statistical error time window and the number of error correction indication values ​​in the second error indication information.

[0016] Optionally, according to another aspect of the embodiment of the present disclosure, when the first decoder adopts an iterative decoding algorithm, it is determined whether the end condition of the iterative decoding is met. When it is determined that the end condition of the iterative decoding is met, the iterative decoding is exited and the decoding of the first decoder is terminated; if the end condition of the iterative decoding is not met, the current iterative decoding is performed; in this iterative decoding, the input first decoding data includes one or more code blocks to be decoded, and for the code blocks that fail to be decoded, the output first decoding data is equal to the input first decoding data, and the error indication information remains unchanged. For the code blocks that are decoded normally, the corresponding data is updated according to the error correction information of the first decoder. error indication information of the code block; when the second decoder adopts an iterative decoding algorithm, it determines whether the end condition of the iterative decoding is met, and when it is determined that the end condition of the iterative decoding is met, it exits the iterative decoding and the decoding of the second decoder ends; if the end condition of the iterative decoding is not met, the current iterative decoding is performed; in this iterative decoding, the input second decoding data includes one or more code blocks to be decoded, for the code block that fails to be decoded, the output second decoding data is equal to the input second decoding data, and the error indication information remains unchanged, and for the code block that is decoded normally, the error indication information corresponding to the code block is updated according to the error correction information of the second decoder.

[0017] Optionally, according to an embodiment of another aspect of the present disclosure, before deinterleaving the first output data of the first decoder, each data unit of the first decoded data and an error indication information unit corresponding to each data unit are combined into one data unit, and the error indication information unit is attached to a high bit or a low bit in each data unit; after deinterleaving the first output data of the first decoder, the deinterleaved first decoded data and the error indication information are separated, and the separated deinterleaved first decoded data and the first error indication information are input into the second decoder.

[0018] Optionally, according to an embodiment of another aspect of the present disclosure, the first decoder uses Hamming code or BCH code, and the second decoder uses staircase code.

[0019] According to an embodiment of another aspect of the present disclosure, a receiving device for high-precision bit error rate statistics is provided, which includes a first decoder, which decodes first input data to obtain first output data, the first output data including first decoded data and first error indication information corresponding to the first decoded data, wherein the first error indication information is determined according to error correction information of the first decoder; a deinterleaver, which deinterleaves the first output data of the first decoder to obtain deinterleaved first decoded data and deinterleaved first error indication information; a second decoder, which receives the deinterleaved first decoded data and the deinterleaved first error indication information, decodes the deinterleaved first decoded data, outputs second decoded data, and determines second error indication information according to the error correction information of the second decoder and the deinterleaved first error indication information, wherein an initial value of the second error indication information is the deinterleaved first error indication information; and a processing module, which calculates the bit error rate according to the statistical error time window and the second error indication information. Optionally, according to an embodiment of another aspect of the present disclosure, each bit of the first error indication information and the second error indication information has an original value or an error correction indication value, and after the decoding of the second decoder is completed, the processing module calculates the bit error rate based on the statistical error time window and the number of error correction indication values ​​in the second error indication information. Optionally, the bit error rate is equal to the ratio of the number of error correction indication values ​​in the statistical error indication information to the number of decoded data units decoded normally within the statistical error time window. The device does not require a large amount of XOR operations and storage space, and can output a high-precision bit error rate while reducing the complexity of hardware circuit implementation.

[0020] The above method and device disclosed in the present invention are applicable to high-speed optical transmission networks, especially data center networks, and can meet the requirements of high bit error rate accuracy for real-time network monitoring and network fault prediction. In addition, the high-precision bit error rate statistics method and device disclosed in the present invention can reduce the complexity of hardware circuit implementation under the same bit error rate statistics accuracy requirements.

[0021] It is not necessary to achieve all the advantages described above at the same time for any device or method to implement the present disclosure. Other features and advantages of the present disclosure will be described in the subsequent description embodiments, and partly become apparent from the description embodiments, or be understood by implementing the present disclosure. The purposes and advantages of the embodiments of the present disclosure can be realized and obtained by the structures indicated in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0023] Figure 1 A schematic diagram of a method flow for high-precision bit error rate statistics according to an embodiment of the present disclosure;

[0024] Figure 2 1 is a flow chart of an iterative decoding method according to an embodiment of the present disclosure;

[0025] Figure 3 A schematic diagram of a method flow for high-precision bit error rate statistics according to another embodiment of the present disclosure;

[0026] Figure 4 It is a structural schematic diagram of a receiving device for high-precision bit error rate statistics according to another embodiment of the present disclosure;

[0027] Figure 5 A schematic diagram of the structure of a typical communication system. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. The various different embodiments can be combined with each other to form other embodiments not shown in the following description. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0029] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not necessarily indicate a quantity restriction. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0030] Figure 1 The flowchart of the high-precision bit error rate statistics method according to an embodiment of the present disclosure is as follows. In step 110, the input data to be decoded entering the decoder is decoded to obtain output data, and the output data includes decoded data and error indication information corresponding to the decoded data. The decoded data includes multiple decoded data units, and each error indication information corresponds to a decoded data unit. According to the error correction information of the decoder, it is determined whether each decoded data unit in the output data has changed before and after decoding. If it is determined that the current decoded data unit has not changed, the error indication information corresponding to the decoded data unit remains unchanged (for example, for each decoded data unit, when 1 bit of error indication information is used, the error indication information is preset to 0, and the preset value 0 is maintained at this time). If it is determined that the current decoded data unit has changed, the error indication information corresponding to the decoded data unit changes (for example, when 1 bit of error indication information is used, the error indication information is preset to 0, and it can be changed to 1 at this time). The error indication information is a preset original value before decoding begins. After decoding begins, according to the current state of the error indication information, the change in the error indication information may indicate a change from the original value to the error correction indication value, or may indicate a change from the error correction indication value to the original value. The error correction information is information indicating the position of the error-corrected data in the codeword. The input data to be decoded is usually decoded in units of code blocks, so the decoded data disclosed in the present invention may also refer to code blocks.

[0031] In one embodiment, according to different encoding methods, the algorithm used by the decoder may be an iterative decoding algorithm or a non-iterative decoding algorithm. The iterative decoding algorithm may be used for example for staircase code, LDPC code (Low Density Parity Check Code), TPC code (Turbo Product Code), etc., and the non-iterative decoding algorithm may be used for example for BCH code (Bose-Chaudhuri-Hocquenghem Code), RS code (Reed-Solomon code), etc.

[0032] In step 110, when the iterative decoding algorithm is not used, if the decoding fails, the decoded data of the failed decoding may be equal to the corresponding input data, and the corresponding error indication information remains unchanged, and the code block uncorrectable information is reported. For example, for a 5440-bit decoding block, when the decoding fails, the output decoded data may be the input 5440-bit decoding block.

[0033] Figure 2It is a flowchart of iterative decoding according to an embodiment of the present disclosure. Optionally, when executing step 110, if an iterative decoding algorithm is used, it is determined whether the end condition of iterative decoding is met (for example, the end condition of iterative decoding may be whether the number of iterative decodings this time is greater than the set maximum number of iterations, or other judgment conditions such as a preset decoding convergence condition, whether an error occurs in the iterative process, etc.) (step 111). When it is determined that the end condition of iterative decoding is met (for example, the number of iterative decodings this time is greater than the set maximum number of iterations), iterative decoding is exited (step 112). If the end condition of iterative decoding is not met (for example, the number of iterative decodings is not greater than the set maximum number of iterations), the iterative decoding is performed this time. In this iterative decoding, the input data may include one or more code blocks to be decoded, and each code block is decoded (step 113). If the iterative decoding of a code block fails, then in this iterative decoding, the output decoded data of the code block is equal to the input decoded data of the code block, and the corresponding error indication information remains unchanged (that is, the error indication information corresponding to the input decoded data of the code block remains unchanged), and the uncorrectable information of the code block can be reported (step 114). If the iterative decoding of a code block is normal, the error indication information corresponding to the decoded data of the code block is updated according to the error correction position of the decoding (step 115). As above, all code blocks of the input decoded data are decoded to obtain the decoded data of this iterative decoding and the corresponding error indication information (steps 116 and 117). For example, a ladder code can be used for iterative decoding, and a ladder code block can be composed of multiple BCHs (1022, 990). In each iteration, when decoding the ladder code, multiple BCH decodings are required. If the decoding of the current BCH code block fails, its output decoding data is the corresponding input BCH code block and the error indication information is the error indication information when the code block is input. All BCH code blocks are decoded in turn to complete this iterative decoding, and the error indication information corresponding to the output decoding data is obtained. The initial value of the error indication information of the decoded data of this iteration is the error indication information output in the previous iterative decoding. In one embodiment, when 1 bit of error indication information is used, if the error indication information corresponding to a certain decoded data unit in the previous iterative decoding is 1, the initial value of the error indication information of the decoded data unit this time is 1. If the decoded data unit changes after this decoding, the error indication information becomes 0. Iterative decoding is performed cyclically until the end condition of iterative decoding is reached, for example, the number of iterative decoding is greater than the set maximum number of iterations.

[0034] In step 120, after decoding is completed, the number of error correction indication values ​​in the error indication information is counted according to the error counting time window required by the system to calculate the error rate. Optionally, after decoding is completed, the code block uncorrectable information can also be output.

[0035] The error indication information in the method disclosed in the present invention is not included in the coded data transmitted through the channel, but is information added in the decoding process to indicate the change status of the decoded data before and after decoding, so that the number of decoded data units for error correction in the decoding process can be directly counted, so the bit error rate can be accurately calculated. At the same time, the traditional bit error rate statistics method requires the decoding input and output data to be XORed, so a large amount of storage space and computing resources are required, while in this embodiment, the storage occupied by the error indication information only corresponds to the number of decoded data units, and no XOR operation is required, thus saving storage and computing resources.

[0036] Figure 3 is a flowchart of a high-precision bit error rate statistics method according to another embodiment of the present disclosure. Figure 4 The following is a schematic diagram of the structure of a receiving device using a concatenated code scheme according to an embodiment of the present disclosure. Figure 4 The structure of the receiving device is Figure 3 The method flow is described in detail. The receiving device includes a demodulator 31, a first decoder 32, a deinterleaver module 33, a second decoder 34 and a processing module 35. The demodulator 31 receives data transmitted by the channel and demodulates the modulated signal into the original signal form. For example, it can be a PAM demodulator, an NRZ demodulator, etc. Figure 1-2 The meaning of the bit error indication information described is also applicable to this embodiment. The first decoder and the second decoder can be selected as needed, for example, the first decoder is a soft decision decoder for BCH code, and the second decoder is a hard decision decoder for step code. The processing module 35 can be used to calculate the bit error rate, and can also perform other processing tasks of the receiving device. Figure 3 The connection relationship between the modules in the figure is schematic. For example, the processing module 35 can also be connected to other modules in the receiving device as needed.

[0037] In step 210, the first decoder decodes the first decoding input data to obtain first output data, the first output data including the first decoding data and the error indication information corresponding to the first decoding data, wherein it is determined whether each first decoding data unit has changed compared with the corresponding input data unit according to the error correction information of the first decoder, if it is determined that the current first decoding data unit has not changed, the error indication information corresponding to the first decoding data unit remains unchanged (for example, when using 1 bit of error indication information, the error indication information is preset to 0, and the preset value 0 is maintained at this time), if it is determined that the current first decoding data unit has changed, the error indication information corresponding to the first decoding data unit changes (for example, when using 1 bit of error indication information, the error indication information is preset to 0, and it can be changed to 1 at this time). The first decoding data includes multiple first decoding data units, and each error indication information corresponds to one decoding data unit. The error indication information is a preset original value before decoding begins. After decoding begins, based on the current state of the error indication information, a change in the error indication information may indicate a change from an original value to an error correction indication value, or may indicate a change from an error correction indication value to an original value. The coding examples used by the first decoder and the second decoder in this embodiment can refer to the description of step 110, and the first decoder and the second decoder may choose to use an iterative decoding algorithm or a non-iterative decoding algorithm.

[0038] In step 210, when the iterative decoding algorithm is not used, if decoding fails, the data unit in the first decoded data that fails to be decoded is equal to the corresponding data unit in the first decoded input data. At this time, the error indication information remains unchanged, and the code block uncorrectable information can be reported.

[0039] Optionally, when executing step 210, if an iterative decoding algorithm is used, the following steps may be performed similarly: Figure 2The steps shown. First, determine whether the end condition of iterative decoding is reached (for example, whether the number of iterative decodings this time is greater than the set maximum number of iterations, and other judgment conditions such as preset decoding convergence conditions, whether the iterative process is wrong, etc.), and when it is determined that the end condition of iterative decoding is reached (for example, the number of iterative decodings this time is greater than the set maximum number of iterations), exit the iterative decoding. If the end condition of iterative decoding is not reached (for example, the number of iterative decodings is not greater than the set maximum number of iterations), perform this iterative decoding. In this iterative decoding, the input decoding data may include one or more code blocks to be decoded, and each code block is decoded. If the iterative decoding of a code block fails, then in this iterative decoding, the output decoding data of the code block is equal to its input data, and its corresponding error indication information remains unchanged, and the code block uncorrectable information can be reported. If the iterative decoding of a code block is normal, the error indication information corresponding to the decoded data is updated according to the error correction position of the decoding. As described above, decoding is performed on all code blocks of the input data to obtain the decoded data of this iterative decoding and the corresponding error indication information. In one embodiment, when 1 bit of error indication information is used, if the error indication information corresponding to a certain decoded data unit in the previous iterative decoding is 1, then the initial value of the error indication information of the decoded data unit this time is 1, and if the decoded data unit changes after this decoding, the error indication information becomes 0. Iterative decoding is performed cyclically until the termination condition of iterative decoding is reached, for example, the number of iterative decoding is greater than the set maximum number of iterations.

[0040] The length of each decoded data unit of the output data can be determined according to a specific algorithm. For example, for a hard decision decoding method, the length of each decoded data unit can be 1 bit. For a soft decision decoding method, the length of each decoded data unit can be greater than 1 bit.

[0041] For example, the first decoder may use a Hamming code, a BCH code, an RS code, a Turbo Product Code (TPC), an LDPC code, and the like.

[0042] In step 220, the first output data of the first decoder is deinterleaved. The first output data includes first decoded data and error indication information corresponding to the first decoded data.

[0043] Optionally, in one embodiment, before performing the deinterleaving process, each data unit of the first decoded data and an error indication information unit corresponding to the data unit may be combined into one data unit, and the error indication information may be attached to the high or low bit of the data unit. In one embodiment, each decoded data unit may correspond to 1 bit of error indication information, which is combined with the decoded data unit into one data unit. For example, 1 bit of error indication information may be attached as a high or low bit before or after the decoded data unit. The process of combining the first decoded data and the error indication information may be implemented by a deinterleaver module, a processing module or other parts.

[0044] In another embodiment, the decoded data and the error indication information may not be combined as described above, but may be subjected to subsequent deinterleaving processing separately.

[0045] After the deinterleaving process, deinterleaved first decoded data and error indication information are obtained.

[0046] In step 230, the second decoder receives the deinterleaved first decoded data and the error indication information as input data of the second decoder. Similar to step 210, the second decoder performs decoding processing on the input decoded data to obtain second output data, the second output data including the second decoded data and its corresponding error indication information, wherein it is determined whether the current second decoded data unit is changed compared with the input corresponding data unit according to the error correction information of the second decoder, if it is determined that the current second decoded data unit has not changed, the error indication information corresponding to the second decoded data unit remains unchanged, if it is determined that the current second decoded data unit has changed, then the error indication information corresponding to the second decoded data unit changes. In the decoding process of the second decoder, the initial value of the error indication information is the error indication information when it is input to the second decoder.

[0047] In this embodiment, similarly, if hard decoding is adopted, each decoded data unit may be 1 bit, and if soft decoding is adopted, each decoded data unit may be larger than 1 bit.

[0048] In step 230, when the iterative decoding algorithm is not used, if decoding fails, the data unit in the second decoded data that fails to be decoded is equal to the corresponding data unit in the second decoding input data. At this time, the error indication information remains unchanged, and the code block uncorrectable information can be reported.

[0049] Optionally, when executing step 230, if an iterative decoding algorithm is used, the following steps may be performed similarly: Figure 2 The above steps are for Figure 2The description of is also applicable to this embodiment. First, it is determined whether the end condition of iterative decoding is reached (for example, whether the number of iterative decodings this time is greater than the set maximum number of iterations, and other judgment conditions such as preset decoding convergence conditions, whether the iterative process is wrong, etc. can also be used). When it is determined that the end condition of iterative decoding is reached (for example, the number of iterative decodings this time is greater than the set maximum number of iterations), iterative decoding is exited. If the end condition of iterative decoding is not reached (for example, the number of iterative decodings is not greater than the set maximum number of iterations), the iterative decoding of this time is performed. In this iterative decoding, the input decoding data may include one or more code blocks to be decoded, and each code block is decoded. If the iterative decoding of a code block fails, then in this iterative decoding, the output data of the code block is equal to its input data, and its corresponding error indication information remains unchanged, and the code block uncorrectable information can be reported. If the iterative decoding of a code block is normal, the error indication information corresponding to the decoded data is updated according to the error correction position of the decoding. As described above, decoding is performed on all code blocks of the input data to obtain decoded data of this iterative decoding and corresponding error indication information. Iterative decoding is performed cyclically until an end condition of iterative decoding is reached, for example, the number of iterative decoding is greater than a set maximum number of iterations.

[0050] For example, the second decoder may use various forward error correction codes, such as staircase codes, LDPC codes, TPC codes, etc., which may be different from the codes used by the first decoder.

[0051] In step 240, after decoding is completed, the decoded data and its corresponding error indication information are output. Optionally, after decoding is completed, the code block uncorrectable information can also be output. Optionally, in step 250, the number of error correction indication values ​​in the error indication information can be counted according to the code block size, and the number of error correction indication values ​​can be accumulated according to the statistical error time window required by the system to calculate the bit error rate. Step 250 can be completed by a processing module in the receiving device, and the processing module can be implemented by various commonly used processors or controllers.

[0052] The error indication information in this embodiment is not included in the coded data transmitted through the channel, and therefore is not included in the data output by the demodulator. Instead, it is information added during decoding to indicate the change status of the decoded data before and after decoding.

[0053] For the concatenated code scheme, the method and device disclosed in the present invention can avoid the traditional method of consuming huge storage resources and computing resources in order to obtain an accurate bit error rate, and also avoid outputting an erroneous bit error rate when the bit error statistics are inaccurate, saving storage resources and computing resources while outputting an accurate bit error rate. The above method can count the bit error rates of the inner code and the outer code as a whole, without the need to count the bit error rates of the inner code and the outer code separately, eliminating the inaccuracy problem in the separate statistical method. The method disclosed in the present invention can be applied to various concatenated code schemes. For example, the method disclosed in the present invention can be used in the scheme where the inner code is a Hamming code or a BCH code and the outer code is a KP4 hard decision decoding under the IEEE 802.3 800G / 1.6T standard; it can also be used for other standard FEC codes or private high-performance FEC codes, such as the OIF 400ZR standard CFEC code, which can adopt the scheme of Hamming code soft decision decoding and ladder code hard decision decoding; it can also be applied to Turbo product code (TPC) or LDPC code and BCH code concatenated code, etc.

[0054] The above method and device disclosed in the present invention are applicable to high-speed optical transmission networks, especially data center networks, and can meet the requirements of high bit error rate accuracy for real-time network monitoring and network fault prediction. In addition, the high-precision bit error rate statistics method and device disclosed in the present invention can reduce the complexity of hardware circuit implementation under the same bit error rate statistics accuracy requirements.

[0055] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A method for high-precision bit error rate statistics, comprising: Decoding input data entering the decoder to obtain output data, the output data including the decoded data and error indication information corresponding to the decoded data determined according to error correction information of the decoder, wherein whether each decoded data unit of the decoded data changes is determined according to the error correction information of the decoder, each error indication information unit corresponds to a decoded data unit, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes, each error indication information unit has an original value or an error correction indication value, the change of the error indication information unit indicates a change from the original value to the error correction indication value or from the error correction indication value to the original value, if the decoding fails, the error indication information remains unchanged; After the decoding of the decoder is completed, the number of error correction indication values ​​in the error indication information is counted according to the error counting time window to calculate the error rate.

2. The method for high-precision bit error rate statistics according to claim 1 is characterized in that When the decoder adopts an iterative decoding algorithm, it is determined whether an end condition of the iterative decoding is met, and when it is determined that the end condition of the iterative decoding is met, iterative decoding is exited, and the decoding of the decoder ends; If the end condition of iterative decoding is not met, the current iterative decoding is performed; in this iterative decoding, the input decoding data includes one or more code blocks to be decoded. For the code blocks that fail to decode, the output decoding data is equal to the input decoding data, and the error indication information remains unchanged. For the code blocks that are decoded normally, the error indication information of the decoding data corresponding to the code block is updated according to the error correction information of the decoder. The initial value of the error indication information of the decoding data of this iteration is the error indication information output in the previous iterative decoding.

3. The method for high-precision bit error rate statistics according to claim 1 is characterized in that When the decoder does not adopt an iterative decoding algorithm, if decoding fails, the decoded data is equal to the input data of the decoder, the corresponding error indication information remains unchanged, and the code block uncorrectable information is reported.

4. The method for high-precision bit error rate statistics according to claim 1 is characterized in that Each decoded data unit corresponds to one bit error indication information unit.

5. The method for high-precision bit error rate statistics according to claim 4, characterized in that The bit error rate is equal to the ratio of the number of error correction indication values ​​in the bit error indication information counted to the number of decoded data units decoded normally within the bit error statistics time window.

6. A method for high-precision bit error rate statistics, comprising: Decoding first input data entering the first decoder to obtain first output data, the first output data including first decoded data and first error indication information corresponding to the first decoded data, wherein the first error indication information is determined according to error correction information of the first decoder; Deinterleaving the first output data of the first decoder to obtain deinterleaved first decoded data and deinterleaved first error indication information; The second decoder receives the deinterleaved first decoded data and the deinterleaved first error indication information, decodes the deinterleaved first decoded data, outputs second decoded data, and determines second error indication information according to the error correction information of the second decoder and the deinterleaved first error indication information, wherein the initial value of the second error indication information is the deinterleaved first error indication information; After the decoding of the second decoder is completed, the bit error rate is calculated based on the statistical bit error time window and the second bit error indication information.

7. The method for high-precision bit error rate statistics according to claim 6 is characterized in that Determining the first error indication information according to the error correction information of the first decoder includes determining whether each decoded data unit of the first decoded data changes according to the error correction information of the first decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes; determining the second error indication information according to the error correction information of the second decoder and the deinterleaved first error indication information includes determining whether each decoded data unit of the second decoded data changes according to the error correction information of the second decoder, if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change, if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes.

8. The method for high-precision bit error rate statistics according to claim 6, characterized in that Each bit of the first bit error indication information and the second bit error indication information has an original value or an error correction indication value. After decoding by the second decoder is completed, the bit error rate is calculated based on the statistical bit error time window and the number of error correction indication values ​​in the second bit error indication information.

9. The method for high-precision bit error rate statistics according to claim 6, characterized in that When the first decoder adopts an iterative decoding algorithm, determining whether an end condition of the iterative decoding is met, and when it is determined that the end condition of the iterative decoding is met, exiting the iterative decoding, and the decoding of the first decoder ends; If the termination condition of iterative decoding is not met, the current iterative decoding is performed; in the current iterative decoding, the input first decoding data includes one or more code blocks to be decoded, and for a code block that fails to be decoded, the output first decoding data is equal to the input first decoding data, and the error indication information remains unchanged; for a code block that is decoded normally, the error indication information corresponding to the code block is updated according to the error correction information of the first decoder; When the second decoder adopts an iterative decoding algorithm, determining whether an end condition of the iterative decoding is met, and when it is determined that the end condition of the iterative decoding is met, exiting the iterative decoding, and the decoding of the second decoder ends; If the end condition of iterative decoding is not met, this iterative decoding is performed; in this iterative decoding, the input second decoding data includes one or more code blocks to be decoded. For the code blocks that fail to decode, the output second decoding data is equal to the input second decoding data, and the error indication information remains unchanged. For the code blocks that are decoded normally, the error indication information corresponding to the code block is updated according to the error correction information of the second decoder.

10. The method for high-precision bit error rate statistics according to claim 6, characterized in that When the first decoder does not adopt an iterative decoding algorithm, if the decoding fails, the first decoded data is equal to the input data of the first decoder, its error indication information remains unchanged, and the code block uncorrectable information is reported; when the second decoder does not adopt an iterative decoding algorithm, if the decoding fails, the second decoded data is equal to the input data of the second decoder, its corresponding error indication information remains unchanged, and the code block uncorrectable information is reported.

11. The method for high-precision bit error rate statistics according to claim 6, characterized in that Before deinterleaving the first output data of the first decoder, each data unit of the first decoded data and the error indication information unit in the first error indication information corresponding to each data unit are combined into one data unit, and the error indication information unit is attached to a high bit or a low bit in each data unit. After deinterleaving the first output data of the first decoder, the deinterleaved first decoded data and the first error indication information are separated, and the separated deinterleaved first decoded data and the first error indication information are input into the second decoder.

12. A high-precision bit error rate statistics receiving device, comprising A first decoder, which decodes the first input data to obtain first output data, wherein the first output data includes first decoded data and first error indication information corresponding to the first decoded data, wherein the first error indication information is determined according to error correction information of the first decoder; a deinterleaver that performs deinterleaving processing on the first output data of the first decoder to obtain deinterleaved first decoded data and deinterleaved first error indication information; a second decoder receiving the deinterleaved first decoded data and the deinterleaved first error indication information, decoding the deinterleaved first decoded data, outputting second decoded data, and determining second error indication information according to the error correction information of the second decoder and the deinterleaved first error indication information, wherein an initial value of the second error indication information is the deinterleaved first error indication information; A processing module calculates a bit error rate according to the statistical bit error time window and the second bit error indication information.

13. The receiving device for high-precision bit error rate statistics according to claim 12, characterized in that The first decoder determines whether each decoded data unit of the first decoded data changes based on the error correction information of the first decoder; if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change; if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes; the second decoder determines whether each decoded data unit of the second decoded data changes based on the error correction information of the second decoder; if the decoded data unit does not change, the error indication information unit corresponding to the decoded data unit does not change; if the decoded data unit changes, the error indication information unit corresponding to the decoded data unit changes.

14. The high-precision bit error rate statistics receiving device according to claim 12, characterized in that Each bit of the first bit error indication information and the second bit error indication information has an original value or an error correction indication value. After decoding by the second decoder is completed, the processing module calculates the bit error rate based on the statistical bit error time window and the number of error correction indication values ​​in the second bit error indication information.

15. The receiving device for high-precision bit error rate statistics according to claim 12, characterized in that When the first decoder adopts an iterative decoding algorithm, the first decoder determines whether an end condition of iterative decoding is met, and when it is determined that the end condition of iterative decoding is met, iterative decoding is exited, and decoding by the first decoder ends; If the termination condition of iterative decoding is not met, the current iterative decoding is performed; in the current iterative decoding, the input first decoding data includes one or more code blocks to be decoded, and for a code block that fails to be decoded, the output first decoding data is equal to the input first decoding data, and the error indication information remains unchanged; for a code block that is decoded normally, the error indication information corresponding to the code block is updated according to the error correction information of the first decoder; and / or When the second decoder adopts an iterative decoding algorithm, determining whether an end condition of the iterative decoding is met, and when it is determined that the end condition of the iterative decoding is met, exiting the iterative decoding, and the decoding of the second decoder ends; If the end condition of iterative decoding is not met, this iterative decoding is performed; in this iterative decoding, the input second decoding data includes one or more code blocks to be decoded. For the code blocks that fail to decode, the output second decoding data is equal to the input second decoding data, and the error indication information remains unchanged. For the code blocks that are decoded normally, the error indication information corresponding to the code block is updated according to the error correction information of the second decoder.

16. The high-precision bit error rate statistics receiving device according to claim 12, characterized in that When the first decoder does not adopt an iterative decoding algorithm, if the decoding fails, the first decoded data is equal to the input data of the first decoder, its error indication information remains unchanged, and the code block uncorrectable information is reported; when the second decoder does not adopt an iterative decoding algorithm, if the decoding fails, the second decoded data is equal to the input data of the second decoder, its corresponding error indication information remains unchanged, and the code block uncorrectable information is reported.

17. The high-precision bit error rate statistics receiving device according to claim 12, characterized in that The deinterleaver combines each data unit of the first decoded data and one error indication information unit in the first error indication information corresponding to each data unit into one data unit before deinterleaving the first output data of the first decoder, and the error indication information unit is attached to a high bit or a low bit in each data unit, and the deinterleaver separates the deinterleaved first decoded data and the first error indication information after deinterleaving the first output data, and inputs the separated deinterleaved first decoded data and the first error indication information into the second decoder.

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