A method for determining exposure compensation amount

Abstract

The present invention provides a method for determining an exposure compensation amount, comprising: providing a substrate having a first structure and a first mask layer formed therein; performing a first photolithography process to form a first photoresist pattern on the first mask layer, and obtaining a first alignment offset between the first photoresist pattern and the first structure; transferring the first photoresist pattern to the first mask layer to form a first pattern; forming a second mask layer on the first mask layer, performing a second photolithography process to form a second photoresist pattern on the second mask layer, and obtaining a second alignment offset between the second photoresist pattern and the first pattern; transferring the second photoresist pattern to the first mask layer to form a second pattern, and forming a target pattern based on the first and second patterns; obtaining a third alignment offset between the target pattern and the first structure, and determining an exposure compensation amount for the first photolithography process based on each alignment offset. The method improves the accuracy of the exposure compensation amount and increases the yield of semiconductor products.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a method for determining an exposure compensation amount. Background Art

[0002] As the size of memory continues to shrink, the gaps between components in the memory also shrink, placing higher demands on the alignment accuracy of patterns between different layers.

[0003] To ensure high alignment accuracy between the front and back layers of a semiconductor chip, a post-development inspection (ADI) is typically performed after development in the photolithography process, and a post-etch inspection (AEI) is performed after etching. Summary of the Invention

[0004] An embodiment of the present application provides a method for determining an exposure compensation amount, which assists in determining the exposure compensation amount by using the offset corresponding to two layers of mask patterns formed successively, thereby improving the accuracy of determining the exposure compensation amount and thereby improving the quality of semiconductor manufacturing.

[0005] In a first aspect, an embodiment of the present application provides a method for determining an exposure compensation amount, the method comprising:

[0006] Providing a substrate, wherein a first structure and a first mask layer located on the first structure are formed on the substrate;

[0007] performing a first photolithography process to form a first photoresist pattern on the first mask layer, and obtaining a first alignment offset between the first photoresist pattern and the first structure;

[0008] transferring the first photoresist pattern to the first mask layer to form a first pattern in the first mask layer, and removing the first photoresist pattern;

[0009] forming a second mask layer on the first mask layer, performing a second photolithography process to form a second photoresist pattern on the second mask layer, and obtaining a second alignment offset between the second photoresist pattern and the first pattern;

[0010] transferring the second photoresist pattern to the first mask layer and the second mask layer to form a second pattern in the first mask layer, and forming the target pattern based on the first pattern and the second pattern;

[0011] A third alignment offset between the target pattern and the first structure is obtained, and an exposure compensation amount of the first photolithography process is determined based on the first alignment offset, the second alignment offset, and the third alignment offset.

[0012] In some embodiments, calculating the exposure compensation amount of the first photolithography process based on the first alignment offset, the second alignment offset, and the third alignment offset includes:

[0013] determining a fourth alignment offset based on the first alignment offset and the second alignment offset;

[0014] An exposure compensation amount of the first photolithography process is calculated based on a difference between the third alignment offset and the fourth alignment offset.

[0015] In some embodiments, the alignment offset includes a set of lateral offsets and longitudinal offsets, wherein the lateral and longitudinal directions are respectively directions of the horizontal axis and the vertical axis of the rectangular coordinate system, and the alignment offset includes the first alignment offset to the fourth alignment offset;

[0016] The determining a fourth alignment offset based on the first alignment offset and the second alignment offset includes:

[0017] determining a lateral offset of the fourth alignment offset based on the first alignment offset and the lateral offset of the second alignment offset;

[0018] A longitudinal offset of the fourth alignment offset is determined based on the first alignment offset and the longitudinal offset of the second alignment offset.

[0019] In some embodiments, the first photoresist patterns are arranged in an array along the horizontal axis and the vertical axis on the first mask layer;

[0020] The second photoresist patterns are arranged in an array along the horizontal axis and the vertical axis on the second mask layer.

[0021] In some embodiments, adjacent first photoresist patterns and second photoresist patterns are staggered.

[0022] In some embodiments, forming the target pattern based on the first pattern and the second pattern includes:

[0023] The target pattern is formed in the hole formed by the first pattern and the second pattern.

[0024] In some embodiments, the first structure includes a first alignment mark and a second alignment mark, the first alignment mark being an alignment mark of the first photoresist pattern and the target pattern on the horizontal axis of the rectangular coordinate system, and the second alignment mark being an alignment mark of the first photoresist pattern and the target pattern on the vertical axis of the rectangular coordinate system.

[0025] In some embodiments, obtaining a first alignment offset between the first photoresist pattern and the first structure includes:

[0026] determining a lateral offset of the first alignment offset based on a positional deviation between a center of the first photoresist pattern and a center of the first alignment mark in a transverse direction;

[0027] determining a longitudinal offset of the first alignment offset based on a positional deviation in a longitudinal direction between a center of the first photoresist pattern and a center of the second alignment mark;

[0028] The horizontal axis direction is the direction in which the first photoresist patterns are arranged, and the vertical axis direction is the direction in which the second alignment marks are arranged.

[0029] In some embodiments, obtaining a second alignment offset between the second photoresist pattern and the first pattern includes:

[0030] determining a lateral offset of the second alignment offset based on a positional deviation between a center of the second photoresist pattern and a center of the first photoresist pattern in a transverse direction;

[0031] The longitudinal offset of the second alignment offset is determined based on a positional deviation between a center of the second photoresist pattern and a center of the first pattern in the longitudinal direction.

[0032] In some embodiments, determining a fourth alignment offset based on the first alignment offset and the second alignment offset includes:

[0033] The fourth alignment offset is determined to be a sum of the first alignment offset and half of the second alignment offset.

[0034] The embodiment of the present application provides a method for determining an exposure compensation amount. After forming a first structure and a first mask layer thereon on a substrate, a first photoresist pattern located on the first mask layer and a second photoresist pattern located on the second mask layer are formed respectively through a first photolithography process and a second photolithography process. The second mask layer is located on the first mask layer, and a first alignment offset between the first photoresist pattern and the first structure, and a second alignment offset between the second photoresist pattern and the first pattern are obtained. The first pattern is formed by transferring the first photoresist pattern to the first mask layer; based on the first pattern and the second pattern, a target pattern is formed, and the second pattern is formed by transferring the second photoresist pattern to the first mask layer; a third alignment offset between the target pattern and the first result is obtained; based on the first to third alignment offsets, the exposure compensation amount of the first photolithography process is calculated, thereby achieving a non-zero offset, improving the accuracy of the exposure compensation amount, thereby improving the accuracy of the wafer exposure step, and improving the quality of semiconductor manufacturing. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the embodiments of the present application, and together with the description, are used to explain the principles of the embodiments of the present application.

[0036] Figure 1 is a schematic diagram of a memory chip manufacturing process provided in an embodiment of the present application;

[0037] Figure 2 is a flow chart of a method for determining an exposure compensation amount provided in an embodiment of the present application;

[0038] Figure 3A A top view of the final pattern of the first mask layer provided in one embodiment of the present application;

[0039] Figure 3B For the Figure 3A A cross-sectional view in the DD direction shown in FIG;

[0040] Figure 4 A schematic diagram of a target pattern forming process provided in one embodiment of the present application;

[0041] Figure 5 A schematic diagram of measuring the lateral offset and longitudinal offset of a first alignment offset provided in one embodiment of the present application;

[0042] Figure 6 This is a structural block diagram of an exposure compensation amount determination device provided in an embodiment of the present application.

[0043] The above drawings illustrate specific embodiments of the present invention, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the present invention in any way, but rather to illustrate the concepts of the present invention for those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0044] Exemplary embodiments are described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numbers in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible implementations consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with certain aspects of the present invention, as detailed in the appended claims.

[0045] Figure 1 This is a schematic diagram of a memory chip manufacturing process provided in an embodiment of the present application, with reference to Figure 1 As shown, a memory, such as a DRAM (Dynamic Random Access Memory), has a chip manufacturing process that mainly includes: providing a semiconductor substrate, the semiconductor substrate including a plurality of active areas AA arranged at intervals, the semiconductor substrate can be made of any semiconductor material such as but not limited to silicon, germanium, silicon carbide, etc.; forming a word line (Word Line, WL) on the semiconductor substrate; then performing a patterning process on the active area to form a bit line contact structure (Bit Line Contact, BLC), the patterning process for preparing the bit line contact structure adopts a two-step patterning process, wherein a first pattern (First Pattern, FP) is formed in the first patterning process, and a second pattern (Second Pattern, SP) is formed in the second patterning process; after forming the first pattern and the second pattern, a bit line contact structure BLC is finally formed on the active area based on the first pattern and the second pattern to contact the active area, and then a bit line (Bit Line, BL) is formed above the BLC. After forming the bit lines, a capacitor contact structure (Node Contact, NC) is formed. A similar two-step patterning process is also used in the process of forming the NC. This process also faces the problem of alignment between patterns of adjacent layers.

[0046] As chip size continues to shrink, higher requirements are placed on the overlay error or alignment offset during chip fabrication, especially on the calculation of alignment offset for key layers (such as word line layer, bit line layer, and capacitor contact structure).

[0047] In one embodiment of the present application, taking the patterning process of forming a bit line contact structure as an example, before forming a BLC, a first pattern and a second pattern have been formed. Then, based on the alignment offset obtained by forming the first pattern and the second pattern, the alignment offset when forming the BLC can be determined, and the exposure compensation amount is calculated based on the alignment offset to improve the accuracy of the photolithography process, thereby improving the accuracy of the position of structures such as the BLC and BL formed on the semiconductor, reducing the short circuit phenomenon, and improving the reliability and yield of semiconductor products.

[0048] In the related art, since the final patterns (Final Pattern) of the first pattern FP and the second pattern SP are the same and cannot be distinguished, the alignment offset when forming the BLC is usually determined only based on the first pattern, and the exposure compensation amount is calculated based on the alignment offset of the first pattern. This is equivalent to obtaining an exposure compensation amount based only on the alignment offset of the first pattern, while ignoring the alignment offset between the second pattern and the first pattern, resulting in the inability to effectively eliminate the alignment offset between the patterns.

[0049] In order to improve the accuracy of determining the exposure compensation amount, the present application provides a method for determining the exposure compensation amount, by performing a first photolithography process to form a first photoresist pattern, and transferring the first photoresist pattern to the current layer to form a first pattern; then performing a second photolithography process to form a second photoresist pattern on the first pattern, and transferring the second photoresist pattern to the current layer to obtain a second pattern, and obtaining a target pattern based on the first pattern and the second pattern. The target pattern can be a mask pattern for subsequently forming BLC.

[0050] When measuring alignment offset, a front layer and a current layer having alignment marks are provided. In the embodiment of the present application, the front layer of the first and second patterns is a substrate, on which a first structure is provided as an alignment mark. The film layer in which the first and second patterns are located is the current layer, and the first and second patterns serve as alignment marks for the current layer. Since the formation of the first and second patterns includes corresponding photolithography and etching processes, both photolithography and etching processes have a direct impact on the accuracy of the final pattern. When considering the alignment accuracy of the current layer and the front layer, the post-development inspection (ADI) of the first and second patterns generated by their corresponding photolithography processes and the target pattern post-etching inspection (AEI) are considered.

[0051] In an embodiment of the present application, the alignment accuracy between the second pattern and the first pattern is also incorporated into the exposure compensation calculation formula, resulting in a more accurate exposure compensation calculation method. Specifically, the exposure compensation is determined based on the alignment offset between the first photoresist pattern and the first structure on the substrate (the first alignment offset), the alignment offset between the second photoresist pattern and the first pattern (the second alignment offset), and the alignment offset between the target pattern and the first structure (the third alignment offset). This considers the alignment offset between each step, making the calculation more comprehensive and improving the accuracy of the exposure compensation calculation. This, in turn, improves the accuracy of the formation position of semiconductor components, such as BLCs and BLs, thereby improving the quality of semiconductor manufacturing and product yield.

[0052] Figure 2 The method for determining the exposure compensation amount provided in this embodiment can be executed by an electronic device or system, such as Figure 2 As shown, the exposure compensation amount determination method includes the following steps S201 to S206.

[0053] S201 , providing a substrate, wherein a first structure and a first mask layer located on the first structure are formed on the substrate.

[0054] The substrate is also called a base, which can be a wafer made of semiconductor materials. The semiconductor materials can be silicon carbide SiC, silicon on insulator SOI, etc.

[0055] The first structure is located on the top surface of the substrate and may be an alignment mark.

[0056] S202 , performing a first photolithography process to form a first photoresist pattern on the first mask layer, and obtaining a first alignment offset between the first photoresist pattern and the first structure.

[0057] The first alignment offset is used to characterize a position deviation of the formed first photoresist pattern.

[0058] The first mask layer can be obtained by coating a photoresist layer on the substrate, and a photoresist pattern is carved on the first mask layer by a first photolithography process to form a plurality of first photoresist patterns. The first photoresist patterns can be arranged in an array.

[0059] A first alignment offset is determined based on a position of a center of the first photoresist pattern and a position of a center of the first structure.

[0060] A plurality of first structures may be formed on the substrate, and a plurality of first photoresist patterns may also be formed on the first mask layer. The first alignment offset may be determined based on positional deviations of centers of the first photoresist patterns and their corresponding one or more first structures.

[0061] S203 , transferring the first photoresist pattern to the first mask layer, forming a first pattern in the first mask layer, and removing the first photoresist pattern.

[0062] The first mask layer is exposed to light to form a first pattern in the first mask layer, and the first photoresist pattern on the first mask layer is removed by etching technology.

[0063] S204 , forming a second mask layer on the first mask layer, performing a second photolithography process, forming a second photoresist pattern on the second mask layer, and obtaining a second alignment offset between the second photoresist pattern and the first pattern.

[0064] After removing the first photoresist pattern from the first mask layer or forming the first pattern on the first mask layer, a photoresist layer is coated on the first mask layer to form a second mask layer. A second photolithography process is used to etch a photoresist pattern on the second mask layer to form a plurality of second photoresist patterns. The second photoresist patterns can be arranged in an array.

[0065] The second alignment offset is determined based on the center of the second photoresist pattern and the center of the first pattern. The second alignment offset is used to describe the positional deviation between the second photoresist pattern and the first pattern when the second photoresist pattern is formed.

[0066] The second mask layer and the first mask layer are exposed to light to form a second pattern in the second mask layer and the first mask layer. The second photoresist pattern on the second mask layer is removed by etching technology.

[0067] In some embodiments, the alignment offset, including the first alignment offset, the second alignment offset, and the subsequent third alignment offset and fourth alignment offset, includes a set of lateral offsets and longitudinal offsets, the lateral offset being the offset in the horizontal axis direction of the rectangular coordinate system, and the longitudinal offset being the offset in the vertical axis direction of the rectangular coordinate system.

[0068] S205 , transferring the second photoresist pattern to the first mask layer and the second mask layer, forming a second pattern in the first mask layer, and forming the target pattern based on the first pattern and the second pattern.

[0069] A target pattern is formed on the first mask layer based on positions of the first pattern and the second pattern.

[0070] The position of the target pattern is limited by the positions of the first pattern and the second pattern formed successively. In some embodiments, the target pattern can be formed in the hole pattern formed by the first pattern and the second pattern.

[0071] The target pattern may be a mask pattern corresponding to a semiconductor key layer, such as a mask pattern corresponding to a BLC of a memory.

[0072] For example, Figure 3A A top view of the final pattern of the first mask layer provided in one embodiment of the present application, Figure 3B For the Figure 3A The cross-sectional view in the DD direction shown in FIG. Figure 3A and Figure 3B As shown, a first photoresist pattern is formed on the first mask layer of the wafer through the above-mentioned first photolithography process, and is transferred downward by etching to form a first pattern 311 of a certain depth in the first mask layer; a second photoresist pattern is formed on the second mask layer of the wafer through the second photolithography process, and is transferred downward by etching to form a second pattern 321 of a certain depth in the first mask layer, and the position of the target pattern is locked by the first pattern 311 and the second pattern 321, and the target pattern is formed at the corresponding position. Figure 3A In the example, the first pattern 311 and the second pattern 321 are hole-shaped patterns, which can also be cube-shaped or other shapes. The first pattern 311 and the second pattern 321 are the same pattern, but are formed in different orders. In order to distinguish the first pattern 311 and the second pattern 321, Figure 3A The first pattern 311 and the second pattern 321 are represented by different filling methods.

[0073] S206 , obtaining a third alignment offset between the target pattern and the first structure, and determining an exposure compensation amount for the first photolithography process based on the first alignment offset, the second alignment offset, and the third alignment offset.

[0074] For application scenarios in which semiconductor fabrication is performed based on multiple patterning technologies, such as the LELE (Litho-Etch-Litho-Etch) method, one patterning is completed through steps S202 to S205, and the exposure compensation amount of this patterning is calculated based on step S206, and exposure compensation is performed for the next patterning based on the exposure compensation amount.

[0075] Specifically, the first alignment offset, the second alignment offset, and the third alignment offset may be input into a pre-configured calculation formula to obtain the exposure compensation amount of the first photolithography process.

[0076] A final alignment offset can be calculated based on the first, second and third alignment offsets. The exposure compensation amount is used to compensate or eliminate the final alignment offset to reduce the first alignment offset when the first photolithography process is performed next time.

[0077] Each alignment offset, including the first alignment offset, the second alignment offset, the third alignment offset, and the subsequent fourth alignment offset, includes offsets corresponding to the horizontal and vertical axes of a rectangular coordinate system, namely, a horizontal offset and a vertical offset. A horizontal compensation amount of an exposure compensation amount can be determined based on the horizontal offsets of the first, second, and third alignment offsets, and a vertical compensation amount of the exposure compensation amount can be determined based on the vertical offsets of the first, second, and third alignment offsets. Exposure compensation for the first photolithography process is performed based on the horizontal and vertical compensation amounts of the exposure compensation amounts.

[0078] Furthermore, control instructions for the exposure equipment can be generated based on the obtained exposure compensation amount, so as to perform the next round of photolithography process based on the compensated parameters, thereby improving the accuracy of the photolithography process and further improving the yield of semiconductor products.

[0079] By introducing the exposure compensation amount corresponding to the previous photolithography during the next photolithography, a non-zero offset is achieved, further reducing the alignment offset of the photolithography process.

[0080] In some embodiments, there are multiple target patterns, and the corresponding number of first, second, and third alignment offsets is also multiple. Based on each set of first, second, and third alignment offsets, multiple exposure compensation values ​​can be calculated, each corresponding to a target pattern. Control instructions for the exposure device can be generated based on each exposure compensation value and the corresponding position of the target pattern.

[0081] An exposure compensation amount distribution diagram may be drawn and stored based on the positions of the target pattern distribution corresponding to each exposure compensation amount, and different colors may be used to represent different exposure compensation amount values.

[0082] In this embodiment, after a first structure and a first mask layer thereon are formed on a substrate, a first photoresist pattern located on the first mask layer and a second photoresist pattern located on the second mask layer are formed respectively through a first photolithography process and a second photolithography process, the second mask layer is located on the first mask layer, and a first alignment offset between the first photoresist pattern and the first structure, and a second alignment offset between the second photoresist pattern and the first pattern are obtained, the first pattern is formed by transferring the first photoresist pattern to the first mask layer; based on the first pattern and the second pattern, a target pattern is formed, and the second pattern is formed by transferring the second photoresist pattern to the first mask layer; a third alignment offset between the target pattern and the first result is obtained; based on the first to third alignment offsets, an exposure compensation amount of the first photolithography process is calculated, a non-zero offset is achieved, the accuracy of the exposure compensation amount is improved, and thereby the accuracy of the wafer exposure step is improved, thereby improving the quality of semiconductor manufacturing.

[0083] Optionally, calculating the exposure compensation amount of the first photolithography process based on the first alignment offset, the second alignment offset, and the third alignment offset includes:

[0084] A fourth alignment offset is determined based on the first alignment offset and the second alignment offset; and an exposure compensation amount of the first photolithography process is calculated based on a difference between the third alignment offset and the fourth alignment offset.

[0085] The fourth alignment offset is used to describe the alignment offset of the current layer pattern (second photoresist pattern) after the first and second photolithography processes. It is the alignment offset corresponding to the after-development inspection (ADI). The third alignment offset is the alignment offset corresponding to the after-etching inspection (AEI). The exposure compensation amount is calculated by taking the difference between the two, achieving a non-zero offset and improving the accuracy of the exposure compensation amount calculation.

[0086] A calculation formula for the fourth alignment offset can be determined based on the positional relationship between the element corresponding to the target pattern and the element corresponding to the first pattern and the element corresponding to the second pattern in the semiconductor product, so as to obtain the fourth alignment offset by substituting the first alignment offset and the second alignment offset into the calculation formula.

[0087] Optionally, the alignment offset includes a set of lateral offsets and longitudinal offsets, where the lateral and longitudinal directions are directions of a horizontal axis and a vertical axis of a rectangular coordinate system, respectively. The alignment offset includes the first to fourth alignment offsets. Determining the fourth alignment offset based on the first and second alignment offsets includes:

[0088] The lateral offset of the fourth alignment offset is determined based on the lateral offsets of the first alignment offset and the second alignment offset; and the longitudinal offset of the fourth alignment offset is determined based on the longitudinal offsets of the first alignment offset and the second alignment offset.

[0089] The directions of the horizontal axis and the vertical axis can be determined based on the arrangement direction of the first pattern (or first photoresist pattern) and the second pattern (or second photoresist pattern), or can be determined based on the arrangement direction of the first structure.

[0090] Optionally, determining a fourth alignment offset based on the first alignment offset and the second alignment offset includes:

[0091] The fourth alignment offset is determined to be the sum of the first alignment offset and half of the second alignment offset. The calculation relationship of the fourth alignment offset P4(x, y) is:

[0092] P4(x,y)=P1(x,y)+0.5*P2(x,y)

[0093] Wherein, P1(x,y) represents the first alignment offset, and P2(x,y) represents the second alignment offset. Each alignment offset consists of a lateral offset (represented by the variable x) and a longitudinal offset (represented by the variable y).

[0094] Figure 4 A schematic diagram of a target pattern forming process provided in one embodiment of the present application is shown in FIG. Figure 4 As shown, first, a substrate 100 is provided, on which a first structure, an active area, a word line, and a first mask layer 210 are formed. A first photoresist pattern 310 is formed on the first mask layer 210 through a first photolithography process, and a first alignment offset is measured. The first photoresist pattern is transferred downward into the first mask layer 210 to form a first pattern (not shown in the figure), and the first photoresist pattern 310 is removed. A second mask layer 220 is formed on the first mask layer 210. A second photolithography process is performed to form a second photoresist pattern 320 on the second mask layer 220, and a second alignment offset is measured. The second photoresist pattern 320 is transferred downward into the first mask layer 210 and the second mask layer 220 to form a second pattern (not shown in the figure) in the first mask layer. A target pattern 330 is formed based on the first and second patterns, and a third alignment offset is measured. Based on the measured first, second, and third alignment offsets, an exposure compensation amount of the first photolithography process can be obtained.

[0095] After forming the target pattern, a BLC is formed based on the target pattern, and then a BL is formed above the BLC. The subsequent formation of a dielectric layer and capacitor contacts completes the manufacturing of the DRAM semiconductor product.

[0096] Continue to see Figure 4 The first photoresist pattern 310 and the second photoresist pattern 320 are arranged in an array along the horizontal axis X direction and the vertical axis Y direction. The first photoresist pattern 310 is located on the first mask layer 210, and the second photoresist pattern 320 is located on the second mask layer 220.

[0097] Figure 4 In the figure, the first photoresist pattern 310 and the second photoresist pattern 320 are square as an example. In some embodiments, they can also be circular, elliptical or other shapes, which are not limited in this application.

[0098] The first photoresist pattern 310 and the second photoresist pattern 320 may be disposed at even intervals.

[0099] Continue to see Figure 4Adjacent first and second photoresist patterns 310 and 320 can be staggered. The target pattern 330 formed subsequently is located in the hole formed by the first and second patterns. The first pattern is formed by etching and transferring the first photoresist pattern 310 downward, and the second pattern is formed by etching and transferring the second photoresist pattern 320 downward. In a direction perpendicular to the upper surface of the substrate, the first photoresist pattern 310 is aligned with the corresponding first pattern, and the second photoresist pattern 320 is aligned with the corresponding second pattern.

[0100] The adjacent first photoresist patterns 310 and second photoresist patterns 320 are a group of first photoresist patterns 310 and second photoresist patterns 320 that restrict the position of the same target pattern 330 .

[0101] The first photoresist patterns 310 and the second photoresist patterns 320 are uniformly arranged on corresponding layers.

[0102] There are two types of target patterns 330. On the XOY plane (the plane formed by the X-axis and Y-axis), one target pattern (referred to as the first target pattern) has a first photoresist pattern 310 or first pattern disposed in the upper and lower directions (directions corresponding to the Y-axis), and a second photoresist pattern 320 or second pattern disposed in the left and right directions (directions corresponding to the X-axis). The other target pattern (referred to as the second target pattern) has one or two first photoresist patterns 310 or first patterns disposed in the left and right directions, and a second photoresist pattern 320 or second pattern disposed in the upper and lower directions. The post-development inspection alignment offset corresponding to the target pattern is the sum of the post-development inspection alignment offsets corresponding to the first and second target patterns. The final alignment offset is calculated by taking the difference between the post-development inspection alignment offset and the post-etching inspection alignment offset for the target pattern. Based on this final alignment offset, the exposure compensation amount corresponding to the target pattern is determined.

[0103] The exposure compensation amount determination method provided in the present application is applicable to the manufacture of any semiconductor including components corresponding to the above-mentioned target pattern.

[0104] Taking the target pattern as a mask pattern corresponding to BLC as an example, the exposure compensation amount may be determined based on the difference between the sum of the first alignment offset and half of the second alignment offset and the third alignment offset.

[0105] By using the exposure compensation amount, the BLC on the subsequent wafer can be aligned, so that the BL deployed on the BLC can be aligned, which improves the accuracy of BL deployment and improves the memory yield.

[0106] Figure 5 A schematic diagram of measuring the lateral offset and longitudinal offset of the first alignment offset provided in one embodiment of the present application, combined with Figure 4 and Figure 5 , the first alignment offset is the offset between the first photoresist pattern 310 and the first structure of the front layer. Figure 5 Take the formation of active area AA on the front layer as an example. The first structure is an alignment mark, including a first alignment mark and a second alignment mark. Figure 5 In FIG. 1 , “x” represents a first alignment mark, and “+” represents a second alignment mark. The first alignment mark is an alignment mark between the first photoresist pattern 310 and the target pattern 330 on the XOY horizontal axis (X-axis) of the rectangular coordinate system. The second alignment mark is an alignment mark between the first photoresist pattern 310 and the target pattern 330 on the XOY vertical axis (Y-axis) of the rectangular coordinate system. O is the origin of the rectangular coordinate system.

[0107] The first alignment mark is used to measure the offset in the X direction. Figure 5 Take the first alignment mark located at the center of the active area AA as an example. By measuring the distance between the center of the first photoresist pattern 310 and the first alignment mark in the X-axis direction, the lateral offset of the first alignment offset is obtained. The second alignment mark is the alignment mark for measuring the offset in the Y-axis direction. Figure 5 In this example, a second alignment mark comprising four "+" symbols is used, and the center of the four "+" symbols on the Y axis is taken as the center of the second alignment mark. By measuring the distance between the center of the first photoresist pattern 310 and the center of the second alignment mark along the Y axis, the longitudinal offset of the first alignment offset is obtained. Similarly, the lateral and longitudinal offsets of the third alignment offset can be obtained, which will not be further described here.

[0108] Based on the position deviation between the center of the first photoresist pattern 310 and the center of the first alignment mark in the horizontal direction, the lateral offset P1_X of the first alignment offset is obtained; based on the position deviation between the center of the first photoresist pattern 310 and the center of the second alignment mark in the vertical direction, the longitudinal offset P1_Y of the first alignment offset is obtained.

[0109] When calculating the position deviation, the calculation should be performed based on a group of the most adjacent first photoresist patterns and first alignment marks (or second alignment marks).

[0110] The second alignment offset also includes a pair of lateral offsets and longitudinal offsets. The lateral offset of the second alignment offset is determined based on the position deviation between the center of the second photoresist pattern 320 and the center of the first pattern in the horizontal direction; the longitudinal offset of the second alignment offset is determined based on the position deviation between the center of the second photoresist pattern 320 and the center of the first pattern in the vertical direction.

[0111] When calculating the position deviation, the calculation should be performed based on a set of the most adjacent second photoresist patterns and the first pattern.

[0112] The alignment marks, including the first alignment mark 410 and the second alignment mark 420, are graphic marks used to measure position deviation or error. The alignment marks can be set in the scribe line area, such as the edge of the exposure area.

[0113] For DRAM, the position where the BLC contacts the active area is the hole shape corresponding to the two first photoresist patterns and the two second photoresist patterns. The BLC needs to be aligned with the center of the contacted active area in the horizontal direction, and needs to be used for the center alignment of the adjacent word lines in the vertical direction. Therefore, a first alignment mark 410 can be set at the center of the active area along the horizontal direction on the substrate, and a second alignment mark 420 can be set at the center of the word line along the vertical direction to calculate the position deviation.

[0114] An embodiment of the present application also provides an exposure compensation amount determination device, comprising: at least one processor and a memory.

[0115] The memory stores computer-executable instructions. The at least one processor executes the computer-executable instructions stored in the memory, so that the overlay error determination device implements the above-mentioned overlay error determination method.

[0116] Figure 6 6 is a block diagram of a device for determining an exposure compensation amount provided by an embodiment of the present application. The device for determining an exposure compensation amount includes a memory 610 and at least one processor 620.

[0117] The memory 610 stores computer-executable instructions.

[0118] At least one processor 620 executes the computer-executable instructions stored in the memory 610, so that the exposure compensation amount determination device implements the aforementioned exposure compensation amount determination method.

[0119] The memory 610 and the processor 620 are connected via a bus 630 .

[0120] An embodiment of the present application also provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the processor implements the overlay error determination method provided in any embodiment of the present application.

[0121] An embodiment of the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the overlay error determination method provided in any embodiment of the present application.

[0122] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0123] The serial numbers of the above embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0124] The above are only preferred embodiments of the embodiments of the present application, and do not limit the patent scope of the embodiments of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of the embodiments of the present application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the embodiments of the present application.

Claims

1. A method for determining an exposure compensation amount, characterized in that: include: Providing a substrate, wherein a first structure and a first mask layer located on the first structure are formed on the substrate; performing a first photolithography process to form a first photoresist pattern on the first mask layer, and obtaining a first alignment offset between the first photoresist pattern and the first structure; transferring the first photoresist pattern to the first mask layer to form a first pattern in the first mask layer, and removing the first photoresist pattern; forming a second mask layer on the first mask layer, performing a second photolithography process to form a second photoresist pattern on the second mask layer, and obtaining a second alignment offset between the second photoresist pattern and the first pattern; transferring the second photoresist pattern to the first mask layer and the second mask layer to form a second pattern in the first mask layer, and forming a target pattern based on the first pattern and the second pattern; A third alignment offset between the target pattern and the first structure is obtained, and an exposure compensation amount of the first photolithography process is determined based on the first alignment offset, the second alignment offset, and the third alignment offset.

2. The method according to claim 1, characterized in that The calculating the exposure compensation amount of the first photolithography process based on the first alignment offset, the second alignment offset, and the third alignment offset includes: determining a fourth alignment offset based on the first alignment offset and the second alignment offset; An exposure compensation amount of the first photolithography process is calculated based on a difference between the third alignment offset and the fourth alignment offset.

3. The method according to claim 2, characterized in that The alignment offsets include a set of transverse offsets and longitudinal offsets, wherein the transverse and longitudinal directions are respectively directions of the transverse axis and the longitudinal axis of the rectangular coordinate system, and the alignment offsets include the first alignment offset to the fourth alignment offset; The determining a fourth alignment offset based on the first alignment offset and the second alignment offset includes: determining a lateral offset of the fourth alignment offset based on the first alignment offset and the lateral offset of the second alignment offset; A longitudinal offset of the fourth alignment offset is determined based on the first alignment offset and the longitudinal offset of the second alignment offset.

4. The method according to claim 2, characterized in that The first photoresist patterns are arranged in an array along the horizontal and vertical directions on the first mask layer; The second photoresist patterns are arranged in an array along the horizontal axis and the vertical axis on the second mask layer.

5. The method according to claim 4, characterized in that The adjacent first photoresist patterns and second photoresist patterns are staggered.

6. The method according to claim 5, characterized in that The forming the target pattern based on the first pattern and the second pattern includes: The target pattern is formed in the hole formed by the first pattern and the second pattern.

7. The method according to claim 4, characterized in that The first structure includes a first alignment mark and a second alignment mark, the first alignment mark being the alignment mark of the first photoresist pattern and the target pattern on the horizontal axis of the rectangular coordinate system, and the second alignment mark being the alignment mark of the first photoresist pattern and the target pattern on the vertical axis of the rectangular coordinate system.

8. The method according to claim 7, characterized in that The obtaining of a first alignment offset between the first photoresist pattern and the first structure includes: determining a lateral offset of the first alignment offset based on a positional deviation in a transverse direction between a center of the first photoresist pattern and a center of the first alignment mark; The longitudinal offset of the first alignment offset is determined based on a positional deviation between a center of the first photoresist pattern and a center of the second alignment mark in the longitudinal direction.

9. The method according to claim 8, characterized in that The obtaining of a second alignment offset between the second photoresist pattern and the first pattern includes: determining a lateral offset of the second alignment offset based on a positional deviation between a center of the second photoresist pattern and a center of the first pattern in a transverse direction; The longitudinal offset of the second alignment offset is determined based on a positional deviation between a center of the second photoresist pattern and a center of the first pattern in the longitudinal direction.

10. The method according to any one of claims 2 to 9, characterized in that: The determining a fourth alignment offset based on the first alignment offset and the second alignment offset includes: The fourth alignment offset is determined to be a sum of the first alignment offset and half of the second alignment offset.

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