A power-on startup method, device, electronic device and computer-readable storage medium based on a baseboard management controller system

Abstract

This application discloses a power-on startup method, apparatus, electronic device, and computer-readable storage medium based on a baseboard management controller (BMC) system. The method comprises: in response to the BMC system being powered on, verifying the stored contents of a firmware storage module; when the verification is determined to be successful, accessing the stored contents of the firmware storage module and starting the BMC system. By adopting a dual-firmware design, the present invention switches to different Flash storage chips based on the verification results and controls the server to prevent it from starting before the BMC system, significantly improving the security and reliability of the system during operation.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology and relates to a power-on startup method, device, electronic equipment and computer-readable storage medium based on a baseboard management controller system. Background Art

[0002] The security of computer equipment not only impacts information security but will also further impact national security in the future. The need for trustworthy computer platforms and ensuring system security and reliability is gaining increasing attention. my country has achieved significant success in core chips and basic software, moving from previously sourcing all core chips from abroad to fully domestically designed designs. We have made significant progress toward achieving independent control. Only by ensuring system trust and security on this basis can data and information be secure and reliable. The BMC (Baseboard Management Controller), as the baseboard control and management module, enables out-of-band server management. It holds the highest priority and can be considered the root of trust for the entire system. Only when the BMC ensures its own boot and operation processes are trustworthy can it continue the chain of trust and measure the trustworthiness of the motherboard, thereby ensuring the trustworthiness of the motherboard and the entire system.

[0003] Most common BMC systems currently have only one Flash chip for storing firmware. Some designs retain the IC test socket for the Flash chip for the convenience of debugging and burning. This means that the Flash chip containing the startup file can be removed from the system without any tools, and the file can be modified and then put back into the IC test socket, completely stealing or modifying the firmware content. Most BMCs do not verify the contents of the Flash chip, so the entire system will still start normally.

[0004] Partial dual-backup designs are often used for dual BIOS booting on server motherboards. Of course, dual BIOS design on motherboards is also necessary, but the BMC controls and oversees the server and should be considered the highest priority in the entire system. If the BMC is attacked, it is equivalent to not having a secure root of trust, and the security and trustworthiness of subsequent processes on the server motherboard cannot be guaranteed.

[0005] Therefore, it is necessary to provide an improved technical solution to overcome the above technical problems existing in the prior art. Summary of the Invention

[0006] The purpose of this application is to provide a power-on startup method, device, electronic device and computer-readable storage medium based on a baseboard management controller system. By adopting a dual firmware design, different Flash storage chips are switched according to the verification situation, and the server is controlled not to start before the baseboard management controller system, thereby greatly improving the security and reliability of the system during operation.

[0007] To achieve the above objectives:

[0008] In a first aspect, the present invention provides a power-on startup method based on a baseboard management controller system, comprising:

[0009] In response to the baseboard management controller system being powered on, verifying the storage content of the firmware storage module;

[0010] When it is determined that the verification is successful, the storage content of the firmware storage module is accessed and the baseboard management controller system is started.

[0011] In one embodiment, the firmware storage module includes a first Flash storage chip configured with an IC test socket, and a second Flash storage chip fixed by a board sticker;

[0012] The verifying the storage content of the firmware storage module includes verifying the storage content of the first Flash storage chip and the second Flash storage chip respectively according to the verification results.

[0013] In one embodiment, the verifying the storage contents of the first Flash storage chip and the second Flash storage chip respectively according to the verification results includes:

[0014] Verifying the storage content of the first Flash storage chip;

[0015] If it is determined that the verification fails, the storage content of the second Flash storage chip is verified.

[0016] In one embodiment, determining that the verification fails includes:

[0017] If the time period after the baseboard management controller system is powered on exceeds a preset time period and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the verification has failed.

[0018] In one embodiment, after verifying the storage content of the second Flash storage chip, the method further includes:

[0019] If it is determined that the verification is successful, the CPU working mode is switched, and the reset signal is sent to the watchdog timer through the integrated circuit bus to reset the watchdog timer.

[0020] In one embodiment, the method further comprises:

[0021] When the storage content of the firmware storage module is verified, the complex programmable logic device of the baseboard management controller system prevents the mainboard from being reset, prohibits access to the storage content of the firmware storage module, and prohibits starting the baseboard management controller system.

[0022] In one embodiment, before verifying the storage content of the firmware storage module, the method further includes:

[0023] The TEE self-test and TPCM core function construction are completed by reading the ROM core code in the baseboard management controller system, and the TEE OS is started.

[0024] In a second aspect, the present invention provides a power-on startup device based on a baseboard management controller system, comprising:

[0025] A verification module, configured to verify the storage content of the firmware storage module in response to power-on of the baseboard management controller system;

[0026] The access startup module is used to access the storage content of the firmware storage module and start the baseboard management controller system when it is determined that the verification is successful.

[0027] In one embodiment, the verification module specifically includes:

[0028] The storage contents of the first Flash storage chip and the second Flash storage chip in the firmware storage module are verified.

[0029] In one embodiment, the verification module specifically includes:

[0030] Verifying the storage content of the first Flash storage chip;

[0031] If it is determined that the verification fails, verifying the storage content of the second Flash storage chip;

[0032] Wherein, determining that the verification fails includes:

[0033] If the time period after the baseboard management controller system is powered on exceeds a preset time period and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the verification has failed.

[0034] In a third aspect, the present application provides an electronic device, characterized in that it includes: a processor, and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement the method described in the first aspect.

[0035] In a fourth aspect, the present application provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the method described in the first aspect.

[0036] This application provides a power-on startup method, apparatus, electronic device, and computer-readable storage medium based on a baseboard management controller (BMC) system. The method comprises: in response to the BMC system being powered on, verifying the stored contents of a firmware storage module; when the verification is determined to be successful, accessing the stored contents of the firmware storage module and booting the BMC system. By adopting a dual-firmware design, the present invention switches to different Flash storage chips based on the verification results and controls the server to prevent it from booting before the BMC system, significantly improving the security and reliability of the system during operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0038] Figure 1 A schematic flow chart of a power-on startup method based on a baseboard management controller system provided in an embodiment of the present invention;

[0039] Figure 2 A schematic structural diagram of a power-on startup device based on a baseboard management controller system provided by an embodiment of the present invention;

[0040] Figure 3 A schematic diagram of the structure of a baseboard management controller provided in an embodiment of the present invention;

[0041] Figure 4 This is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0042] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of systems and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0043] It should be noted that in this article, step codes such as S1 and S2 are used for the purpose of expressing the corresponding content more clearly and concisely, and do not constitute a substantial restriction on the order. When implementing the step, those skilled in the art may execute S2 first and then S1, etc., but these should all be within the scope of protection of this application.

[0044] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0045] like Figure 1 As shown, the embodiment of the present application provides a power-on startup method based on a baseboard management controller system, comprising:

[0046] Step S101 : in response to a baseboard management controller system being powered on, verifying the storage content of a firmware storage module.

[0047] In one embodiment, the firmware storage module includes a first Flash storage chip configured with an IC test socket, and a second Flash storage chip fixed to the board; the verification of the storage content of the firmware storage module includes verifying the storage content of the first Flash storage chip and the second Flash storage chip respectively according to the verification results.

[0048] In one embodiment, the verifying the storage contents of the first Flash storage chip and the second Flash storage chip respectively according to the verification results includes:

[0049] The storage content of the first Flash storage chip is verified; if it is determined that the verification fails, the storage content of the second Flash storage chip is verified.

[0050] In one embodiment, determining that the verification fails includes:

[0051] If the time period after the baseboard management controller system is powered on exceeds a preset time period and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the verification has failed.

[0052] In one embodiment, the method further comprises:

[0053] When the storage content of the firmware storage module is verified, the complex programmable logic device of the baseboard management controller system prevents the mainboard from being reset, prohibits access to the storage content of the firmware storage module, and prohibits starting the baseboard management controller system.

[0054] In one embodiment, before verifying the storage content of the firmware storage module, the method further includes:

[0055] The TEE self-test and TPCM core function construction are completed by reading the ROM core code in the baseboard management controller system, and the TEE OS is started.

[0056] It can be understood that the Flash chip with the IC test socket configured in the baseboard management controller system is the first Flash storage chip, which retains the advantage of being easy to debug and disassemble; the Flash chip with the stacked board on the back is the second Flash storage chip, which has its structural position advantage, is not easily damaged, and has more secure content. It can ensure that if an unexpected situation occurs during operation, it will switch to the second Flash storage chip without affecting the startup of the baseboard management controller system.

[0057] Furthermore, after the baseboard management controller system is powered on, the TCM inside the core management chip of the baseboard management controller system verifies the firmware content stored in the first Flash storage chip. At this time, the general computing domain inside the core management chip has no right to access the firmware content, so the baseboard management controller system will not automatically boot. At the same time, the complex programmable logic device of the baseboard management controller system will prevent the motherboard from resetting. Even if the motherboard is powered on, it will not be able to start the subsequent boot process and enter the BIOS process.

[0058] Step S102: When it is determined that the verification is successful, the storage content of the firmware storage module is accessed, and the baseboard management controller system is started.

[0059] In one embodiment, when it is determined that the verification is successful, accessing the storage content of the firmware storage module and starting the baseboard management controller system includes:

[0060] If it is determined that the storage content of the first Flash storage chip is successfully verified, the storage content of the first Flash storage chip is accessed and the baseboard management controller system is started; if it is determined that the storage content of the second Flash storage chip is successfully verified, the CPU working mode is switched, the storage content of the second Flash storage chip is accessed, and the reset signal is sent to the watchdog timer through the integrated circuit bus to reset the watchdog timer, and the baseboard management controller system is started.

[0061] It can be understood that if the verification of the first Flash storage chip is successful, the SPI in the general computing domain inside the core management chip will access the firmware content and continue the startup process; if the verification fails, the general computing domain inside the core management chip will not be able to access the firmware content. After the set time, if the core management chip does not send a reset signal to the watchdog timer of the complex programmable logic device, the complex programmable logic device will switch to the second Flash storage chip, and the TCM in the trusted security domain inside the core management chip will continue to verify the firmware content stored in the second Flash storage chip, that is, the dual firmware design is used to backup the firmware content, thereby enhancing the reliability and security of the system operation.

[0062] Through the above method, by adopting a dual firmware design, different Flash storage chips can be switched according to the verification situation, and the server can be controlled not to start before the baseboard management controller system, which greatly improves the security and reliability of the system operation.

[0063] Based on the same inventive concept as the above embodiments, the present application provides a power-on startup device based on a baseboard management controller system. Figure 2 , is a power-on startup device based on a baseboard management controller system provided in an embodiment of the present application. The power-on startup device based on a baseboard management controller system can be implemented in software and / or hardware. The device includes:

[0064] The verification module 21 is configured to verify the storage content of the firmware storage module in response to the baseboard management controller system being powered on.

[0065] The access and startup module 22 is configured to access the storage content of the firmware storage module and start the baseboard management controller system when it is determined that the verification is successful.

[0066] In one embodiment, the verification module 21 specifically includes:

[0067] The storage contents of the first Flash storage chip and the second Flash storage chip in the firmware storage module are verified.

[0068] In one embodiment, the verification module 21 specifically includes:

[0069] Verifying the storage content of the first Flash storage chip; if it is determined that the verification fails, verifying the storage content of the second Flash storage chip; wherein determining that the verification fails includes:

[0070] If the time period after the baseboard management controller system is powered on exceeds a preset time period and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the verification has failed.

[0071] Based on the same inventive concept as the above embodiments, the present application provides a baseboard management controller 300. Figure 3 , a baseboard management controller 300 provided in an embodiment of the present application includes: a CPLD (Complex Programmable Logic Device) 310, a first Flash storage chip 320, a second Flash storage chip 330 and a core management chip 340.

[0072] The core management chip 340 is divided into two protection domains with different permissions: the general computing domain 341 and the trusted security domain 342. At any given time, the processor operates within only one of these domains. Programs running in the trusted security domain 342 can access resources in the general computing domain 341 normally. However, applications or operating systems in the general computing domain 341 are strictly restricted from accessing resources in the trusted security domain 342. Therefore, even if the operating system in the general computing domain 341 is compromised or hacked, it cannot access data stored in the trusted security domain 342.

[0073] Continue reading Figure 3 A chip select signal CS output by the core management chip 340 is connected to the CPLD 310. The CPLD 310 then divides the signal into two paths, CS0 and CS1, which are connected to the first Flash memory chip 320 and the second Flash memory chip 330, respectively. The default initial state in the CPLD 310 program is to directly assign CS to CS0. That is, when the baseboard management controller 300 is powered on, the first Flash memory chip 320 is selected by default. The core management chip 340 and the CPLD 310 communicate via I2C (Inter-Integrated Circuit). If the core management chip 340 does not send a reset signal to the watchdog timer of the CPLD 310 via I2C within a preset time, it is considered that the system has not started normally. The CPLD 310 will then execute an instruction to assign CS to CS1, completing the operation of switching to the second Flash memory chip 330.

[0074] Furthermore, after the baseboard management controller 300 is powered on, the trusted security domain 342 of the core management chip 340 starts to execute, and the processor will first enter the safe mode. The virtual security core of the trusted security domain 342 will read the ROM core code in the chip to complete the self-test and TPCM core function construction, guide the OS of the trusted security domain 342 to run, read the firmware content in the firmware storage module through the SPI bus, and measure it; if the verification of the first Flash storage chip is successful, the general computing domain 341 starts to execute, and the baseboard management controller 300 starts normally. If the verification of the first Flash storage chip fails, it is determined that the firmware content of the current system is not secure enough. After the CPLD 310 switches to the second Flash storage chip 330, the trusted security domain 342 continues to measure it. After the measurement is completed, the CPU core working mode is switched, and the general computing domain 341 is executed to boot, thereby completing the power-on startup process of the baseboard management controller 300.

[0075] Based on the same inventive concept as the above embodiments, the present embodiment provides an electronic device, such as Figure 4 As shown, the device includes: a processor 41 and a memory 42 storing a computer program; wherein, Figure 4 The processor 41 shown in the figure is not used to indicate that the number of processors 41 is one, but is only used to indicate the positional relationship of the processor 41 relative to other devices. In actual applications, the number of processors 41 can be one or more; similarly, Figure 4 The memory 42 shown in the figure has the same meaning, that is, it is only used to refer to the position relationship of the memory 42 relative to other devices. In actual application, the number of memories 42 can be one or more. When the processor 41 runs the computer program, the power-on startup method applied to the above-mentioned baseboard management controller system is implemented.

[0076] The device may also include: at least one network interface 43. The various components in the device are coupled together via a bus system 44. It is understood that the bus system 44 is used to achieve connection and communication between these components. In addition to the data bus, the bus system 44 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clarity, Figure 4 Various buses are labeled as bus system 44 .

[0077] The memory 42 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a ferromagnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disk, or a compact disc read-only memory (CD-ROM); the magnetic surface memory may be a magnetic disk or a magnetic tape. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM).The memory 42 described in the embodiments of the present application is intended to include, but is not limited to, these and any other suitable types of memory.

[0078] Based on the same inventive concept as the above-mentioned embodiment, this embodiment further provides a computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium. The computer-readable storage medium may be a magnetic random access memory (FRAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a magnetic surface memory, an optical disc, or a read-only optical disc (CD-ROM) or other memory; or it may be various devices including one or any combination of the above-mentioned memories, such as a mobile phone, a computer, a tablet device, a personal digital assistant, etc. When the computer program stored in the computer-readable storage medium is executed by the processor, the above-mentioned method is implemented. For the specific steps implemented when the computer program is executed by the processor, please refer to Figure 1 The description of the illustrated embodiment will not be repeated here.

[0079] In this application, the same or similar terminology, technical solutions and / or application scenario descriptions are generally only described in detail the first time they appear. When they appear again later, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, for the same or similar terminology, technical solutions and / or application scenario descriptions that are not described in detail later, you can refer to the previous relevant detailed descriptions.

[0080] In this application, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, please refer to the relevant description of other embodiments.

[0081] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0082] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A power-on startup method based on a baseboard management controller system, characterized in that: The method comprises: In response to the baseboard management controller system being powered on, verifying the storage content of the firmware storage module; When it is determined that the verification is successful, the storage content of the firmware storage module is accessed and the baseboard management controller system is started; The firmware storage module includes a first Flash storage chip configured with an IC test socket and a second Flash storage chip fixed to the board; when the verification is determined to be successful, accessing the storage content of the firmware storage module and starting the baseboard management controller system includes: If it is determined that the storage content of the first Flash storage chip is successfully verified, the storage content of the first Flash storage chip is accessed through the SPI in the general computing domain inside the core management chip in the baseboard management controller system, and the baseboard management controller system is started; If the time elapsed after the baseboard management controller system is powered on exceeds the preset time length and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the storage content verification of the first Flash storage chip has failed, and access to the storage content of the first Flash storage chip through the SPI in the general computing domain inside the core management chip is prohibited, and the firmware content stored in the second Flash storage chip is verified through the TCM in the trusted security domain inside the core management chip; If it is determined that the storage content of the second Flash storage chip is successfully verified, the CPU working mode is switched, the storage content of the second Flash storage chip is accessed, and the reset signal is sent to the watchdog timer through the integrated circuit bus to reset the watchdog timer and start the baseboard management controller system.

2. The method according to claim 1, characterized in that The method further comprises: When the storage content of the firmware storage module is verified, the complex programmable logic device of the baseboard management controller system prevents the mainboard from being reset, prohibits access to the storage content of the firmware storage module, and prohibits starting the baseboard management controller system.

3. The method according to claim 1, characterized in that Before verifying the storage content of the firmware storage module, the method further includes: The TEE self-test and TPCM core function construction are completed by reading the ROM core code in the baseboard management controller system, and the TEE OS is started.

4. A power-on startup device based on a baseboard management controller system, characterized in that: The device comprises: A verification module, configured to verify the storage content of the firmware storage module in response to power-on of the baseboard management controller system; An access startup module, configured to access the storage content of the firmware storage module and start the baseboard management controller system when it is determined that the verification is successful; The firmware storage module includes a first Flash memory chip equipped with an IC test socket and a second Flash memory chip fixed to the board; the access startup module also includes: If it is determined that the storage content of the first Flash storage chip is successfully verified, the storage content of the first Flash storage chip is accessed through the SPI in the general computing domain inside the core management chip in the baseboard management controller system, and the baseboard management controller system is started; If the time elapsed after the baseboard management controller system is powered on exceeds the preset time length and the watchdog timer in the baseboard management controller system does not receive a reset signal, it is determined that the storage content verification of the first Flash storage chip has failed, and access to the storage content of the first Flash storage chip through the SPI in the general computing domain inside the core management chip is prohibited, and the firmware content stored in the second Flash storage chip is verified through the TCM in the trusted security domain inside the core management chip; If it is determined that the storage content of the second Flash storage chip is successfully verified, the CPU working mode is switched, the storage content of the second Flash storage chip is accessed, and the reset signal is sent to the watchdog timer through the integrated circuit bus to reset the watchdog timer and start the baseboard management controller system.

5. An electronic device, characterized in that: include: a processor, and a memory communicatively connected to the processor; The memory stores computer-executable instructions; The processor executes the computer-executable instructions stored in the memory to implement the method according to any one of claims 1 to 3.

6. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions, which are used to implement the method according to any one of claims 1 to 3 when executed by a processor.

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