A method for manufacturing a DPC ceramic substrate

Abstract

The present invention relates to the field of chip carrier processing, and specifically discloses a method for making a DPC ceramic substrate. The method comprises the following steps: (1) obtaining a clean ceramic substrate A; (2) depositing a seed layer on the ceramic substrate A to obtain a ceramic substrate B; (3) depositing an insulating layer on the ceramic substrate B to obtain a ceramic substrate C; (4) laminating, exposing, and developing the ceramic substrate C to obtain a ceramic substrate D; (5) etching the ceramic substrate D to obtain a ceramic substrate E; (6) electroplating a metal thickening layer on the ceramic substrate E to obtain a ceramic substrate F; (7) performing a film stripping treatment on the ceramic substrate F to obtain a ceramic substrate G; (8) electroplating a metal layer on the surface of the ceramic substrate G to obtain a ceramic substrate H; (9) etching the ceramic substrate H to obtain a DPC ceramic substrate. Advantages: Compared with the traditional process, the side wrapping of the circuit is good, which can meet the requirements of customers.

Description

Technical Field

[0001] The invention relates to the field of chip carrier processing, and specifically discloses a method for manufacturing a DPC ceramic substrate. Background Art

[0002] In semiconductor packaging, ceramic substrates have the advantages of excellent thermal conductivity, small thermal expansion coefficient, and good stability. They are widely used in technical fields such as semiconductor lighting, aerospace, automotive electronics, 5G communications, and military electronic components. Some products with extremely high welding requirements and harsh application environments require protective treatment of the copper layer surface and sides. The traditional circuit board surface treatment method is chemical plating after a graphic etching, but the thickness of chemical plating is limited and cannot be as thick as electroplating. Some products require electroplating as the surface treatment method. The normal electroplating process can only plate a metal protective layer on the upper surface of the circuit, and there are also conductive leads designed for electrical conduction connection, so as to achieve side electroplating, and finally etch away the conductive leads, but the DPC ceramic substrate usually has a lot of metal circuits, which brings difficulties to the arrangement and etching of the conductive leads. Many areas are too narrow to design conductive leads.

[0003] In order to solve the above problems, the present invention prepares a DPC ceramic substrate. Summary of the invention

[0004] The purpose of the present invention is to provide a method for manufacturing a DPC ceramic substrate to solve the problems raised in the above background technology. It mainly includes ceramic chip cleaning, PVD seed layer, PVD / CVD insulating layer, circuit production, etching the insulating layer of the circuit area, circuit electroplating, surface electroplating after film stripping, etching the insulating layer and seed layer. Through the PVD / CVD insulating layer, in the surface electroplating process after film stripping, no metal layer will be plated between the circuits, and then the insulating layer and seed layer between the circuits are etched away by selective etching, so as to achieve the insulation requirements between the circuits and meet the requirements that gold and silver can be electroplated on the surface and the side.

[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0006] A method for manufacturing a DPC ceramic substrate comprises the following steps:

[0007] (1) Cleaning a ceramic substrate, which is referred to as ceramic substrate A. In this process, cleaning includes alkaline degreasing, acid cleaning, ultrasonic pure water cleaning, and drying. The ceramic substrates used include but are not limited to 114.3×114.3×0.3 mm 3 .

[0008] (2) depositing a seed layer on the ceramic substrate A to make its surface conductive, thereby forming the ceramic substrate B;

[0009] (3) Depositing an insulating layer on the ceramic substrate B, the insulating layer is a barrier layer used to prevent the conductive metal from being plated; this is the ceramic substrate C;

[0010] (4) laminating, exposing, and developing the ceramic substrate C in sequence to form a photosensitive anti-corrosion and anti-plating layer, thereby obtaining a pattern circuit to be electroplated, which is the ceramic substrate D;

[0011] (5) etching the insulating layer on the pattern circuit of the ceramic substrate D to expose the seed layer on the pattern circuit, thereby obtaining the ceramic substrate E;

[0012] (6) electroplating a metal thickening layer (such as a copper thickening layer) on the seed layer exposed in the ceramic substrate E, and forming metal circuits and pads by thickening, thereby obtaining a ceramic substrate F;

[0013] (7) Stripping the ceramic substrate F to remove the photosensitive anti-corrosion and anti-plating layers to expose the surface and sidewalls of the circuit; this is the ceramic substrate G;

[0014] (8) electroplating a metal layer (such as a nickel-gold layer) on the surface of the ceramic substrate G so that the surface and side walls of each circuit and pad are plated with a metal protective layer, thereby forming a ceramic substrate H;

[0015] (9) Etching the insulating layer and the seed layer on the ceramic substrate H to form mutually insulated circuits and pads to obtain a DPC ceramic substrate.

[0016] Among them, each step of the method can correspond to Figure 1 The steps (1)-(9) in FIG.

[0017] In a further embodiment, the type of the ceramic substrate includes but is not limited to one of aluminum oxide, zirconium oxide, zirconium oxide reinforced aluminum oxide, aluminum nitride, silicon nitride, silicon carbide, and quartz glass; the seed layer includes but is not limited to one or more of copper, nickel, chromium, and titanium; the insulating layer includes but is not limited to one or more of silicon, carbon, aluminum oxide, silicon dioxide, and silicon nitride.

[0018] In a further embodiment, in step (6), the electroplated metal thickening layer includes but is not limited to one of copper and aluminum;

[0019] In step (8), the surface electroplated metal layer includes but is not limited to one or more of copper, nickel, gold, and silver.

[0020] In a further embodiment, in step (2), the seed layer is deposited by PVD (magnetron sputtering), and the thickness of the seed layer is 500nm-2000nm. Each independent circuit is made conductive.

[0021] In a further embodiment, in step (3), the insulating layer is deposited by PVD (magnetron sputtering) or CVD, and the thickness of the insulating layer is 100 nm-2000 nm.

[0022] In a further embodiment, in step (4), the film used for lamination is a UV photosensitive dry film (photosensitive anti-corrosion dry film); it is used for etching of the insulating barrier layer and electroplating of the metal circuit.

[0023] In a further embodiment, in step (5), the etching method is dry etching or wet etching to expose the underlying conductive layer, which is convenient for the electroplating of the circuit and the pad.

[0024] In a further scheme, in step (8), the surface electroplated metal layer can wrap the surface and sides of the circuit, and also serve as an anti-corrosion layer that will not be etched, and the surface of the insulating barrier layer will not be plated with metal. After etching the insulating layer and the conductive seed layer, the substrate is exposed, forming mutually insulated circuits and pads.

[0025] In a further embodiment, a method for manufacturing a DPC ceramic substrate provides a finished ceramic substrate.

[0026] The present invention deposits a seed layer on a ceramic substrate by PVD, then deposits an insulating layer, etches out the insulating layer after exposing and developing the pattern, then performs circuit electroplating thickening, and then performs surface electroplating on the circuit surface and side surfaces after film removal, and finally etches the insulating barrier layer and the conductive seed layer to obtain a DPC ceramic substrate. Compared with the traditional process, the present invention optimizes the technical parameters and process steps, and realizes the requirements of electroplating nickel, gold, and silver on the side and surface of the metal circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0028] Figure 1 is a schematic diagram of a new process flow of Example 1 of the present invention;

[0029] Figure 2 It is a schematic diagram of the traditional process flow in Comparative Example 1 of the present invention;

[0030] Figure 3 is a scanning electron microscope image of Example 1 of the present invention;

[0031] Figure 4 It is a scanning electron microscope image of comparative example 1 of the present invention. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] In this embodiment, it should be noted that there is no special restriction on the manufacturers of all raw materials involved in the present invention.

[0034] See also Figure 1-2 , the present invention provides a technical solution:

[0035] Embodiment 1: A method for manufacturing a DPC ceramic substrate: comprising the following steps:

[0036] (1) The ceramic substrate is cleaned, including alkaline degreasing, acid cleaning and ultrasonic pure water cleaning, and finally drying; the ceramic substrate used is 114.3×114.3×0.3mm 3 The ceramic piece is taken as ceramic substrate A;

[0037] (2) depositing a seed layer on ceramic substrate A by magnetron sputtering (PVD) process, firstly, magnetron sputtering was performed at 6 kW power and 150 sccm argon gas flow rate to obtain a 200 nm titanium layer; then, magnetron sputtering was performed at 8 kW power to obtain a 500 nm copper layer on the basis of the deposited layer, and the deposited layer was used as ceramic substrate B;

[0038] (3) Depositing an insulating layer on the ceramic substrate B by magnetron sputtering (PVD) process, the material of which is silicon dioxide (SiO2), the sputtering power is 2 kW, and the thickness is 500 nm; this is the ceramic substrate C;

[0039] (4) UV photosensitive dry film is used on ceramic substrate C, which has the function of anti-plating and anti-corrosion. The thickness of the dry film used is 38 μm. After lamination, exposure and development, the insulating layer on the circuit is exposed. The minimum spacing of the circuit pattern produced is 80 μm. This is ceramic substrate D;

[0040] (5) etching the insulating layer on the pattern circuit of the ceramic substrate D by wet etching, and exposing the conductive seed layer after etching to obtain the ceramic substrate E;

[0041] (6) The seed layer exposed in the ceramic substrate E is electroplated with copper to form metal circuits and pads. The electroplated copper is an acid copper electroplating process commonly used in the market. The thickness of the thicker electroplated copper layer is 25 μm. This is the ceramic substrate F.

[0042] (7) The ceramic substrate F is subjected to a film stripping treatment to remove the anti-plating dry film to expose the circuit side, that is, to remove the photosensitive anti-corrosion anti-plating layer, thereby obtaining the ceramic substrate G;

[0043] (8) electroplating a nickel-gold layer on the surface of the ceramic substrate G, wherein the nickel layer is 3 μm thick and the gold layer is 0.3 μm thick, and this is used as the ceramic substrate H;

[0044] (9) Etching the insulating layer and the seed layer on the ceramic substrate H. The insulating layer is etched first and then the seed layer. The total thickness of the two layers is 1 μm, and a DPC ceramic substrate is obtained.

[0045] Product quality of DPC ceramic substrate: the side wall wrapping rate is over 96%, meeting the product surface protection requirements.

[0046] Comparative Example 1: A conventional method for manufacturing a ceramic substrate, comprising the following steps:

[0047] (1) The ceramic substrate is cleaned, including alkaline degreasing, acid cleaning and ultrasonic pure water cleaning, and finally drying; the ceramic substrate used is 114.3×114.3×0.3mm 3 The ceramic piece is taken as ceramic substrate A;

[0048] (2) depositing a seed layer on ceramic substrate A by magnetron sputtering (PVD) process, firstly, magnetron sputtering was performed at 6 kW power and 150 sccm argon gas flow rate to obtain a 200 nm titanium layer; then, magnetron sputtering was performed at 8 kW power to obtain a 500 nm copper layer on the basis of the deposited layer, and the deposited layer was used as ceramic substrate B;

[0049] (3) UV photosensitive dry film is used on ceramic substrate B, which has the function of anti-plating and anti-corrosion. The thickness of the dry film used is 38 μm. After lamination, exposure and development, the seed layer on the circuit is exposed. The minimum spacing of the circuit pattern produced is 80 μm. This is ceramic substrate C;

[0050] (4) The seed layer exposed in the ceramic substrate C is electroplated with copper to form metal circuits and pads. The electroplated copper is an acid copper electroplating process commonly used in the market. The thickness of the thicker electroplated copper layer is 25 μm. This is the ceramic substrate D.

[0051] (5) electroplating a nickel-gold layer on the surface of the ceramic substrate D, wherein the nickel layer is 3 μm thick and the gold layer is 0.3 μm thick, and this is used as the ceramic substrate E;

[0052] (6) The ceramic substrate E is subjected to a film stripping treatment to remove the anti-plating dry film to expose the circuit side, that is, the photosensitive anti-corrosion anti-plating layer is removed to obtain the ceramic substrate F;

[0053] (7) Etching the seed layer on the ceramic substrate F to obtain a DPC ceramic substrate.

[0054] Testing experiment: The DPC ceramic substrates obtained in the embodiment and the comparative example were tested by scanning electron microscope. The obtained scanning electron microscope images are shown in Figure 3 and Figure 4 .

[0055] Conclusion: From the electron microscope images of Example 1 and Comparative Example 1, it can be seen that Example 1 optimizes the technical parameters and process steps to achieve a sidewall wrapping rate of more than 98%, while Comparative Example 1 has no side wrapping and only nickel-gold wrapping on the top. Therefore, the new manufacturing direction in this application effectively enhances the side wrapping rate of the DPC ceramic substrate and reduces product defects compared to the traditional process.

[0056] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0057] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for manufacturing a DPC ceramic substrate, characterized in that: The following steps are involved: (1) Cleaning a ceramic substrate to obtain a ceramic substrate A; (2) depositing a seed layer on a ceramic substrate A to form a ceramic substrate B; (3) depositing an insulating layer on the ceramic substrate B to form a ceramic substrate C. The insulating layer is deposited by PVD or CVD, and the thickness of the insulating layer is 100 nm to 2000 nm. (4) laminating, exposing, and developing the ceramic substrate C in sequence to form a photosensitive anti-corrosion and anti-plating layer, thereby obtaining a pattern circuit to be electroplated, which is the ceramic substrate D; (5) etching the insulating layer on the pattern circuit of the ceramic substrate D to expose the seed layer on the pattern circuit, thereby obtaining the ceramic substrate E; (6) electroplating a metal thickening layer on the seed layer exposed in the ceramic substrate E to form metal circuits and pads, thereby obtaining a ceramic substrate F; (7) performing a film stripping process on the ceramic substrate F to obtain a ceramic substrate G; (8) electroplating a metal layer on the surface of the ceramic substrate G to obtain a ceramic substrate H; (9) Etching the insulating layer and the seed layer on the ceramic substrate H to obtain a DPC ceramic substrate.

2. The method for manufacturing a DPC ceramic substrate according to claim 1, characterized in that: The type of the ceramic substrate includes one of aluminum oxide, zirconium oxide, zirconium oxide reinforced aluminum oxide, aluminum nitride, silicon nitride, silicon carbide, and quartz glass; the seed layer includes one or more of copper, nickel, chromium, and titanium; the insulating layer includes one or more of silicon, carbon, aluminum oxide, silicon dioxide, and silicon nitride.

3. The method for manufacturing a DPC ceramic substrate according to claim 1, characterized in that: In step (6), the electroplated metal thickening layer includes one of copper and aluminum; in step (8), the surface electroplated metal layer includes one or more of copper, nickel, gold, and silver.

4. The method for manufacturing a DPC ceramic substrate according to claim 1, characterized in that: In step (2), the seed layer is deposited by PVD, and the thickness of the seed layer is 500nm-2000nm.

5. The method for manufacturing a DPC ceramic substrate according to claim 1, characterized in that: In step (4), the film used for film pasting is UV photosensitive dry film.

6. The method for manufacturing a DPC ceramic substrate according to claim 1, characterized in that: In step (5), the etching method is dry etching or wet etching.

7. A DPC ceramic substrate obtained according to the method for manufacturing a DPC ceramic substrate according to any one of claims 1 to 6.

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