Control method of trimmer, control device of trimmer, electronic device, and storage medium

By determining the polishing influence of the polishing pad area on the wafer area and adjusting its weight, the dwell time of the dresser in the polishing pad area is controlled, thus solving the problem of unclear correspondence between the dresser, polishing pad, and wafer, reducing costs and improving the compliance of the wafer planarization process.

CN118905945BActive Publication Date: 2025-10-24HWATSING TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411141489.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-20
Publication Date
2025-10-24
Estimated Expiration
2044-08-20

AI Technical Summary

Technical Problem

In the prior art, the correspondence between the dressing scheme of the polishing pad by the dresser and the wafer is unclear, which makes the control difficult and costly, and it is difficult to meet the requirements of the wafer flattening process.

Method used

By determining the polishing influence of the polishing pad area on the wafer area, the target adjustment ratio and dwell time of the dresser in the polishing pad area are calculated to control the dressing process of the dresser on the polishing pad.

Benefits of technology

This technology reduces the trimming cost of the polishing pads by the trimmer while taking wafer factors into account, ensuring that the trimmed polishing pads can meet the requirements of the wafer planarization process.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present application provide a control method of a trimmer, a control device of the trimmer, an electronic device and a storage medium, the trimmer being used for trimming a polishing pad used for polishing a wafer, and the method comprises: determining a polishing influence value of a polishing pad area on the polishing pad on a wafer area on the wafer, wherein the polishing influence value is used to indicate the polishing effect intensity of the polishing pad area on the wafer area; determining a target adjustment proportion of the trimmer for the polishing pad area according to the polishing influence value, wherein the adjustment proportion of the trimmer for the polishing pad area is used to indicate the ratio of the time consumed by the trimmer for trimming the polishing pad area to the total time consumed by the trimmer for trimming the polishing pad; and controlling the residence time of the trimmer in the polishing pad area according to the target adjustment proportion. The control method of the trimmer provided by the embodiments of the present application can make the wafer planarization process of the polished polishing pad meet the requirements when polishing the wafer, and reduce the cost.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of semiconductor manufacturing, and in particular, to a control method of a conditioner, a control device of the conditioner, an electronic device, and a storage medium. BACKGROUND

[0002] Chemical mechanical polishing (CMP) is a kind of global planarization ultra-precision surface processing technology. In the polishing process, in order to ensure that the polishing pad has good surface characteristics, the polishing pad surface groove can meet the process requirements, and the polishing material to be polished can be efficiently and stably removed, a conditioner needs to be used to trim the surface of the polishing pad. The bottom of the conditioner is configured with a conditioning disc, the bottom surface of the conditioning disc is inlaid with diamond particles, the conditioning disc is given a downward pressure and a rotary torque by the conditioner, and the conditioning disc moves relative to the surface of the polishing pad to trim the surface of the polishing pad.

[0003] At present, the prior art only explores the corresponding relationship between the conditioning scheme of the conditioner for the polishing pad and the polishing pad, and lacks the direct corresponding relationship between the conditioning scheme of the conditioner for the polishing pad and the wafer.

[0004] However, due to the influence of consumables and processes, the corresponding relationship between the conditioning scheme of the conditioner for the polishing pad and the wafer is not clear, and it is difficult to make the conditioning scheme of the conditioner for the polishing pad meet the wafer planarization process requirements when polishing the wafer by adjusting and controlling the conditioning scheme of the conditioner for the polishing pad, and the cost is high. SUMMARY

[0005] Therefore, embodiments of the present application provide a control method of a conditioner, a control device of the conditioner, an electronic device, and a storage medium to at least partially solve the above problems.

[0006] According to a first aspect of embodiments of the present application, a control method of a conditioner is provided, the conditioner being used for conditioning a polishing pad used for polishing a wafer, and the method comprises: determining a polishing influence value of a polishing pad area on the polishing pad on a wafer area on the wafer, wherein the polishing influence value is used to indicate the polishing action intensity of the polishing pad area on the wafer area; determining a target adjustment proportion of the conditioner for the polishing pad area according to the polishing influence value, wherein the adjustment proportion of the conditioner for the polishing pad area is used to indicate the ratio of the time consumed by the conditioner for conditioning the polishing pad area to the total time consumed by the conditioner for conditioning the polishing pad; and controlling the residence time of the conditioner in the polishing pad area according to the target adjustment proportion.

[0007] According to a second aspect of the embodiments of the present application, a control device of a conditioner is provided, the conditioner being used for conditioning a polishing pad used for polishing a wafer, and the device comprises: a first determining unit configured to determine a polishing influence value of a polishing pad area on the polishing pad on a wafer area on the wafer, wherein the polishing influence value is used to indicate a polishing action intensity of the polishing pad area on the wafer area; a second determining unit configured to determine a target adjustment proportion of the conditioner for the polishing pad area according to the polishing influence value, wherein the adjustment proportion of the conditioner for the polishing pad area is used to indicate a ratio of a time consumed by the conditioner for conditioning the polishing pad area to a total time consumed by the conditioner for conditioning the polishing pad; and a control unit configured to control a residence time of the conditioner in the polishing pad area according to the target adjustment proportion.

[0008] According to a third aspect of the embodiments of the present application, an electronic device is provided, comprising: a processor, a memory, a communication interface and a communication bus, the processor, the memory and the communication interface complete communication with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction causes the processor to perform operations corresponding to the method of the first aspect.

[0009] According to a fourth aspect of the embodiments of the present application, a computer storage medium is provided, and the computer storage medium stores a computer program, and the program is executed by a processor to implement the method of the first aspect.

[0010] According to a fifth aspect of the embodiments of the present application, a computer program product is provided, comprising computer instructions, and the computer instructions instruct a computing device to execute the method of the first aspect.

[0011] According to the control method of the conditioner provided by the embodiments of the present application, the residence time of the conditioner in the polishing pad area is determined according to the polishing influence value of the polishing pad area on the polishing pad on the wafer area, so that the conditioner can be controlled to condition the polishing pad area. Since the residence time of the conditioner in the polishing pad area is determined according to the influence relationship between the wafer and the polishing pad, the wafer factor is considered when the residence time of the conditioner in the polishing pad area is determined. After the conditioner conditions the polishing pad according to the determined residence time, the wafer planarization process during the polishing of the wafer by the conditioned polishing pad can meet the requirements, and the cost is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the drawings needed in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments described in the embodiments of the present application, and other drawings can also be obtained by those skilled in the art according to these drawings.

[0013] Figure 1 is a flow chart of a control method of a trimmer provided by an embodiment of the present application;

[0014] Figure 2 is a schematic diagram of wafer polishing provided by an embodiment of the present application;

[0015] Figure 3 is a flow chart of an influence value determination method provided by an embodiment of the present application;

[0016] Figure 4 is a schematic diagram of a wafer and a polishing pad provided by an embodiment of the present application;

[0017] Figure 5 is a schematic diagram of a polishing rate provided by an embodiment of the present application;

[0018] Figure 6 is a schematic diagram of an adjustment of a specific gravity difference provided by an embodiment of the present application;

[0019] Figure 7 is another schematic diagram of an adjustment of a specific gravity difference provided by an embodiment of the present application;

[0020] Figure 8 is a schematic diagram of a control device of a trimmer provided by an embodiment of the present application;

[0021] Figure 9 is a structural schematic diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to make personnel in the art better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art should belong to the scope of protection of the present application.

[0023] The terms used in the present application are merely for the purpose of describing particular embodiments and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0024] It should be understood that, although the terms first, second, third, etc. can be employed in this application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another type of information. For example, without departing from the scope of the application, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as the first information. Depending on the context, the word "if" as used herein can be interpreted as "when" or "upon determination" or "in response to determining".

[0025] The control method of the conditioner provided in the application will be described below through specific embodiments:

[0026] Figure 1 is a flow chart of a control method of a conditioner provided in an embodiment of the application, the conditioner is used to condition a polishing pad, the polishing pad is used to polish a wafer, as shown in Figure 1 The method comprises the following steps 101 to 103:

[0027] Step 101, determining a polishing influence value of a polishing pad area on the polishing pad on a wafer area on the wafer.

[0028] The polishing influence value of the polishing pad area on the polishing pad on the wafer area on the wafer is determined, Figure 2 is a schematic diagram of wafer polishing provided in an embodiment of the application, as shown in Figure 2 When polishing the wafer 202, the wafer 202 performs a rotational motion and a radial motion on the polishing pad 201, and the polishing pad 201 itself performs a rotational motion, at this time, the polishing pad area 2011 on the polishing pad 201 will polish the wafer area 2021 on the wafer 202.

[0029] The polishing influence value can indicate the polishing action intensity of the polishing pad area on the wafer area, in an example, the polishing influence value is proportional to the polishing action intensity, that is, the higher the polishing action intensity of the polishing pad area on the wafer area, the greater the polishing influence value.

[0030] It should be understood that the polishing pad can include a plurality of polishing pad areas, and the wafer can include a plurality of wafer areas, which can be divided according to requirements.

[0031] Step 102, determining a target adjustment proportion of the conditioner for the polishing pad area according to the polishing influence value.

[0032] The adjustment proportion of the conditioner for the polishing pad area can indicate the ratio of the time consumed by the conditioner for conditioning the polishing pad area to the total time consumed by the conditioner for conditioning the polishing pad, for example: the adjustment proportion is 10%, if the total time consumed by the conditioner for conditioning the polishing pad is 10 minutes, then the time consumed by the conditioner for conditioning the polishing pad area is 1 minute.

[0033] Step 103, according to the target adjustment ratio, control the residence time of the conditioner in the polishing pad area.

[0034] According to the target adjustment ratio, the residence time of the conditioner in the polishing pad area is determined, for example, if the total time of the conditioner conditioning the polishing pad is 10 minutes, the time of the conditioner conditioning the polishing pad area is 1 minute, and the residence time of the conditioner in the polishing pad area is determined to be 1 minute. According to the determined residence time, the conditioner is controlled to condition the polishing pad area.

[0035] In the embodiment of the present application, the residence time of the conditioner in the polishing pad area is determined according to the polishing influence value of the polishing pad area on the wafer area on the polishing pad, so that the conditioner can be controlled to condition the polishing pad area. Since the residence time of the conditioner in the polishing pad area is determined through the influence relationship between the wafer and the polishing pad, the wafer factor is considered when determining the residence time of the conditioner in the polishing pad area. After the conditioner conditions the polishing pad according to the determined residence time, the wafer planarization process during polishing of the wafer by the conditioned polishing pad can meet the requirements, and the cost is reduced.

[0036] Figure 3 is a flowchart of an influence value determination method provided by the embodiment of the present application, as shown in Figure 3 When determining the polishing influence value of the polishing pad area on the wafer area on the polishing pad, the following steps 301 to 304 can be performed:

[0037] Step 301, determine the intersection probability.

[0038] As shown in Figure 2 The polishing pad area and the wafer area include annular areas, and the intersection probability can indicate the probability of intersection of the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area. The reference circle is located in the corresponding annular area and has the same center as the corresponding annular area, for example, the reference circles of the polishing pad area and the wafer area are the outer edges of the annular areas.

[0039] Since the wafer moves radially on the polishing pad, the polishing pad area and the second environment area are not always intersected, that is, they are not always in contact. The intersection probability of the polishing pad area and the wafer area is determined.

[0040] Step 302, obtain the first polishing rate of the wafer in the wafer area after the conditioner conditions the polishing pad area according to the first adjustment ratio.

[0041] After the conditioner is adjusted according to the first adjustment ratio, a first polishing rate of the wafer area after the conditioner modifies the polishing pad area according to the first adjustment ratio is obtained. In an example, the first adjustment ratio can be an equal division ratio, that is, each polishing pad area in the polishing pad stays for the same time, for example: the conditioning pad includes 10 polishing pad areas, and the total conditioning time is 10 minutes, then each polishing pad area stays for 1 minute. Since the polishing rate is used to indicate the removal thickness of the wafer area per unit time, the first polishing rate is used to indicate the removal thickness of the wafer area per unit time after the conditioner modifies the polishing pad area according to the first adjustment ratio.

[0042] In an example, the rotation speed of the wafer can be set to 97 r / min, the swing speed is 19 times / min, and the rotation speed of the polishing pad is set to 101 r / min, and the first polishing rate is determined under this condition.

[0043] Step 303, obtaining the second polishing rate of the wafer in the wafer area after the conditioner modifies the polishing pad area according to the second adjustment ratio.

[0044] The first adjustment ratio is different from the second adjustment ratio. After the conditioner is adjusted according to the second adjustment ratio, the second polishing rate of the wafer area after the conditioner modifies the polishing pad area according to the second adjustment ratio is obtained. The second adjustment ratio can be an artificially adjusted adjustment ratio. In an example, the second adjustment ratio can be adjusted manually according to the first polishing rate and the first conditioning ratio. It should be noted that the second polishing rate is used to indicate the removal thickness of the wafer area per unit time after the conditioner modifies the polishing pad area according to the second adjustment ratio, for example: the first polishing rate is to remove 10 nm per unit time, and the second polishing rate is to remove 8 nm per unit time after the conditioner modifies the polishing pad area according to the second adjustment ratio. In an example, the rotation speed of the wafer can be set to 97 r / min, the swing speed is 19 times / min, and the rotation speed of the polishing pad is set to 101 r / min, and the second polishing rate is determined. It should be understood that the rotation speed of the wafer, the swing speed, and the rotation speed of the polishing pad are set the same when the first polishing rate and the second polishing rate are determined.

[0045] Step 304, determining the polishing influence value according to the first polishing rate, the second polishing rate, and the intersection probability.

[0046] According to the first polishing rate, the second polishing rate, and the intersection probability, the polishing effect intensity of the polishing pad area on the wafer area is determined, that is, the polishing influence value is determined.

[0047] In an embodiment of the present application, after determining the intersection probability, the polishing pad area is trimmed according to two different adjustment gravities, and then the first polishing rate and the second polishing rate of the wafer area on the wafer are obtained. Thus, the polishing impact value can be determined based on the first polishing rate, the second polishing rate and the intersection probability. Since the polishing impact value is determined based on the polishing rates and the intersection probability after two trimmings, the determined polishing impact value can indicate the intensity of the polishing effect of the polishing pad area on the wafer area.

[0048] In a possible implementation, when determining the intersection probability, the number of intersections between the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area during a polishing operation of the polishing pad on the wafer can be obtained.

[0049] The intersection probability is determined by the following formula (1):

[0050] (1)

[0051] i is used to represent the reference circle corresponding to the i-th wafer area on the wafer. The i-th wafer area is concentric with the wafer, the outer radius of the i-th wafer area is equal to the inner radius of the i+1-th wafer area, and the inner radius of the 1st wafer area is equal to 0. j is used to represent the reference circle corresponding to the j-th polishing pad area on the polishing pad. The j-th polishing pad area is concentric with the polishing pad, the outer radius of the j-1-th polishing pad area is equal to the inner radius of the j-th polishing pad area, and the inner radius of the 1st polishing pad area is equal to 0. j is a positive integer less than or equal to n. n is used to represent the number of polishing pad areas. I_ij is used to represent the probability of intersection between the reference circle corresponding to the i-th wafer area and the reference circle corresponding to the j-th polishing pad area in one polishing operation of the polishing pad on the wafer. T_ij is used to represent the number of intersections between the reference circle corresponding to the i-th wafer area and the reference circle corresponding to the j-th polishing pad area in one polishing operation of the polishing pad on the wafer.

[0052] Figure 4 Schematic diagram of a wafer and polishing pad provided in an embodiment of the present application, such as Figure 4 As shown, the wafer 202 includes multiple wafer areas 2021, the inner circle radius of the first wafer area 2021 is 0, that is, the first wafer area 2021 is a circle with the center of the wafer 202 as the center, the outer circle radius of the i-th wafer area 2021 is equal to the inner circle radius of the i+1-th wafer area 2021, and the polishing pad area 2011 on the polishing pad 201 is similar to the wafer area 2021 on the wafer 202, which will not be repeated here. Figure 4 The arrows in the figure indicate the radial motion of the wafer along the polishing pad. The wafer and the polishing pad itself also perform rotational motion, which is not shown in the figure.

[0053] In an embodiment of the present application, the number of intersections between the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area is obtained, and the intersection probability of the polishing pad area can be calculated by the above formula, thereby realizing the determination of the intersection probability. Since the intersection probability is determined based on the ratio of the number of intersections between the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area, and the number of intersections between the reference circle corresponding to the polishing pad area and the reference circles corresponding to multiple wafer areas, the determined intersection probability is more accurate, thereby improving the accuracy of the target adjustment proportion.

[0054] In a possible implementation, when determining the polishing impact value based on the first polishing rate, the second polishing rate, and the intersection probability, the polishing impact value can be determined by the following formula (2):

[0055] M_ij=(V_i*I_ij) / S_j (2)

[0056] M_ij is used to characterize the polishing influence of the j-th polishing pad area on the i-th wafer area, S_j is used to characterize the difference between the first adjustment ratio and the second adjustment ratio corresponding to the j-th polishing pad area, and V_i is used to characterize the difference between the first polishing rate and the second polishing rate corresponding to the i-th wafer area.

[0057] In one example, Figure 5 Schematic diagram of a polishing rate provided in an embodiment of the present application, such as Figure 5 As shown, Figure 5 The horizontal axis indicates the radius of the wafer, the vertical axis indicates the thickness of the wafer, and the difference between the first rate curve and the second rate curve is V_i, that is, the difference in wafer thickness removed in the i-th wafer area per unit time.

[0058] In the embodiment of the present application, the polishing impact value can be determined by the above formula. Since the difference between the first polishing rate and the second polishing rate can be used to determine the polishing degree per unit time of the wafer due to the time difference between the first adjustment ratio and the second adjustment ratio, and the intensity of the polishing effect of the polishing pad area on the wafer area can be determined based on the intersection probability and the polishing degree, that is, the polishing impact value can be determined.

[0059] In one possible implementation, when determining the target adjustment weight of the dresser for the polishing pad area based on the polishing impact value, the adjustment weight difference can be calculated based on the polishing impact value and the preset removal thickness of each wafer area, wherein the adjustment weight difference is used to indicate the difference between the target adjustment weight corresponding to the polishing pad area and the first adjustment weight, and the target adjustment weight corresponding to each polishing pad area is determined based on the adjustment weight difference.

[0060] It should be understood that the preset removal thickness is a removal thickness relative to the first polishing rate, for example, if the first polishing rate is 10 nm per unit time, and the required thickness is 6 nm, then the preset removal thickness is 4 nm.

[0061] In the embodiments of the present application, since the polishing influence value is determined according to the difference between the first adjustment ratio and the second adjustment ratio and the difference between the first polishing rate and the second polishing rate, the required removal thickness of the wafer region can be determined according to the preset removal thickness, and the difference between the target adjustment ratio and the first adjustment ratio can be determined according to the polishing influence value, so that the target adjustment ratio can be determined, thereby achieving determination of the target adjustment ratio.

[0062] In a possible implementation, when the adjustment ratio difference is calculated according to the polishing influence value and the preset removal thickness of each wafer region, the adjustment ratio difference can be determined by the following formula (3):

[0063] (3)

[0064] is used to represent the preset removal thickness of the i th wafer region, and is used to represent the adjustment ratio difference corresponding to the j th polishing pad region.

[0065] Figure 6 is a schematic diagram of an adjustment ratio difference provided by an embodiment of the present application, as shown in Figure 6 the difference between the first polishing rate and the second polishing rate is V_i, the third polishing rate is the removal thickness of the wafer region per unit time after the polishing head is adjusted according to the target ratio, and the difference between the third polishing rate and the first polishing rate is the adjustment ratio difference. It should be understood that since the target adjustment ratio can be greater than or less than the second ratio, the Figure 6 two third polishing rates are shown in Figure 6 A and Figure 6 B.

[0066] In another example, Figure 7 is another schematic diagram of an adjustment ratio difference provided by an embodiment of the present application, as shown in Figure 7 When the first polishing rate, the second polishing rate and the third polishing rate are determined, normalization processing can be performed, that is, the removal thickness per unit time is divided by the average value of the removal thickness, Figure 7 A is the effect after normalization processing corresponding to Figure 6 A. Figure 7 B is the effect after normalization processing corresponding to Figure 6 B.

[0067] In the embodiment of the present application, the adjustment proportion difference value can be calculated by the above formula, so as to realize the calculation of the adjustment proportion difference value, and the target adjustment proportion can be determined according to the adjustment proportion difference value. Since the target adjustment proportion of the conditioner in the polishing pad area is determined through the influence relationship between the wafer and the polishing pad, the wafer factor is considered when the residence time of the conditioner in the polishing pad area is determined, so that after the conditioner is conditioned on the polishing pad according to the determined residence time, the wafer planarization process of the conditioned polishing pad when polishing the wafer can meet the requirements, and the cost is reduced.

[0068] Figure 8 is a schematic diagram of a control device of a conditioner provided in the embodiment of the present application, as shown in the figure, the device 800 includes: Figure 8

[0069] The first determination unit 801 is configured to determine a polishing influence value of the polishing pad area on the wafer area, wherein the polishing influence value is used to indicate the polishing effect intensity of the polishing pad area on the wafer area.

[0070] The second determination unit 802 is configured to determine a target adjustment proportion of the conditioner for the polishing pad area according to the polishing influence value, wherein the adjustment proportion of the conditioner for the polishing pad area is used to indicate the ratio of the time consumed by the conditioner for conditioning the polishing pad area to the total time consumed by the conditioner for conditioning the polishing pad.

[0071] The control unit 803 is configured to control the residence time of the conditioner in the polishing pad area according to the target adjustment proportion.

[0072] In the embodiment of the present application, the first determination unit 801 can be configured to execute step 101 in the above method embodiment, the second determination unit 802 can be configured to execute step 102 in the above method embodiment, and the control unit 803 can be configured to execute step 103 in the above method embodiment.

[0073] In a possible implementation, the first determination unit 801 is further configured to determine an intersection probability, wherein the polishing pad area and the wafer area include annular areas, the intersection probability is used to indicate the probability that the corresponding reference circle of the polishing pad area intersects with the corresponding reference circle of the wafer area, the reference circle is located in the corresponding annular area and has the same center as the corresponding annular area; obtain a first polishing rate of the wafer in the wafer area after the conditioner conditions the polishing pad area according to a first adjustment proportion, wherein the polishing rate is used to indicate the removal thickness of the wafer area per unit time; obtain a second polishing rate of the wafer in the wafer area after the conditioner conditions the polishing pad area according to a second adjustment proportion, wherein the first adjustment proportion is different from the second adjustment proportion; and determine the polishing influence value according to the first polishing rate, the second polishing rate and the intersection probability.

[0074] ​In a possible implementation, the first determining unit 801 is further configured to acquire the number of intersections between the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area in one polishing operation of the polishing pad on the wafer;

[0075] The intersection probability is determined by the following first formula:

[0076]

[0077] i is used to represent the reference circle corresponding to the ith wafer area on the wafer, the ith wafer area has the same center as the wafer, the outer circle radius of the ith wafer area is equal to the inner circle radius of the (i+1)th wafer area, and the inner circle radius of the first wafer area is equal to 0;

[0078] j is used to represent the reference circle corresponding to the jth polishing pad area on the polishing pad, the jth polishing pad area has the same center as the polishing pad, the outer circle radius of the (j-1)th polishing pad area is equal to the inner circle radius of the jth polishing pad area, the inner circle radius of the first polishing pad area is equal to 0, j is a positive integer less than or equal to n, and n is used to represent the number of polishing pad areas;

[0079] I_ij is used to represent the intersection probability between the reference circle corresponding to the ith wafer area and the reference circle corresponding to the jth polishing pad area in one polishing operation of the polishing pad on the wafer;

[0080] T_ij is used to represent the number of intersections between the reference circle corresponding to the ith wafer area and the reference circle corresponding to the jth polishing pad area in one polishing operation of the polishing pad on the wafer.

[0081] In a possible implementation, the first determining unit 801 is further configured to determine the polishing influence value by the following second formula:

[0082] M_ij=(V_i*I_ij) / S_j

[0083] M_ij is used to represent the polishing influence value of the jth polishing pad area on the ith wafer area, S_j is used to represent the difference between the first adjustment ratio and the second adjustment ratio corresponding to the jth polishing pad area, and V_i is used to represent the difference between the first polishing rate and the second polishing rate corresponding to the ith wafer area.

[0084] In a possible implementation, the second determining unit 802 is further configured to calculate an adjustment ratio difference value according to the polishing influence value and a preset removal thickness of each wafer area, wherein the adjustment ratio difference value is used to indicate the difference between the target adjustment ratio corresponding to the polishing pad area and the first adjustment ratio, and determine the target adjustment ratio corresponding to each polishing pad area according to the adjustment ratio difference value.

[0085] In a possible implementation, the second determining unit 802 is further configured to determine the adjustment ratio difference value by a third formula as follows:

[0086]

[0087] The preset removal thickness for representing the i-th wafer area, and the adjustment ratio difference value corresponding to the j-th polishing pad area.

[0088] Referring to Figure 9 , a structural schematic diagram of an electronic device according to an embodiment of the present application is shown, and embodiments of the present application do not limit the specific implementation of the electronic device.

[0089] As Figure 9 shown, the electronic device can include a processor 902, a communications interface 904, a memory 906, and a communications bus 908.

[0090] Among them:

[0091] The processor 902, the communications interface 904, and the memory 906 complete mutual communication through the communications bus 908.

[0092] The communications interface 904 is configured to communicate with other electronic devices or servers.

[0093] The processor 902 is configured to execute the program 910, and specifically can execute the related steps in the control method embodiment of the trimmer.

[0094] Specifically, the program 910 can include program code, and the program code includes computer operation instructions.

[0095] The processor 902 can be a central processing unit CPU, or a graphics processing unit GPU, or an application specific integrated circuit ASIC, or one or more integrated circuits configured to implement embodiments of the present application. One or more processors included in the smart device can be the same type of processor, such as one or more CPUs; one or more GPUs; or can be different types of processors, such as one or more CPUs and one or more GPUs and one or more ASICs.

[0096] The memory 906 is configured to store the program 910. The memory 906 can include a high-speed RAM memory, and can further include a non-volatile memory such as at least one disk memory.

[0097] The program 910 can be specifically configured to enable the processor 902 to perform the control method of the trimmer in any of the foregoing embodiments.

[0098] The specific implementation of each step in the program 910 can refer to the corresponding description in the corresponding step and unit in any of the foregoing control method embodiments of the trimmer, and will not be described herein. It can be clearly understood by those skilled in the art that, for the convenience and brevity of description, the specific working process of the device and the module described above can refer to the corresponding process description in the foregoing method embodiments, and will not be described herein.

[0099] In the embodiments of the present application, according to the polishing influence value of the polishing pad area on the wafer area on the polishing pad, the residence time of the trimmer in the polishing pad area is determined, so that the trimmer can be controlled to trim the polishing pad area. Since the residence time of the trimmer in the polishing pad area is determined through the influence relationship between the wafer and the polishing pad, the wafer factor is considered when determining the residence time of the trimmer in the polishing pad area. After the polishing pad is trimmed by the trimmer through the determined residence time, the wafer planarization process during polishing of the wafer by the trimmed polishing pad can meet the requirements, and the cost is reduced.

[0100] The embodiments of the present application further provide a computer program product, including computer instructions, which instruct a computing device to perform operations corresponding to any of the methods in the foregoing method embodiments.

[0101] It should be noted that, according to the needs of implementation, each component / step described in the embodiments of the present application can be split into more components / steps, or two or more components / steps or part of the operations of the components / steps can be combined into new components / steps, to achieve the purpose of the embodiments of the present application.

[0102] The above-described methods according to embodiments of the application can be implemented in hardware, firmware, or software, or any combination thereof, and can be stored in or implemented with the aid of one or more data storage media (e.g., removable storage media like CD-ROM, floppy disks, hard disks, optical disks, or memory such as ROM, RAM, flash memory, etc.) embodying instructions that implement the methods described herein. The methods described herein can also be stored as software or computer code on a recording medium, which can be any medium used to store and / or carry computer code, such as a floppy disk, a CD-ROM, a hard disk, a magnetic tape, a computer database, an optical disk, a magnetic disk, a memory chip, a ROM, a RAM, a flash memory, a portable electronic storage device, an object code microcode, or the like. The methods described herein can also be transmitted as software or computer code on a carrier wave using transmission media, which can be any medium used to carry and / or convey computer code, such as a wireless signal, a wired connection, a wireless connection, a fiber optic cable, a coaxial cable, a wire, a wireless transmitter and receiver, air, etc. The methods described herein can be embodied in a computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or independent processor or state machine, and can be stored on a computer-readable medium, such as a floppy diskette, hard drive, ROM, RAM, flash memory, portable electronic storage device, or any other storage medium.

[0103] Those skilled in the art can understand that the units and method steps of the examples described in combination with the embodiments disclosed herein can be realized in electronic hardware or in a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of the present application.

[0104] The above embodiments are only used to illustrate the present application, not to limit the present application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, all equivalent technical solutions belong to the scope of the present application, and the patent protection range of the present application should be defined by the claims.

Claims

1. A control method of a conditioner for conditioning a polishing pad used for polishing a wafer, characterized by, The method comprises the following steps: determining a polishing influence value of a polishing pad area on a polishing pad on a wafer area on a wafer; determining a target adjustment ratio of a trimmer for the polishing pad area according to the polishing influence value, which is used to indicate a ratio of a time consumed by the trimmer for trimming the polishing pad area to a total time consumed by the trimmer for trimming the polishing pad; controlling a residence time of the trimmer in the polishing pad area according to the target adjustment ratio; wherein the polishing influence value is used to indicate a polishing effect intensity of the polishing pad area on the wafer area, and is determined by the following steps: determining an intersection probability, wherein the polishing pad area and the wafer area comprise annular areas, the intersection probability is used to indicate a probability that a reference circle corresponding to the polishing pad area intersects with a reference circle corresponding to the wafer area, the reference circles are located in the corresponding annular areas and have the same center as the corresponding annular areas; obtaining a first polishing rate of the wafer in the wafer area after the trimmer trims the polishing pad area according to a first adjustment ratio; obtaining a second polishing rate of the wafer in the wafer area after the trimmer trims the polishing pad area according to a second adjustment ratio, wherein the first adjustment ratio is different from the second adjustment ratio; determining the polishing influence value according to the first polishing rate, the second polishing rate and the intersection probability.

2. The method of claim 1, wherein, The method for determining the intersection probability comprises the following steps: obtaining an intersection frequency of the reference circle corresponding to the polishing pad area and the reference circle corresponding to the wafer area in a polishing operation of the polishing pad on the wafer; determining the intersection probability by the following first formula: i is used to represent the reference circle corresponding to the i-th wafer area on the wafer, the i-th wafer area has the same center as the wafer, the outer circle radius of the i-th wafer area is equal to the inner circle radius of the i+1-th wafer area, and the inner circle radius of the 1st wafer area is equal to 0; j is used to represent the reference circle corresponding to the j-th polishing pad area on the polishing pad, the j-th polishing pad area has the same center as the polishing pad, the outer circle radius of the j-1-th polishing pad area is equal to the inner circle radius of the j-th polishing pad area, the inner circle radius of the 1st polishing pad area is equal to 0, j is a positive integer less than or equal to n, and n is used to represent the number of the polishing pad areas; I ij a probability of intersection of a reference circle corresponding to the ith wafer region and a reference circle corresponding to the jth polishing pad region in a polishing operation of the polishing pad on the wafer; T ij the number of intersections between the reference circle corresponding to the ith wafer region and the reference circle corresponding to the jth polishing pad region in a polishing operation of the polishing pad on the wafer.

3. The method of claim 2, wherein, determining the polishing influence value by the following second formula: determining the target adjustment ratio of the trimmer for the polishing pad area according to the polishing influence value comprises the following steps: M ij = (V i *I ij ) / S j M ij a value S for characterizing a polishing influence of the jth polishing pad region on the ith wafer region j a value V for characterizing a difference between the first adjustment ratio and the second adjustment ratio corresponding to the jth polishing pad region i a value for characterizing a difference between the first polishing rate and the second polishing rate corresponding to the ith wafer region 4. The method of claim 3, wherein, calculating an adjustment ratio difference value according to the polishing influence value and a preset removal thickness of each wafer area, wherein the adjustment ratio difference value is used to indicate a difference value between the target adjustment ratio corresponding to the polishing pad area and the first adjustment ratio; determining the target adjustment ratio corresponding to each polishing pad area according to the adjustment ratio difference value. calculating the adjustment ratio difference value according to the polishing influence value and the preset removal thickness of each wafer area comprises the following steps:

5. The method of claim 4, wherein, determining the adjustment ratio difference value by the following third formula: ​ V i target a preset removal thickness for characterizing the i-th wafer region, for characterizing the j-th polishing pad region.

6. A control device of a conditioner for conditioning a polishing pad used for polishing a wafer, characterized by, ​ The first determining unit is configured to determine a polishing influence value of a polishing pad region on a wafer region, wherein the polishing influence value is used to indicate a polishing strength of the polishing pad region on the wafer region, and the polishing influence value is determined by the following steps: determining an intersection probability, wherein the polishing pad region and the wafer region comprise annular regions, the intersection probability is used to indicate a probability that a reference circle corresponding to the polishing pad region intersects with a reference circle corresponding to the wafer region, the reference circles are located in the corresponding annular regions and share a same center; obtaining a first polishing rate of the wafer in the wafer region after the trimmer trims the polishing pad region according to a first adjustment proportion; obtaining a second polishing rate of the wafer in the wafer region after the trimmer trims the polishing pad region according to a second adjustment proportion, wherein the first adjustment proportion is different from the second adjustment proportion; determining the polishing influence value according to the first polishing rate, the second polishing rate and the intersection probability; The second determining unit is configured to determine a target adjustment proportion of the trimmer for the polishing pad region according to the polishing influence value, wherein the target adjustment proportion is used to indicate a ratio of a time consumed by the trimmer for trimming the polishing pad region to a total time consumed by the trimmer for trimming the polishing pad; The control unit is configured to control a residence time of the trimmer in the polishing pad region according to the target adjustment proportion.

7. An electronic device, comprising: The apparatus comprises: a processor, a memory, a communication interface and a communication bus, the processor, the memory and the communication interface complete mutual communication through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction causes the processor to execute the control method of the trimmer according to any one of claims 1-5.

8. A computer storage medium, characterized in that The computer program is stored on the apparatus and is executed by the processor to implement the control method of the trimmer according to any one of claims 1-5.

9. A computer program product, characterised in that, The computer program comprises computer instructions, and the computer instructions instruct a computing device to execute the control method of the trimmer according to any one of claims 1-5.

Citation Information

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