Switch CPU status monitoring management method, device, medium and program product
By receiving and processing BFD packets sent by the main CPU, quickly judging and taking over the main CPU failure, the delay problem of the switch during monitoring and switching is solved, ensuring high availability and stability of the network.
Patent Information
- Application Number
- CN202411405049.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-10
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2044-10-10
AI Technical Summary
Existing switches cannot quickly and effectively monitor whether the main CPU has failed, and take a long time during the backup CPU taking over after the main CPU fails, affecting network stability.
By receiving the bidirectional forwarding periodically sent by the main CPU, detecting the BFD packet, waiting for the time of the packet to meet the set conditions, determine the main CPU failure, and after determining the fault, take over the control of the main CPU, read the main CPU from the memory space Current working information, realizes rapid fault judgment and synchronization of backup CPUs.
It realizes rapid and efficient judgment of the main CPU fault and quickly synchronizes the working information of the main CPU to take over its control, ensuring high availability and stability of the network.
Smart Images

Figure CN118921340B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technology, and in particular to a switch CPU status monitoring management method, device, medium and program product. Background Art
[0002] With the rapid development of network technology, the role of switches in the network is becoming increasingly important. The stability of switches directly affects the reliability of the network and the efficiency of data transmission. In a switch with a dual-CPU architecture, the main CPU is responsible for daily network management and data packet forwarding, while the backup CPU takes over the main CPU for network operations when the main CPU fails. However, during the operation of existing switches, it is impossible to quickly and effectively monitor whether the main CPU fails. After the main CPU fails, it takes a long time for the backup CPU to take over, which affects the network. Summary of the invention
[0003] The purpose of the embodiments of the present application is to provide a switch CPU status monitoring management method, device, medium and program product to solve the problem that the existing switch cannot quickly and effectively monitor the failure of the main CPU and control the standby CPU to take over the operation during operation.
[0004] In a first aspect, an embodiment of the present application provides a switch CPU fault monitoring and management method, which is applied to a backup CPU of a switch, and the method includes:
[0005] Receives the bidirectional forwarding detection (BFD) data packets periodically sent by the main CPU;
[0006] When the time for waiting for the BFD data packet reaches a set condition, determining that the main CPU is faulty;
[0007] Taking over the control of the main CPU and reading the current working information of the main CPU from the memory space;
[0008] A control transfer instruction is received, instructing the main CPU to take over the control and read the current working information of the standby CPU from the memory space.
[0009] In the above implementation process, a bidirectional forwarding detection BFD data packet periodically sent by the main CPU is received; when the waiting time for the BFD data packet reaches the set condition, the main CPU is determined to be faulty; the control right of the main CPU is taken over and the current working information of the main CPU is read from the memory space; a control right transfer instruction is received, instructing the main CPU to take over the control right and read the current working information of the backup CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring the high availability of the network.
[0010] Further, when the waiting time for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes:
[0011] When the time length for waiting for the BFD data packet exceeds the set time length, the BFD protocol is marked as an invalid state, and it is determined that the main CPU fails.
[0012] In the above implementation process, when the time that the standby CPU waits for the BFD data packet sent by the main CPU exceeds the set time, it is determined that the main CPU is faulty, thereby realizing fast and effective monitoring of whether the main CPU is faulty.
[0013] Further, when the waiting time for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes:
[0014] When the time length for waiting for the BFD data packet exceeds the set time length and the number of timeouts reaches the set number of times, the BFD protocol is marked as an invalid state, and the main CPU is determined to be faulty.
[0015] In the above implementation process, when the time that the standby CPU waits for the BFD data packet sent by the main CPU exceeds the set time and the number of timeouts reaches the set number, the main CPU failure is determined, which can effectively monitor whether the main CPU fails, thereby enhancing the accuracy of monitoring.
[0016] Furthermore, before receiving the bidirectional forwarding detection BFD data packet periodically sent by the main CPU, it also includes:
[0017] A BFD parameter is received and configured to establish a BFD session connection with the main CPU.
[0018] In the above implementation process, before the standby CPU receives the BFD data packet sent by the active CPU, it is necessary to configure the BFD parameters of the active CPU and the standby CPU and establish a BFD session connection between the active CPU and the standby CPU to implement data packet transmission between the two.
[0019] Further, the receiving BFD parameters and configuring the BFD parameters to establish a BFD session connection with the main CPU includes:
[0020] Receive the destination IP address corresponding to BFD;
[0021] Configure the target IP address of the standby CPU management interface;
[0022] The standby CPU management interface is controlled to connect to the main CPU management interface through a heartbeat line to establish a BFD session connection with the main CPU.
[0023] In the above implementation process, the BFD parameters of the standby CPU are configured, the active CPU and the standby CPU are connected through a heartbeat line, and a BFD session connection between the active CPU and the standby CPU is established to implement data packet transmission between the two.
[0024] Furthermore, after taking over the control of the main CPU and reading the current working information of the main CPU from the memory space, the method further includes:
[0025] Record fault event logs and issue alarms;
[0026] Write working information to the memory space in real time.
[0027] In the above implementation process, the fault event log is recorded and an alarm is issued to remind the administrator to handle the fault and ensure the availability of the network. At the same time, the control is returned after the main CPU is normal to ensure the normal operation of the switch.
[0028] In a second aspect, an embodiment of the present application further provides a switch CPU fault monitoring and management method, which is used for a main CPU of a switch, and the method includes:
[0029] Write working information to memory space in real time;
[0030] Send periodic BFD packets to the standby CPU;
[0031] If a failure occurs, stop sending BFD data packets, instruct the standby CPU to take over control and read the current working information of the main CPU from the memory space;
[0032] Upon receiving the control transfer instruction, the control is taken over and the current working information of the standby CPU is read from the memory space.
[0033] In the above implementation process, the working information is written to the memory space in real time; periodic BFD data packets are sent to the backup CPU; if a fault occurs, the BFD data packets are stopped, and the backup CPU is instructed to take over the control and read the current working information of the main CPU from the memory space; upon receiving the control transfer instruction, the control is taken over and the current working information of the backup CPU is read from the memory space; thereby quickly and effectively determining that the main CPU has failed, and the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring the high availability of the network.
[0034] Furthermore, before sending the periodic BFD data packet to the standby CPU, the method further includes:
[0035] A BFD parameter is received and configured to establish a BFD session connection with the standby CPU.
[0036] In the above implementation process, before the active CPU sends a data packet to the standby CPU, it is necessary to configure the BFD parameters of the active CPU and establish a BFD session connection between the active CPU and the standby CPU to achieve data packet transmission between the two.
[0037] Further, the receiving BFD parameters and configuring the BFD parameters to establish a BFD session connection with the standby CPU includes:
[0038] Receive the source IP address corresponding to the BFD session.
[0039] Configure the source IP address of the main CPU management interface;
[0040] The main CPU management interface is controlled to connect to the standby CPU management interface through a heartbeat line to establish a BFD session connection with the standby CPU.
[0041] In the above implementation process, the BFD parameters of the active CPU are configured, the active CPU and the standby CPU are connected through a heartbeat line, and a BFD session connection between the active CPU and the standby CPU is established to implement data packet transmission between the two.
[0042] Furthermore, the work information includes state information and session information.
[0043] In the above implementation process, the status information and session information of the main CPU are stored in the memory space, and the standby CPU reads the current status information and session information from the memory space when taking over control, thereby ensuring the normal operation of the switch and ensuring the high availability and stability of the network.
[0044] In a third aspect, an embodiment of the present application further provides a switch CPU fault monitoring and management method based on BFD, which is applied to a switch, wherein the switch includes a main CPU, a backup CPU and a memory space, and the method includes:
[0045] Writing working information to the memory space in real time by the main CPU;
[0046] Periodically sending a BFD data packet to the standby CPU through the main CPU;
[0047] When the time for the standby CPU to wait for the BFD data packet reaches a set condition, determining that the main CPU is faulty;
[0048] Taking over the control of the main CPU by the standby CPU and reading the current working information of the main CPU from the memory space;
[0049] When receiving the control right transfer instruction, the main CPU is controlled to take over the control right of the standby CPU and read the current working information of the standby CPU from the memory space.
[0050] In the above implementation process, the main CPU writes working information to the memory space in real time; the main CPU periodically sends BFD data packets to the backup CPU; when the time the backup CPU waits for the BFD data packet reaches the set condition, the main CPU is determined to be faulty; the backup CPU takes over the control of the main CPU and reads the current working information of the main CPU from the memory space; when a control transfer instruction is received, the main CPU is controlled to take over the control of the backup CPU and read the current working information of the backup CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring high availability of the network.
[0051] In a fourth aspect, an embodiment of the present application further provides a switch CPU fault monitoring and management device, which is integrated in a backup CPU of the switch, and the device includes:
[0052] A data receiving module is used to receive the bidirectional forwarding detection (BFD) data packets periodically sent by the main CPU;
[0053] A fault determination module, configured to determine that the main CPU is faulty when the time for waiting for a BFD data packet reaches a set condition;
[0054] A control takeover module, used to take over the control of the main CPU and read the current working information of the main CPU from the memory space;
[0055] The control transfer module is used to receive a control transfer instruction, instruct the main CPU to take over the control right and read the current working information of the standby CPU from the memory space.
[0056] In a fifth aspect, an embodiment of the present application further provides a switch CPU fault monitoring and management device, which is integrated in the main CPU of the switch, and the device includes:
[0057] An information writing module is used to write working information into the memory space in real time;
[0058] A data sending module, used for sending periodic BFD data packets to the standby CPU;
[0059] A fault indication module, used for stopping sending BFD data packets if a fault occurs, instructing the standby CPU to take over control and read the current working information of the main CPU from the memory space;
[0060] The transfer and takeover module is used to receive a control right transfer instruction, take over the control right and read the current working information of the standby CPU from the memory space.
[0061] In a sixth aspect, a switch CPU fault monitoring and management device based on BFD is integrated in a switch, wherein the switch includes a main CPU, a backup CPU and a memory space, wherein the main CPU is connected to the backup CPU and the memory space via a bus, and the backup CPU is connected to the memory space via a bus, wherein the device includes:
[0062] An information synchronization module, used for writing working information to the memory space in real time through the main CPU;
[0063] A data transceiver module, used for periodically sending BFD data packets to the standby CPU through the main CPU;
[0064] A fault monitoring module, used for determining that the main CPU fails when the time for the standby CPU to wait for the BFD data packet reaches a set condition;
[0065] A control reading module, used for taking over the control of the main CPU through the standby CPU and reading the current working information of the main CPU from the memory space;
[0066] The control takeover module is used to control the main CPU to take over the control right of the standby CPU and read the current working information of the standby CPU from the memory space when receiving the control right transfer instruction.
[0067] In a seventh aspect, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a server, the switch CPU fault monitoring and management method as described above is implemented.
[0068] In an eighth aspect, an embodiment of the present invention provides a computer program product, wherein the computer program product includes instructions, and when the instructions are executed by a computer, the computer implements the switch CPU fault monitoring and management method as described above. BRIEF DESCRIPTION OF THE DRAWINGS
[0069] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0070] Figure 1 A flow chart of a switch CPU fault monitoring and management method provided in an embodiment of the present application;
[0071] Figure 2 A flowchart of another switch CPU fault monitoring and management method provided in an embodiment of the present application;
[0072] Figure 3 A flowchart of another switch CPU fault monitoring and management method provided in an embodiment of the present application;
[0073] Figure 4 A flowchart of another switch CPU fault monitoring and management method provided in an embodiment of the present application;
[0074] Figure 5 A flowchart of another switch CPU fault monitoring and management method provided in an embodiment of the present application;
[0075] Figure 6 A schematic diagram of a flow chart of a switch CPU fault monitoring and management device provided in an embodiment of the present application;
[0076] Figure 7 A schematic diagram of the structure of another switch CPU fault monitoring and management device provided in an embodiment of the present application;
[0077] Figure 8 A schematic diagram of the structure of another switch CPU fault monitoring and management device provided in an embodiment of the present application;
[0078] Fig. 9A schematic diagram of the structure of another switch CPU fault monitoring and management device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0079] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.
[0080] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.
[0081] BFD (Bidirectional Forwarding Detection) is a state detection protocol used to quickly detect network connectivity.
[0082] QPI (Intel Quick Path Interconnect) is a point-to-point processor interconnect architecture developed and used by Intel to interconnect chips.
[0083] PCIE (peripheral component interconnect express) is a high-speed serial computer expansion bus standard.
[0084] Please see Figure 1 , Figure 1 A schematic diagram of a flow chart of a switch CPU fault monitoring and management method provided in an embodiment of the present application. The switch CPU fault monitoring and management method is used for the CPU of the switch, and includes:
[0085] 110. Receive a bidirectional forwarding detection (BFD) data packet periodically sent by the main CPU.
[0086] Specifically, BFD monitoring is enabled, and the standby CPU monitors whether the main CPU is faulty by receiving BFD data packets periodically sent by the main CPU. If the standby CPU regularly receives BFD data packets sent by the main CPU, it is determined that the main CPU is working normally. If the standby CPU does not regularly receive BFD data packets sent by the main CPU, it is determined that the main CPU is faulty and measures need to be taken to ensure the normal operation of the switch. Optionally, the embodiment of the present application takes over the work of the main CPU after the standby CPU determines that the main CPU has failed, thereby ensuring that the switch can communicate with other network devices normally and ensuring uninterrupted network flow.
[0087] 120. When the time for waiting for the BFD data packet reaches a set condition, determine that the main CPU is faulty.
[0088] Optionally, the standby CPU monitors whether the main CPU is faulty by receiving BFD data packets periodically sent by the main CPU. When the waiting time for the BFD data packet reaches a set condition, the main CPU is determined to be faulty. The set condition can be set according to specific needs. When the set condition is reached, the standby CPU does not periodically receive the BFD data packets sent by the main CPU, thereby determining that the main CPU is faulty.
[0089] 130. Take over the control of the main CPU and read the current working information of the main CPU from the memory space.
[0090] Specifically, when the backup CPU determines that the main CPU has failed, the backup CPU takes over the control of the main CPU so that the switch can operate normally, and reads the current working information of the main CPU from the memory space. The backup CPU synchronizes the current working information of the main CPU from the memory space, takes over the work of the main CPU, and communicates with other network devices based on the current working information, seamlessly switches control, and has no barriers to conversation, avoiding network interruption. In addition, the working information of the main CPU is written into the memory space in real time. Only when the main CPU fails, the backup CPU needs to read the current working information of the main CPU in the memory space to work the switch, ensuring that the work of the main CPU is quickly and effectively taken over while avoiding too much useless information being stored in the backup CPU, which affects the working efficiency of the backup CPU.
[0091] As described above, the embodiment of the present application receives a bidirectional forwarding detection BFD data packet periodically sent by the main CPU; when the waiting time for the BFD data packet reaches the set condition, it is determined that the main CPU has failed; the control of the main CPU is taken over and the current working information of the main CPU is read from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring the high availability of the network.
[0092] Based on the above embodiment, the switch CPU fault monitoring and management method can also be embodied as follows: when the waiting time for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes:
[0093] 1201. When the time for waiting for the BFD data packet exceeds the set time, mark the BFD protocol as an invalid state, and determine that the main CPU fails.
[0094] In the above implementation process, when the time that the standby CPU waits for the BFD data packet sent by the main CPU exceeds the set time, the BFD parameter is marked as down state, which means that the standby CPU has not received a BFD data packet, thereby determining that the main CPU is faulty. This can effectively monitor whether the main CPU has failed, thereby enhancing the accuracy of monitoring; wherein, the set time can be set according to specific needs.
[0095] Exemplarily, when the main CPU is set to send BFD packets to the backup CPU every 0.1ms, when the time the backup CPU waits for the BFD packets sent by the main CPU exceeds 0.1ms, it is determined that the main CPU is faulty; exemplary, when the main CPU is set to send BFD packets to the backup CPU every 0.11ms, when the time the backup CPU waits for the BFD packets sent by the main CPU exceeds 0.12ms, it is determined that the main CPU is faulty.
[0096] Based on the above embodiment, the switch CPU fault monitoring and management method can also be embodied as follows: when the waiting time for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes:
[0097] 12011. When the time for waiting for the BFD data packet exceeds the set time and the number of timeouts reaches the set number, the BFD protocol is marked as an invalid state and the main CPU is determined to be faulty.
[0098] Specifically, when the time that the standby CPU waits for the BFD data packet sent by the main CPU exceeds the set time and the number of timeouts reaches the set number, the BFD parameter is marked as down, thereby determining that the main CPU is faulty. This can effectively monitor whether the main CPU has failed, thereby enhancing the accuracy of monitoring; wherein, the set time and the set number of times can be set according to specific needs.
[0099] Exemplarily, when the main CPU is set to send BFD packets to the backup CPU every 0.1ms, when the time the backup CPU waits for the BFD packet sent by the main CPU exceeds 0.1ms and the number of timeouts reaches 1, it is determined that the main CPU is faulty; exemplary, when the main CPU is set to send BFD packets to the backup CPU every 0.1ms, when the time the backup CPU waits for the BFD packet sent by the main CPU exceeds 0.1ms and the number of timeouts reaches 2, it is determined that the main CPU is faulty; exemplary, when the main CPU is set to send BFD packets to the backup CPU every 0.11ms, when the time the backup CPU waits for the BFD packet sent by the main CPU exceeds 0.12ms and the number of timeouts reaches 3, it is determined that the main CPU is faulty.
[0100] Based on the above embodiment, the switch CPU fault monitoring and management method can also be embodied as follows: before receiving the bidirectional forwarding detection BFD data packet periodically sent by the main CPU, it also includes:
[0101] 210. Receive BFD parameters and configure the BFD parameters to establish a BFD session connection with the master CPU.
[0102] Among them, before the standby CPU receives the BFD data packet sent by the main CPU, it is necessary to first configure the BFD parameters of the main CPU and the BFD parameters of the standby CPU, and establish a BFD session connection between the main CPU and the standby CPU to achieve data packet transmission between the two; specifically, the standby CPU receives the BFD parameters and configures the BFD parameters to receive the BFD data packet sent by the main CPU. It can be understood that the BFD parameters can be an IP address corresponding to the BFD, or an identifier corresponding to the BFD, or other other methods that can achieve a BFD connection between the two CPUs.
[0103] Based on the above embodiments, Figure 2 A flow chart of another switch CPU fault monitoring and management method provided by an embodiment of the present application is given. The switch CPU fault monitoring and management method is a specific embodiment of the above switch CPU fault monitoring and management method. Figure 2 , the switch CPU fault monitoring and management method includes:
[0104] 211. Receive the target IP address corresponding to the BFD.
[0105] It can be understood that a BFD session is configured on a switch, and the source and destination addresses are specified. In a switch with a dual-CPU architecture, a BFD session needs to be established between the primary CPU and the backup CPU, and the BFD parameters of the primary CPU and the backup CPU need to be configured. The BFD IP addresses of the primary CPU and the backup CPU need to be configured respectively, wherein the backup CPU management interface receives the destination IP address corresponding to the BFD.
[0106] 212. Configure the target IP address of the standby CPU management interface.
[0107] Specifically, the standby CPU management interface receives the BFD target IP address, and configures the management interface according to the BFD target IP address to establish a BFD receiving protocol for the management interface, so as to subsequently receive BFD data packets sent by the active CPU.
[0108] 213. Control the standby CPU management interface to connect to the main CPU management interface through a heartbeat line to establish a BFD session connection with the main CPU.
[0109] Among them, the standby CPU management interface and the main CPU management interface can be connected through wireless communication or through wired communication. Optionally, the standby CPU management interface in the embodiment of the present application is connected to the main CPU management interface through a heartbeat line, combined with the BFD parameter settings for the standby CPU management interface and the main CPU management interface, so that the standby CPU management interface establishes a BFD session connection with the main CPU management interface, that is, the standby CPU establishes a BFD session connection with the main CPU; wherein, the heartbeat line can be a mainboard PCIE bus or a QPI bus. Optionally, the main CPU and the standby CPU are connected through the QPI bus to achieve fast transmission of data packets between the two.
[0110] As described above, the embodiment of the present application configures the BFD parameters of the standby CPU, connects the main CPU and the standby CPU through a heartbeat line, and establishes a BFD session connection between the main CPU and the standby CPU to achieve data packet transmission between the two.
[0111] Based on the above embodiment, the switch CPU fault monitoring and management method can also be embodied as follows: after taking over the control of the main CPU and reading the current working information of the main CPU from the memory space, it also includes:
[0112] 140. Record fault event logs and issue alarms.
[0113] It is understandable that after the standby CPU takes over the controller after monitoring that the main CPU has failed, a fault alarm is required to notify the administrator to handle the fault of the main CPU. Specifically, the standby CPU records the fault event log and issues an alarm to remind the administrator to handle the fault and ensure the availability of the network. Among them, the alarm can be issued in various forms. The standby CPU can be connected to the alarm module to issue an alarm, or the standby CPU can directly send information with the alarm to the display module or other modules from which the administrator can obtain the alarm information in time.
[0114] 150. Write working information to memory space in real time.
[0115] Optionally, after the standby CPU takes over control, it also writes work information into the memory space in real time during the working process, so as to ensure the synchronization of work information when the control is subsequently transferred to avoid network interruption.
[0116] 160. Receive a control transfer instruction, instruct the main CPU to take over the control and read the current working information of the standby CPU from the memory space.
[0117] Specifically, the administrator completes troubleshooting on the main CPU, and the standby CPU returns control after the main CPU is normal. That is, the standby CPU receives a control transfer instruction and instructs the main CPU to take over control to work, thereby ensuring normal operation of the switch.
[0118] Second, see Figure 3 , Figure 3 A schematic flow chart of a switch CPU fault monitoring and management method provided in an embodiment of the present application, the switch CPU fault monitoring and management method is used for the main CPU of the switch, and the method includes:
[0119] 310. Write working information to memory space in real time.
[0120] Specifically, during the working process, the main CPU writes the working information to the memory space in real time. When a failure occurs, the backup CPU can read the working information written by the main CPU from the memory space and synchronize the current working information of the main CPU to take over the work of the main CPU and ensure the normal operation and availability of the switch.
[0121] Optionally, the working information includes status information and session information, that is, the working information includes the working status of the main CPU, such as whether it is in the data receiving stage or the data sending stage, etc., and also includes the session information between the main CPU and other network devices, including session information such as requests, responses or other commands during the session with other network devices; wherein, the working status information and session information of the main CPU are stored in the memory space, and the standby CPU reads the current status information and session information from the memory space when taking over control, so as to ensure the normal operation of the switch and ensure the high availability and stability of the network.
[0122] 320. Send periodic BFD packets to the standby CPU.
[0123] Specifically, the main CPU establishes a BFD connection with the backup CPU, enables BFD monitoring, and the main CPU periodically sends BFD data packets to the backup CPU, instructing the backup CPU to monitor whether the main CPU is faulty based on the BFD data packets sent by the main CPU and take measures to deal with the failure of the main CPU; optionally, after the backup CPU in the embodiment of the present application monitors the failure of the main CPU, it takes over the work of the main CPU.
[0124] 330. If a failure occurs, stop sending BFD data packets, instruct the standby CPU to take over control and read the current working information of the main CPU from the memory space.
[0125] Specifically, if the main CPU fails, it cannot continue to work normally, nor can it continue to send BFD data packets to the backup CPU, that is, it stops sending BFD data packets to the backup CPU, indicating the backup CPU that the main CPU fails, so that the backup CPU takes over the control of the main CPU so that the switch can operate normally, and reads the current working information of the main CPU from the memory space. The backup CPU synchronizes the current working information of the main CPU from the memory space, takes over the work of the main CPU, and communicates with other network devices based on the current working information, seamlessly switches control, and has no obstacles in the conversation, avoiding network interruption; in addition, the working information of the main CPU is written into the memory space in real time. Only when the main CPU fails, the backup CPU needs to read the current working information of the main CPU in the memory space to work the switch, ensuring that the work of the main CPU is quickly and effectively taken over, while avoiding too much useless information from being stored in the backup CPU, affecting the working efficiency of the backup CPU.
[0126] 340. Receive a control transfer instruction, take over the control and read the current working information of the standby CPU from the memory space.
[0127] As described above, the embodiment of the present application writes working information to the memory space in real time; sends periodic BFD data packets to the backup CPU; if a fault occurs, stops sending BFD data packets, instructs the backup CPU to take over control and reads the current working information of the main CPU from the memory space; receives a control transfer instruction, takes over control and reads the current working information of the backup CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring high availability of the network.
[0128] Based on the above embodiment, the switch CPU fault monitoring and management method can also be embodied as follows: before sending the periodic BFD data packet to the standby CPU, it also includes:
[0129] 410. Receive BFD parameters and configure the BFD parameters to establish a BFD session connection with the standby CPU.
[0130] Among them, before the main CPU sends a BFD data packet to the standby CPU, it is necessary to first configure the BFD parameters of the main CPU and the BFD parameters of the standby CPU, and establish a BFD session connection between the main CPU and the standby CPU to realize data packet transmission between the two; specifically, the main CPU receives the BFD parameters and configures the BFD parameters to send a BFD data packet to the standby CPU. It can be understood that the BFD parameters can be an IP address corresponding to the BFD, or an identifier corresponding to the BFD, or other other methods that can realize the BFD connection between the two CPUs.
[0131] As described above, before the main CPU sends a data packet to the backup CPU, the embodiment of the present application needs to configure the BFD parameters of the main CPU respectively and establish a BFD session connection between the main CPU and the backup CPU to realize data packet transmission between the two.
[0132] Exemplarily, the main CPU is responsible for daily network management, and the standby CPU takes over network operations when the main CPU fails. The main CPU and the standby CPU are connected through a dedicated communication path heartbeat line. The BFD session is configured on the main CPU and the standby CPU, and the detection interval and timeout setting duration are set to obtain the BFD Agent of the main CPU and the BFD Agent of the standby CPU; the BFD Agent of the main CPU periodically sends BFD data packets, and the BFD Agent of the standby CPU listens and responds. If the received data packet times out, the main CPU is determined to be faulty. If the main CPU fails, the standby CPU records the fault event and notifies the administrator through logs or alarms, and then takes over the network traffic; after the main CPU returns to normal, the system restores its role through a clear process and ensures the consistency of the network status. Among them, the main CPU and the standby CPU are on the same switch motherboard, and can use the motherboard PCIE bus to communicate directly, or use QPI connection bus technology to meet the requirements of high bandwidth and low latency.
[0133] Based on the above embodiments, Figure 4 A flow chart of another switch CPU fault monitoring and management method provided by an embodiment of the present application is given. The switch CPU fault monitoring and management method is a specific embodiment of the above switch CPU fault monitoring and management method. Figure 4 , the switch CPU fault monitoring and management method includes:
[0134] 411. Receive the source IP address corresponding to the BFD.
[0135] It can be understood that to configure the parameters of the main CPU and the standby CPU, it is necessary to configure the BFD IP addresses of the main CPU and the standby CPU respectively, wherein the main CPU management interface receives the BFD target source address, and the standby CPU management interface receives the target IP address corresponding to the BFD, so that the main CPU sends BFD data packets to the standby CPU.
[0136] 412. Configure the source IP address of the main CPU management interface.
[0137] Specifically, the active CPU management interface receives the BFD source IP address, and configures the management interface according to the BFD source IP address to establish a BFD receiving protocol for the management interface, so as to subsequently send a BFD data packet to the standby CPU.
[0138] 413. Control the management interface of the main CPU to connect to the management interface of the standby CPU through a heartbeat line to establish a BFD session connection with the standby CPU.
[0139] Among them, the main CPU management interface and the backup CPU management interface can be connected through wireless communication or through wired communication. Optionally, the main CPU management interface of the embodiment of the present application is connected to the backup CPU management interface through a heartbeat line, combined with the BFD parameter settings for the main CPU management interface and the backup CPU management interface, so that the main CPU management interface establishes a BFD session connection with the backup CPU management interface, that is, the main CPU establishes a BFD session connection with the backup CPU; wherein, the heartbeat line can be a mainboard PCIE bus or a QPI bus. Optionally, the main CPU and the backup CPU are connected through the QPI bus to achieve fast transmission of data packets between the two.
[0140] As described above, the embodiment of the present application configures the BFD parameters of the main CPU, connects the main CPU and the backup CPU through a heartbeat line, and establishes a BFD session connection between the main CPU and the backup CPU to achieve data packet transmission between the two.
[0141] As described above, the embodiment of the present application writes working information to the memory space in real time; sends periodic BFD data packets to the backup CPU; if a fault occurs, stops sending BFD data packets, instructs the backup CPU to take over control and reads the current working information of the main CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed. At the same time, the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring high availability of the network.
[0142] The above steps are not to be performed in a strict order as described in the numbers, but should be understood as an overall solution.
[0143] Third, see Figure 5 , Figure 5 A flow chart of a switch CPU fault monitoring and management method provided in an embodiment of the present application, the switch CPU fault monitoring and management method is applied to a switch, the switch includes a main CPU, a backup CPU and a memory space, the method includes:
[0144] 510. Writing working information into the memory space in real time via the main CPU.
[0145] 520. Periodically send a BFD data packet to the standby CPU through the primary CPU.
[0146] 530. When the time for the standby CPU to wait for the BFD data packet reaches a set condition, it is determined that the main CPU is faulty.
[0147] 540. Take over the control of the main CPU through the standby CPU and read the current working information of the main CPU from the memory space.
[0148] 550. When receiving a control transfer instruction, control the main CPU to take over the control of the standby CPU and read the current working information of the standby CPU from the memory space.
[0149] As described above, the embodiment of the present application writes working information to the memory space in real time through the main CPU; periodically sends BFD data packets to the backup CPU through the main CPU; when the time the backup CPU waits for the BFD data packet reaches a set condition, determines that the main CPU is faulty; takes over the control of the main CPU through the backup CPU and reads the current working information of the main CPU from the memory space; when receiving a control transfer instruction, controls the main CPU to take over the control of the backup CPU and reads the current working information of the backup CPU from the memory space; thereby realizing rapid and effective judgment of the failure of the main CPU, and at the same time, the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, thereby ensuring high availability of the network.
[0150] In a fourth aspect, based on the above embodiments, the present application also provides a switch CPU fault monitoring and management device, which is integrated into the backup CPU of the switch, referring to Figure 6 The switch CPU fault monitoring and management device provided in this embodiment specifically includes: a first connection module 601, a data receiving module 602, a fault determination module 603, a control takeover module 604 and a control transfer module 605.
[0151] Among them, the first connection module 601 is used to receive BFD parameters and configure the BFD parameters to establish a BFD session connection with the main CPU; the data receiving module 602 is used to receive the bidirectional forwarding detection BFD data packets periodically sent by the main CPU; the fault determination module 603 is used to determine the fault of the main CPU when the waiting time for the BFD data packet reaches the set condition; the control takeover module 604 is used to take over the control of the main CPU and read the current working information of the main CPU from the memory space; the control transfer module 605 is used to receive the control transfer instruction, instructing the main CPU to take over the control and read the current working information of the backup CPU from the memory space.
[0152] As described above, the embodiment of the present application receives a bidirectional forwarding detection BFD data packet periodically sent by the main CPU; when the waiting time for the BFD data packet reaches the set condition, it is determined that the main CPU is faulty; the control of the main CPU is taken over and the current working information of the main CPU is read from the memory space; a control transfer instruction is received, instructing the main CPU to take over the control and read the current working information of the backup CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring high availability of the network.
[0153] In a fifth aspect, based on the above embodiments, the present application also provides a switch CPU fault monitoring and management device, which is integrated in the main CPU of the switch, referring to Figure 7 The switch CPU fault monitoring and management device provided in this embodiment specifically includes: an information writing module 701, a second connection module 702, a data sending module 703, a fault indication module 704 and a transfer and takeover module 705.
[0154] Among them, the information writing module 701 is used to write working information to the memory space in real time; the second connection module 702 is used to receive BFD parameters and configure the BFD parameters to establish a BFD session connection with the backup CPU; the data sending module 703 is used to send periodic BFD data packets to the backup CPU; the fault indication module 704 is used to stop sending BFD data packets if a fault occurs, instruct the backup CPU to take over control and read the current working information of the main CPU from the memory space; the transfer takeover module 705 is used to receive a control transfer instruction, take over control and read the current working information of the backup CPU from the memory space.
[0155] As described above, the embodiment of the present application writes working information to the memory space in real time; sends periodic BFD data packets to the backup CPU; if a fault occurs, stops sending BFD data packets, instructs the backup CPU to take over control and reads the current working information of the main CPU from the memory space; receives a control transfer instruction, takes over control and reads the current working information of the backup CPU from the memory space; thereby quickly and effectively determining that the main CPU has failed, and at the same time the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, ensuring high availability of the network.
[0156] In a sixth aspect, based on the above embodiments, the present application also provides a switch CPU fault monitoring and management device based on BFD, which is integrated in the switch. Figure 8 The switch 80 includes a main processor 81 (equivalent to a main CPU), a slave processor 82 (equivalent to a backup CPU) and at least one memory 83 (equivalent to a memory space). The main CPU is connected to the backup CPU and the memory space via a bus, and the backup CPU is connected to the memory space via a bus. Please refer to Fig. 9 The device includes: an information synchronization module 901, a third connection module 902, a data transceiver module 903, a fault monitoring module 904, a control reading module 905 and a control takeover module 906.
[0157] Among them, the information synchronization module 901 is used to write working information to the memory space in real time through the main CPU; the third connection module 902 is used to receive BFD parameters and configure the BFD parameters of the main CPU and the BFD parameters of the backup CPU to establish a BFD session connection between the main CPU and the backup CPU; the data transceiver module 903 is used to periodically send BFD data packets to the backup CPU through the main CPU; the fault monitoring module 904 is used to determine that the main CPU is faulty when the time for the backup CPU to wait for the BFD data packet reaches a set condition; the control reading module 905 is used to take over the control of the main CPU through the backup CPU and read the current working information of the main CPU from the memory space; the control takeover module 906 is used to control the main CPU to take over the control of the backup CPU and read the current working information of the backup CPU from the memory space when a control transfer instruction is received.
[0158] The bus between the main CPU and the standby CPU may be a heartbeat line. Optionally, the heartbeat line may be a mainboard PCIE bus or a QPI bus.
[0159] It is understandable that the memory space can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory. The memory space can also be optionally at least one storage device located away from the aforementioned main CPU and backup CPU. The memory space stores computer-readable instructions. When the computer-readable instructions are executed by the main CPU and the backup CPU, the above-mentioned Figure 5 In the method process shown, optionally, the main CPU and the backup CPU may share a storage space to execute the computer-readable instructions, or may respectively execute the computer-readable instructions through a storage space.
[0160] As described above, the embodiment of the present application writes working information to the memory space in real time through the main CPU; periodically sends BFD data packets to the backup CPU through the main CPU; when the time the backup CPU waits for the BFD data packet reaches a set condition, determines that the main CPU has failed; takes over the control of the main CPU through the backup CPU and reads the current working information of the main CPU from the memory space; when receiving a control transfer instruction, controls the main CPU to take over the control of the backup CPU and reads the current working information of the backup CPU from the memory space; thereby realizing rapid and effective judgment of the failure of the main CPU, and at the same time, the backup CPU can quickly synchronize the current working information of the main CPU and take over the work of the main CPU, thereby ensuring high availability of the network.
[0161] Exemplarily, the main CPU is responsible for daily network management, and the standby CPU takes over network operations when the main CPU fails. The main CPU and the standby CPU are connected through a dedicated communication path heartbeat line. The BFD session is configured on the main CPU and the standby CPU, and the detection interval and timeout setting duration are set to obtain the BFD Agent of the main CPU and the BFD Agent of the standby CPU; the BFD Agent of the main CPU periodically sends BFD data packets, and the BFD Agent of the standby CPU listens and responds. If the received data packet times out, the main CPU is determined to be faulty. If the main CPU fails, the standby CPU records the fault event and notifies the administrator through logs or alarms, and then takes over the network traffic; after the main CPU returns to normal, the system restores its role through a clear process and ensures the consistency of the network status. Among them, the main CPU and the standby CPU are on the same switch motherboard, and can use the motherboard PCIE bus to communicate directly, or use QPI connection bus technology to meet the requirements of high bandwidth and low latency.
[0162] The switch provided in the embodiment of the present application can be used to execute the switch CPU fault monitoring and management method provided in the above embodiment, and has corresponding functions and beneficial effects.
[0163] In the seventh aspect, an embodiment of the present application also provides a computer-readable storage medium, which includes a stored computer program; wherein, when the computer program is running, the device where the computer-readable storage medium is located is controlled to execute the switch CPU fault monitoring management method as described above, and can achieve the same beneficial effects.
[0164] Of course, the storage medium containing computer executable instructions provided in the embodiment of the present application is not limited to the switch CPU fault monitoring and management method described above, and can also execute related operations in the switch CPU fault monitoring and management method provided in any embodiment of the present application.
[0165] In an eighth aspect, the embodiments of the present application also provide a computer program product, and the methods described in the various embodiments of the present application can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instruction is loaded and executed on a computer, the processes or functions described in the various embodiments of the present application are executed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, a core network device, an OAM (Open Application Model) or other programmable device.
[0166] The computer program or instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program or instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it may also be an optical medium, such as a digital video disk; it may also be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium may be a volatile or non-volatile storage medium, or may include both volatile and non-volatile types of storage media.
[0167] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.
[0168] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
[0169] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.
[0170] The above description is only an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.
[0171] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0172] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
Claims
1. A switch CPU fault monitoring and management method based on BFD, characterized in that: Applied to a switch, the switch includes a main CPU, a backup CPU and a memory space, and the method includes: Writing working information to the memory space in real time by the main CPU; Receiving BFD parameters and configuring the BFD parameters of the master CPU and the BFD parameters of the standby CPU to establish a BFD session connection between the master CPU and the standby CPU; Periodically sending a BFD data packet to the standby CPU through the main CPU; When the time for the standby CPU to wait for the BFD data packet reaches a set condition, determining that the main CPU is faulty; If a failure occurs, control the main CPU to stop sending BFD data packets to the standby CPU; Taking over the control of the main CPU by the standby CPU and reading the current working information of the main CPU from the memory space; When receiving a control transfer instruction, controlling the main CPU to take over the control of the standby CPU and reading the current working information of the standby CPU from the memory space; The receiving of BFD parameters and configuring the BFD parameters of the master CPU and the BFD parameters of the standby CPU to establish a BFD session connection between the master CPU and the standby CPU includes: Receive, by the main CPU, a source IP address corresponding to the BFD; Receiving, by the standby CPU, a target IP address corresponding to the BFD; Configure the source IP address of the active CPU management interface and the target IP address of the standby CPU management interface; Control the main CPU management interface to connect to the standby CPU management interface via a heartbeat line to establish a BFD session connection between the main CPU and the standby CPU; wherein the heartbeat line is a QPI bus; When the time for the standby CPU to wait for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes: When the time length for the standby CPU to wait for the BFD data packet exceeds the set time length and the number of timeouts reaches 2 times, the BFD protocol is marked as an invalid state, and the main CPU is determined to be faulty.
2. The switch CPU fault monitoring and management method according to claim 1, characterized in that: After the standby CPU takes over the control of the main CPU and reads the current working information of the main CPU from the memory space, the method further includes: Record fault event logs and issue alarms; Write working information to the memory space in real time.
3. The switch CPU fault monitoring and management method according to claim 1, characterized in that: The work information includes state information and session information.
4. A switch CPU fault monitoring and management device based on BFD, used to implement the switch CPU fault monitoring and management method as described in any one of claims 1 to 3, characterized in that: Integrated in a switch, the switch includes a main CPU, a backup CPU and a memory space, the main CPU is connected to the backup CPU and the memory space via a bus, the backup CPU is connected to the memory space via a bus, and the device includes: An information synchronization module, used for writing working information to the memory space in real time through the main CPU; A third connection module, used for receiving BFD parameters and configuring the BFD parameters of the master CPU and the BFD parameters of the standby CPU to establish a BFD session connection between the master CPU and the standby CPU; A data transceiver module, used for periodically sending BFD data packets to the standby CPU through the main CPU; A fault monitoring module, used for determining that the main CPU fails when the time for the standby CPU to wait for the BFD data packet reaches a set condition; A fault operation module, used for controlling the main CPU to stop sending BFD data packets to the standby CPU if a fault occurs; A control reading module, used for taking over the control of the main CPU through the standby CPU and reading the current working information of the main CPU from the memory space; A control takeover module, used for controlling the main CPU to take over the control right of the standby CPU and reading the current working information of the standby CPU from the memory space when receiving a control right transfer instruction; The receiving of BFD parameters and configuring the BFD parameters of the master CPU and the BFD parameters of the standby CPU to establish a BFD session connection between the master CPU and the standby CPU includes: Receive, by the main CPU, a source IP address corresponding to the BFD; Receiving, by the standby CPU, a target IP address corresponding to the BFD; Configure the source IP address of the active CPU management interface and the target IP address of the standby CPU management interface; Control the main CPU management interface to connect to the standby CPU management interface via a heartbeat line to establish a BFD session connection between the main CPU and the standby CPU; wherein the heartbeat line is a QPI bus; When the time for the standby CPU to wait for the BFD data packet reaches a set condition, determining that the main CPU is faulty includes: When the time length for the standby CPU to wait for the BFD data packet exceeds the set time length and the number of timeouts reaches 2 times, the BFD protocol is marked as an invalid state, and the main CPU is determined to be faulty.
5. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by the server, the switch CPU fault monitoring and management method according to any one of claims 1 to 3 is implemented.
6. A computer program product, characterized in that The computer program product comprises instructions which, when executed by a computer, cause the computer to implement the method according to any one of claims 1-3.
