Testing and calibration method for visible and near-infrared detector arrays

Abstract

The present disclosure discloses a method for testing and calibrating a visible near-infrared detector array, which is applied to a terminal device in a test and calibration system, including: displaying a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select a test parameter; sending the test parameter selected by the parameter selection control to a control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal based on the received test parameter to test the detector array to be tested; displaying a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes the performance parameters obtained by the control module. In this way, precise control of test parameters and signals can be achieved, and the performance of the detector array can be evaluated more accurately; the user can select different test parameters through the human-computer interaction interface; the test results can be displayed in real time, so that the user can understand the performance status of the detector array in a timely manner.

Description

Technical Field

[0001] The present disclosure relates to the field of measurement and calibration technology, and in particular to a test and calibration method for a visible-near-infrared detector array. Background Art

[0002] A single-photon avalanche photodiode (SPAPD) is a semiconductor optoelectronic device with internal photocurrent gain, capable of detecting extremely weak optical signals at the single-photon energy level. Its avalanche effect, a mechanism that causes PN junction breakdown, exploits the impact ionization of photogenerated carriers within the diode's depletion layer to achieve avalanche multiplication of the photocurrent. When the bias voltage is high enough and the internal electric field in the space charge region of a reverse-biased PN junction is strong enough, the electron-hole pairs generated by impact ionization are continuously heated by the electric field, generating new hole-electron pairs. These new hole-electron pairs then undergo further impact ionization, generating even more hole-electron pairs. Continued impact ionization significantly increases the number of carriers, ultimately generating an avalanche current under the influence of the electric field. At this point, the SPAPD operates in Geiger mode (also known as single-photon mode). In this mode, the internal gain of the SPAPD can reach over 106.

[0003] However, existing SPAD device parameters require different measurement instruments, including a multimeter and peripheral circuits. While multimeters offer high precision, they are also expensive, far exceeding the requirements of a SPAD device test system. Therefore, a high-precision, low-cost, and easy-to-use integrated detector calibration method is highly desirable. Summary of the Invention

[0004] This disclosure section is provided to briefly introduce concepts that will be described in detail in the detailed description section below. This disclosure section is not intended to identify key features or essential features of the claimed technical solution, nor is it intended to limit the scope of the claimed technical solution.

[0005] The embodiments of the present disclosure provide a test and calibration method for a visible-near-infrared detector array, which can improve the user experience of the test and calibration method for a visible-near-infrared detector array, improve its functionality, and facilitate user operation.

[0006] In a first aspect, an embodiment of the present application provides a test and calibration method for a visible-near-infrared detector array, which is applied to a terminal device in a test and calibration system, wherein the terminal device is connected to a control module of the test and calibration system, and the test and calibration system includes: a terminal device; an array fixing module for fixing the detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing the photons output by the photon generator onto the photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning the detectors in the detector array to be tested and outputting an electrical signal; a control module for generating performance parameters of the detector array to be tested based on the electrical signal; and the method includes: displaying a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select a test parameter; sending the test parameter selected by the parameter selection control to the control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal according to the received test parameter to test the detector array to be tested; and displaying a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes the performance parameters obtained by the control module.

[0007] In an optional embodiment of the first aspect, the performance parameter includes a dark count rate; and the performance parameter display sub-interface displayed on the human-computer interaction interface includes: receiving and displaying the dark count rate, wherein the dark count rate is generated by: placing the optical focusing module, high-voltage bias circuit, array scanning module, and control module of the system in a dark room; when the detector array to be tested is in the dark room and no light is added, the signal extraction and identification module transmits the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain a dark count, and generates a dark count rate based on the dark count.

[0008] In an optional embodiment of the first aspect, the performance parameters include a dark count rate; and the performance parameter display sub-interface displayed in the human-computer interaction interface includes: receiving and displaying a light count rate, wherein the light count rate is generated in the following manner: the detector array to be tested receives one or more photons in the detection gate, and the signal extraction and identification uses an edge latch method to transmit the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain a light count, and generates a light count rate based on the light count.

[0009] In an optional implementation of the first aspect, the performance parameter includes an afterpulse probability; and displaying the performance parameter display sub-interface on the human-computer interaction interface includes:

[0010] Receive and display a post-pulse probability, wherein the post-pulse probability is generated by: the detector array to be tested receives one or more photons within a detection gate, and the signal extraction and identification utilizes a double-gating method to transmit the obtained pulse signal to a control module; the control module counts the number of pulses of the counting pulse to obtain the number of post-pulses, and generates the post-pulse probability based on the number of post-pulses.

[0011] In an optional implementation of the first aspect, the test parameters selected by the parameter selection control are sent to the control module of the test calibration system, including: displaying candidate test schemes, wherein the candidate test schemes are associated with a test parameter set; determining a target test scheme from the candidate test schemes based on user selection, and displaying a target test parameter set associated with the target test scheme; and sending the target test parameter set to the control module of the test calibration system.

[0012] In an optional embodiment of the first aspect, the test scheme includes testing using M sets of test parameters; wherein, sending the test parameters selected by the parameter selection control to the control module of the test calibration system includes: transmitting N test parameters to the control module, wherein the control module adjusts the output control signal according to the test parameters, generates test results, and sends the test results to the terminal device for display; in response to receiving the test results, transmitting the N+1th set of test parameters to the test module, wherein N is greater than or equal to 1 and less than or equal to M-1.

[0013] In an optional implementation of the first aspect, the test parameters include one or more of the following: a parameter for controlling the pulse width of the gate signal generated by the module, and a parameter for controlling the repetition frequency of the gate signal generated by the module.

[0014] In a second aspect, an embodiment of the present application provides a test and calibration device for a visible near-infrared detector array, which is applied to a terminal device in a test and calibration system. The terminal device is connected to a control module of the test and calibration system. The test and calibration system includes: a terminal device; an array fixing module for fixing the detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing the photons output by the photon generator onto the photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning the detectors in the detector array to be tested and outputting electrical signals; and a control module. , used to generate performance parameters of the detector array to be tested based on the electrical signal; and the test calibration device includes: a first display unit, used to display a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select test parameters; a sending unit, used to send the test parameters selected by the parameter selection control to the control module of the test calibration system, wherein the control module of the test calibration system generates a test signal according to the received test parameters to test the detector array to be tested; a second display unit, used to display a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes the performance parameters obtained by the control module.

[0015] In a third aspect, an embodiment of the present disclosure provides an electronic device comprising: one or more processors; a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the test calibration method as described in the first aspect.

[0016] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the test and calibration method as described in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other features, advantages, and aspects of the various embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and that the originals and elements are not necessarily drawn to scale.

[0018] Figure 1 is a flow chart of an embodiment of a test calibration method according to the present disclosure;

[0019] Figure 2 is a structural schematic diagram of an embodiment of a test and calibration device according to the present disclosure;

[0020] Figure 3is an exemplary system architecture to which the test calibration method of an embodiment of the present disclosure may be applied;

[0021] Figure 4 It is a schematic diagram of the basic structure of an electronic device provided according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0023] It should be understood that the various steps described in the method embodiments of the present disclosure may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this respect.

[0024] As used herein, the term "including" and its variations are open-ended, i.e., "including but not limited to." The term "based on" means "based, at least in part, on." The term "one embodiment" means "at least one embodiment," the term "another embodiment" means "at least one additional embodiment," and the term "some embodiments" means "at least some embodiments." Other terms are defined in the following description.

[0025] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0026] It should be noted that the modifications of "one" and "multiple" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, they should be understood as "one or more".

[0027] Please refer to the figure for an overall view of a test and calibration method for a visible-near-infrared detector array provided in an embodiment of this application.

[0028] Please refer to Figure 1 , which shows the process of an embodiment of a test and calibration method for a visible near-infrared detector array according to the present disclosure.

[0029] This test and calibration method can be applied to a terminal device in a test and calibration system. The terminal device is connected to a control module of the test and calibration system. The test and calibration system includes: a terminal device; an array fixing module for fixing the detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing the photons output by the photon generator onto the photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning the detectors in the detector array to be tested and outputting electrical signals; and a control module for generating performance parameters of the detector array to be tested based on the electrical signals.

[0030] like Figure 1 The test and calibration method of the visible near-infrared detector array shown includes the following steps:

[0031] Step 101: Display a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select a test parameter.

[0032] Step 102: Send the test parameters selected by the parameter selection control to the control module of the test and calibration system.

[0033] The control module of the test and calibration system generates a test signal according to the received test parameters to test the detector array to be tested.

[0034] Step 103: Display the performance parameter display sub-interface on the human-computer interaction interface.

[0035] Here, the performance parameter display sub-interface includes the performance parameters obtained by the control module.

[0036] Here, terminal equipment refers to the equipment connected to the test and calibration system, which may include a user interface for displaying and inputting test parameters.

[0037] Here, the array fixing module is used to stably fix the detector array to be tested to ensure that its position remains unchanged during the test.

[0038] Here, the single-photon source module is used to generate near-infrared photons or visible light photons of a specific wavelength as the light source for the test.

[0039] Optical focusing module: focuses the photons generated by the single-photon source module onto the photosensitive surface of the detector array to be tested.

[0040] Here, the high-voltage bias circuit: provides the necessary voltage to enable the detectors in the detector array to operate properly and respond to light signals.

[0041] Here, the array scanning module scans each detector in the detector array to detect its response and output a corresponding electrical signal.

[0042] Here, the control module: receives test parameters, generates test signals, and processes the electrical signals of the detector array to generate performance parameters.

[0043] Here, human-computer interaction interface: the interface for users to interact with the system, used to display test parameter selection controls and performance parameter display sub-interface.

[0044] In some scenarios, the user selects the desired test parameters through a human-computer interface. These parameters are then sent to the control module. The control module generates test signals based on these parameters and tests the detector array using the single-photon source module, optical focusing module, and other components. The array scanning module detects the response of each detector and outputs an electrical signal. The control module processes these signals to generate and display the performance parameters of the detector array.

[0045] In this way, the performance of the detector array can be evaluated more accurately by precisely controlling the test parameters and signals; the automated test process reduces human errors and improves test efficiency; users can select different test parameters through the human-computer interaction interface to adapt to different test needs; the test results can be displayed in real time, allowing users to promptly understand the performance status of the detector array; multiple modules and functions are integrated to form a complete test and calibration system, which improves the comprehensiveness and reliability of the test.

[0046] In some embodiments, the performance parameter includes a dark count rate.

[0047] Step 103 includes receiving and displaying a dark count rate, wherein the dark count rate is generated by placing the optical focusing module, high-voltage bias circuit, array scanning module, and control module of the system in a darkroom; when the detector array to be tested is in the darkroom and no light is applied, the signal extraction and identification module transmits the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain a dark count, and generates a dark count rate based on the dark count.

[0048] Here, the dark count rate can refer to the signal count rate generated by the detector array in the absence of external light source illumination, which is usually related to the dark current and noise of the detector.

[0049] Here, the darkroom may refer to a completely dark or similar environment, which is used to simulate the working state of the detector in the absence of light.

[0050] Here, the signal extraction and identification module is used to extract useful pulse signals from the signals received by the detector array and perform identification to distinguish between noise and valid signals.

[0051] Here, a pulse signal can refer to the electrical signal generated by the detector in response to external stimuli (such as photons), which usually manifests as a brief change in voltage or current.

[0052] Here, the number of pulses may refer to the total number of pulse signals received within a certain period of time.

[0053] Here, the control module can be responsible for counting the number of pulses and generating a dark count rate based on this.

[0054] In some scenarios, all relevant modules in the test and calibration system (optical focusing module, high-voltage bias circuit, array scanning module, control module) are placed in a darkroom. The detector array to be tested is placed in a darkroom and ensured that there is no external light source. The signal extraction and identification module receives the pulse signal from the detector array and performs identification. The identified pulse signal is transmitted to the control module. The control module counts the number of pulses received within a certain period of time, that is, the dark count. The control module calculates the dark count rate based on the dark count.

[0055] This allows testing in complete darkness, allowing for more accurate measurement of the detector's dark count rate, thereby evaluating its performance in the absence of light. The dark count rate is an important indicator for evaluating detector noise levels and helps understand the detector's signal-to-noise ratio in practical applications. By measuring the dark count rate, the detector system can be optimized to reduce unnecessary noise and improve detection sensitivity. Dark count rate measurement is part of quality control, helping to ensure that the detector array meets specific performance standards. An abnormally high dark count rate may indicate a defective or damaged detector, facilitating rapid diagnosis of the problem. This method allows for the effective evaluation and control of the performance of the detector array in the absence of light, which is crucial for improving detector reliability and accuracy.

[0056] In some embodiments, the performance parameter includes a dark count rate.

[0057] In some embodiments, step 103 includes: receiving and displaying a light count rate, wherein the light count rate is generated by: the detector array to be tested receives one or more photons within the detection gate, and the signal extraction and identification utilizes edge latching to transmit the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain a light count, and generates a light count rate based on the light count.

[0058] Here, the light count rate can refer to the signal count rate generated by the detector array when it receives photons, which is one of the key parameters for evaluating detector performance.

[0059] Here, the detection gate may refer to the detection window or detection area of ​​the detector array, which is the entrance for photons to enter the detector array.

[0060] Here, signal extraction and identification can be used to extract useful pulse signals from the signals received by the detector array and identify the real photon signals.

[0061] Here, the edge latching method is a signal processing technology used to lock and transmit a signal when the rising edge or falling edge of the signal occurs to reduce noise and improve signal accuracy.

[0062] Here, the pulse signal can refer to the electrical signal generated by the detector when it responds to photons, which manifests as a brief change in voltage or current.

[0063] Here, the number of pulses may refer to the total number of pulse signals received within a certain period of time.

[0064] The control module may be responsible for counting the number of pulses and generating a light count rate based thereon.

[0065] In some scenarios, the detector array under test is positioned within the appropriate detection gate, ready to receive photons. When the detector array receives one or more photons, it generates a pulse signal. The signal extraction and identification module processes these pulse signals using edge latching to improve signal accuracy and reliability. The processed pulse signals are transmitted to the control module. The control module counts the number of pulses received within a certain period of time, known as the light count. Based on the light counts, the control module calculates the light count rate and displays it.

[0066] This approach can reduce noise interference and improve signal accuracy through edge latching. Real-time display of the light count rate helps monitor the performance and stability of the detector array. The light count rate is an important indicator for evaluating the detector array's ability to respond to light signals, helping to understand its performance in practical applications. By measuring the light count rate, the design of the detector array can be optimized to improve its detection efficiency and sensitivity. Abnormal light count rates may indicate a detector problem, facilitating rapid diagnosis and resolution. This method effectively evaluates the performance of the detector array when receiving light signals, which is crucial for improving the reliability and accuracy of detectors.

[0067] In some embodiments, the performance parameter comprises an afterpulse probability.

[0068] In some embodiments, step 102 may include: receiving and displaying a post-pulse probability, wherein the post-pulse probability is generated in the following manner: the detector array to be tested receives one or more photons within a detection gate, and the signal extraction and identification utilizes a double-gating method to transmit the obtained pulse signal to a control module; the control module counts the number of pulses of the counting pulse to obtain a post-pulse number, and generates a post-pulse probability based on the post-pulse number.

[0069] Here, the afterpulse probability refers to the possibility of generating an additional pulse (afterpulse) after the detector array receives a photon, which is an important parameter for evaluating the performance of the detector.

[0070] Here, double gating is a signal processing technique that distinguishes real signals from noise by detecting pulse signals in two time windows.

[0071] Here, the number of afterpulses may refer to the number of additional pulses generated after a photon is received by the detector.

[0072] Here, the control module can be used as the core component of the system to count the number of pulses and generate the probability of post-pulse.

[0073] In some scenarios, detection gates can be set for the detector array under test to prepare for photon reception. When the detector array receives a photon, a pulse signal is generated. The signal extraction and identification module uses a dual-gating method to filter out true pulse signals and transmits them to the control module. The control module counts the number of additional pulses generated after receiving each photon, i.e., the number of postpulses. Based on the number of postpulses, the control module calculates the postpulse probability. The postpulse probability is displayed on the user interface for analysis by the operator or automated system.

[0074] Therefore, afterpulse probability provides information about the detector's noise level and stability. Noise reduction can improve the detector's signal-to-noise ratio by identifying and reducing afterpulsing. Understanding afterpulse probability helps select or design more reliable detector technology. Measuring afterpulse probability can guide detector design to reduce the probability of afterpulsing. Abnormal afterpulse probability may indicate a detector defect or require maintenance. Measuring afterpulse probability provides a more comprehensive understanding of detector array performance, particularly in demanding applications such as low-light or single-photon detection. This method is crucial for ensuring high detector accuracy and reliability.

[0075] In some embodiments, step 101 may include: displaying candidate test schemes, wherein the candidate test schemes are associated with a test parameter set; determining a target test scheme from the candidate test schemes based on user selection, and displaying a target test parameter set associated with the target test scheme; and sending the target test parameter set to the control module of the test calibration system.

[0076] Here, candidate test scenarios may refer to a set of predefined test scenarios for users to select based on specific requirements.

[0077] Here, the test parameter set may refer to a set of parameters associated with each candidate test scenario, where these parameters define specific conditions and settings for the test.

[0078] Here, the target test scenario may refer to a specific test scenario selected by a user from candidate test scenarios for performing actual testing.

[0079] Here, the target test parameter set may refer to a parameter set associated with a target test scenario, and these parameters will be used to test a control module of a calibration system.

[0080] In some scenarios, the system provides a user interface that lists all available candidate test scenarios for the user to review and select. The user then selects a target test scenario from the candidate scenarios based on the test requirements. Once the user selects the target test scenario, the system automatically displays the test parameter set associated with that scenario for the user to review or modify. After the user confirms the target test parameter set, the system sends these parameters to the control module of the test calibration system to initiate the test process.

[0081] This makes it possible to provide multiple candidate test plans, allowing users to select the most appropriate one based on their specific needs. The user interface simplifies the selection process, improving the user experience. Test parameters are systematically managed to ensure test consistency and repeatability. The automated parameter transmission process reduces manual input errors and improves test efficiency. Accurate and reliable test results are ensured through precise parameter settings. The system design allows for easy addition or modification of candidate test plans and related parameters to adapt to changing test requirements. In this way, the test calibration system provides users with a flexible, efficient, and user-friendly test plan selection and application process, thereby improving the efficiency and accuracy of the entire testing process.

[0082] In some embodiments, the test scheme includes testing using M sets of test parameters. Step 101 may include: transmitting N test parameters to the control module, wherein the control module adjusts an output control signal based on the test parameters, generates a test result, and transmits the test result to a terminal device for display; and in response to receiving the test result, transmitting an N+1th set of test parameters to the test module, wherein N is greater than or equal to 1 and less than or equal to M-1.

[0083] Here, M sets of test parameters: refers to multiple different test parameter groups included in the test plan, M represents the total number of parameter groups. N test parameters: any one of the M sets of test parameters, N is the serial number of the test parameter group currently in use.

[0084] In some scenarios, the system pre-stores M sets of different test parameters, each set of parameters for different test conditions or purposes. The system starts to execute the test plan and first selects the first set of test parameters (when N=1). The control module receives N test parameters and adjusts the output control signal according to these parameters. The control module generates test results based on the current test parameters. The test results are sent to the terminal device for display, and the user can view the current test status. In response to the received test results, the system automatically selects the next set of test parameters (i.e., the N+1th set), where N ranges from 1 to M-1. This process is repeated until all M sets of test parameters have been tested.

[0085] As a result, through the automated process, manual intervention is reduced and test efficiency is improved. M different sets of test parameters allow the system to evaluate the performance of the device under various conditions. The system can select different test parameter groups as needed to adapt to different testing requirements. The test plan supports continuous testing, without the need to manually reset the parameters after each round of testing. The terminal device displays the test results in real time, allowing users to keep abreast of the test progress and results. The accuracy and repeatability of the test are improved through the systematic testing process. As new test requirements emerge, more test parameter groups can be easily added. This test plan design allows the system to perform efficient, flexible and automated testing, which is suitable for scenarios where device performance needs to be evaluated under multiple conditions.

[0086] In some embodiments, the test parameters include one or more of the following: a parameter for controlling the pulse width of the gate signal generated by the module, and a parameter for controlling the repetition frequency of the gate signal generated by the module.

[0087] Here, a gating signal is an electrical signal whose characteristics (such as pulse width and repetition frequency) can be controlled, and is often used to synchronize or trigger the operation of electronic devices.

[0088] Here, pulse width may refer to the duration of a pulse in a gating signal, typically expressed in units of time such as seconds or milliseconds.

[0089] Here, the repetition frequency may refer to the number of times the gating signal is repeated per unit time, and is usually measured in Hertz (Hz).

[0090] In some scenarios, test parameters, including pulse width and repetition rate, are defined. A control module is designed to generate a corresponding gating signal based on the input test parameters. Through a user interface or other input method, the user is allowed to set or select the desired pulse width and repetition rate. The control module receives these parameters and adjusts its output gating signal to match them. The generated gating signal is used to test the test device to evaluate its performance at different pulse widths and repetition rates.

[0091] This allows for better control of test conditions and improved test accuracy by precisely setting the pulse width and repetition frequency. This allows users to select different parameters based on different test requirements, increasing the flexibility of test solutions. By varying the pulse width and repetition frequency, the performance of the device under different operating conditions can be evaluated. In this way, setting test parameters allows for meticulous testing of electronic devices or systems to ensure they function properly under a variety of operating conditions, which is crucial for areas such as product development, quality assurance, and fault diagnosis.

[0092] Further references Figure 2 As an implementation of the methods shown in the above figures, the present disclosure provides an embodiment of a test and calibration device. Figure 1 Corresponding to the method embodiment shown, the device can be specifically applied to various electronic devices.

[0093] The test and calibration device can be applied to a terminal device in a test and calibration system. The terminal device is connected to a control module of the test and calibration system. The test and calibration system includes: a terminal device; an array fixing module for fixing the detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing the photons output by the photon generator onto the photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning the detectors in the detector array to be tested and outputting an electrical signal; and a control module for generating performance parameters of the detector array to be tested based on the electrical signal.

[0094] like Figure 2 As shown, the test and calibration device of this embodiment includes: a first display unit, used to display a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select test parameters; a sending unit, used to send the test parameters selected by the parameter selection control to the control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal according to the received test parameters to test the detector array to be tested; a second display unit, used to display a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes performance parameters obtained by processing by the control module.

[0095] In this embodiment, the specific processing of the first display unit 201, the sending unit 202 and the second display unit 203 of the test calibration device and the technical effects thereof can be referred to respectively. Figure 1 The relevant descriptions of step 101, step 102 and step 103 in the corresponding embodiment are not repeated here.

[0096] In some embodiments, the performance parameters include dark count rate; and the performance parameter display sub-interface displayed on the human-computer interaction interface includes: receiving and displaying the dark count rate, wherein the dark count rate is generated by: the optical focusing module, high-voltage bias circuit, array scanning module, and control module of the system are all set in a dark room; when the detector array to be tested is in the dark room and no light is added, the signal extraction and identification module transmits the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain the dark count, and generates the dark count rate based on the dark count.

[0097] In some embodiments, the performance parameters include dark count rate; and the performance parameter display sub-interface displayed in the human-computer interaction interface includes: receiving and displaying the light count rate, wherein the light count rate is generated in the following manner: the detector array to be tested receives one or more photons in the detection gate, and the signal extraction and identification uses the edge latch method to transmit the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain the light count, and generates the light count rate based on the light count.

[0098] In some embodiments, the performance parameter includes an afterpulse probability; and the display of the performance parameter display sub-interface on the human-computer interaction interface includes:

[0099] Receive and display a post-pulse probability, wherein the post-pulse probability is generated by: the detector array to be tested receives one or more photons within a detection gate, and the signal extraction and identification utilizes a double-gating method to transmit the obtained pulse signal to a control module; the control module counts the number of pulses of the counting pulse to obtain the number of post-pulses, and generates the post-pulse probability based on the number of post-pulses.

[0100] In some embodiments, sending the test parameters selected by the parameter selection control to the control module of the test calibration system includes: displaying candidate test schemes, wherein the candidate test schemes are associated with a test parameter set; determining a target test scheme from the candidate test schemes based on user selection, and displaying a target test parameter set associated with the target test scheme; and sending the target test parameter set to the control module of the test calibration system.

[0101] In some embodiments, the test scheme includes testing using M sets of test parameters; wherein, sending the test parameters selected by the parameter selection control to the control module of the test calibration system includes: transmitting N test parameters to the control module, wherein the control module adjusts the output control signal according to the test parameters, generates test results, and sends the test results to the terminal device for display; in response to receiving the test results, transmitting the N+1th set of test parameters to the test module, wherein N is greater than or equal to 1 and less than or equal to M-1.

[0102] In some embodiments, the test parameters include one or more of the following: a parameter for controlling the pulse width of the gate signal generated by the module, and a parameter for controlling the repetition frequency of the gate signal generated by the module.

[0103] Please refer to Figure 3 , Figure 3 It shows that the test and calibration method of one embodiment of the present disclosure can be applied to a visible near-infrared detector array test and calibration system.

[0104] A visible near-infrared detector array test and calibration system may include a high-voltage bias circuit (1), an optical focusing module (2), an APD array scanning module (3), a signal extraction and identification module (4), a single-photon source module (5), an FPGA control module (6), a human-computer interaction interface (7), and a TEC cooling module.

[0105] The optical focusing module (2) system adopts a coaxial optical path, and the 1550nm irradiation laser and the visible light observed by the CCD are focused on the APD array (3) to be measured by the same microscope lens. In the system, the optical focusing module (2) system adopts a coaxial optical path, and the 1550nm irradiation laser and the visible light observed by the CCD are focused on the APD array (3) to be measured by the same microscope lens. The visible near-infrared single-photon detector (SPAD) to be measured is mounted on an XYZ three-dimensional translation stage, which can perform XY positioning and Z-direction focusing, with an adjustment accuracy of up to 1μm. An aperture diaphragm that can be translated in the XY direction is provided on the middle optical path of the 1550nm laser. The size of the aperture diaphragm is smaller than the entrance of the microscope lens. During the translation of the aperture diaphragm, the incident angle of the laser incident on the APD array (3) also changes, and the position of the light spot remains unchanged.

[0106] The APD array scanning module (3) can realize a fully parallel array integration method for integrating multiple APD pixels. The data of a pixel at a certain address is selected by the row and column decoder and output to the on-chip bus. The on-chip controller sequentially traverses the pixel addresses of the entire array and uploads the entire frame of data through the off-chip bus. The bus bandwidth limits the readout frame rate to a certain extent. The UART bus implementation method is selected. It mainly consists of a sending module Trasmitter, a receiving module Receiver, a receiving FIFO with a depth of 16, a sending FIFO with a depth of 16, a register list, and a status control interrupt register module. Facing the array circuit is a register list (Reg File). The data read out by the array is stored in the corresponding position in the list and then uploaded through Trasmitter. The identification voltage, frame rate, gate setting and other parameters are set for the chip through the human-computer interaction interface (7) via UART.

[0107] The high-voltage bias circuit (1) is connected to the APD array (3) to provide a high-voltage bias. Its function is to realize voltage conversion, convert the input voltage into a DC voltage and output it to the APD array (3), ensuring that the bias voltage provided is stable and below the avalanche voltage of the APD array (3). The high-voltage bias circuit (1) can be a DC-DC conversion circuit or an AC-DC conversion circuit.

[0108] The FPGA control module (6) generates a periodic narrow gate pulse coupled to the APD array (3) to drive the detector. At the same time, the FPGA control module (6) generates another synchronous pulse signal which passes through the single photon source module (5) to 0.1 single photons per pulse and is coupled to the photosensitive surface of the APD array (3) through an optical fiber.

[0109] The signal extraction and identification module (4) obtains the signal after the APD array scan (3) by amplifying the sampled signal through a high-speed amplifier, and connects the amplified signal to an ECL high-speed comparator with adjustable identification voltage for comparison and identification, and then connects it to the FPGA control module (6) for reading and counting. The extraction and identification module (4) uses a passive quenching method to operate the SPADs in the gated Geiger mode. The avalanche signal generated in the gate with photon incidence is first sampled by a 50Ω resistor, and the sampled signal is amplified by a high-speed amplifier. The amplified signal is connected to an ECL high-speed comparator with adjustable identification voltage for comparison and identification, thereby outputting a pure avalanche signal corresponding to the occurrence of avalanche. Due to the junction capacitance effect of the SPADs pn junction, when the periodic gate pulse is loaded to both ends of the SPADs, a capacitive spike response is generated, resulting in an erroneous count. The avalanche signal will also be superimposed on this capacitive spike response noise signal, making it difficult to extract the avalanche signal. Therefore, an edge latching method is adopted. By aligning the latch edge with the avalanche signal, an avalanche occurs when a photon is incident. The high level obtained by comparing the generated avalanche signal with the comparator will be latched, and then this high level is connected to the FPGA control module (6) for reading and counting.

[0110] The FPGA control module (6) is connected to the human-machine interface (7). The pulse width and repetition frequency of the gate signal generated by the FPGA control module (6) can be modified through the human-machine interface (7), and the dark count, light count, after-pulse and other data processed and obtained by the FPGA control module (6) are sent to the human-machine interface (7) for display. The FPGA control module (6) generates a series of corresponding gate signals through the digital clock management of the FPGA. All units inside the module are synchronously driven by the same gate signal or a gate signal with a certain phase difference therewith. In order to avoid the spike pulse noise generated when the gate pulse is loaded on the SPADs and cause miscounting, it is necessary to provide a latch pulse to the ECL comparator in the signal extraction and identification module (4) when extracting the avalanche signal. The latch edge is finely adjusted to align with the center of the avalanche signal through IO DELAY, and its high level is maintained until the rising edge of the next gate pulse signal of the FPGA, thereby avoiding the error of the setup and hold time when the counting module inside the FPGA counts. The pulse signal LaserDriver of the synchronous laser is divided by the DCM clock drive and is adjustable within the full gate pulse cycle. When the avalanche level is detected, the HOLDOFF dead time is set to keep the gate pulse signal at a low level. The dead time is adjustable in the range of 9ns to 1009ns in steps of 10ns.

[0111] In this embodiment, since there are many models of FPGA control module, high-voltage bias circuit, single-photon source module and TEC cooling equipment to choose from, the specific implementation method involved in this embodiment uses PicoQuant's PDL 800-B synchronous laser, EXFO's FVA-3150 variable attenuator as the single-photon source module, Xilinx's Virtex 5 series FPGA, ITECH's IT6834 high-voltage bias power supply and Linear Technology's LTC1923 TEC controller to illustrate the actual effect. 800-B is a single-channel dual-mode driver for the LDH series and LDH-FA series picosecond pulse laser heads (375-1990nm) and the PLS series sub-nanosecond pulse LEDs (255-600nm). By connecting different laser or LED heads, the wavelength can be changed. The internal oscillator has two user-selectable base frequencies, 80MHz and 1MHz, and can also be controlled by an external trigger signal. The maximum laser pulse is 10MHz; the variable attenuator FVA-3150 has three attenuation modes to choose from: absolute mode (including insertion loss), relative mode (relative to 0.00dB), and Reference value) or X+B mode (displayed relative to any selected reference value); the IT6834 high-voltage bias power supply has a resolution of 10mV / 10mA and an accuracy of less than 0.1%+38mV / 0.1%+15mA, and supports RS232 / GPIB / USB communication interfaces. The LTC1923 TEC controller integrates all necessary control circuitry and two sets of complementary output drivers to drive a full-bridge, providing an effective method for delivering bidirectional current to the TEC, enabling an accurate temperature control loop to stabilize the temperature of the laser diode system, with control accuracy of 0.1°C.

[0112] The light spot is focused onto the photosensitive surface of the APD array through optical focusing and a three-dimensional adjustable optical displacement platform; a DC high-voltage power supply provides the APD array with a stable bias high voltage VP that is lower than the breakdown voltage VBR; the FPGA generates a gate signal Vpulse with a pulse width of 9ns, a repetition frequency of 100KHz, and a gate amplitude of 3.3V, which is coupled to the APD array. The N-pole voltage of the APD array rapidly increases to a level several tens of volts higher than the breakdown voltage VBR, and the APD enters the Geiger mode working state. At the same time, the FPGA system synchronously triggers the laser and attenuates the emitted pulse laser to 0.1 photons per pulse, which is then irradiated onto the APD photosensitive surface to generate an avalanche signal; when the gate pulse becomes low, the APD N-pole voltage rapidly returns to a voltage VP that is lower than the breakdown voltage VBR, which plays a quenching role.

[0113] Due to the capacitive effect of the APD, when periodic gate pulses are applied to both ends of the APD, a capacitive spike response is generated, resulting in erroneous counting. The avalanche signal is also superimposed on this capacitive spike response noise signal, making it difficult to extract the avalanche signal. The system adopts an edge latching method, aligning the latch edge with the avalanche signal. When a photon is incident, an avalanche occurs. The generated avalanche signal is compared with the comparator, and the high level obtained is latched. This high level is then connected to the FPGA for reading and counting.

[0114] The human-computer interface allows you to set the number of pulse trains generated by each gated signal through the human-computer interface. When the APD array is not receiving light, dark counts are obtained. If the APD array receives photons within the detection gate, light counts and afterpulse counts are obtained. The human-computer interface uses the FPGA to set the gated pulse width, gated pulse repetition frequency, and number of gated pulse trains. It also processes and displays test results such as dark counts, light counts, and afterpulses, enabling APD array performance calibration.

[0115] The human-machine interaction interface (7) in the system can adjust and set parameters related to the SPAD, and communicate with the FPGA control module (6) via USB, while feeding back the count value in the FPGA to the human-machine interaction interface (7) for display and storage.

[0116] In the system, TEC cooling is achieved through a TEC controller to control the APD array with an accuracy of 0.1°C, and can adapt to different types of semiconductor cooling chips with different operating voltages of 5-12V and a maximum current of 6A.

[0117] Reference below Figure 4 , which shows an electronic device (eg Figure 3 The terminal device in the embodiments of the present disclosure may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (such as in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 4 The electronic device shown is only an example and should not limit the functions and scope of use of the embodiments of the present disclosure.

[0118] like Figure 4As shown, the electronic device may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 401, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 402 or a program loaded from a storage device 408 into a random access memory (RAM) 403. Various programs and data required for the operation of the electronic device 400 are also stored in the RAM 403. The processing device 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An input / output (I / O) interface 405 is also connected to the bus 404.

[0119] Typically, the following devices may be connected to the I / O interface 405: an input device 406 including, for example, a touch screen, a touchpad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 407 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 408 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 409. The communication device 409 may allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. Although Figure 4 The electronic device is shown with various devices, but it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed instead.

[0120] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication device 409, or installed from the storage device 408, or installed from the ROM 402. When the computer program is executed by the processing device 401, the above-mentioned functions defined in the method of the embodiment of the present disclosure are performed.

[0121] It should be noted that the computer-readable medium mentioned above in the present disclosure may be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or component, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, device, or component. In the present disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such a propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to wires, optical cables, RF (radio frequency), etc., or any suitable combination thereof.

[0122] In some embodiments, the client and server can communicate using any currently known or future developed network protocol, such as HTTP (HyperText Transfer Protocol), and can be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), an internet (e.g., the Internet), and a peer-to-peer network (e.g., an ad hoc peer-to-peer network), as well as any currently known or future developed network.

[0123] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device.

[0124] The above-mentioned computer-readable medium carries one or more programs. When the above-mentioned one or more programs are executed by the electronic device, the electronic device: displays a parameter selection control on the human-computer interaction interface, wherein the parameter selection control is used to select test parameters; sends the test parameters selected by the parameter selection control to the control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal according to the received test parameters to test the detector array to be tested; displays a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes the performance parameters obtained by the control module.

[0125] Computer program code for performing the operations of the present disclosure may be written in one or more programming languages, or a combination thereof, including, but not limited to, object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0126] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the module, program segment, or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of the boxes in the block diagram and / or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0127] The units described in the embodiments of the present disclosure may be implemented in software or hardware. In some cases, the name of a unit does not limit the unit itself. For example, the first display unit may also be described as a "unit for displaying a human-computer interaction interface."

[0128] The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, and without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chip (SOCs), complex programmable logic devices (CPLDs), and the like.

[0129] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0130] The above description is merely a preferred embodiment of the present disclosure and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also includes other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the above-mentioned disclosed concepts. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in this disclosure.

[0131] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details have been included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0132] Although the subject matter has been described in language specific to structural features and / or methodological logical acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are merely example forms of implementing the claims.

[0133] The above description is merely a preferred embodiment of the present disclosure and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also includes other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the above-mentioned disclosed concepts. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in this disclosure.

[0134] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details have been included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0135] Although the subject matter has been described in language specific to structural features and / or methodological logical acts, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are merely example forms of implementing the claims.

[0136] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A visible near infrared detector array test calibration method, characterized in that: A terminal device used in a test and calibration system, the terminal device being connected to a control module of the test and calibration system, the test and calibration system comprising: a terminal device; an array fixing module for fixing a detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing photons output by a photon generator onto a photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning detectors in the detector array to be tested and outputting electrical signals; and a control module for generating performance parameters of the detector array to be tested based on the electrical signals; and The method includes: On the human-computer interaction interface, a parameter selection control is displayed, wherein the parameter selection control is used to select test parameters; Sending the test parameters selected by the parameter selection control to the control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal according to the received test parameters to test the detector array to be tested; On the human-computer interaction interface, a performance parameter display sub-interface is displayed, wherein the performance parameter display sub-interface includes performance parameters obtained by the control module.

2. The visible near-infrared detector array test and calibration method according to claim 1, characterized in that: The performance parameters include dark count rate; as well as The performance parameter display sub-interface displayed on the human-computer interaction interface includes: Receive and display a dark count rate, wherein the dark count rate is generated by: placing the optical focusing module, high-voltage bias circuit, array scanning module, and control module of the system in a darkroom; when the detector array to be tested is in the darkroom and no light is applied, the signal extraction and identification module transmits the obtained pulse signal to the control module; the control module counts the number of pulses of the counting pulse to obtain a dark count, and generates a dark count rate based on the dark count.

3. The visible near-infrared detector array test and calibration method according to claim 1, characterized in that: The performance parameters include dark count rate; as well as The performance parameter display sub-interface displayed on the human-computer interaction interface includes: Receive and display a light count rate, wherein the light count rate is generated by: the detector array under test receives one or more photons within a detection gate, and the signal extraction and identification transmits the obtained pulse signal to the control module using an edge latch method; the control module counts the number of pulses of the counted pulses to obtain a light count, and generates a light count rate based on the light count.

4. The visible near-infrared detector array test and calibration method according to claim 1, characterized in that: The performance parameters include afterpulse probability; as well as The performance parameter display sub-interface displayed on the human-computer interaction interface includes: Receive and display a post-pulse probability, wherein the post-pulse probability is generated by: the detector array to be tested receives one or more photons within a detection gate, and the signal extraction and identification utilizes a double-gating method to transmit the obtained pulse signal to a control module; the control module counts the number of pulses of the counting pulse to obtain the number of post-pulses, and generates the post-pulse probability based on the number of post-pulses.

5. The visible near-infrared detector array test and calibration method according to claim 1, characterized in that: The step of sending the test parameter selected by the parameter selection control to the control module of the test and calibration system includes: displaying candidate test scenarios, wherein the candidate test scenarios are associated with a test parameter set; determining a target test scenario from candidate test scenarios according to a user selection, and displaying a target test parameter set associated with the target test scenario; The target test parameter set is sent to the control module of the test calibration system.

6. The visible-near-infrared detector array test and calibration method according to claim 5, characterized in that: The test scheme includes testing using M sets of test parameters; wherein, The step of sending the test parameter selected by the parameter selection control to the control module of the test and calibration system includes: Transmitting N test parameters to the control module, wherein the control module adjusts the output control signal according to the test parameters, generates a test result, and sends the test result to the terminal device for display; In response to receiving the test result, an N+1th set of test parameters is transmitted to the control module, where N is greater than or equal to 1 and less than or equal to M-1.

7. The visible-near-infrared detector array test and calibration method according to claim 1, characterized in that: The test parameters include one or more of the following: a parameter for controlling the pulse width of the gate signal generated by the module, and a parameter for controlling the repetition frequency of the gate signal generated by the module.

8. A test and calibration device for a visible near-infrared detector array, characterized in that: A terminal device used in a test and calibration system, the terminal device being connected to a control module of the test and calibration system, the test and calibration system comprising: a terminal device; an array fixing module for fixing a detector array to be tested; a single photon source module for generating near-infrared photons or visible light photons; an optical focusing module for focusing photons output by a photon generator onto a photosensitive surface of the detector array to be tested; a high-voltage bias circuit for providing a high-voltage bias to the detector array to be tested; an array scanning module for scanning detectors in the detector array to be tested and outputting electrical signals; and a control module for generating performance parameters of the detector array to be tested based on the electrical signals; and The test and calibration device includes: A first display unit is used to display a parameter selection control on a human-computer interaction interface, wherein the parameter selection control is used to select a test parameter; a sending unit, configured to send the test parameters selected by the parameter selection control to the control module of the test and calibration system, wherein the control module of the test and calibration system generates a test signal according to the received test parameters to test the detector array to be tested; The second display unit is used to display a performance parameter display sub-interface on the human-computer interaction interface, wherein the performance parameter display sub-interface includes performance parameters obtained by the control module.

9. An electronic device, characterized in that: include: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 7.

10. A computer-readable medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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