A reverse polarity red LED chip and its preparation method

Abstract

The present invention discloses a reverse polarity red LED chip and its preparation method, relating to the field of semiconductor device technology. The preparation method comprises: providing a P-face epitaxial layer; forming a conductive column on the surface of the P-face epitaxial layer away from the bonding electrode; forming a dielectric layer around the conductive column, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive column; etching the dielectric layer to form a dielectric layer through-hole larger than the diameter of the bonding electrode; depositing ITO material within the dielectric layer through-hole and on the surface of the dielectric layer away from the P-face epitaxial layer to form a transparent conductive layer; evaporating a reflective metal material on the surface of the transparent conductive layer away from the dielectric layer to form a mirror layer; and bonding the mirror layer to a substrate having an N electrode on the back. The present invention solves the technical problems in the prior art of high stress in the SiO2 dielectric layer, poor adhesion between the AuZn and SiO2 dielectric layers, and the susceptibility to bonding delamination during the terminal bonding process.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a reverse polarity red light LED chip and a preparation method thereof. Background Art

[0002] Reverse polarity red light-emitting diode chips, also known as RS red light chips, often experience epitaxial layer loss after bonding during development and mass production. Current technology primarily uses AuZn and SiO2 to form a mirror layer to reflect light from the quantum well layer. However, delamination between the AuZn and SiO2 layers often occurs during actual terminal use, resulting in a dead chip or dim light.

[0003] This is because when the RS red light chip is manufactured according to the current process, the stress of the SiO2 dielectric layer is relatively large, resulting in poor adhesion between the AuZn and SiO2 dielectric layers, which makes it easy for bonding delamination to occur during the terminal bonding process. Summary of the Invention

[0004] In view of the shortcomings of the existing technology, the purpose of the present invention is to provide a reverse polarity red light LED chip and its preparation method, aiming to solve the technical problem in the existing technology that the stress of the SiO2 dielectric layer is large, resulting in poor adhesion between the AuZn and SiO2 dielectric layers, and prone to bonding delamination during the terminal bonding process.

[0005] A first aspect of the present invention is to provide a method for preparing a reverse polarity red LED chip, the method comprising:

[0006] Providing a P-side epitaxial layer;

[0007] Fabricating a conductive column on a surface of the P-plane epitaxial layer away from the bonding electrode;

[0008] A dielectric layer is formed on the periphery of the conductive pillar, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar;

[0009] Etching the dielectric layer to obtain a dielectric layer through hole larger than the diameter of the wire bonding electrode;

[0010] Depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer;

[0011] Vapor-depositing a reflective metal material on the surface of the transparent conductive layer away from the dielectric layer to obtain a mirror layer;

[0012] The mirror layer is bonded to a base substrate having an N electrode on the back side.

[0013] According to one aspect of the above technical solution, the step of forming a conductive pillar on the surface of the P-plane epitaxial layer away from the bonding electrode includes:

[0014] Coating photoresist on the surface of the P-face epitaxial layer away from the wire bonding electrode, exposing, PEB and developing the surface to obtain a dielectric hole pattern;

[0015] According to the dielectric hole pattern, a reflective metal material is used to make conductive pillars, so as to form a plurality of conductive pillars on the surface of the P-plane epitaxial layer away from the bonding electrode;

[0016] Wherein, the conductive pillar is electrically connected to the P-plane epitaxial layer.

[0017] According to one aspect of the above technical solution, the step of forming a dielectric layer around the conductive pillar so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar includes:

[0018] At a preset chamber temperature, silane gas is passed into the reaction chamber to cause a reaction, so that SiO2 material is deposited on the periphery of the conductive pillar to obtain a dielectric layer;

[0019] The dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive column.

[0020] According to one aspect of the above technical solution, when silane gas is introduced into the reaction chamber, the flow rate is 280 sccm-320 sccm, and the chamber temperature is 280°C-320°C.

[0021] According to one aspect of the above technical solution, the step of depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer includes:

[0022] Depositing a conductive material in the through hole of the dielectric layer to obtain a first transparent conductive sublayer, so that the surface of the dielectric layer away from the P-plane epitaxial layer remains flush;

[0023] Depositing a conductive material again on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a second transparent conductive sublayer, thereby obtaining the transparent conductive layer;

[0024] The first transparent conductive sublayer is electrically connected to the second transparent conductive sublayer, and the conductive material is ITO.

[0025] According to one aspect of the above technical solution, the step of bonding the mirror layer to a base substrate having an N electrode on the back side includes:

[0026] A transparent bonding medium is coated on a base substrate having an N electrode on the back side;

[0027] Placing the mirror layer on the base substrate and adjusting the position of the mirror layer on the base substrate;

[0028] Under preset bonding conditions, a bonding process is performed to fix the mirror layer on the base substrate.

[0029] According to one aspect of the above technical solution, the bonding process includes a first bonding process, a second bonding process and a third bonding process;

[0030] The first bonding conditions in the first bonding process include: bonding pressure of 450kgf-550kgf, pressing rate of 90kgf / s-110kgf / s, bonding temperature of 135°C-165°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 100s-140s;

[0031] The second bonding conditions in the second bonding process include: a bonding pressure of 11000kgf-13000kgf, a pressing rate of 90kgf / s-110kgf / s, a bonding temperature of 340°C-380°C, a heating rate of 0.45°C / s-0.55°C / s, and a holding time of 800s-1000s;

[0032] The third bonding conditions in the third bonding process include: bonding pressure of 9000kgf-11000kgf, pressure rate of 90kgf / s-110kgf / s, bonding temperature of 23°C-27°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 25s-35s.

[0033] According to one aspect of the above technical solution, the reflective metal material used to make the mirror layer and the conductive column is the same.

[0034] According to one aspect of the above technical solution, the reflective metal materials used to make the mirror layer and the conductive pillars are both AuZn.

[0035] The second aspect of the present invention is to provide a reverse polarity red LED chip, which is manufactured by the preparation method described in the above technical solution.

[0036] Compared with the prior art, the reverse polarity red LED chip and its preparation method shown in the present invention have the following beneficial effects:

[0037] The preparation method shown in the invention is used to manufacture a reverse polarity LED chip. A transparent conductive layer is provided between the dielectric layer and the mirror layer, including a first transparent conductive sublayer and a second transparent conductive sublayer. The first transparent conductive sublayer extends into the dielectric layer through-hole of the dielectric layer and contacts the P-face epitaxial layer, and the second transparent conductive sublayer contacts the first transparent conductive sublayer and the mirror layer respectively. This can effectively reduce the stress of the dielectric layer, and the transparent conductive layer has strong adhesion. During the use of the LED chip, the dielectric layer can be effectively prevented from being broken and causing the P-face epitaxial layer to delaminate, thereby ensuring the service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:

[0039] Figure 1 Schematic diagram of a process for preparing a reverse polarity red LED chip according to an embodiment of the present invention;

[0040] Figure 2 Schematic diagram of the structure of a reverse polarity red LED chip in one embodiment of the present invention.

[0041] Component symbol description:

[0042] P-plane epitaxial layer 10 , wire bonding electrode 20 , conductive pillar 30 , dielectric layer 40 , transparent conductive layer 50 , first transparent conductive sublayer 51 , second transparent conductive sublayer 52 , mirror layer 60 , bonding layer 70 , base substrate 80 , and N-electrode 90 . DETAILED DESCRIPTION

[0043] To make the objectives, features, and advantages of the present invention more readily apparent, the following detailed description of specific embodiments of the present invention is provided in conjunction with the accompanying drawings. The accompanying drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0044] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0046] A first aspect of the present invention is to provide a method for preparing a reverse polarity red LED chip, the method comprising:

[0047] Providing a P-side epitaxial layer;

[0048] Fabricating a conductive column on a surface of the P-plane epitaxial layer away from the bonding electrode;

[0049] A dielectric layer is formed on the periphery of the conductive pillar, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar;

[0050] Etching the dielectric layer to obtain a dielectric layer through hole larger than the diameter of the wire bonding electrode;

[0051] Depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer;

[0052] Vapor-depositing a reflective metal material on the surface of the transparent conductive layer away from the dielectric layer to obtain a mirror layer;

[0053] The mirror layer is bonded to a base substrate having an N electrode on the back side.

[0054] Furthermore, the step of forming a conductive column on the surface of the P-plane epitaxial layer away from the bonding electrode includes:

[0055] Coating photoresist on the surface of the P-face epitaxial layer away from the wire bonding electrode, exposing, PEB and developing the surface to obtain a dielectric hole pattern;

[0056] According to the dielectric hole pattern, a reflective metal material is used to make conductive pillars, so as to form a plurality of conductive pillars on the surface of the P-plane epitaxial layer away from the bonding electrode;

[0057] Wherein, the conductive pillar is electrically connected to the P-plane epitaxial layer.

[0058] Furthermore, the step of forming a dielectric layer on the periphery of the conductive pillar so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar includes:

[0059] At a preset chamber temperature, silane gas is passed into the reaction chamber to cause a reaction, so that SiO2 material is deposited on the periphery of the conductive pillar to obtain a dielectric layer;

[0060] The dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive column.

[0061] Furthermore, when silane gas is introduced into the reaction chamber, the flow rate is 280 sccm-320 sccm, and the chamber temperature is 280° C.-320° C.

[0062] Furthermore, the step of depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer includes:

[0063] Depositing a conductive material in the through hole of the dielectric layer to obtain a first transparent conductive sublayer, so that the surface of the dielectric layer away from the P-plane epitaxial layer remains flush;

[0064] Depositing a conductive material again on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a second transparent conductive sublayer, thereby obtaining the transparent conductive layer;

[0065] The first transparent conductive sublayer is electrically connected to the second transparent conductive sublayer, and the conductive material is ITO.

[0066] Furthermore, the step of bonding the mirror layer to a base substrate having an N electrode on the back side includes:

[0067] A transparent bonding medium is coated on a base substrate having an N electrode on the back side;

[0068] Placing the mirror layer on the base substrate and adjusting the position of the mirror layer on the base substrate;

[0069] Under preset bonding conditions, a bonding process is performed to fix the mirror layer on the base substrate.

[0070] Furthermore, the bonding process includes a first bonding process, a second bonding process and a third bonding process;

[0071] The first bonding conditions in the first bonding process include: bonding pressure of 450kgf-550kgf, pressing rate of 90kgf / s-110kgf / s, bonding temperature of 135°C-165°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 100s-140s;

[0072] The second bonding conditions in the second bonding process include: a bonding pressure of 11000kgf-13000kgf, a pressing rate of 90kgf / s-110kgf / s, a bonding temperature of 340°C-380°C, a heating rate of 0.45°C / s-0.55°C / s, and a holding time of 800s-1000s;

[0073] The third bonding conditions in the third bonding process include: bonding pressure of 9000kgf-11000kgf, pressure rate of 90kgf / s-110kgf / s, bonding temperature of 23°C-27°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 25s-35s.

[0074] Furthermore, the reflective metal material used to make the mirror layer and the conductive column is the same.

[0075] Furthermore, the reflective metal materials used to make the mirror layer and the conductive pillars are both AuZn.

[0076] The second aspect of the present invention is to provide a reverse polarity red LED chip, which is manufactured by the preparation method described in the above technical solution.

[0077] The reverse polarity red LED chip produced by the preparation method of the present invention has the following beneficial effects:

[0078] By arranging a transparent conductive layer between the dielectric layer and the mirror layer, including a first transparent conductive sublayer and a second transparent conductive sublayer, the first transparent conductive sublayer extends into the dielectric layer through hole of the dielectric layer and contacts the P-face epitaxial layer, and the second transparent conductive sublayer contacts the first transparent conductive sublayer and the mirror layer respectively, the stress of the dielectric layer can be effectively reduced, and the transparent conductive layer has strong adhesion. During the use of the LED chip, the dielectric layer can be effectively prevented from being broken and causing the P-face epitaxial layer to delaminate, thereby ensuring the service life.

[0079] Example 1

[0080] Please refer again Figure 1 The first embodiment of the present invention provides a method for preparing a reverse polarity red LED chip, the method comprising steps S1-S7:

[0081] Step S1, providing a P-plane epitaxial layer.

[0082] In this embodiment, the P-plane epitaxial layer includes an electrode extension layer, a bonding buffer layer, and a light-emitting layer.

[0083] Among them, the electrode extension layer can be a GaAs layer, the wire bonding buffer layer can be a GaInP layer, and the light-emitting layer can be an AlGaInP layer, and a wire bonding electrode, that is, a P-face electrode, is provided on one side of the P-face epitaxial layer, and then a wire is led out on the P-face electrode. By leading out the wire on the P-face electrode, an electrical connection with the P-face epitaxial layer is achieved.

[0084] In addition, before processing the P-side epitaxial layer, it is first necessary to complete the epitaxial wafer production according to the conventional process of red light reverse polarity chip, and then clean the phosphide on the surface of the epitaxial wafer to obtain the epitaxial layer, and then make the chip on the P-side of the epitaxial layer.

[0085] Step S2: fabricating a conductive column on the surface of the P-plane epitaxial layer away from the bonding electrode.

[0086] Among them, the conductive column is arranged on the surface of the P-face epitaxial layer on the side away from the bonding electrode, that is, the conductive column and the bonding electrode are respectively arranged on opposite sides of the P-face epitaxial layer, and the conductive column is made of reflective metal material, that is, a metal material with high reflectivity, such as Au, Zn, Al and other materials or alloy materials.

[0087] In this embodiment, the conductive column is made of AuZn material, ie, gold-zinc alloy, for conducting electricity. It is a composite material composed of Au and Zn. The AuZn material has good reflective properties but low structural strength.

[0088] Specifically, when making a conductive column on the side of the P-face epitaxial layer away from the wiring electrode, it is first necessary to perform photoresist coating, exposure, PEB and development on the side of the P-face epitaxial layer away from the wiring electrode to obtain a dielectric hole pattern, and then evaporate the AuZn material according to the dielectric hole pattern. Then, the AuZn material outside the dielectric hole is removed by stripping, and then spin-coating photoresist, exposure and development are performed to make a conductive hole pattern. Then, the AuZn material for ohmic contact is evaporated, and the photoresist is stripped and removed. Finally, only the AuZn material in the dielectric hole remains to obtain the above-mentioned conductive column, which is used to conduct current.

[0089] Furthermore, there are a plurality of conductive pillars, one end of each conductive pillar is connected to the P-plane epitaxial layer, and the conductive pillar is perpendicular to the surface of the P-plane epitaxial layer.

[0090] Step S3 , forming a dielectric layer on the periphery of the conductive pillar, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar.

[0091] The dielectric layer is made of insulating material, formed on the periphery of the conductive column, covers the surface of the P-plane epitaxial layer away from the bonding electrode, and wraps the conductive column.

[0092] In this embodiment, the dielectric layer is made of deposited SiO 2 material, and the dielectric layer and the conductive pillars cooperate to produce a mirror effect for reflecting light.

[0093] Specifically, when forming a dielectric layer around the conductive pillar, silane gas (SiH4) is passed into the reaction chamber at a preset cavity temperature to cause a reaction, so that SiO2 material is deposited around the conductive pillar to obtain a dielectric layer. The thickness of the dielectric layer is, for example, 3000Å, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the wire bonding electrode and wraps the conductive pillar.

[0094] When forming a dielectric layer around the conductive pillar, the chamber temperature in the reaction chamber is 300°C, and the flow rate of silane gas, i.e., SiH4, is 300 sccm. By increasing both the chamber temperature and the flow rate of silane gas, the stress of the dielectric layer can be reduced, thereby making the dielectric layer less likely to break.

[0095] Step S4, etching the dielectric layer to obtain a dielectric layer through-hole larger than the diameter of the wire bonding electrode;

[0096] After obtaining the dielectric layer, the dielectric layer is subjected to photoresist coating, exposure, development and BOE etching directly below the wire bonding electrode to obtain a dielectric layer through hole slightly larger than the diameter of the wire bonding electrode. For example, the dielectric layer through hole is 10 μm larger than the diameter of the wire bonding electrode. The obtained dielectric layer through hole is used for ITO coating.

[0097] Step S5, depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer;

[0098] Among them, the through holes of the dielectric layer are used to deposit conductive materials, such as ITO material, that is, indium tin oxide material, to obtain a first transparent conductive sublayer, which is in contact with the P-face epitaxial layer for electrical connection; and after obtaining the first transparent conductive sublayer, ITO material is again deposited on the side of the dielectric layer away from the P-face epitaxial layer to obtain a second transparent conductive sublayer, thereby obtaining a transparent conductive layer.

[0099] In this embodiment, when producing the first transparent conductive sub-layer and the second transparent conductive sub-layer, a full-surface sputtering process is adopted, and the total deposition thickness is 300nm. This process adopts high-power operation, so that the first transparent conductive sub-layer, the second transparent conductive sub-layer and the P-face epitaxial layer cannot achieve ohmic contact, but only play the role of adhesion and conduction. The ohmic contact is still achieved through the connection between the conductive column and the P-face epitaxial layer.

[0100] Step S6, evaporating a reflective metal material on the surface of the transparent conductive layer away from the dielectric layer to obtain a mirror layer;

[0101] Among them, the mirror layer is made of the same reflective metal material as the conductive column. The thickness of the mirror layer is 4000Å. The AuZn mirror layer is obtained by evaporating the surface of the transparent conductive layer away from the dielectric layer. Its reflection coefficient is high and it can effectively reflect light.

[0102] Step S7: bonding the mirror layer to a base substrate having an N electrode on the back side.

[0103] The base substrate is, for example, a base substrate, and the N electrode provided on the back side of the base substrate is also called back gold. The N electrode is made of Au material and has a thickness of 4000Å.

[0104] In this embodiment, the epitaxial structure and the substrate are adhered to each other by bonding the mirror layer to the substrate, thereby completing the entire wafer bonding process.

[0105] Specifically, when bonding the mirror layer to the substrate, the bonding conditions need to be dynamically adjusted according to the completion of the bonding process, and the bonding process includes a first bonding process, a second bonding process, and a third bonding process;

[0106] The first bonding conditions in the first bonding process include: bonding pressure of 450kgf-550kgf, pressing rate of 90kgf / s-110kgf / s, bonding temperature of 135°C-165°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 100s-140s;

[0107] The second bonding conditions in the second bonding process include: a bonding pressure of 11000kgf-13000kgf, a pressing rate of 90kgf / s-110kgf / s, a bonding temperature of 340°C-380°C, a heating rate of 0.45°C / s-0.55°C / s, and a holding time of 800s-1000s;

[0108] The third bonding conditions in the third bonding process include: bonding pressure of 9000kgf-11000kgf, pressure rate of 90kgf / s-110kgf / s, bonding temperature of 23°C-27°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 25s-35s.

[0109] For example, in the first bonding condition of the first bonding process, the bonding pressure is 500kgf, the pressure rate is 100kgf / s, the bonding temperature is 150℃, the heating rate is 0.7℃ / s, and the holding time is 120s. In the second bonding condition of the second bonding process, the bonding pressure is increased to 12000kgf, the pressure rate is 100kgf / s, the bonding temperature is increased to 360℃, the heating rate is 0.5℃ / s, and the holding time is 900s. In the third bonding condition of the third bonding process, the bonding pressure is reduced to 10,000 kgf, the pressure rate is 100 kgf / s, the bonding temperature is reduced to 360°C, the heating rate is 0.7°C / s, and the holding time is 30 seconds. From the first bonding process to the second bonding process, by increasing the bonding pressure and the bonding temperature, and reducing the heating rate, the stress between the transparent conductive layer and the dielectric layer can be further reduced, so as to avoid the problem of epitaxial layer delamination in the subsequent product during the wiring process.

[0110] See also Figure 2 The structure of the reverse polarity red LED chip prepared by the preparation method shown in this embodiment includes:

[0111] P-plane epitaxial layer 10;

[0112] A conductive pillar 30 is provided on a side of the P-face epitaxial layer 10 away from the bonding electrode 20, and a dielectric layer 40 is provided on the periphery of the conductive pillar, wherein the dielectric layer 40 covers the surface of the P-face epitaxial layer 10 away from the bonding electrode 20 and wraps the conductive pillar 30;

[0113] and a transparent conductive layer 50 comprising a first transparent conductive sublayer 51 and a second transparent conductive sublayer 52, wherein the first transparent conductive sublayer 51 is disposed within a predetermined dielectric layer through-hole on the dielectric layer 40, and two ends of the first transparent conductive sublayer 51 are in electrical contact with the P-plane epitaxial layer 10 and the second transparent conductive sublayer 52, respectively;

[0114] The mirror layer 60 , the bonding layer 70 , the base substrate 80 and the N-electrode 90 are sequentially arranged on the side of the transparent conductive layer 50 away from the dielectric layer 40 .

[0115] During use, the reverse polarity red LED chip is configured with a transparent conductive layer 50 between the dielectric layer 40 and the mirror layer 60. The first transparent conductive sublayer 51 extends into the dielectric layer through-hole of the dielectric layer 40 and contacts the P-face epitaxial layer 10, thereby effectively reducing the stress of the dielectric layer 40. Furthermore, due to the strong adhesion of the transparent conductive layer 50, during use of the LED chip, the dielectric layer 40 can be effectively prevented from being broken and causing delamination of the P-face epitaxial layer 10, thereby ensuring the service life.

[0116] In summary, the reverse polarity red LED chip prepared by the preparation method shown in this embodiment has the following beneficial effects:

[0117] By arranging a transparent conductive layer between the dielectric layer and the mirror layer, including a first transparent conductive sublayer and a second transparent conductive sublayer, the first transparent conductive sublayer extends into the dielectric layer through hole of the dielectric layer and contacts the P-face epitaxial layer, and the second transparent conductive sublayer contacts the first transparent conductive sublayer and the mirror layer respectively, the stress of the dielectric layer can be effectively reduced, and the transparent conductive layer has strong adhesion. During the use of the LED chip, the dielectric layer can be effectively prevented from being broken and causing the P-face epitaxial layer to delaminate, thereby ensuring the service life.

[0118] Example 2

[0119] The second embodiment of the present invention also provides a method for preparing a reverse polarity red LED chip, which is basically the same as the method shown in the first embodiment, except that:

[0120] In this embodiment, when the dielectric layer is formed around the conductive pillar, the chamber temperature in the reaction chamber is 280° C., and the flow rate of silane gas, ie, SiH 4 , is 320 sccm.

[0121] Specifically, when forming the dielectric layer in the reaction chamber, by setting a lower cavity temperature and increasing the flow rate of silane gas, a higher reaction efficiency can be obtained, and the stress generated in the dielectric layer can be effectively reduced.

[0122] Example 3

[0123] The third embodiment of the present invention also provides a method for preparing a reverse polarity red LED chip, which is basically the same as the method shown in the first embodiment, except that:

[0124] In this embodiment, when the dielectric layer is formed around the conductive pillar, the chamber temperature in the reaction chamber is 320° C., and the flow rate of silane gas, ie, SiH 4 , is 280 sccm.

[0125] Specifically, when forming the dielectric layer in the reaction chamber, a higher reaction efficiency can be obtained by setting a higher chamber temperature, thereby appropriately reducing the flow rate of the silane gas.

[0126] Example 4

[0127] The fourth embodiment of the present invention also provides a method for preparing a reverse polarity red LED chip, which is basically the same as the method shown in the first embodiment, except that:

[0128] In this embodiment, in the first bonding condition of the first bonding process, the bonding pressure is 450kgf, the pressure rate is 90kgf / s, the bonding temperature is 135°C, the heating rate is 0.7°C / s, and the holding time is 120s. In the second bonding condition of the second bonding process, the bonding pressure is increased to 13000kgf, the pressure rate is 110kgf / s, the bonding temperature is increased to 380°C, the heating rate is 0.5°C / s, and the holding time is 800s.

[0129] Example 5

[0130] The fifth embodiment of the present invention also provides a method for preparing a reverse polarity red LED chip, which is basically the same as the method shown in the first embodiment, except that:

[0131] In this embodiment, in the first bonding condition of the first bonding process, the bonding pressure is 550kgf, the pressure rate is 110kgf / s, the bonding temperature is 165°C, the heating rate is 0.7°C / s, and the holding time is 120s. In the second bonding condition of the second bonding process, the bonding pressure is increased to 11000kgf, the pressure rate is 110kgf / s, the bonding temperature is increased to 340°C, the heating rate is 0.5°C / s, and the holding time is 1000s.

[0132] Comparative Example 1

[0133] The first comparative example also provides a method for preparing a reverse polarity red LED chip, which is basically the same as the method shown in the first embodiment, except that:

[0134] In the first comparative example, the transparent conductive layer is only filled in the dielectric layer through-holes preset in the dielectric layer. Both ends of the transparent conductive layer are in contact with the P-plane epitaxial layer and the mirror layer respectively. The mirror layer is in contact with the dielectric layer and the conductive pillar.

[0135] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0136] The above-described embodiments merely illustrate several implementations of the present invention. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for preparing a reverse polarity red LED chip, characterized in that: The preparation method comprises: Providing a P-side epitaxial layer; Fabricating a conductive column on a surface of the P-plane epitaxial layer away from the bonding electrode; A dielectric layer is formed on the periphery of the conductive pillar, so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar; Etching the dielectric layer to obtain a dielectric layer through hole larger than the diameter of the wire bonding electrode; Depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer; Vapor-depositing a reflective metal material on the surface of the transparent conductive layer away from the dielectric layer to obtain a mirror layer; Bonding the mirror layer to a base substrate having an N electrode on the back side; The step of depositing a conductive material in the through hole of the dielectric layer and on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a transparent conductive layer includes: Depositing a conductive material in the through hole of the dielectric layer to obtain a first transparent conductive sublayer, so that the surface of the dielectric layer away from the P-plane epitaxial layer remains flush; Depositing a conductive material again on the surface of the dielectric layer away from the P-plane epitaxial layer to obtain a second transparent conductive sublayer, thereby obtaining the transparent conductive layer; The first transparent conductive sublayer is electrically connected to the second transparent conductive sublayer, and the conductive material is ITO.

2. The method for preparing a reverse polarity red LED chip according to claim 1, wherein: The step of forming a conductive pillar on a surface of the P-plane epitaxial layer away from the bonding electrode comprises: Coating photoresist on the surface of the P-face epitaxial layer away from the wire bonding electrode, exposing, PEB and developing the surface to obtain a dielectric hole pattern; According to the dielectric hole pattern, a reflective metal material is used to make conductive pillars, so as to form a plurality of conductive pillars on the surface of the P-plane epitaxial layer away from the bonding electrode; Wherein, the conductive pillar is electrically connected to the P-plane epitaxial layer.

3. The method for preparing a reverse polarity red LED chip according to claim 1, wherein: The step of forming a dielectric layer on the periphery of the conductive pillar so that the dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive pillar includes: At a preset chamber temperature, silane gas is passed into the reaction chamber to cause a reaction, so that SiO2 material is deposited on the periphery of the conductive pillar to obtain a dielectric layer; The dielectric layer covers the surface of the P-face epitaxial layer away from the bonding electrode and wraps the conductive column.

4. The method for preparing a reverse polarity red LED chip according to claim 3, wherein: When silane gas is introduced into the reaction chamber, the flow rate is 280 sccm-320 sccm, and the chamber temperature is 280° C.-320° C.

5. The method for preparing a reverse polarity red LED chip according to claim 1, wherein: The step of bonding the mirror layer to a base substrate having an N electrode on the back side includes: A transparent bonding medium is coated on a base substrate having an N electrode on the back side; Placing the mirror layer on the base substrate and adjusting the position of the mirror layer on the base substrate; Under preset bonding conditions, a bonding process is performed to fix the mirror layer on the base substrate.

6. The method for preparing a reverse polarity red LED chip according to claim 5, wherein: The bonding process includes a first bonding process, a second bonding process and a third bonding process; The first bonding conditions in the first bonding process include: bonding pressure of 450kgf-550kgf, pressing rate of 90kgf / s-110kgf / s, bonding temperature of 135°C-165°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 100s-140s; The second bonding conditions in the second bonding process include: a bonding pressure of 11000kgf-13000kgf, a pressing rate of 90kgf / s-110kgf / s, a bonding temperature of 340°C-380°C, a heating rate of 0.45°C / s-0.55°C / s, and a holding time of 800s-1000s; The third bonding conditions in the third bonding process include: bonding pressure of 9000kgf-11000kgf, pressure rate of 90kgf / s-110kgf / s, bonding temperature of 23°C-27°C, heating rate of 0.65°C / s-0.75°C / s, and holding time of 25s-35s.

7. The method for preparing a reverse polarity red LED chip according to any one of claims 1 to 6, characterized in that: The reflective metal material used to make the mirror layer is the same as that used to make the conductive columns.

8. The method for preparing a reverse polarity red LED chip according to claim 7, wherein: The reflective metal materials used to make the mirror layer and the conductive column are both AuZn.

9. A reverse polarity red LED chip, characterized in that: The LED chip is prepared by the preparation method according to any one of claims 1 to 8.

Images