A method and apparatus for accessing a device

Abstract

This application provides a device access method and apparatus. The method is applied to a first device, which includes a secure world and a non-secure world. The method includes: the first device receiving the first request information sent by a server, the first request information requesting the first device to determine a first memory address, the first memory address corresponding to a first MMIO address in the server's secure world; and the first device determining the first memory address in its secure world based on the first request information. Through this method, the data channel established between the server and the first device cannot be intercepted by software in the non-secure world, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

Description

Technical Field

[0001] This application relates to the field of cloud computing, and more specifically, to a method and apparatus for accessing a device. Background Technology

[0002] Virtualization technology is currently the mainstream technology on cloud computing platforms. Through virtualization, tenants can deploy multiple computing instances (such as virtual machines) on a cloud computing platform, using hardware resources in a time-sharing manner. In the current virtualization framework, the virtual machine manager (VMM) manages all memory resources; that is, the VMM can access the code and data of all tenant virtual machines. When tenants deploy cloud computing services on a cloud platform, cloud service providers can obtain tenant data by inserting malicious code into the VMM. To prevent this, confidential computing technology has emerged.

[0003] Confidential computing technology is a computing model based on trusted hardware, combined with firmware and software to build an encrypted, isolated, and provable computing environment, ensuring the confidentiality and integrity of data, code, and computation processes within the environment. Currently, confidential computing environments are centered around a central processing unit (CPU) architecture, where confidential data undergoes all computations within the CPU and the final result is returned. While this architecture can effectively protect tenant data security, it cannot meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios. Furthermore, this architecture requires improvement in terms of computational security, efficiency, and ease of use. Summary of the Invention

[0004] This application provides a device access method and apparatus that can meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0005] In a first aspect, a memory access method is provided, the method being applied in a first device, the first device comprising: a secure world and a non-secure world, the method comprising: the first device receiving first request information sent by a server, the first request information being used to request the first device to determine a first memory address, the first memory address corresponding to a first memory-mapped input / output (MMIO) address in the secure world of the server; the first device determining the first memory address in the secure world of the first device based on the first request information.

[0006] Optionally, the first memory address can be a memory address at the physical page level, or the first memory address can be a memory address at the physical memory segment level.

[0007] It should be understood that the secure world in this application may also be referred to as a confidential domain or a trusted execution environment, and the insecure world may also be referred to as a normal domain or an untrusted execution environment; the first device may be referred to as a confidential device or a heterogeneous device in this application, and the server may be referred to as a host in this application.

[0008] In this embodiment of the application, the first device can allocate a first memory address based on the first request information, so that the server can access the first memory address through the first MMIO address. In this way, the data channel established between the server and the first device cannot be stolen by software in the insecure world, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the first device determines a first memory address in the secure world of the first device based on the first request information, including: the first device allocates a second memory address in the insecure world of the first device as the first memory address based on the first request information.

[0010] Optionally, the first memory address and the second memory address can be the same memory address, but their security attributes are different.

[0011] Optionally, classifying the second memory address in the insecure world of the first device as the first memory address can also be understood as: the first device classifies the memory attributes of the second memory address as secure and sets up the corresponding page table.

[0012] In this embodiment of the application, the first device can divide the second memory address in the insecure world of the first device into the first memory address according to the instruction of the first request information, so as to facilitate the server to access the first memory address based on the first MMIO address.

[0013] In conjunction with the first aspect, in some implementations of the first aspect, the first memory address is a memory address with physical memory segments as the granularity. Before the first device divides the second memory address in the insecure world of the first device into the first memory address according to the first request information, the method further includes: the first device dividing the memory of the first device according to a fixed memory partitioning method to obtain the second memory address.

[0014] For example, when the first device has a total memory of 64GB, the first device can partition the memory according to a fixed memory partitioning method (e.g., 8GB, 16GB, 32GB), and the first device can authorize the partitioned memory according to the instructions of the first request information. For example, the first request information requests the first device to grant the right to use 8GB of memory to the first device's secure world. The first device can partition the 64GB of memory in 8GB increments and authorize the first device's secure world to use one of the partitioned 8GB of memory. The address corresponding to the partitioned 8GB of memory before it is authorized to be used by the first device's secure world can be called the second memory address, and the address corresponding to it after it is authorized to be used by the first device's secure world can be called the first memory address.

[0015] In this embodiment of the application, the first device can allocate the second memory address according to a fixed memory partitioning method. In this way, the first device can easily and efficiently partition the first memory address, thereby reducing the cost and power consumption of confidential computing under a heterogeneous computing architecture.

[0016] In conjunction with the first aspect, in some implementations of the first aspect, the first device determines a first memory address in the secure world of the first device based on the first request information, including: the first device checks the legality of the first request information; if the first request information is legal, the first device determines the first memory address based on the first request information.

[0017] Optionally, the first device checks the legality of the first request information by checking whether the second memory address has been used by the first device's security world. If the second memory address has not been used by the first device's security world, the first request information is confirmed to be legal; otherwise, the first request information is confirmed to be illegal.

[0018] In this embodiment, the first device can check the legitimacy of the first request information before determining the first memory address. This prevents the first request information from being tampered with and ensures the security of the server accessing the first memory address through the first MMIO address.

[0019] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the first device receiving second request information sent by the server, the second request information being used to request the first device to assign one or more accelerators to the secure world of the first device; the first device assigning one or more accelerators from the non-secure world of the first device to the secure world of the first device according to the second request information.

[0020] Optionally, the first device may assign one or more accelerators to its secure world according to preset rules. For example, the first device may include eight accelerators, and the first device may assign one, two, or four of the accelerators to its secure world for use according to the instructions of the second request information.

[0021] Optionally, one or more of the aforementioned accelerators may be located in the insecure world of the first device before being assigned to the secure world of the first device.

[0022] It should be understood that the accelerator in this application can also be called a heterogeneous accelerator, which can be used to perform cyclic calculations on the resource-consuming part of the CPU in the server or the first device, thereby saving CPU computing resources.

[0023] In this embodiment of the application, the first device can allocate one or more accelerators to the secure world of the first device according to the second request information, thereby facilitating the server to access the one or more accelerators based on the first MMIO address.

[0024] In conjunction with the first aspect, in some implementations of the first aspect, the first device assigns one or more accelerators from its insecure world to its secure world based on the second request information, including: the first device checking the legality of the second request information; and if the second request information is legal, the first device assigns one or more accelerators from its insecure world to its secure world based on the second request information.

[0025] Optionally, the first device checks the legality of the second request information, including: the first device checks whether one or more accelerators in this partition have been used by the first device's secure world. If one or more accelerators have been used by the first device's secure world, the second request information is determined to be illegal; otherwise, the second request information can be determined to be legal.

[0026] In this embodiment of the application, before the first device assigns one or more accelerators to the first device's secure world, it can check the legitimacy of the second request information, thereby ensuring the security of the assigned one or more accelerators.

[0027] In conjunction with the first aspect, in some implementations of the first aspect, the method further includes: the first device negotiating a session key with the server according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and the first device storing the session key.

[0028] In this embodiment, the first device can store a session key, which facilitates the first device to use the session key to encrypt or decrypt communication data between the first device and the server. This further ensures the security of communication between the server and the first device, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0029] Secondly, a method for accessing a device is provided. This method is applied in a server, which includes a secure world and a non-secure world. The method includes: the server determining a first MMIO address in the secure world of the server; the server sending a first request message to a first device, the first request message being used to request the first device to determine a first memory address in the secure world of the first device, the first memory address corresponding to the first MMIO address; and the server accessing the first memory address through the first MMIO address.

[0030] Optionally, after receiving a response message from the first device that the first memory address has been allocated, the server can access the first memory address through the first MMIO address.

[0031] In this embodiment, the server can send a first request to the first device, requesting the first device to allocate a first memory address. The server can access the first memory address through the first MMIO address. In this way, the data channel established between the server and the first device cannot be stolen by software in the insecure world, and can meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0032] In conjunction with the second aspect, in some implementations of the second aspect, the method further includes: the server sending a second request message to the first device, the second request message being used to request the first device to assign one or more accelerators to the secure world of the first device; the server accessing the one or more accelerators through the first MMIO address.

[0033] Optionally, after receiving a response message from the first device that identifies one or more accelerators, the server may access the one or more accelerators via the first MMIO address.

[0034] In this embodiment of the application, the server can send a second request message to the first device, requesting the first device to allocate one or more accelerators. The server can access the one or more accelerators based on the first MMIO address, thereby facilitating the server to issue confidential computing tasks to the one or more accelerators.

[0035] In conjunction with the second aspect, in some implementations of the second aspect, the server determines the first MMIO address by: the server assigning a second MMIO address in the server's insecure world to the first MMIO address.

[0036] Optionally, the first MMIO address and the second MMIO address can be the same memory address, but their security attributes are different.

[0037] In conjunction with the second aspect, in some implementations of the second aspect, the method further includes: the server negotiating a session key with the first device according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and the server storing the session key.

[0038] In this embodiment, the server can store a session key, which facilitates the server to use the session key to encrypt or decrypt communication data between the first device and the server. This further ensures the security of communication between the server and the first device, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0039] In conjunction with the second aspect, in some implementations of the second aspect, the first memory address is a memory address with physical page granularity, or the first memory address is a memory address with physical memory segment granularity.

[0040] Thirdly, a device access apparatus is provided, the apparatus being applied to a first device, the first device comprising: a secure world and a non-secure world, the apparatus comprising: a transceiver module and a processing module; the transceiver module being configured to receive first request information sent by a server, the first request information being configured to request the first device to determine a first memory address, the first memory address corresponding to a first MMIO address in the secure world of the server; the processing module being configured to determine the first memory address in the secure world of the first device based on the first request information.

[0041] In conjunction with the third aspect, in some implementations of the third aspect, the processing module is specifically used to divide the second memory address in the insecure world of the first device into the first memory address according to the first request information.

[0042] In conjunction with the third aspect, in some implementations of the third aspect, the first memory address is a memory address with physical memory segments as the granularity; the processing module is also used to divide the memory of the first device according to a fixed memory partitioning method to obtain the second memory address.

[0043] In conjunction with the third aspect, in some implementations of the third aspect, the processing module is specifically used to: check the legality of the first request information; if the first request information is legal, allocate the second memory address of the insecure world of the first device to the first memory address according to the first request information.

[0044] In conjunction with the third aspect, in some implementations of the third aspect, the transceiver module is further configured to receive a second request message sent by the server, the second request message being used to request the first device to assign one or more accelerators to the secure world of the first device; the processing module is further configured to assign one or more accelerators in the non-secure world of the first device to the secure world of the first device according to the second request message.

[0045] In conjunction with the third aspect, in some implementations of the third aspect, the processing module is specifically used to: check the legality of the second request information; if the second request information is legal, allocate one or more accelerators in the insecure world of the first device to the secure world of the first device according to the second request information.

[0046] In conjunction with the third aspect, in some implementations of the third aspect, the processing module is further configured to: negotiate a session key with the server according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and store the session key.

[0047] Fourthly, a device access apparatus is provided, the apparatus being applied to a first device, the first device comprising: a secure world and a non-secure world, the apparatus comprising: a transceiver module and a processing module; the transceiver module being configured to receive first request information sent by a server, the first request information being configured to request the first device to determine a first memory address, the first memory address corresponding to a first MMIO address in the secure world of the server; the processing module being configured to determine the first memory address in the secure world of the first device based on the first request information.

[0048] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the transceiver module is further configured to send a second request message to the first device, the second request message being used to request the first device to assign one or more accelerators to the secure world of the first device; the processing module accesses the one or more accelerators through the first MMIO address.

[0049] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the processing module is specifically used to divide the second MMIO address in the insecure world of the server into the first MMIO address.

[0050] In conjunction with the fourth aspect, in some implementations of the fourth aspect, the processing module is further configured to negotiate a session key with the first device according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and to store the session key.

[0051] Fifthly, embodiments of this application provide a device access apparatus, the apparatus including a processor, the processor being coupled to a memory to read and execute instructions and / or program code in the memory to perform the methods of the first aspect and its implementations or the second aspect and its implementations.

[0052] In a sixth aspect, embodiments of this application provide a chip system including logic circuitry for coupling with an input / output interface to transmit data via the input / output interface, thereby executing the methods of the first aspect and its implementations or the second aspect and its implementations.

[0053] In a seventh aspect, embodiments of this application provide a computer-readable storage medium storing program code that, when the computer storage medium is run on a computer, causes the computer to perform the methods as described in the first aspect and its implementations or the second aspect and its implementations.

[0054] Eighthly, embodiments of this application provide a computer program product comprising: computer program code, which, when run on a computer, causes the computer to perform the methods described in the first aspect and its implementations or the second aspect and its implementations. Attached Figure Description

[0055] Figure 1 This is a schematic diagram of a virtualization technology framework provided in an embodiment of this application;

[0056] Figure 2 This is a schematic diagram of another virtualization technology framework provided in the embodiments of this application;

[0057] Figure 3 This application provides a confidential computing architecture based on an authorization mechanism.

[0058] Figure 4 This is a requester-responder model provided in the embodiments of this application;

[0059] Figure 5 This is the system architecture to which the device access method provided in the embodiments of this application applies;

[0060] Figure 6 This application provides a method for accessing a device.

[0061] Figure 7 This is another system architecture to which the device access method provided in the embodiments of this application applies;

[0062] Figure 8 This is another method for accessing a device provided in the embodiments of this application;

[0063] Figure 9 This is the system architecture to which the computing environment destruction method provided in the embodiments of this application applies;

[0064] Figure 10 This application provides a method for destroying a confidential computing environment.

[0065] Figure 11 This is a schematic diagram of a control CPU supporting an authorization mechanism deployed on a heterogeneous device, provided in an embodiment of this application;

[0066] Figure 12 This application provides a construction process for a heterogeneous confidential computing environment.

[0067] Figure 13 This is a schematic diagram illustrating the deployment of simplified partitioning logic on heterogeneous devices, provided in an embodiment of this application.

[0068] Figure 14 This is the construction process provided in another heterogeneous confidential computing environment according to the embodiments of this application;

[0069] Figure 15 This is a structural example diagram of an access device for a device provided in an embodiment of this application;

[0070] Figure 16 This is a structural example diagram of an access device for another device provided in an embodiment of this application;

[0071] Figure 17 This is an example diagram of a computer program product provided in an embodiment of this application. Detailed Implementation

[0072] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.

[0073] Virtualization technology is currently the mainstream technology on cloud computing platforms. Through virtualization, tenants can deploy multiple computing instances (such as virtual machines) on the cloud platform and use hardware resources in a time-sharing manner. Figure 1As shown, in this virtualization technology framework, tenants provide computing services, cloud service providers provide VMM software, and hardware providers offer CPUs that support virtualization functions. The VMM, through the virtualization support provided by the CPU, provides resource management, dynamic scheduling, and other functions for upper-layer virtual machines. For example, the VMM can configure different access permission control tables for different virtual machines accessing memory, preventing virtual machines from accessing the memory resources of other virtual machines without authorization.

[0074] Confidential computing is a computing model based on trusted hardware, combined with firmware and software to build an encrypted, isolated, and provable computing environment, ensuring the confidentiality and integrity of data, code, and computation processes within the environment. The need for confidential computing stems from tenants' distrust of Virtual Machine Controller (VMM) software. Under current virtualization technology frameworks, the VMM manages all memory resources, meaning it can access the code and data of all tenant virtual machines. When tenants deploy cloud computing services on a cloud platform, cloud service providers can obtain tenant data by inserting malicious code into the VMM. Confidential computing isolates the general computing environment from the confidential computing environment through isolation mechanisms, preventing unauthorized applications from accessing the confidential computing environment. Confidential computing can verify applications running in the confidential computing environment through remote authentication, ensuring the integrity and legitimacy of the program, and uses encryption mechanisms to ensure that computation in memory is in an encrypted state, preventing privileged software and even hardware from spying on it.

[0075] The foundation of confidential computing technology lies in the trusted execution environment (TEE) of the hardware architecture. Through hardware isolation mechanisms, it ensures that code and data running within the TEE cannot be accessed or tampered with by untrusted code. Confidential computing's advantages over other privacy technologies lie in its balance of security, versatility, and efficiency. It can seamlessly support general-purpose computing frameworks and applications, and its computational performance is comparable to plaintext computing. It can be used independently to protect data in a computing state, or it can be combined with other technologies to protect data. It is particularly important for scenarios involving big data, high performance, and general-purpose privacy computing, such as secure and trusted cloud computing, large-scale data confidentiality collaboration, and privacy-preserving deep learning.

[0076] On the other hand, the computational characteristics of artificial intelligence (AI) technologies, represented by machine learning and deep neural networks, involve parallel computation of large-scale data. From a hardware architecture perspective, AI computing is better suited to heterogeneous computing architectures such as graphics processing units (GPUs) or neural network processing units (NPUs). The architecture of heterogeneous computing units like GPUs / NPUs is characterized by high bandwidth and high concurrency, making them suitable for simple computational logic, such as matrix operations. Compared to CPU architectures, GPUs / NPUs are characterized by strong computational power but weaker control capabilities (conditional judgment, predictive execution). Therefore, the current characteristic of heterogeneous computing is that the CPU analyzes and breaks down computational tasks into individual computational tasks through control logic, then distributes these tasks to the GPU / NPU for computation, and finally, the CPU combines the results and returns the final computation result. Figure 2 As shown, the confidential virtual machine (also known as a confidential virtual machine) on the host side issues instructions and distributes data to the heterogeneous device through memory-mapped input and output (MMIO) addresses. System software can access the heterogeneous device as if it were memory. Simultaneously, after completing heterogeneous computation, the heterogeneous device writes data back to the physical address memory space and notifies the host-side CPU. Upon receiving the notification, the host-side CPU can read the data from the memory space. Both the MMIO address space and the physical address memory space are parts of the address space accessible to the CPU. The MMIO address space represents the access space for the heterogeneous device, while the physical address space represents the access space for dynamic random access memory (DRAM).

[0077] Figure 3 This application provides a confidential computing architecture based on an authorization mechanism.

[0078] Figure 3 The architecture shown includes both the secure world and the insecure world. For example... Figure 4 As shown, this architecture is based on a requester-responder model, where the requester (i.e., Figure 3 The virtual machine management module in the insecure world initiates a memory space authorization request, granting the right to use the memory space located in the insecure world to the secure world. The responder (i.e., Figure 3In the secure world, the RMM (Real-Time Management) checks the legitimacy of requests and executes subsequent operations if the legitimacy check passes. Confidential virtual machines built in the secure world can access confidential data through page table entries constructed by the RMM. Simultaneously, because memory space is authorized to the secure world, malware located in the insecure world cannot steal confidential data in memory. The advantage of this authorization mechanism is that responders in the secure world only need to check the legitimacy of requests. The original virtual machine scheduling, page fault management, and other management logic can reuse existing code to the maximum extent while meeting the data protection requirements of confidential computing.

[0079] However, the development of heterogeneous computing architectures has posed new challenges to the aforementioned CPU-centric confidential computing architectures. Such confidential computing architectures cannot meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios. Furthermore, the security, efficiency, and ease of use of such confidential computing architectures still need to be improved.

[0080] This application provides a device access method that can build a confidential computing environment in a heterogeneous scenario to meet the confidential computing needs of tenants in a heterogeneous computing scenario.

[0081] Figure 5 This is the system architecture to which the device access method provided in the embodiments of this application applies.

[0082] like Figure 5 As shown, the Virtual Function (VF) driver module is authorized to the secure world. Based on this, confidential virtual machines located in the server can use the VF module to send confidential computing tasks to secure memory and secure accelerators in heterogeneous devices. The data channel established between the server and heterogeneous devices cannot be stolen by malware outside the secure world, thus meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0083] Figure 6 This application provides a device access method, which can be applied to... Figure 5 In the architecture shown, method 600 may include the following steps.

[0084] S601, the server sends the first request information to the first device.

[0085] The first request information is used to request the first device to determine the first memory address, which corresponds to the first memory-mapped input / output (MMIO) address in the secure world of the server.

[0086] Optionally, the first memory address can be a memory address at the physical page level, or it can be a memory address at the physical memory segment level. The first device includes both a secure world and an insecure world, and the server includes both a secure world and an insecure world.

[0087] Optionally, the secure world in the server and the secure world in the first device may not be the same secure world; correspondingly, the insecure world in the server and the insecure world in the first device may not be the same insecure world.

[0088] It should be understood that the secure world in this application may also be referred to as a confidential domain or a trusted execution environment, and the insecure world may also be referred to as a normal domain or an untrusted execution environment; the first device may be referred to as a confidential device or a heterogeneous device in this application, and the server may be referred to as a host in this application.

[0089] In one embodiment, prior to step S601, method 600 further includes: the server determining a first MMIO address in the server's secure world.

[0090] Optionally, the server can partition the second MMIO address in the server's insecure world as the first MMIO address.

[0091] Optionally, the first MMIO address and the second MMIO address can be the same memory address, but their security attributes are different.

[0092] S602, the first device determines the first memory address in the secure world of the first device based on the first request information.

[0093] In one embodiment, the first device can divide a second memory address in the insecure world of the first device into a first memory address according to the first request information, thereby facilitating the server to access the first memory address based on the first MMIO address.

[0094] Optionally, the first memory address and the second memory address can be the same memory address, but their security attributes are different.

[0095] Optionally, classifying a second memory address in the insecure world of the first device as a first memory address can also be understood as the first device setting the memory attribute of the second memory address to secure and setting up a corresponding page table. For example, the memory attribute of the second memory address can be set to secure by modifying the label of the physical address of the second memory address, thereby classifying the second memory address as a first memory address.

[0096] In one embodiment, the first memory address is a memory address with physical memory segments as the granularity. Before the first device partitions the second memory address in the insecure world of the first device into the first memory address according to the first request information, method 600 may further include: the first device partitioning the memory of the first device according to a fixed memory partitioning method to obtain the second memory address. In this way, the first device can easily and efficiently partition the first memory address, thereby reducing the cost and power consumption of confidential computing under a heterogeneous computing architecture.

[0097] For example, when the first device has a total memory of 64GB, the first device can partition the memory according to a fixed memory partitioning method (e.g., 8GB, 16GB, 32GB), and the first device can authorize the partitioned memory according to the instructions of the first request information. For example, if the first request information requests the first device to grant the right to use 8GB of memory to the first device's secure world, the first device can partition the 64GB memory in 8GB increments and authorize the first device's secure world to use one of the partitioned 8GB memory blocks. The address corresponding to the partitioned 8GB memory before it is authorized for use by the first device's secure world can be called the second memory address, and the address corresponding to it after it is authorized for use by the first device's secure world can be called the first memory address.

[0098] In one embodiment, before step S602, the first device may check the validity of the first request information; if the first request information is valid, the first device may determine the first memory address based on the first request information. This prevents the first request information from being tampered with and ensures the security of the server accessing the first memory address through the first MMIO address.

[0099] Optionally, the first device checks the legality of the first request information by checking whether the second memory address has been used by the first device's security world. If the second memory address has not been used by the first device's security world, the first request information is confirmed to be legal; otherwise, the first request information is confirmed to be illegal.

[0100] S603, the server accesses the first memory address through the first MMIO address.

[0101] Optionally, after receiving the response message from the first device that the first memory address has been allocated, the server may access the first memory address through the first MMIO address.

[0102] In this embodiment, the server can send a first request to the first device, requesting the first device to allocate a first memory address. The server can access the first memory address through the first MMIO address. In this way, the data channel established between the server and the first device cannot be stolen by software in the insecure world, and can meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0103] The first device can not only classify the security attributes of the memory in the first device based on the request information sent by the server, but also classify the security attributes of the accelerator in the first device based on the request information sent by the server.

[0104] In one embodiment, method 600 further includes: a server sending a second request message to a first device, the second request message requesting the first device to allocate one or more accelerators to the secure world of the first device; the first device receiving the second request message from the server, and the first device allocating one or more accelerators from its insecure world to its secure world according to the second request message; the server accessing the one or more accelerators via a first MMIO address. This facilitates the server issuing confidential computing tasks to the one or more accelerators.

[0105] Optionally, the first device may assign one or more accelerators to the first device's secure world according to preset rules. For example, the first device includes 8 accelerators, and the first device may assign 1, 2 or 4 of the accelerators to the first device's secure world for use according to the instructions of the second request information.

[0106] Optionally, one or more of the aforementioned accelerators may be located in the insecure world of the first device before being assigned to the secure world of the first device.

[0107] Optionally, after receiving a response message from the first device that identifies one or more accelerators, the server may access the one or more accelerators via the first MMIO address.

[0108] It should be understood that accelerators may include heterogeneous accelerators, which can be used to perform cyclic computations on the resource-consuming portion of the CPU in a server or first device, thereby saving CPU computing resources.

[0109] In one embodiment, the first device, based on second request information, assigns one or more accelerators from its insecure world to its secure world. This includes: the first device checking the validity of the second request information; and if the second request information is valid, the first device assigns one or more accelerators from its insecure world to its secure world. This ensures the security of the assigned one or more accelerators.

[0110] Optionally, the first device checks the legality of the second request information, including: the first device checks whether one or more accelerators in this partition have been used by the first device's secure world. If one or more accelerators have been used by the first device's secure world, the second request information is determined to be illegal; otherwise, the second request information can be determined to be legal.

[0111] In one embodiment, method 600 further includes: a first device negotiating a session key with a server according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and the first device and the server storing the session key. This further ensures the security of communication between the server and the first device, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0112] Figure 7 This is another system architecture to which the device access method provided in the embodiments of this application applies.

[0113] exist Figure 7 On the host side, the system can be divided into a normal domain and a confidential domain, with confidential virtual machines running in the confidential domain. On the heterogeneous device side, memory attributes and heterogeneous accelerator attributes can be securely partitioned, and secure memory can only be accessed by confidential virtual machines and secure heterogeneous accelerators on the host side.

[0114] In this context, the ordinary domain can be the insecure world in method 600, the confidential domain can be the secure world in method 600, and the heterogeneous accelerator can be used to perform cyclic calculations on the resource-consuming parts of the CPU, thereby saving CPU computing resources.

[0115] The following is combined Figure 8 The flowchart shown details the device access process. Method 800 can be a more specific implementation of method 600, and method 800 can include the following steps.

[0116] S801, constructs a confidential virtual machine on the host side.

[0117] Among them, step S801 can correspond to Figure 7 In step ①, step S801 may include the following two sub-steps:

[0118] In S801a, after receiving a request to create a confidential virtual machine, the host-side virtual machine management module authorizes non-secure memory on the host side to the confidential domain. The memory management module within the confidential domain can check the validity of the memory authorization request in the creation request. After the check passes, the memory management module can classify the memory attributes of the non-secure memory as secure and set the corresponding page tables. After the memory management module completes all confidential memory allocation and data loading, it can start the confidential virtual machine in the host-side confidential domain.

[0119] For example, the memory management module may perform a validity check on the memory authorization request by checking whether the memory to be authorized has already been authorized, and / or checking whether the memory to be authorized has already been used by a confidential domain.

[0120] It should be understood that a page table can be a special data structure stored in the page table area of ​​the system space, storing the correspondence between logical pages and physical pages. Servers or confidential devices can use the page table to translate the virtual addresses they access.

[0121] S801b, the host-side confidential domain kernel module performs integrity measurements on confidential virtual machines within the confidential domain. The measurement values ​​can be verified by the tenant to ensure that the confidential virtual machine code loaded within the confidential domain meets the tenant's expectations.

[0122] Among them, integrity measurement can verify the integrity of code and data within a confidential domain. The integrity measurement process can be as follows: generate a signature (measurement value) based on the hash value and random number of the code to be tested, and then submit the signature to a third party for verification.

[0123] S802 enables the creation of a confidential computing environment on the host side that is heterogeneous to the device side.

[0124] Here, the host can be the server in method 600, the heterogeneous device can be the first device in method 600, and step S802 can correspond to... Figure 7 Step ②, S802 may include the following four sub-steps:

[0125] S802a, the host-side virtual machine management module receives a message from the confidential device management module ( Figure 7 The establishment request (not shown in the image) authorizes the non-secure MMIO address space on the host side to the confidential domain. The memory management module of the confidential domain performs a legality check on the memory authorization request in the establishment request. After the check passes, the memory management module of the confidential domain classifies the MMIO address space attribute as secure.

[0126] In step S802b, the host-side physical device driver module receives an establishment request from the confidential device management module, and the host sends a memory authorization request to the heterogeneous device side. The host-side scheduling module forwards the memory authorization request to the memory management module of the confidential domain on the heterogeneous device side. The memory management module on the heterogeneous device side checks the validity of the request. After the request passes the check, the memory management module of the confidential domain on the heterogeneous device side classifies the memory attributes as secure and sets the corresponding page table. This memory authorization request can be the first request information from method 600.

[0127] For example, the memory management module may perform a validity check on the memory authorization request by checking whether the memory to be authorized has already been authorized, and / or checking whether the memory to be authorized has already been used by a normal domain.

[0128] In step S802c, the host sends an accelerator authorization request to the heterogeneous device side. The scheduling module on the heterogeneous device side forwards the request to the hardware resource management module of the confidential domain on the heterogeneous device side. The hardware resource management module of the confidential domain on the heterogeneous device side checks the validity of the request. After the request passes the check, the hardware resource management module of the confidential domain on the heterogeneous device side sets the security attribute of the heterogeneous accelerator to secure. This accelerator authorization request can be the second request information from method 600.

[0129] For example, the hardware resource management's legality check of the accelerator authorization request may include: checking whether the accelerator to be allocated has already been allocated to a confidential domain, and / or checking whether the accelerator to be allocated has already been used by a normal domain.

[0130] S802d, the heterogeneous device-side confidential domain memory management module obtains the heterogeneous device-side security configuration (e.g., loaded code, register status, etc.) and performs integrity measurement. The measurement value is then verified by the tenant to ensure that the configuration within the heterogeneous device-side confidential domain meets the tenant's expectations.

[0131] S803 establishes an encrypted channel between the host side and the heterogeneous device side.

[0132] For example, the key management module in the host-side confidential domain and the key management module in the heterogeneous device-side confidential domain can negotiate the session key through a key exchange protocol, and manage and store the key through their respective key management modules.

[0133] After completing steps S801 to S803, the confidential virtual machine can send confidential computing tasks to the secure memory and secure accelerator on the heterogeneous device side through the virtual device driver module. Furthermore, it should be noted that step S803 can also be omitted in method 800. That is, when an attacker sniffs or listens to data in the transmission bus through physical means, the encrypted channel needs to be enabled; when there is no potential physical attacker, the confidential virtual machine can send confidential data in plaintext.

[0134] In this embodiment, the MMIO address space can be allocated to a confidential domain through a memory space authorization mechanism. Confidential virtual machines can access heterogeneous devices through the allocated MMIO addresses. This data channel cannot be stolen by software in the insecure world, thereby meeting the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0135] Figure 9 This is the system architecture to which the computing environment destruction method provided in the embodiments of this application applies.

[0136] exist Figure 9 On the host side, the system can be divided into a normal domain and a confidential domain, with confidential virtual machines running in the confidential domain. On the heterogeneous device side, memory attributes and heterogeneous accelerator attributes can be securely partitioned, and secure memory can only be accessed by confidential virtual machines and secure heterogeneous accelerators on the host side.

[0137] In this context, the ordinary domain can be the insecure world in method 600, the confidential domain can be the secure world in method 600, and the heterogeneous accelerator can be used to perform cyclic calculations on the resource-consuming parts of the CPU, thereby saving CPU computing resources.

[0138] The following is combined Figure 10 A method for destroying a confidential computing environment is described. Method 1000 may include the following steps.

[0139] S1001, destroy the confidential virtual machine on the host side.

[0140] Among them, step S1001 can correspond to Figure 9 ① of.

[0141] For example, when the host-side virtual machine management module receives a confidential virtual machine destruction request, it can send a memory deauthorization request to the host-side confidential domain memory management module. The confidential domain memory management module can perform a validity check on this memory deauthorization request and simultaneously check whether the current confidential virtual machine is inactive. An inactive state can be understood as the confidential virtual machine not performing any tasks. When the validity check passes and the confidential virtual machine is inactive, the host-side confidential domain memory management module can clear the data in memory and deauthorize the memory to the insecure world. During this process, if a session key exists, the host side can simultaneously destroy the session key used by the confidential virtual machine.

[0142] S1002, Destroy the confidential computing environment on the heterogeneous device side.

[0143] Among them, step S1002 corresponds to Figure 9 Step ②, step S1002 may include the following three sub-steps.

[0144] S1002a, The host-side virtual machine management module receives a message from the confidential device management module ( Figure 9 After a destruction request (not shown in the diagram) is received, the secure MMIO address space on the host side is deauthorized to the ordinary domain. The confidential domain memory management module performs a validity check on the memory deauthorization request. If the check passes, the confidential domain memory management module can classify the MMIO address space attributes as insecure.

[0145] S1002b: After receiving the destruction request from the decryption device management module, the host-side physical device driver module sends a memory deauthorization request to the heterogeneous device side. The heterogeneous device-side scheduling module forwards this request to the memory management module of the heterogeneous device-side confidential domain. The memory management module of the heterogeneous device-side confidential domain checks the legality of the memory deauthorization request. After the check passes, the memory management module of the heterogeneous device-side confidential domain can clean up the data in memory, classify the memory attributes as insecure, and set the corresponding page table. During this process, if a session key exists on the heterogeneous device side, the session key used by the heterogeneous device side can be destroyed simultaneously.

[0146] S1002c, the host sends an accelerator deauthorization request to the heterogeneous device side. The heterogeneous device-side scheduling module forwards this request to the hardware resource management module of the heterogeneous device-side confidential domain. The hardware resource management module of the heterogeneous device-side confidential domain checks the legality of the accelerator deauthorization request and also checks whether the heterogeneous accelerator is inactive. An inactive heterogeneous accelerator can be understood as the heterogeneous accelerator not executing any tasks. If the check passes and the heterogeneous accelerator is inactive, the hardware resource management module of the heterogeneous device-side confidential domain can clear the data in the heterogeneous accelerator and set the heterogeneous accelerator's security attribute to insecure.

[0147] In this embodiment, the MMIO address can be deauthorized to the insecure world through the memory space authorization mechanism, thereby destroying the constructed confidential computing environment.

[0148] Figure 11 This is a schematic diagram of a control CPU that supports an authorization mechanism deployed on a heterogeneous device, provided in an embodiment of this application.

[0149] like Figure 11 As shown, a CPU supporting an authorization mechanism can be deployed on the heterogeneous device side. This CPU supports the division between the secure and insecure worlds, and also supports memory switching between the secure and insecure worlds at the page level (e.g., 2 MB in size). At this point, Figure 7The confidential domain management module (including the memory management module and the hardware resource management module) can be deployed in the secure world of this CPU, namely the device trust management module. This CPU can be called the control CPU.

[0150] The following is based on Figure 12 The device access process is described using an example. Method 1200 can be a more specific implementation of method 600 and method 800. Method 1200 may include the following steps.

[0151] S1201, the host-side virtual machine management module receives a confidential virtual machine creation request and authorizes the host-side insecure memory to the confidential domain.

[0152] The host-side trusted management module performs a validity check on the memory authorization request in the setup request. After the request passes the check, the confidential domain host trusted management module classifies the memory attributes as secure and sets the corresponding page tables. Once all the required confidential memory allocation and data loading are complete, the confidential virtual machine is started in the host-side confidential domain.

[0153] S1202, The host trusted management module performs integrity measurement on the confidential virtual machines in the confidential domain.

[0154] After measurement, the measurement values ​​can be verified by the tenant to ensure that the confidential virtual machine code loaded in the confidential domain meets the tenant's expectations.

[0155] S1203, the virtual machine management module receives the establishment request from the confidential device management module, and the virtual machine management module authorizes the non-secure MMIO address space on the host side to the confidential domain.

[0156] The host trust management module can perform a legality check on the memory authorization request in the establishment request. After the check passes, the host trust management module can classify the MMIO address space attributes as secure.

[0157] S1204, the host-side physical device driver module receives the establishment request from the confidential device management module and sends a memory authorization request to the heterogeneous device side. This memory authorization request may be the first request information from method 600.

[0158] The heterogeneous device-side scheduling module forwards the memory grant request to the insecure world interface (HomeOS) that controls the CPU. After receiving the memory grant request, the insecure world interface HomeOS can forward the memory grant request to the device trusted management module. The device trusted management module can classify the memory attributes as secure and set the corresponding page table on the heterogeneous device side.

[0159] The scheduling module sends a memory grant request to the Home OS, which controls the CPU, and then forwards the request to the device trusted management module (DSM) to simplify management logic. The DSM is a new addition to the existing device logic. In the original logic, after the scheduling module sends a request to the Home OS, the Home OS can directly manage the memory and heterogeneous accelerators on the heterogeneous device side. With the addition of the DSM and security attributes for memory and heterogeneous accelerators in the secure world, additional signal processing logic can be added to the Home OS to forward the memory grant request to the DSM. Furthermore, from an implementation perspective, adding extra signal handlers to the Home OS does not significantly increase code complexity. From a security perspective, sending signals directly from the scheduling module to the DSM offers the same or similar security as this forwarding strategy, as the DSM performs security checks on the memory grant request.

[0160] S1205, the physical device driver module sends an accelerator authorization request to the heterogeneous device side.

[0161] The accelerator authorization request may be the second request information in method 600.

[0162] Optionally, the scheduling module on the heterogeneous device side can directly forward the accelerator authorization request to the device trusted management module of the confidential domain on the heterogeneous device side.

[0163] Optionally, the heterogeneous device-side scheduling module forwards the accelerator authorization request to the insecure world Home OS controlling the CPU. Upon receiving the accelerator authorization request, the insecure world Home OS can forward it to the device trust management module. The device trust management module can perform a validity check on the accelerator authorization request. After the check passes, the device trust management module can classify the accelerator's attribute as secure. Heterogeneous accelerators classified as secure can form a hardware cluster, which can be a partition of the heterogeneous accelerator management logic on the heterogeneous device side.

[0164] For a heterogeneous accelerator licensing request to be legitimate, it must meet at least one of the following requirements:

[0165] (1) When the attribute of a heterogeneous accelerator in a hardware cluster is set to secure, the attributes of other heterogeneous accelerators in the same hardware cluster (including newly licensed heterogeneous accelerators) should also be set to secure.

[0166] (2) When a heterogeneous accelerator in a hardware cluster is set to secure, when the Trusted Device Management receives a request to reset the heterogeneous accelerator (e.g., deauthorize it to non-secure, or assign it to another hardware cluster), it needs to ensure that the heterogeneous accelerator is inactive, i.e., not running any security tasks.

[0167] (3) Once a heterogeneous accelerator is assigned a security attribute, it can only be assigned to a hardware cluster.

[0168] S1206, the device trusted management module obtains the security configuration of the heterogeneous device side, performs integrity measurement, and submits the measurement value to the tenant for verification, thereby ensuring that the configuration in the confidential domain of the heterogeneous device side meets the tenant's expectations.

[0169] Optionally, the above security configuration may include trusted device management code and register states, etc.

[0170] S1207, the host trusted management module and the device trusted management module negotiate the session key through the key exchange protocol, and store the key in their respective data integrity and confidentiality protection (IDE) acceleration modules through their respective key management modules.

[0171] In this embodiment, by deploying CPUs that support authorization mechanisms on the heterogeneous device side, the heterogeneous device side can perform fine-grained partitioning of memory and heterogeneous accelerators, thereby facilitating host access to the partitioned secure memory and secure accelerators to meet the confidential computing needs of tenants in heterogeneous computing architecture scenarios.

[0172] Figure 13 This is a schematic diagram of deploying simplified partitioning logic on heterogeneous devices, provided in an embodiment of this application.

[0173] like Figure 13 As shown, in some cases, due to cost or power consumption considerations, it is not possible to deploy a control CPU that supports licensing mechanisms on the heterogeneous device side. In this case, it can be... Figure 9The confidential domain management module (including a memory management module and a hardware resource management module) is deployed within the scheduling module on the heterogeneous device side. In a specific implementation, this scheduling module can be a CPU with basic functions, responsible for scheduling computing tasks issued from the host side within the heterogeneous device. However, this scheduling module does not possess complex functions such as secure world partitioning and memory authorization. In another implementation, the scheduling module can be an application-specific integrated circuit (ASIC). After receiving computing tasks from the host side, the scheduling module can distribute the computing tasks to the heterogeneous accelerator according to a preset scheduling strategy. The CPU on the host side is a CPU that supports the authorization mechanism.

[0174] The following is based on Figure 14 The device access process is described using an example. Method 1400 can be a more specific implementation of methods 600 and 800. Method 1400 may include the following steps.

[0175] S1401, the host-side virtual machine management module receives a confidential virtual machine creation request and authorizes the host-side insecure memory to the confidential domain.

[0176] The host-side virtual machine management module performs a validity check on the memory authorization request in the setup request. After the request passes the check, the confidential domain trusted server management module classifies the memory attributes as secure and sets the corresponding page tables. Once all the required confidential memory allocation and data loading are completed, the confidential virtual machine is started in the host-side confidential domain.

[0177] S1402, The host trusted management module performs integrity measurement on the confidential virtual machines in the confidential domain.

[0178] Among these, the metrics can be verified by the tenant to ensure that the confidential virtual machine code loaded in the confidential domain meets the tenant's expectations.

[0179] S1403, the virtual machine management module receives the establishment request from the confidential device management module, and the virtual machine management module authorizes the non-secure MMIO address space on the host side to the confidential domain.

[0180] The host trusted management module can perform a legality check on memory authorization requests. After the check passes, the trusted server management module can classify the MMIO address space attributes as secure.

[0181] S1404, the host-side physical device driver module receives the establishment request from the confidential device management module and sends a memory authorization request to the heterogeneous device side. The memory authorization request can be the first request information from method 600.

[0182] The heterogeneous device-side scheduling module performs coarse-grained partitioning of memory. For example, when the total memory on the heterogeneous device side is 64GB, it can provide fixed-size memory partitioning methods such as 8GB, 16GB, and 32GB. The heterogeneous device side can authorize the partitioned memory according to one of the above partitioning methods based on the instructions issued by the host physical device driver module.

[0183] S1405, the scheduling module allocates the security attributes of heterogeneous accelerators proportionally according to the proportion of the total memory allocated to the security memory.

[0184] For example, when the heterogeneous devices have a total of 64GB of memory and 8 vector accelerators, the scheduling module can allocate 1, 2, or 4 vector accelerators to security attributes based on a certain ratio.

[0185] S1406, The trusted management module of the device obtains the security configuration of the heterogeneous device side, performs integrity measurement, and submits the measurement value to the tenant for verification, thereby ensuring that the configuration in the confidential domain of the heterogeneous device side meets the tenant's expectations.

[0186] Optionally, the above security configuration may include trusted device management code and register states, etc.

[0187] S1407, the host trusted management module and the device trusted management module negotiate the session key through the key exchange protocol, and store the key in their respective IDE acceleration modules through their respective key management modules.

[0188] In this embodiment, the heterogeneous device side can perform coarse-grained partitioning of memory and heterogeneous accelerators, thereby facilitating host access to the partitioned secure memory and heterogeneous accelerators. This allows for simple and efficient partitioning of secure memory and heterogeneous accelerators, thereby reducing the cost and power consumption of confidential computing under a heterogeneous computing architecture.

[0189] The above describes the device access method according to the embodiments of this application. The following will be combined with... Figure 15 and Figure 16 This application describes apparatus and devices according to embodiments thereof.

[0190] Figure 15This is a structural example diagram of a device access apparatus 1500 provided in an embodiment of this application. The device access apparatus includes a transceiver module 1510 and a processing module 1520. The transceiver module 1510 is used to send and receive commands and / or data; it can also be referred to as a communication interface or communication module. The processing module 1520 is used to perform data processing. Optionally, the apparatus 1500 further includes a storage module, which is used to implement corresponding storage functions and store corresponding commands and / or data. The processing module 1520 can read the commands and / or data from the storage module to enable the apparatus 1500 to implement the aforementioned device access method.

[0191] As a design, device 1500 can perform the actions performed by the first device in the above method embodiments.

[0192] The device 1500 includes a transceiver module 1510 and a processing module 1520; the transceiver module 1510 is used to receive a first request information sent by a server, the first request information being used to request a first device to determine a first memory address, the first memory address corresponding to a first MMIO address in the secure world of the server; the processing module 1520 is used to determine the first memory address in the secure world of the first device according to the first request information.

[0193] In one possible implementation, the processing module 1520 is specifically used to divide the second memory address in the insecure world of the first device into the first memory address according to the first request information.

[0194] In one possible implementation, the first memory address is a memory address with physical memory segments as the granularity; the processing module 1520 is also used to divide the memory of the first device according to a fixed memory partitioning method to obtain the second memory address.

[0195] In one possible implementation, the processing module 1520 is specifically used to: check the legality of the first request information; if the first request information is legal, allocate the second memory address of the insecure world of the first device as the first memory address according to the first request information.

[0196] In one possible implementation, the transceiver module 1510 is further configured to receive a second request message sent by the server, the second request message being used to request the first device to assign one or more accelerators to the secure world of the first device; the processing module 1520 is further configured to assign one or more accelerators in the non-secure world of the first device to the secure world of the first device according to the second request message.

[0197] In one possible implementation, the processing module 1520 is specifically used to: check the legality of the second request information; if the second request information is legal, allocate one or more accelerators in the insecure world of the first device to the secure world of the first device according to the second request information.

[0198] In one possible implementation, the processing module 1520 is further configured to: negotiate a session key with the server according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and store the session key.

[0199] As an alternative design, device 1500 can perform the actions performed by the server in the above method embodiments.

[0200] The device 1500 includes a transceiver module 1510 and a processing module 1520; the transceiver module 1510 is used to receive a first request information sent by a server, the first request information being used to request a first device to determine a first memory address, the first memory address corresponding to a first MMIO address in the secure world of the server; the processing module 1520 is used to determine the first memory address in the secure world of the first device according to the first request information.

[0201] In one possible implementation, the transceiver module 1510 is further configured to send a second request message to the first device, the second request message being used to request the first device to assign one or more accelerators to the secure world of the first device; the processing module 1520 accesses one or more accelerators through a first MMIO address.

[0202] In one possible implementation, the processing module 1520 is specifically used to divide the second MMIO address in the server's insecure world into the first MMIO address.

[0203] In one possible implementation, the processing module 1520 is further configured to negotiate a session key with the first device according to a key negotiation protocol, the session key being used to encrypt or decrypt communication data between the server and the first device; and to store the session key.

[0204] This application also provides a computer storage medium storing program instructions, which, when executed, may include, for example... Figure 6 , 8 Steps 10, 12, and 14 correspond to some or all of the steps in the device access method in the embodiments.

[0205] Figure 16This diagram illustrates the structure of another device access device 1600 provided in an embodiment of this application. Device 1600 includes a processor 1601, a communication interface 1602, and a memory 1603. One example of device 1600 is a chip. Another example of device 1600 is a computing device.

[0206] The methods disclosed in the embodiments of this application can be applied to or implemented by processor 1601. Processor 1601 can be a CPU, or other general-purpose processors, digital signal processors (DSPs), ASICs, field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. During implementation, each step of the above method can be completed by integrated logic circuits in the hardware of processor 1601 or by instructions in software form. The methods, steps, and logic block diagrams disclosed in the embodiments of this application can be implemented or executed. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor.

[0207] The memory 1603 can be volatile memory or non-volatile memory, or may include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DRRAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0208] The processor 1601, memory 1603, and communication interface 1602 can communicate via a bus. Memory 1603 stores executable code, and the processor 1601 reads the executable code from memory 1603 to execute the corresponding method. Memory 1603 may also include other software modules required for running processes, such as an operating system. The operating system can be Linux. TM UNIX TM WINDOWS TM wait.

[0209] For example, the executable code in memory 1603 is used to implement Figure 6 , 8 The method shown in 10, 12, and 14 involves processor 1601 reading the executable code from memory 1603 to execute it. Figure 6 , 8 The methods shown in 10, 12, and 14.

[0210] In some embodiments of this application, the disclosed methods can be implemented as computer program instructions encoded in a machine-readable format on a computer-readable storage medium or on other non-transitory media or articles of art.

[0211] Figure 17 A conceptual partial view schematically illustrates an example computer program product arranged according to at least some embodiments shown herein, the example computer program product including a computer program for executing computer processes on a computing device. In one embodiment, the example computer program product 1700 is provided using a signal carrying medium 1701. The signal carrying medium 1701 may include one or more program instructions 1702, which, when executed by one or more processors, can provide the above-described instructions for... Figure 6 , 8 The functions or parts thereof described in the methods shown in 10, 12, and 14. Therefore, for example, refer to... Figure 6 , 8 In the embodiments shown in 10, 12, and 14, one or more features may be provided by one or more instructions associated with the signal carrying medium 1701.

[0212] In some examples, signal-bearing medium 1701 may include computer-readable medium 1703, such as, but not limited to, hard disk drives, CDs, digital video optical discs (DVDs), digital magnetic tapes, memory, read-only memory (ROM), or random access memory (RAM), etc. In some embodiments, signal-bearing medium 1701 may include computer-recordable medium 1704, such as, but not limited to, memory, read / write (R / W) CDs, R / W DVDs, etc. In some embodiments, signal-bearing medium 1701 may include communication medium 1705, such as, but not limited to, digital and / or analog communication media (e.g., fiber optic cables, waveguides, wired communication links, wireless communication links, etc.). Therefore, for example, signal-bearing medium 1701 may be conveyed by wireless communication medium 1705 (e.g., wireless communication media conforming to the IEEE 802.11 standard or other transmission protocols). One or more program instructions 1702 may be, for example, computer-executable instructions or logical implementation instructions. In some examples, the aforementioned computing device can be configured to provide various operations, functions, or actions in response to program instructions 1702 transmitted to the computing device via one or more of computer-readable media 1703, computer-recordable media 1704, and / or communication media 1705. It should be understood that the arrangements described herein are merely illustrative. Therefore, those skilled in the art will understand that other arrangements and other elements (e.g., machines, interfaces, functions, sequences, and functional groups, etc.) can be used instead, and some elements can be omitted depending on the desired result. Furthermore, many of the described elements are functional entities that can be implemented as discrete or distributed components, or in any suitable combination and location in conjunction with other components.

[0213] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0214] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0215] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0216] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0217] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0218] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0219] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for accessing a device, characterized in that, The method is applied to a first device, the first device comprising: a secure world and a non-secure world, the method comprising: The first device receives a first request message sent by the server. The first request message is used to request the first device to determine a first memory address. The first memory address corresponds to a first memory-mapped input / output (MMIO) address in the secure world of the server. The first device determines a first memory address in the secure world of the first device based on the first request information.

2. The method as described in claim 1, characterized in that, The first device determines a first memory address in its secure world based on the first request information, including: Based on the first request information, the first device allocates the second memory address in the insecure world of the first device as the first memory address.

3. The method as described in claim 2, characterized in that, The first memory address is a memory address with physical memory segments as the granularity. Before the first device allocates the second memory address in the insecure world of the first device to the first memory address according to the first request information, the method further includes: The first device partitions its memory according to a fixed memory partitioning method to obtain the second memory address.

4. The method according to any one of claims 1 to 3, characterized in that, The first device determines a first memory address in its secure world based on the first request information, including: The first device checks the legality of the first request information; If the first request information is valid, the first device determines the first memory address based on the first request information.

5. The method according to any one of claims 1 to 3, characterized in that, The method further includes: The first device receives a second request message sent by the server, the second request message being used to request the first device to assign one or more accelerators to the first device's secure world; Based on the second request information, the first device assigns one or more accelerators from its insecure world to its secure world.

6. The method as described in claim 5, characterized in that, The first device, based on the second request information, assigns one or more accelerators from its insecure world to its secure world, including: The first device checks the validity of the second request information; If the second request information is valid, the first device, based on the second request information, assigns one or more accelerators from the insecure world of the first device to the secure world of the first device.

7. The method according to any one of claims 1 to 3, characterized in that, The method further includes: The first device negotiates a session key with the server according to a key negotiation protocol. The session key is used to encrypt or decrypt communication data between the server and the first device. The first device stores the session key.

8. A method for accessing a device, characterized in that, The method is applied to a server, the server comprising: a secure world and an insecure world, and the method includes: The server determines the first MMIO address in the server's secure world; The server sends a first request message to the first device, the first request message being used to request the first device to determine a first memory address in the secure world of the first device, the first memory address corresponding to the first MMIO address; The server accesses the first memory address through the first MMIO address.

9. The method as described in claim 8, characterized in that, The method further includes: The server sends a second request message to the first device, the second request message being used to request the first device to assign one or more accelerators to the first device's secure world; The server accesses the one or more accelerators through the first MMIO address.

10. The method as described in claim 8 or 9, characterized in that, The server determines the first MMIO address, including: The server assigns the second MMIO address in the server's insecure world to the first MMIO address.

11. The method as described in claim 8 or 9, characterized in that, The method further includes: The server negotiates a session key with the first device according to a key negotiation protocol. The session key is used to encrypt or decrypt communication data between the server and the first device. The server stores the session key.

12. The method as described in claim 8 or 9, characterized in that, The first memory address is a memory address with physical page granularity, or the first memory address is a memory address with physical memory segment granularity.

13. A device access device, characterized in that, include: A module that performs the method as described in any one of claims 1 to 7.

14. A device access device, characterized in that, include: A module that performs the method as described in any one of claims 8 to 12.

15. An access device for a device, characterized in that, include: A processor configured to be coupled to a memory, read and execute instructions and / or program code in the memory to perform the method as described in any one of claims 1-7.

16. A device access device, characterized in that, include: A processor configured to be coupled to a memory, read and execute instructions and / or program code in the memory to perform the method as described in any one of claims 8-12.

17. A chip system, characterized in that, include: A logic circuit for coupling with an input / output interface, through which data is transmitted to perform the method as described in any one of claims 1-12.

18. A computer-readable medium, characterized in that, The computer-readable medium stores program code that, when executed on a computer, causes the computer to perform the method as described in any one of claims 1-12.

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