Transistor compensation circuit, transistor compensation method and display panel

Abstract

The present invention discloses a transistor compensation circuit, a transistor compensation method, and a display panel, belonging to the field of display technology. The transistor compensation circuit includes: a detection transistor, a processing module, and a power supply chip; the source of the detection transistor is connected to the drain of the target transistor to be detected, and the drain of the detection transistor is connected to the first input terminal of the processing module; the second input terminal of the processing module is used to input a data signal, and the output terminal of the processing module is connected to the input terminal of the power supply chip; and the output terminal of the power supply chip is connected to the gate of the target transistor. Thus, by comparing the input signal and the output signal of the target transistor, it is possible to more accurately determine whether the switching state of the target transistor is normal, thereby reducing errors caused by inaccurate temperature detection of the temperature compensation transistor voltage.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a transistor compensation circuit, a transistor compensation method and a display panel. Background Art

[0002] The screen of a liquid crystal display (LCD) is scanned line by line by transistor devices such as thin film transistors (TFTs). In high or low temperature environments, the TFT characteristic curve will shift, resulting in deviations in the switching voltage.

[0003] Current temperature compensation circuits designed to address this issue typically incorporate a thermistor to compensate for the TFT's turn-on voltage. However, simply placing a thermistor on the printed circuit board assembly (PCBA) cannot accurately reflect the TFT's actual ambient temperature, resulting in inaccurate measurements. Summary of the Invention

[0004] Embodiments of the present application provide a transistor compensation circuit, a transistor compensation method, and a display panel to solve the technical problem of inaccurate compensation of a temperature compensation circuit.

[0005] According to one aspect of an embodiment of the present application, a transistor compensation circuit is provided, comprising: a detection transistor, a processing module, and a power supply chip; the source of the detection transistor is connected to the drain of a target transistor to be detected, and the drain of the detection transistor is connected to a first input terminal of the processing module, for outputting a feedback signal corresponding to the target transistor;

[0006] The second input end of the processing module is used to input a data signal, and the output end of the processing module is connected to the input end of the power supply chip, and is used to control the power supply chip to compensate for the turn-on voltage and / or turn-off voltage of the target transistor when it is determined that the number of times that the feedback signal and the data signal differ within a predetermined period exceeds a predetermined threshold; the output end of the power supply chip is connected to the gate of the target transistor.

[0007] In one possible embodiment, the processing module includes: a comparator and a timing control chip; the negative input terminal of the comparator is connected to the drain of the detection transistor as the first input terminal of the processing module; the positive input terminal of the comparator is used as the second input terminal of the processing module to input a data signal; the comparator is used to compare the feedback signal with the data signal and output a predetermined signal when there is a difference between the feedback signal and the data signal;

[0008] The input end of the timing control chip is connected to the output end of the comparator, and the output end of the timing control chip is connected to the input end of the power supply chip, and is used to output the compensation value of the start-up voltage and / or the shutdown voltage to the power supply chip when the number of times a predetermined signal is detected within a predetermined period exceeds a predetermined threshold.

[0009] In a possible implementation manner, the output end of the power chip is further connected to the gate of the detection transistor to control the on and off of the detection transistor.

[0010] In one possible embodiment, the transistor compensation circuit further includes: a level conversion chip; the level conversion chip is connected in series between the output end of the power chip and the gate of the target transistor, and is used to output a power signal to the gate of the target transistor based on the compensated turn-on voltage and / or turn-off voltage.

[0011] According to another aspect of an embodiment of the present application, a transistor compensation method is also provided, which is applied to the transistor compensation circuit described in any one of the first aspects, including: detecting a feedback signal output by the target transistor; comparing the feedback signal with the data signal input to the target transistor; determining whether there is a difference between the feedback signal and the data signal; if the number of times that the feedback signal and the data signal differ within a predetermined period exceeds a predetermined threshold, compensating for the turn-on voltage and / or turn-off voltage of the target transistor.

[0012] In one possible implementation, compensating the turn-on voltage and / or turn-off voltage of the target transistor includes: determining a compensation value corresponding to a current operating condition of the target transistor; and compensating the turn-on voltage and / or turn-off voltage of the target transistor based on the compensation value.

[0013] In one possible embodiment, determining the compensation value corresponding to the current working condition of the target transistor includes: obtaining the current working condition parameters of the target transistor; determining a compensation value that matches the current working condition parameters based on a preset compensation strategy; the preset compensation strategy includes: a correspondence between multiple alternative compensation values and working condition parameters.

[0014] In one possible embodiment, after compensating for the turn-on voltage and / or turn-off voltage of the target transistor, the method further includes: determining whether compensation has been performed based on all alternative compensation values in the preset compensation strategy; in response to compensation having been performed based on all alternative compensation values in the preset compensation strategy, determining whether there is a difference between the feedback signal and the data signal; and in response to the difference between the feedback signal and the data signal, disconnecting the power input to the target transistor.

[0015] In one possible embodiment, after determining whether there is a difference between the feedback signal and the data signal, the method further includes: outputting a predetermined signal in response to the difference between the feedback signal and the data signal; the number of times that there is a difference between the feedback signal and the data signal within the predetermined period exceeds a predetermined threshold includes: detecting that the number of times the predetermined signal is output exceeds the predetermined threshold within the predetermined period.

[0016] According to another aspect of an embodiment of the present application, a display panel is further provided, comprising an array substrate row driver (Gate on Array, GOA) module and the transistor compensation circuit described in any one of the first aspects above; wherein the GOA module includes N target transistors, and the transistor compensation circuit includes N detection transistors, where N is an integer greater than or equal to 1.

[0017] The present application provides a transistor compensation circuit, a transistor compensation method, and a display panel. The transistor compensation circuit includes: a detection transistor, a processing module, and a power supply chip; the source of the detection transistor is connected to the drain of the target transistor to be detected, the drain of the detection transistor is connected to the first input terminal of the processing module, and is used to output a feedback signal corresponding to the target transistor; the second input terminal of the processing module is used to input a data signal, the output terminal of the processing module is connected to the input terminal of the power supply chip, and is used to control the power supply chip to compensate the turn-on voltage and / or turn-off voltage of the target transistor when the number of times the feedback signal and the data signal differ within a predetermined period exceeds a predetermined threshold; the output terminal of the power supply chip is connected to the gate of the target transistor. In this way, by determining the difference between the data signal input and the feedback signal output of the target transistor, when the number of times the two signals differ within a certain period exceeds the threshold, it can be determined that the switching state of the transistor is abnormal, that is, there is a change in the turn-on / turn-off voltage caused by temperature change, and then the current gate-source voltage cannot meet the turn-on / turn-off voltage, resulting in an abnormal situation of incomplete turn-on / turn-off. Therefore, the above-mentioned abnormality of the target transistor can be quickly and accurately located, so that the compensation of the turn-on / off voltage can be more accurate, and the error caused by inaccurate detection in compensation based on temperature detection can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 This is a schematic structural diagram of a transistor compensation circuit provided in an embodiment of the present application;

[0020] Figure 2 This is a connection diagram of a detection transistor provided in an embodiment of the present application;

[0021] Figure 3 This is a schematic structural diagram of a transistor compensation circuit provided in an embodiment of the present application;

[0022] Figure 4 This is a schematic structural diagram of a transistor compensation circuit provided in an embodiment of the present application;

[0023] Figure 5 This is a flow chart of a transistor compensation method provided in an embodiment of the present application.

[0024] Description of Reference Numerals

[0025] 1. Detection transistor; 2. Target transistor; 3. Processing module; 4. Power supply chip; 5. Level conversion chip; 31. Comparator; 32. Timing control chip. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only embodiments of a part of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of this application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] This embodiment provides a transistor compensation circuit, Figure 1 Schematic diagram of a transistor compensation circuit provided by an embodiment of the present application. Figure 1 As shown, the transistor compensation circuit may include: a detection transistor 1, a processing module 3 and a power chip 4;

[0029] The source of the detection transistor 1 is connected to the drain of the target transistor 2 to be detected, and the drain of the detection transistor 1 is connected to the first input terminal of the processing module 3, which is used to output a feedback signal corresponding to the target transistor 2;

[0030] The second input terminal of the processing module 3 is used to input a data signal, and the output terminal of the processing module 3 is connected to the input terminal of the power chip 4, and is used to control the power chip 4 to compensate the turn-on voltage and / or turn-off voltage of the target transistor 2 when it is determined that the number of times that the feedback signal and the data signal differ within a predetermined period exceeds a predetermined threshold.

[0031] The output end of the power chip 4 is connected to the gate of the target transistor 2 .

[0032] In this embodiment, the target transistor 2 to be detected can be a TFT, for example, a TFT in a GOA circuit, which can be used for controlling a pixel circuit, etc. The source (S pole) of the target transistor 2 can be connected to a data signal line (data line) for inputting a data signal. The detection transistor 1 in the transistor compensation circuit can also be a TFT, and the source of the detection transistor 1 can be connected to the drain (D pole) of the target transistor 2 to be detected for receiving a signal output by the target transistor 2. The drain of the detection transistor 1 can be connected to the first input terminal of the processing module 3, and the signal output by the drain of the detection transistor 1 can be regarded as a feedback signal output by the target transistor 2.

[0033] In one embodiment, the transistor compensation circuit may include N detection transistors 1, where N is an integer greater than or equal to 1. The value of N may be determined according to the number of target transistors 2 to be detected, for example, the number of detection transistors 1 is equal to the number of target transistors 2 to be detected.

[0034] Exemplarily, one detection transistor 1 is connected to one target transistor 2 , and different detection transistors 1 are connected to different target transistors 2 , so that each detection transistor 1 can be used to detect the switching state and voltage compensation of one target transistor 2 .

[0035] In one embodiment, the number of detection transistors 1 is equal to the number of target transistors 2, which is also equal to the number of clock signal (CK) lines in the circuit. The drain of each detection transistor 1 can be connected to the first input terminal of the processing module 3 via a feedback signal (FB) line, and the number of FB lines is also equal to the number of transistors.

[0036] In one embodiment, the gate (G) of the detection transistor 1 can also be connected to the output terminal of the power chip 4, for example, Figure 2As shown, the gates of the N detection transistors 1 are all connected to a detection G line, which is connected to the output terminal of the power chip 4. In this way, the power chip 4 can synchronously control the on and off of the N detection transistors 1 through a single G line, facilitating synchronous detection and compensation of transistors in the GOA region.

[0037] In one embodiment, the G line and the FB line can be arranged on a Chip On Film (COF). The second input terminal of the processing module 3 inputs the data signal, which can be connected to the COF from the surface as V ref The line is connected to a second input terminal of the processing module 3 .

[0038] In one embodiment, for a double-sided driving GOA, N FB lines, 1 G line, and 1 V line can be arranged in the GOA area on both sides of the display panel. ref That is, 10 lines are added to the COF of the GOA area on both sides, so as to achieve accurate compensation of the on / off voltage of the TFT in the GOA without occupying too much wiring space.

[0039] In one embodiment, the processing module 3 may include a comparator and other devices. The second input terminal of the processing module 3 may be directly connected to the data signal line or to the source of the target transistor 2 for inputting the data signal.

[0040] In one embodiment, the power chip 4 (Power Integrated Circuit, Power IC) can be connected to the gate of the target transistor 2 by connecting the gate power line (Gate line) of the GOA area, thereby controlling the gate-source voltage of the target transistor 2, providing a power signal that meets the turn-on voltage to control the target transistor 2 to turn on, and providing a power signal that meets the turn-off voltage to control the target transistor 2 to turn off.

[0041] In one embodiment, the difference between the feedback signal and the data signal may refer to that the first voltage value of the feedback signal is inconsistent with the second voltage value of the data signal, or the difference between the first voltage value and the second voltage value exceeds a predetermined upper limit, or the proportion of the difference between the first voltage value and the second voltage value exceeds a predetermined proportion, etc.

[0042] In one embodiment, the processing module 3 controls the power chip 4 to compensate for the turn-on voltage and / or turn-off voltage of the target transistor 2, which may refer to controlling the power chip 4 to provide the compensated turn-on voltage and / or turn-off voltage to the gate of the target transistor 2. For example, the processing module 3 may output the compensation value of the turn-on voltage and / or turn-off voltage to the power chip 4, or output the voltage value of the compensated turn-on voltage and / or turn-off voltage, etc.

[0043] In this way, by adding a detection transistor 1 to detect the output signal of the target transistor 2 operating in the GOA and comparing it with the data signal, it is possible to determine whether the switching state of the target transistor 2 is normal. When an abnormal state of incomplete opening or incomplete closing occurs, the abnormality can be accurately detected and the turn-on voltage or turn-off voltage can be compensated, reducing the error caused by inaccurate detection when compensation is based solely on temperature detection.

[0044] In some embodiments, a transistor compensation circuit is provided. Figure 3 Schematic diagram of a transistor compensation circuit provided by an embodiment of the present application. Figure 3 As shown, the processing module 3 may include: a comparator 31 and a timing control chip 32;

[0045] The negative input terminal of the comparator 31 is connected to the drain of the detection transistor 1 as the first input terminal of the processing module 3; the positive input terminal of the comparator 31 is inputted with the data signal as the second input terminal of the processing module 3; the comparator 31 is used to compare the feedback signal with the data signal and output a predetermined signal when there is a difference between the feedback signal and the data signal;

[0046] The input end of the timing control chip 32 is connected to the output end of the comparator 31, and the output end of the timing control chip 32 is connected to the input end of the power supply chip 4, and is used to output the compensation value of the start-up voltage and / or the shutdown voltage to the power supply chip 4 when the number of times a predetermined signal is detected within a predetermined period exceeds a predetermined threshold.

[0047] In this embodiment, the comparator 31 includes a negative input terminal, a positive input terminal and an output terminal. The comparator 31 is used to compare the feedback signal input from the negative input terminal with the data signal input from the positive input terminal, and output a predetermined signal when there is a difference between the feedback signal and the data signal. For example, the predetermined signal can be a value of 1 or a high-level signal.

[0048] In one embodiment, when there is no difference between the feedback signal and the data signal, the comparator 31 outputs a signal other than the predetermined signal, such as a value of 0 or a low-level signal.

[0049] In one embodiment, a timing control chip 32 (Time Control Integrated Circuit, TCONIC) can be connected in series between the comparator 31 and the power chip 4, with the output of the comparator 31 connected to the input of the timing control chip 32, and the output of the timing control chip 32 connected to the input of the power chip 4. The timing control chip 32 can control the power chip 4 to compensate for the turn-on voltage and / or turn-off voltage of the target transistor 2, which can refer to controlling the power chip 4 to provide the compensated turn-on voltage and / or turn-off voltage to the gate of the target transistor 2. For example, the timing control chip 32 can output the compensation value of the turn-on voltage and / or turn-off voltage to the power chip 4, or output the voltage value of the compensated turn-on voltage and / or turn-off voltage, etc.

[0050] In one embodiment, after detecting the predetermined signal, the timing control chip 32 may count and determine the number of times the predetermined signal is detected within a predetermined period. If the number of times the predetermined signal is detected within the predetermined period exceeds a predetermined threshold, indicating that the number of times the feedback signal and the data signal differ exceeds the predetermined threshold, it can be determined that the switching state of the target transistor 2 is abnormal.

[0051] Here, the predetermined period may refer to 1 frame, or may refer to other periods such as 0.5 frame or 2 frames. The predetermined threshold may be 30 times, or may also be other values such as 20 times or 40 times.

[0052] In one embodiment, when the number of times the timing control chip 32 detects a predetermined signal within a predetermined period exceeds a predetermined threshold, the timing control chip 32 determines a compensation value corresponding to the current operating condition of the target transistor 2 and sends the compensation value to the power chip 4. The power chip 4 determines a compensated turn-on voltage and / or turn-off voltage based on the compensation value. For example, the compensated turn-on voltage and / or turn-off voltage can be determined based on the compensation value and the initial turn-on voltage and / or the initial turn-off voltage.

[0053] In one embodiment, the timing control chip 32 determines the compensation value corresponding to the current working condition of the target transistor 2 and sends the compensation value to the power chip 4, which may include determining a code corresponding to the current working condition parameter of the target transistor 2 and sending the code to the power chip 4. Here, the code can be stored in a preset compensation strategy, each code corresponds to a compensation value, and different codes correspond to different compensation values. For example, the preset compensation strategy contains multiple codes, each code corresponding to a different working condition parameter. The working condition parameter may include at least one of the current temperature value, the current continuous working time of the transistor, the total working time of the transistor, and other parameters.

[0054] For example, code 1 corresponds to a temperature value in the interval [t1, t2], code 2 corresponds to a temperature value in the interval [t3, t4], code 3 corresponds to a temperature value in the interval [t5, t6], and so on.

[0055] In one embodiment, the power chip 4 receives the code and determines a compensation value corresponding to the code, and determines a compensated turn-on voltage and / or turn-off voltage based on the compensation value.

[0056] In this way, by detecting that the input signal and output signal of the target transistor 2 are different for more than a certain number of times within a certain period, it is confirmed that there is an abnormality in the switching state of the transistor and compensation is performed. This can more accurately identify the abnormality in the switching state of the transistor, avoid missing the abnormal condition of the transistor, and avoid excessive compensation caused by a single or small amount of inconsistency in input and output signals due to accidental factors.

[0057] In some embodiments, the output end of the power chip 4 is also connected to the gate of the detection transistor 1 to control the on and off of the detection transistor 1 .

[0058] Here, the output end of the power chip 4 can be connected to the gates of the N detection transistors 1 through one G line, so that the turning on and off of the N detection transistors 1 can be synchronously controlled.

[0059] In one embodiment, the power chip 4 may include two output terminals, wherein the first output terminal may be connected to the gates of the N target transistors 2 via a gate power line connected to the GOA region, thereby controlling the gate-source voltage of the target transistor 2 and providing a turn-on voltage V GH1 The power supply signal is used to control the target transistor 2 to turn on and provide a turn-off voltage V GL1 The second output terminal can be connected to the gate of N detection transistors 1 through the G line to control the gate-source voltage of the detection transistor 1 and provide a power supply signal that meets the turn-on voltage V GH2 The power supply signal controls the detection transistor 1 to turn on and provide a turn-off voltage V GL2 The power supply signal is used to control the detection transistor 1 to turn off.

[0060] In one embodiment, the power chip 4 may be connected to a controller to control the switching of the target transistor 2 and / or the detection transistor 1 based on instructions from the controller.

[0061] In this way, the power chip 4 can realize switching control of the detection transistor 1 and the target transistor 2, which is beneficial to the synchronization of transistor turn-on control. The detection transistor 1 can be synchronously controlled to turn on the detection after the target transistor 2 is turned on.

[0062] In some embodiments, a transistor compensation circuit is provided. Figure 4 Schematic diagram of a transistor compensation circuit provided by an embodiment of the present application. Figure 4 As shown, the transistor compensation circuit further includes: a level conversion chip 5;

[0063] The level conversion chip 5 is connected in series between the output end of the power chip 4 and the gate of the target transistor 2 , and is configured to output a power signal to the gate of the target transistor 2 based on the compensated turn-on voltage and / or turn-off voltage.

[0064] In this embodiment, the input end of the level shift integrated circuit (L / S IC) 5 is connected to the output end of the power chip 4, and the output end of the level shift chip 5 is connected to the gate of the target transistor 2. The power chip 4 can output a compensated turn-on voltage and / or turn-off voltage to the level shift chip 5, and the level shift chip 5 outputs a power signal to the gate of the target transistor 2 based on the compensated turn-on voltage and / or turn-off voltage.

[0065] In one embodiment, the output end of the power chip 4 is also connected to the gate of the detection transistor 1 to control the on and off of the detection transistor 1 .

[0066] In one embodiment, the power chip 4 outputs the compensated turn-on voltage and / or turn-off voltage. After receiving the voltage value, the level conversion chip 5 generates a corresponding power signal and provides it to the gate of the target transistor 2 .

[0067] In one embodiment, the level conversion chip 5 can be connected to the gate of the N target transistors 2 by connecting the gate power line (Gateline) of the GOA region, thereby providing the gate-source voltage of the target transistor 2 and providing a turn-on voltage V GH1 The power supply signal is used to control the target transistor 2 to turn on and provide a turn-off voltage V GL1 The power supply signal is used to control the target transistor 2 to turn off.

[0068] In this way, based on the level signal corresponding to the compensated voltage value generated by the level conversion chip 5, a power signal that meets the current turn-on voltage / turn-off voltage of the target transistor 2 can be provided to accurately control the switching state of the target transistor 2.

[0069] This embodiment provides a transistor compensation method. Figure 5 FIG. 1 is a flow chart of a transistor compensation method provided in an embodiment of the present application. Figure 5 As shown, the transistor compensation method is applied to the transistor compensation circuit described in any of the above embodiments, including:

[0070] S10: Detect the feedback signal output by the target transistor 2;

[0071] S20: Compare the feedback signal with the data signal input to the target transistor 2;

[0072] S30: Determine whether there is a difference between the feedback signal and the data signal;

[0073] S40 : If the number of times that the feedback signal differs from the data signal within the predetermined period exceeds a predetermined threshold, the turn-on voltage and / or turn-off voltage of the target transistor 2 is compensated.

[0074] In one embodiment, the feedback signal output by the target transistor 2 can be detected by the detection transistor 1. The source of the detection transistor 1 is connected to the drain of the target transistor 2, and the signal output by the drain of the detection transistor 1 serves as the feedback signal. In this way, the start and end of the feedback signal detection can be controlled based on the control of turning on and off the detection transistor 1.

[0075] In one embodiment, step S10 may include: outputting a turn-on voltage to the source of the detection transistor 1 through the power chip 4 to start detecting the feedback signal output by the target transistor 2 .

[0076] In one embodiment, the feedback signal and the data signal may be compared by connecting the data signal line to the positive input terminal of the comparator 31 and inputting the feedback signal to the negative input terminal of the comparator 31 .

[0077] In one embodiment, the difference between the feedback signal and the data signal may refer to that the first voltage value of the feedback signal is inconsistent with the second voltage value of the data signal, or the difference between the first voltage value and the second voltage value exceeds a predetermined upper limit, or the proportion of the difference between the first voltage value and the second voltage value exceeds a predetermined proportion, etc.

[0078] In one embodiment, the detection transistor 1 executes step S10, the processing module 3 executes steps S20 and S30, and the processing module 3 determines that if the number of times that the feedback signal differs from the data signal within a predetermined period exceeds a predetermined threshold, the control power chip 4 compensates the turn-on voltage and / or turn-off voltage of the target transistor 2.

[0079] In one embodiment, step S30 may include determining whether there is a difference between the feedback signal and the data signal based on a signal output by the comparator 31. For example, when there is a difference between the data signal and the feedback signal, the comparator 31 outputs a predetermined signal, such as a value of 1, or a high-level signal.

[0080] In one embodiment, the predetermined period may be 1 frame, or may be other periods such as 0.5 frame or 2 frames. The predetermined threshold may be 30 times, or may be other values such as 20 times or 40 times.

[0081] In this way, by detecting the output signal of the target transistor 2 operating in the GOA and comparing it with the data signal, it is possible to determine whether the switching state of the target transistor 2 is normal. When an abnormal state of incomplete opening or incomplete closing occurs, the abnormality can be accurately detected and the turn-on voltage or turn-off voltage can be compensated, reducing the error caused by inaccurate detection when compensation is based solely on temperature detection.

[0082] In some embodiments, in step S40, compensating the turn-on voltage and / or turn-off voltage of the target transistor 2 may include:

[0083] Determine a compensation value corresponding to the current working condition of the target transistor 2;

[0084] The turn-on voltage and / or turn-off voltage of the target transistor 2 is compensated based on the compensation value.

[0085] In one embodiment, the current operating condition may represent at least one of a current temperature of the transistor, a current continuous operating time, and a total operating time. The compensation value corresponding to the current operating condition may be determined based on a pre-stored correspondence, for example, by calling a correspondence that matches the current operating condition to determine the compensation value corresponding to the current operating condition.

[0086] In one embodiment, determining the compensation value corresponding to the current working condition of the target transistor 2 may include: determining a turn-on voltage compensation value corresponding to the current working condition of the target transistor 2, and / or determining a turn-off voltage compensation value corresponding to the current working condition of the target transistor 2.

[0087] In one embodiment, the pre-stored corresponding relationship may include a turn-on voltage compensation value and / or a turn-off voltage compensation value corresponding to the working condition.

[0088] In one embodiment, the turn-on voltage compensation value can be determined based on the turn-off voltage compensation value, and the turn-off voltage compensation value can also be determined based on the turn-on voltage compensation value. For example, after determining the turn-on voltage compensation value corresponding to the current operating state of the target transistor 2 by calling a pre-stored correspondence, the turn-off voltage compensation value can be determined based on the turn-on voltage compensation value.

[0089] In one embodiment, the turn-on voltage compensation value may be equal to the turn-off voltage compensation value, or the turn-on voltage compensation value may be in a predetermined proportional relationship with the turn-off voltage compensation value.

[0090] In one embodiment, the timing control chip 32 determines a compensation value corresponding to the current working condition of the target transistor 2 and transmits the compensation value to the power chip 4. The power chip 4 compensates the turn-on voltage and / or turn-off voltage of the target transistor 2 based on the compensation value.

[0091] In this way, when it is determined that the target transistor 2 has an abnormal switching state based on the number of differences between the input and output signals, the compensation value is determined in combination with the working conditions, which can further improve the accuracy of transistor abnormality detection and turn-on / off voltage compensation.

[0092] In some embodiments, determining the compensation value corresponding to the current working condition of the target transistor 2 includes:

[0093] Obtaining current operating condition parameters of the target transistor 2;

[0094] A compensation value that matches the current working condition parameter is determined based on a preset compensation strategy; the preset compensation strategy includes: a corresponding relationship between multiple candidate compensation values and the working condition parameters.

[0095] In one embodiment, the current operating condition parameter may include at least one of the following: current temperature value, current continuous operating time, and current total operating time. In this way, the operating state of the target transistor 2 can be more accurately reflected based on the continuous operating time, thereby providing an accurate reference for the compensation value.

[0096] In one embodiment, a preset compensation strategy includes a mapping between multiple candidate compensation values and operating condition parameters. The operating condition parameters in the preset compensation strategy can be parameter values or parameter ranges. Each mapping between a candidate compensation value and an operating condition parameter can be represented by a compensation value code. For example, if the temperature value in the interval [t1, t2] corresponds to the candidate compensation value x1, this mapping corresponds to code 1; if the temperature value in the interval [t3, t4] corresponds to the candidate compensation value x2, this mapping corresponds to code 2, and so on.

[0097] In one embodiment, determining a compensation value that matches the current working condition parameters based on a preset compensation strategy may include: the timing control chip 32 determines a compensation value code that matches the current working condition parameters based on the preset compensation strategy, and sends the code to the power supply chip 4; the power supply chip 4 determines a corresponding compensation value based on the code.

[0098] For example, based on the current temperature value being in the interval [t3, t4], the compensation value code code matching the current working condition parameter is determined to be code2, the timing control chip 32 sends code2 to the power chip 4, and the power chip 4 determines the compensation value to be x2 based on code2.

[0099] In one embodiment, the preset compensation strategy may be stored in a memory or in the timing control chip 32 and may be obtained by calling or querying.

[0100] In this way, the voltage compensation value required for the current working condition can be quickly acquired through the preset compensation strategy, so that the turn-on voltage and / or turn-off voltage of the target transistor 2 can be compensated quickly and accurately.

[0101] In some embodiments, after compensating the turn-on voltage and / or turn-off voltage of the target transistor 2 , the method further includes:

[0102] determining whether compensation has been performed based on all candidate compensation values in the preset compensation strategy;

[0103] In response to compensation having been performed based on all candidate compensation values in the preset compensation strategy, determining whether there is a difference between the feedback signal and the data signal;

[0104] In response to a difference between the feedback signal and the data signal, the power input to the target transistor 2 is disconnected.

[0105] In one embodiment, compensation has been performed based on all alternative compensation values in the preset compensation strategy, which may include: the power chip 4 has received all codes in the preset compensation strategy within a predetermined time period, and has compensated the turn-on voltage and / or turn-off voltage of the target transistor 2 based on all codes.

[0106] In one embodiment, disconnecting the power input to the target transistor 2 may include controlling the power chip 4 to disconnect the power input to the gate of the target transistor 2. For example, when the transistor compensation circuit further includes a level shifter chip 5, the circuit may include controlling the power chip 4 to stop outputting the compensation value and controlling the level shifter chip 5 to stop outputting the power signal to the gate of the target transistor 2.

[0107] In one embodiment, the existence of a difference may refer to the first voltage value of the feedback signal being inconsistent with the second voltage value of the data signal, or the difference between the first voltage value and the second voltage value exceeding a predetermined upper limit value, or the proportion of the difference between the first voltage value and the second voltage value exceeding a predetermined proportion, etc.

[0108] In this way, after all compensation values in the compensation strategy have been compensated, if there is still a difference between the feedback signal and the data signal, it indicates that the target transistor 2 has been damaged and cannot be restored to a normal switching state through compensation. At this time, disconnecting the power supply can avoid continued damage to the transistor under abnormal circumstances, so as not to affect the normal operation of the circuit.

[0109] In some embodiments, after determining whether there is a difference between the feedback signal and the data signal, the method further includes:

[0110] outputting a predetermined signal in response to a difference between the feedback signal and the data signal;

[0111] The number of times that the feedback signal differs from the data signal within the predetermined period exceeds a predetermined threshold includes:

[0112] It is detected that the number of times a predetermined signal is outputted exceeds a predetermined threshold within a predetermined period.

[0113] In one embodiment, the predetermined signal may include a predetermined value, such as a value of 1, or may also include a predetermined level signal, such as a high level signal.

[0114] In one embodiment, the comparator 31 outputs a predetermined signal in response to a difference between the feedback signal and the data signal, and the timing control chip 32 controls the power supply chip 4 to compensate for the turn-on voltage and / or turn-off voltage of the target transistor 2 when it detects that the output number of the predetermined signal exceeds a predetermined threshold within a predetermined period.

[0115] In one embodiment, in response to the fact that there is no difference between the feedback signal and the data signal, another signal different from the predetermined signal is output, for example, a value of 0 is output, or a low-level signal is output.

[0116] In this way, the number of abnormalities can be counted more intuitively and accurately based on the output predetermined signal, thereby improving the accuracy of transistor abnormal state detection and the reliability of transistor compensation.

[0117] This embodiment provides a display panel, including a GOA module and the transistor compensation circuit described in any of the above embodiments; wherein the GOA module includes N target transistors 2, and the transistor compensation circuit includes N detection transistors 1, where N is an integer greater than or equal to 1.

[0118] In this embodiment, the G line and the FB line can be arranged on a Chip On Film (COF). The second input terminal of the processing module 3 inputs the data signal, which can be connected to the COF from the surface as V ref The line is connected to a second input terminal of the processing module 3 .

[0119] In one embodiment, for a double-sided driving GOA, N FB lines, 1 G line, and 1 V line can be arranged in the GOA area on both sides of the display panel. refFor example, for an 8-clock signal (8CK) circuit, N = 8, and 10 lines are added to the COF of the GOA area on both sides, thereby achieving accurate compensation for the on / off voltage of the TFT in the GOA without occupying too much wiring space.

[0120] As a possible implementation method, a transistor compensation circuit and method are provided. According to the characteristics of TFT switching characteristics and the pain point that the temperature of the mini LED display movement board is high and it is impossible to place a temperature compensation resistor, 8 detection TFTs (taking a group of 8CK as an example) are added to the GOA bus line to detect the switching status of all GOA TFTs on the panel in real time and perform real-time compensation; a total of 10 lines (8CK+1Vref+detection G line) are pulled back within the surface, and the compensation adopts integrated circuit bus (Inter-Integrated Circuit, IIC) communication. The TCON IC communicates with the Power IC in real time, and the turn-on and turn-off voltage compensation of the abnormal target TFT is performed in real time. The rate is fast, and at the same time, the shortcomings of slow compensation response speed and limited compensation value of the temperature compensation resistor are solved.

[0121] Specifically, taking bilateral GOA driving as an example, both sides are GOA routing areas. Taking an 8CK group as an example, the L / S IC on the driver board will provide 8 clock signals (8CK) from the COF to the in-plane GOA circuit. A detection TFT device is placed on each of the in-plane 8CK lines (both sides are placed in this way). At the same time, the FB line and the detection G line of the detection TFT are pulled back from the COF to the driver circuit board. According to the dual-drive routing method, the middle is the area where the data signal line delay is most serious. We pull this data line from the in-plane into the COF to the driver circuit board as the Vref line. In this way, the Vref line, detection G line, and FB line of this embodiment only need to be pulled out 10 lines on the left and right, and the COF routing can fully support these 10 lines.

[0122] Detection module design:

[0123] In order to detect the switching status of the target TFT in the surface in real time and more accurately, while taking into account the requirements of the panel aperture rate, the detection device is selected as TFT. Taking the single side of GOA as an example, the S pole of the detection TFT is connected to the D pole of the target TFT to be detected, and the G pole lines of the 8 detection TFTs are connected together so that the detection can be turned on or off at the same time. At the same time, the D pole of this detection TFT is pulled out as the FB line. 8CK corresponds to 8 FB lines. When the G pole of the detection TFT is turned on, the actual voltage charging the pixel in the surface can be detected in real time.

[0124] Circuit design:

[0125] The driving circuit is designed with a comparator module, which can be integrated into the TCON IC. The general-purpose input / output (GPIO) of the comparator is configurable. Pull back the Vref line, voltage FB line and detection G line from the surface, connect the Vref line (data line) to the + pole of the comparator, and connect the FB line to the - pole of the comparator. The working principle of the comparator is that when there is a difference between the + pole and the - pole, it will output 1 (for digital signals, it corresponds to a high-level signal). Similarly, when there is no difference between the + pole and the - pole, it will output a 0. The TCON IC determines the actual on-state of the TFT in the surface by collecting the number of occurrences of 1 and 0, and connects the detection G line to the output of the Power IC. The Power IC provides different voltages (during detection, this voltage must ensure that the detection TFT is fully turned on, and real-time feedback of the voltage charged to the pixel in the surface is given in V GH2 / V GL2 As a distinction from in-plane TFTs), it is used to control turn-on detection or turn-off detection.

[0126] In this embodiment, the setting method of code 1, 2, 3, and 4 is as follows: according to the characteristics of TFT, the compensation size required by TFT at different ambient temperatures is simulated, and the long-term working conditions of TFT are taken into consideration, and the codes of different segments are set. The focus of this part of the code is to set V GH (TFT turn-on voltage) and V GL (TFT off voltage) voltage, the real-time voltage adjustment method is that TCON IC detects the switch state and calls the code value to write to Power IC. Power IC outputs V GH / V GL Voltage, in real time, provides the optimal voltage for TFT to turn on and off. The working logic core of this embodiment lies in two judgment modules, of which the first judgment is whether compensation needs to be started. It is set within 1Frame to confirm the number of times that the voltage of the data line and the actual pixel charging line is different. If it exceeds 30 times, it is considered that the in-plane TFT switch is not fully turned on, that is, compensation is needed. The second judgment is that when the compensation is used for more than 4 cycles (that is, after all 4 codes are compensated), there is still a difference between the data line and the actual pixel charging line. The system believes that the TFT device has been damaged and cannot be restored by compensation. The drive system defaults to turning off the power supply to avoid continuous damage to the TFT under abnormal conditions. This also achieves timely detection of abnormalities and greatly improves the life of the TFT.

[0127] In summary, this embodiment makes up for the defects of traditional temperature compensation and also achieves real-time monitoring of the working status of TFT. It has a simple and feasible design, a simple circuit design, and a low implementation cost. At the same time, it can also promptly detect TFT problems, locate and repair them in time, greatly improving the factory yield. It is practical to intercept abnormalities in time to avoid customer complaints.

[0128] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.

[0129] The above description is only a preferred embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the scope of protection of the present application.

[0130] The foregoing is merely a list of specific embodiments of the present application, intended to enable those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the broadest scope consistent with the principles and novel features of the present application.

Claims

1. A transistor compensation circuit, characterized in that: include: Detect transistors, processing modules, and power chips; The source of the detection transistor is connected to the drain of the target transistor to be detected, and the drain of the detection transistor is connected to the first input terminal of the processing module, for outputting a feedback signal corresponding to the target transistor; The second input terminal of the processing module is used to input a data signal, and the output terminal of the processing module is connected to the input terminal of the power chip, and is used to control the power chip to compensate the turn-on voltage and / or turn-off voltage of the target transistor when it is determined that the number of times that the feedback signal and the data signal differ within a predetermined period exceeds a predetermined threshold; The output end of the power chip is connected to the gate of the target transistor; The processing module includes: a comparator and a timing control chip; The negative input terminal of the comparator is connected to the drain of the detection transistor as the first input terminal of the processing module; the positive input terminal of the comparator is used as the second input terminal of the processing module to input the data signal; the comparator is used to compare the feedback signal with the data signal and output a predetermined signal when there is a difference between the feedback signal and the data signal; The input end of the timing control chip is connected to the output end of the comparator, and the output end of the timing control chip is connected to the input end of the power supply chip, and is used to output the compensation value of the start-up voltage and / or the shutdown voltage to the power supply chip when the number of times a predetermined signal is detected within a predetermined period exceeds a predetermined threshold.

2. The transistor compensation circuit according to claim 1, wherein: The output end of the power supply chip is also connected to the gate of the detection transistor to control the on and off of the detection transistor.

3. The transistor compensation circuit according to claim 1, wherein: The transistor compensation circuit further includes: a level conversion chip; The level conversion chip is connected in series between the output terminal of the power chip and the gate of the target transistor, and is used to output a power signal to the gate of the target transistor based on the compensated turn-on voltage and / or turn-off voltage.

4. A transistor compensation method, applied to the transistor compensation circuit according to any one of claims 1 to 3, characterized in that: include: detecting a feedback signal output by a target transistor; comparing the feedback signal with a data signal input to the target transistor; determining whether there is a difference between the feedback signal and the data signal; If the number of times that the feedback signal differs from the data signal within a predetermined period exceeds a predetermined threshold, the turn-on voltage and / or turn-off voltage of the target transistor is compensated.

5. The transistor compensation method according to claim 4, wherein: The compensating for the turn-on voltage and / or turn-off voltage of the target transistor includes: Determining a compensation value corresponding to a current operating condition of the target transistor; A turn-on voltage and / or turn-off voltage of the target transistor is compensated based on the compensation value.

6. The transistor compensation method according to claim 5, characterized in that: Determining the compensation value corresponding to the current working condition of the target transistor includes: Obtaining current operating condition parameters of the target transistor; A compensation value that matches the current working condition parameter is determined based on a preset compensation strategy; the preset compensation strategy includes: a corresponding relationship between multiple candidate compensation values and the working condition parameters.

7. The transistor compensation method according to claim 6, wherein: After compensating the turn-on voltage and / or turn-off voltage of the target transistor, the method further includes: determining whether compensation has been performed based on all candidate compensation values in the preset compensation strategy; In response to compensation having been performed based on all candidate compensation values in the preset compensation strategy, determining whether there is a difference between the feedback signal and the data signal; In response to a difference between the feedback signal and the data signal, a power supply input to the target transistor is disconnected.

8. The transistor compensation method according to claim 4, wherein: After determining whether there is a difference between the feedback signal and the data signal, the method further includes: outputting a predetermined signal in response to a difference between the feedback signal and the data signal; The number of times that the feedback signal differs from the data signal within the predetermined period exceeds a predetermined threshold includes: It is detected that the number of times a predetermined signal is outputted exceeds a predetermined threshold within a predetermined period.

9. A display panel, characterized in that: It comprises an array substrate row driver GOA module and a transistor compensation circuit according to any one of claims 1 to 3; wherein the GOA module comprises N target transistors, the transistor compensation circuit comprises N detection transistors, and N is an integer greater than or equal to 1.

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