A method for establishing a measurement data model, a measurement method and a process control method

Abstract

The application provides a method for establishing a measurement data model, a measurement method and a process control method, and the method comprises the following steps: obtaining a deep groove structure on a process wafer; measuring the topographic features of the deep groove structure by using a transmission electron microscope; under the same etching condition, performing the same etching process on a reference control wafer as that on the process wafer until the groove structure on the reference control wafer reaches a first preset depth; measuring the spectral features of the groove structure by using optical scattering; and establishing a measurement data model of the spectral features of the groove structure obtained under different measurement conditions and the preset topographic features of the deep groove structure. According to the application, the groove structure close to the topographic features of the deep groove structure is obtained by performing the same etching process on the reference control wafer as that on the process wafer, the measurement data model is established according to the spectral features of the groove structure under different measurement conditions and the topographic features of the deep groove structure, the topographic features of the deep groove structure can be obtained without measuring the deep groove structure in the application, the efficiency of measuring the topographic features of the deep groove structure is greatly improved, and the measurement cost is reduced.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor integrated circuit manufacturing, and particularly relates to a measurement data model establishing method, a measurement method and a process control method. BACKGROUND

[0002] In the prior art, TEM (Transmission Electron Microscope) or HVSEM (High-Voltage Scanning Electron Microscopy) is mainly used to measure the topographic features of a deep trench structure in a semiconductor structure.

[0003] However, when TEM is used for measurement, the wafer to be measured needs to be destructively sliced to obtain a test image by transmission electron microscopy scanning, and then manual analysis and measurement are performed to obtain the topographic feature parameters of the deep trench structure, which results in a long process cycle and can only measure the actual image of a single small area. Image analysis also introduces artificial errors, resulting in low measurement accuracy. When HVSEM is used to measure the deep trench structure, the top view image obtained by high-energy electron scattering imaging of the wafer to be measured is analyzed and measured. The top view image cannot measure the topographic features of the deep trench structure when the included angle between the sidewall and the top surface of the deep trench is greater than 90° or the abnormal point of the topography is too large. The measurement data is a high-energy electron scattering image of a single small area, the measurement time is long, the measurement efficiency is low, the cost is high, and the data is not comprehensive.

[0004] Therefore, there is an urgent need for a new method for measuring the topographic features of a deep trench structure to improve the measurement efficiency and accuracy of the topographic features of the deep trench structure and reduce the measurement cost.

[0005] It should be noted that the above introduction to the technical background is only to facilitate a clear and complete description of the technical solutions of the present application, and to facilitate the understanding of those skilled in the art. The above technical solutions cannot be considered as known to those skilled in the art merely because they are described in the background section of the present application. SUMMARY

[0006] In view of the above shortcomings of the prior art, the present application aims to provide a measurement data model establishing method, a measurement method and a process control method to solve the problems of low measurement efficiency and poor accuracy of the topographic features of a deep trench structure in the prior art.

[0007] To achieve the above-mentioned purpose, the present application provides a measurement data model establishing method, which comprises:

[0008] Step A1: providing a process wafer, the process wafer being provided with a first semiconductor structure by preset process conditions; performing an etching process on the process wafer through the first semiconductor structure under preset etching conditions to obtain a complete deep trench structure; after slicing the process wafer provided with the deep trench structure, scanning the deep trench structure by a transmission electron microscope to obtain preset topographic features of the deep trench structure;

[0009] Step A2: providing m different preset etching conditions, n different first semiconductor structures, and k different process conditions for setting the first semiconductor structure, m, n, and k are all integers greater than or equal to 1; determining one or more measurement conditions according to different combinations of the preset etching conditions, the first semiconductor structures, and the process conditions; repeating step A1 under each measurement condition to obtain preset topographic features of the deep trench structure corresponding to each measurement condition;

[0010] Step A3: providing a reference control wafer, the reference control wafer being provided with a second semiconductor structure identical to the first semiconductor structure obtained by the same process conditions as the first semiconductor structure; performing the same etching process on the reference control wafer as the process wafer under the same preset etching conditions as the process wafer, and stopping when the trench structure obtained on the reference control wafer reaches a first preset depth; performing optical scattering measurement on the trench structure to obtain spectral features of the trench structure; the first preset depth is a depth at which the trench structure can be measured by the optical scattering measurement method to obtain the preset topographic features corresponding to the deep trench structure;

[0011] Step A4: repeating step A3 under each measurement condition in step A2 to obtain spectral features of the trench structure corresponding to each measurement condition;

[0012] Step A5: establishing the measurement data model according to the preset topographic features of the deep trench structure corresponding to each measurement condition and the spectral features of the trench structure corresponding to each measurement condition.

[0013] Optionally, the method further comprises: when performing step A3, slicing the reference control wafer provided with the trench structure and scanning by a transmission electron microscope to obtain the preset topographic features of the trench structure; verifying the correlation between the preset topographic features of the trench structure corresponding to each measurement condition in step A4 and the preset topographic features of the deep trench structure corresponding to each measurement condition in step A2; when the correlation is within a strong correlation range, determining that the measurement data model is reliable; when the correlation is outside the strong correlation range, increasing the first preset depth, repeating steps A3 to A5, and updating the measurement data model.

[0014] Optionally, the method further comprises:

[0015] a test etching condition, a test first semiconductor structure and / or a test process condition different from the preset etching condition, the first semiconductor structure and the process condition in the measurement condition, the etching process is performed on the process wafer by the test first semiconductor structure under the test etching condition to obtain a deep trench structure, the test first semiconductor structure is prepared on the process wafer by the test process condition;

[0016] the etching process is performed on the reference control wafer by a test second semiconductor structure identical to the test first semiconductor structure under the test etching condition, and the trench structure obtained on the reference control wafer is stopped after reaching the first preset depth, the test second semiconductor structure is prepared on the reference control wafer by the test process condition;

[0017] the reference control wafer with the trench structure and the process wafer with the deep trench structure are sliced and then scanned by a transmission electron microscope to obtain the preset topographic feature measurement value of the trench structure and the deep trench structure;

[0018] the preset topographic feature measurement value of the trench structure is substituted into the measurement data model to obtain the preset topographic feature calculation value of the deep trench structure, and the preset topographic feature calculation value of the deep trench structure is compared with the preset topographic feature measurement value;

[0019] when the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value does not exceed a first preset difference value, it is determined that the accuracy of the measurement data model meets the requirement; when the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value exceeds the first preset difference value, the preset topographic feature of the deep trench structure corresponding to each measurement condition and the spectral feature of the trench structure corresponding to each measurement condition, and the spectral feature of the trench structure corresponding to the test etching condition, the test first semiconductor structure and the test process condition are combined to obtain the preset topographic feature of the deep trench structure, and the measurement data model is updated according to the preset topographic feature of the deep trench structure and the spectral feature of the trench structure corresponding thereto;

[0020] or when the ratio of the difference between the preset topographic feature calculated value of the deep trench structure and the preset topographic feature measured value and the preset topographic feature calculated value of the deep trench structure does not exceed a first preset ratio, determining that the accuracy of the measurement data model meets the requirements; when the ratio of the difference between the preset topographic feature calculated value of the deep trench structure and the preset topographic feature measured value and the preset topographic feature calculated value of the deep trench structure exceeds the first preset ratio, combining the preset topographic feature of the deep trench structure corresponding to each measurement condition and the spectral feature of the trench structure corresponding to each measurement condition, and the spectral feature of the trench structure corresponding to the test etching condition, the test first semiconductor structure, and the test process condition, and updating the measurement data model according to the preset topographic feature of the deep trench structure and the spectral feature of the trench structure corresponding to each measurement condition.

[0021] Optionally, the aspect ratio of the deep trench structure is greater than or equal to 10, and the depth of the deep trench structure is greater than or equal to 1 micrometer.

[0022] Optionally, the first preset depth is 100 nanometers-500 nanometers.

[0023] Optionally, the thickness of the reference control wafer is greater than or equal to the thickness of the process wafer.

[0024] Optionally, the preset topographic feature of the deep trench structure includes one or more than one of any combination of a critical dimension at an opening of the deep trench structure, a critical dimension of a second preset depth of the deep trench structure, an included angle between a sidewall and a top surface at the opening of the deep trench structure, or a position or size of a topographic abnormal point of a side surface of the deep trench structure, the second preset depth being less than the first preset depth.

[0025] Optionally, the first semiconductor structure includes a photoresist layer; in the etching process, the photoresist layer is patterned by exposure and development; and the deep trench structure is formed in the process wafer by etching the process wafer through the patterned photoresist layer.

[0026] The application also provides a measurement method, which comprises:

[0027] The same process is used to set a first semiconductor structure on a wafer to be measured and a second semiconductor structure identical to the first semiconductor structure on a reference control wafer;

[0028] The wafer to be measured is etched through the first semiconductor structure to obtain a complete deep trench structure; and the reference control wafer is etched through the second semiconductor structure under the same etching condition as the wafer to be measured to obtain a trench structure identical to the wafer to be measured, and the etching of the reference control wafer is stopped when the trench structure reaches a first preset depth.

[0029] performing optical scattering measurement on the obtained trench structure to obtain a measurement value of the spectral feature of the trench structure;

[0030] The measurement data model obtained by the method for establishing a measurement data model according to any one of the above, wherein the measurement value of the spectral feature of the obtained trench structure is substituted into the measurement data model to obtain a measurement value of the preset topographic feature of the deep trench structure.

[0031] The present application also provides a process control method, which comprises:

[0032] obtaining a measurement value of the preset topographic feature of the deep trench structure on the wafer to be measured by the measurement method described above, and comparing the measurement value with a target value of the preset topographic feature of the deep trench structure;

[0033] when the difference between the measurement value of the preset topographic feature of the deep trench structure and the target value of the preset topographic feature of the deep trench structure exceeds a second preset difference value, stopping the process on the wafer to be measured or making a preset adjustment to the process on the wafer to be measured; or when the ratio of the difference between the measurement value of the preset topographic feature of the deep trench structure and the target value of the preset topographic feature of the deep trench structure to the measurement value of the preset topographic feature of the deep trench structure exceeds a second preset ratio value, stopping the process on the wafer to be measured or making a preset adjustment to the process on the wafer to be measured.

[0034] As described above, the method for establishing a measurement data model, the measurement method and the process control method of the present application have the following beneficial effects:

[0035] The present application obtains a trench structure close to the topographic feature of the deep trench structure by referring to the control wafer to perform the same etching process as the process wafer, and establishes a measurement data model according to the spectral feature of the trench structure under different measurement conditions and the topographic feature of the deep trench structure, so that the topographic feature of the deep trench structure can be obtained without measuring the deep trench structure in application, the efficiency of measuring the topographic feature of the deep trench structure is greatly improved, and the measurement cost is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 A step flowchart in the first embodiment of the present application is shown.

[0037] Figure 2 A structure schematic diagram of setting a first semiconductor structure in step A1 of the first embodiment of the present application is shown.

[0038] Figure 3 A structure schematic diagram of obtaining a deep trench structure in step A1 of the first embodiment of the present application is shown.

[0039] Figure 4A schematic diagram showing the structure of the second semiconductor structure in step A3 of the embodiment of the present application.

[0040] Figure 5 A schematic diagram showing the structure of the trench structure in step A3 of the embodiment of the present application.

[0041] Figure 6 A schematic diagram showing the top view of the process wafer in the embodiment of the present application.

[0042] Figure 7 A schematic diagram showing the top view of the reference wafer in the embodiment of the present application.

[0043] Figure 8 A schematic diagram showing the structure of the process wafer in the embodiment of the present application.

[0044] Figure 9 A schematic diagram showing the structure of the process wafer in the embodiment of the present application.

[0045] Figure 10 A schematic diagram showing the structure of the reference wafer in the embodiment of the present application.

[0046] Figure 11 A schematic diagram showing the structure of the reference wafer in the embodiment of the present application.

[0047] Figure 12 A schematic diagram showing the structure of the reference wafer in the embodiment of the present application.

[0048] Figure 13 A schematic diagram showing the structure of the reference wafer in the embodiment of the present application.

[0049] Element number explanation

[0050] 1, process wafer; 11, first semiconductor structure; 111, stop layer; 112, mask layer; 113, photoetching layer; 114, deep trench structure; 12, previous pattern; 2, reference wafer; 21, second semiconductor structure; 211, trench structure. DETAILED DESCRIPTION

[0051] The present application is described herein with reference to particular embodiments for a particular application. Those skilled in the art will understand that the application is not limited to those embodiments but is applicable to other embodiments and / or variations as appreciated by those skilled in the art. Those skilled in the art will further appreciate that the various features described herein can be implemented in software or hardware or a combination thereof.

[0052] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0053] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the accompanying drawings for devices in use or operation.

[0054] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0055] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0056] Example 1:

[0057] like Figure 1 As shown, this embodiment provides a method for establishing a measurement data model, the method comprising:

[0058] Step A1: Provide a process wafer, on which a first semiconductor structure is set by preset process conditions; under preset etching conditions, perform an etching process on the process wafer through the first semiconductor structure to obtain a complete deep trench structure; slice the process wafer with the obtained deep trench structure and scan the deep trench structure using a transmission electron microscope to obtain the preset morphological features of the deep trench structure.

[0059] Step A2: Provide m different preset etching conditions, n different first semiconductor structures, and k different process conditions for setting the first semiconductor structure, where m, n, and k are all integers greater than or equal to 1; determine one or more measurement conditions based on different combinations of the preset etching conditions, the first semiconductor structure, and the process conditions; repeat step A1 under each measurement condition to obtain the preset morphological features of the deep trench structure corresponding to each measurement condition;

[0060] Step A3: providing a reference control piece, wherein a second semiconductor structure identical to the first semiconductor structure is disposed on the reference control piece by the same process condition as the first semiconductor structure; performing the same etching process on the reference control piece as the process wafer under the same preset etching condition as the process wafer until the trench structure obtained on the reference control piece reaches a first preset depth, and then stopping; performing optical scattering measurement on the trench structure to obtain the spectral characteristics of the trench structure; and the first preset depth is the depth at which the trench structure can be measured by the optical scattering measurement method to obtain the preset topographic feature corresponding to the deep trench structure;

[0061] Step A4: repeating step A3 under each measurement condition in step A2 to obtain the spectral characteristics of the trench structure corresponding to each measurement condition;

[0062] Step A5: establishing the measurement data model according to the preset topographic feature of the deep trench structure corresponding to each measurement condition and the spectral characteristics of the trench structure corresponding to each measurement condition.

[0063] The establishment method of the measurement data model of the embodiment will be described in detail below with reference to the accompanying drawings. It should be noted that the above sequence does not strictly represent the sequence of the establishment method of the measurement data model protected by the embodiment, and those skilled in the art can change it according to the actual preparation steps.

[0064] First, step A1 is performed, as shown in Figure 2 , a process wafer 1 is provided, wherein a first semiconductor structure 11 is disposed on the process wafer 1 by a preset process condition; as shown in Figure 3 , the process wafer 1 is etched by the first semiconductor structure 11 under a preset etching condition to obtain a complete deep trench structure 114; after the process wafer 1 with the deep trench structure 114 is sliced, the deep trench structure 114 is scanned by a transmission electron microscope to obtain the preset topographic feature of the deep trench structure 114.

[0065] Then, step A2 is performed, m different preset etching conditions, n different first semiconductor structures, and k different process conditions for disposing the first semiconductor structure 11 are provided, and m, n, and k are all integers greater than or equal to 1; one or more measurement conditions are determined according to the combination of different preset etching conditions, first semiconductor structures, and process conditions, and step A1 is repeated under each measurement condition to obtain the preset topographic feature of the deep trench structure 114 corresponding to each measurement condition.

[0066] Next, step A3 is performed, as shown in Figure 4As shown, a reference control piece 2 is provided, and the reference control piece 2 is provided with a second semiconductor structure 21 which is the same as the first semiconductor structure 11 and is obtained through the same process conditions as the first semiconductor structure 11; as shown Figure 5 As shown, the reference control piece 2 is subjected to the same etching process as the process wafer 1 under the same preset etching conditions as the process wafer 1, and the etching process is stopped when the trench structure 211 obtained on the reference control piece 2 reaches a first preset depth; optical scattering measurement is performed on the trench structure 211 to obtain the spectral characteristics of the trench structure 211; and the first preset depth is a depth at which the trench structure 211 can be measured to have the preset topographic characteristics corresponding to the deep trench structure 114 through the optical scattering measurement method.

[0067] The present application obtains the same structure on the reference control piece 2 through the same process as the first semiconductor structure 11, so that the topographic characteristics of the trench structure 211 and the deep trench structure 114 formed subsequently are as similar as possible, thereby improving the accuracy of establishing the measurement data model; and the same preset etching conditions as forming the deep trench structure 114 are used to perform the same etching process as the process wafer 1 on the reference control piece 2, so that the trench structure 211 obtains similar topographic characteristics at the opening of the deep trench structure 114, thereby establishing a corresponding relationship between the topographic characteristics of the trench structure 211 and the topographic characteristics of the deep trench structure 114 in the subsequent steps.

[0068] In one embodiment, the thickness of the reference control piece 2 is greater than or equal to the thickness of the process wafer 1.

[0069] The present application sets the thickness of the reference control piece 2 to be greater than the thickness of the process wafer 1, and at the same time, the depth of the trench structure 211 to be formed on the reference control piece 2 is less than the depth of the deep trench structure 114 to be formed on the process wafer 1, so that the reference control piece 2 can be reused, and after a layer of trench structure 211 is formed and measured, the part containing the trench structure 211 is removed, and the remaining reference control piece 2 is used to form a new trench structure 211 again, thereby reducing the cost of establishing the measurement data model.

[0070] Specifically, the process wafer 1 and the reference control piece 2 are different in that the process wafer 1 has undergone all the process flows of the product before the deep trench structure 114 is prepared, including previously obtained patterns and structures, as shown Figure 6 As shown, the process wafer 1 is a top view, including a previous pattern 12; and the reference control piece 2 only undergoes the process flow of setting the second semiconductor structure 21 before the trench structure 211 is prepared, as shown Figure 7 As shown, the reference control piece 2 is a top view and does not undergo all the process flows, thereby reducing the overall production cost.

[0071] In one embodiment, when the process wafer 1 only includes a substrate layer as a device substrate before the first semiconductor structure 11 is set, the reference control wafer 2 also only includes the same substrate layer; when the process wafer 1 has prepared other structure layers on the substrate layer before the first semiconductor structure 11 is set, the reference control wafer 2 should also be provided with the same structure layers, so that the preset topographic features of the trench structure 211 and the deep trench structure 114 have a stronger correlation.

[0072] In one embodiment, as shown in FIG. 1, the first semiconductor structure 11 includes a photoetching layer 113, and as shown in FIG. 2, the second semiconductor structure 21 also includes the photoetching layer 113. Figure 2 Figure 4 The etching process is performed by exposing and developing the photoetching layer 113 to obtain a patterned photoetching layer 113, and the deep trench structure 114 is formed on the process wafer 1 by etching the process wafer 1 through the patterned photoetching layer 113. Specifically, the first semiconductor structure 11 can also include other structures, which can be set according to process requirements, and are all within the protection scope of the present application.

[0073] In one embodiment, the step of forming the first semiconductor structure 11 includes: as shown in FIG. 1, growing a stop etching layer 111 on the process wafer 1, and growing a mask layer 112 on the stop etching layer 111; as shown in FIG. 2, growing a stop etching layer 111 on the reference control wafer 2, and growing a mask layer 112 on the stop etching layer 111. Figure 8 Figure 9 As shown in FIG. 2, a photoetching layer 113 is provided on the mask layer 112, and the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the reference control wafer 2 constitute the second semiconductor structure 21; the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the process wafer 1 and the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the reference control wafer 2 are obtained by using completely same process conditions and process methods. Figure 10 Figure 11 As shown in FIG. 2, a photoetching layer 113 is provided on the mask layer 112, and the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the reference control wafer 2 constitute the second semiconductor structure 21; the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the process wafer 1 and the stop etching layer 111, the mask layer 112, and the photoetching layer 113 on the reference control wafer 2 are obtained by using completely same process conditions and process methods.

[0074] In one embodiment, as shown in FIG. 1, the first semiconductor structure 11 includes a photoetching layer 113, and as shown in FIG. 2, the second semiconductor structure 21 also includes the photoetching layer 113. Figure 9 ​​​As shown, the first semiconductor structure 11 sequentially comprises a stop layer 111, a mask layer 112 and a photoetching layer 113 from bottom to top; in the etching process, the photoetching layer 113 is patterned by exposure and development; the mask layer 112 and the stop layer 111 are etched by the patterned photoetching layer 113; the process wafer 1 is etched by the patterned mask layer 112 and the stop layer 111, and the deep trench structure 114 is formed on the process wafer 1. Figure 3 As shown, the first semiconductor structure 11 sequentially comprises a stop layer 111, a mask layer 112 and a photoetching layer 113 from bottom to top; in the etching process, the photoetching layer 113 is patterned by exposure and development; the mask layer 112 and the stop layer 111 are etched by the patterned photoetching layer 113; the process wafer 1 is etched by the patterned mask layer 112 and the stop layer 111, and the deep trench structure 114 is formed on the process wafer 1.

[0075] Specifically, Figure 3 and Figure 5 As shown in FIGS. 1 and 2, the first semiconductor structure 11 and the second semiconductor structure 21 comprise the stop layer 111, and the structure after the deep trench structure 114 and the trench structure 211 are formed; when the first semiconductor structure 11 and the second semiconductor structure 21 do not comprise the stop layer 111, the process wafer 1 after the deep trench structure 114 is formed does not comprise the stop layer 111, and the reference control wafer 2 after the trench structure 211 is formed does not comprise the stop layer 111.

[0076] In one embodiment, as shown in FIG. 3, Figure 12 As shown, the preset topographic feature of the deep trench structure 114 comprises one or more than one of the following: a critical dimension a of an opening of the deep trench structure 114, a critical dimension b of a second preset depth of the deep trench structure 114, an included angle c between a sidewall and a top surface of the opening of the deep trench structure 114, or a position or size of a topographic abnormal point d of a side surface of the deep trench structure 114, and any combination of one or more than one of the above, wherein the second preset depth is smaller than the first preset depth.

[0077] Specifically, the topographic abnormal point can be Figure 12 As shown in FIG. 4, the topographic abnormal point can be necking, or other topographic abnormal points on the process wafer 1 that need to be measured; the preset topographic feature can also use other topographic features of the deep trench structure 114 that need to be measured. The above preset topographic features are mostly topographic features at the opening of the deep trench structure 114, and thus are more suitable for measuring the topographic features of the trench structure 211 formed on the reference control wafer 2 by using the same front process as the deep trench structure 114, thereby embodying the advantage of the scheme of the present application that the deep trench structure 114 is difficult to directly obtain the topographic features of the deep trench structure 114 by optical scattering measurement (OCD) due to excessive depth.

[0078] Specifically, when the topography feature to be measured is too deep to be measured by the OCD method, the scheme of the present application is not suitable for measuring the topography feature, and thus the depth where the topography feature to be measured is required to be less than or equal to the first preset depth of the trench structure 211.

[0079] Specifically, the trench structure 211 can be set first, and then the deep trench structure 114 can be set, or the trench structure 211 and the deep trench structure 114 can be set simultaneously. Preferably, the trench structure 211 and the deep trench structure 114 are set simultaneously to ensure that the trench structure 211 and the front part of the deep trench structure 114 have the same etching process, so as to ensure that the preset topography feature of the trench structure 211 has a strong correlation with the preset topography structure of the deep trench structure 114.

[0080] In an embodiment, the aspect ratio of the deep trench structure 114 is greater than or equal to 10, and the depth of the deep trench structure 114 is greater than or equal to 1 micrometer.

[0081] Specifically, when the deep trench structure 114 meets the above conditions, it is the industry standard deep trench structure 114, which is more suitable for the scheme of the present application to measure the topography feature.

[0082] In an embodiment, the first preset depth is 100 nanometers-500 nanometers. Specifically, other first preset depths suitable for specific application scenarios can also be used to meet the conditions for optical scattering measurement of the trench structure 211 and to obtain the preset topography feature corresponding to the deep trench structure 114.

[0083] Then, step A4 is performed, and step A3 is repeated under each measurement condition in step A2 to obtain the spectral feature of the trench structure 211 corresponding to each measurement condition.

[0084] Finally, step A5 is performed, and the measurement data model is established according to the preset topography feature of the deep trench structure 114 corresponding to each measurement condition and the spectral feature of the trench structure 211 corresponding to each measurement condition.

[0085] In the prior art, when measuring the topographic features of the deep trench structure 114 by TEM (Transmission Electron Microscope), destructive slicing of the wafer to be measured is required, resulting in a long measurement period, high cost, and only a very small area can be measured, with very low measurement efficiency. Moreover, since image analysis requires manual measurement of the obtained image, system bias is introduced, resulting in low measurement accuracy. When using HVSEM to measure the topographic features of the deep trench structure 114, since it can only measure the top view image obtained by electron scattering imaging, it is difficult to measure the topographic features that are difficult to identify in the top view, such as deep trench structures 114 with a side wall and top surface included angle greater than 90° or a necking structure too large. Therefore, it is difficult to accurately measure the topographic features using HVSEM, and the data comprehensiveness is poor. The method for measuring trench topographic features in the prior art, optical scattering measurement (OCD), cannot be used for measuring the topography of deep trench structures 114 with a depth of more than 1 micrometer.

[0086] The present application uses the same etching conditions as the deep trench structure 114 to etch the trench structure 211 on the reference control wafer 2, but stops etching only when it reaches the first preset depth (i.e. the depth at which the preset topographic features can be measured). Therefore, the depth of the trench structure 211 can be much smaller than that of the deep trench structure 114, so that the preset topographic features of the trench structure 211 can be obtained by optical scattering measurement. Through the combination of different etching conditions, the first semiconductor structure 11 and the process conditions for setting the first semiconductor structure 11, a measurement data model of the spectral features of the trench structure 211 and the preset topographic features obtained by TEM of the deep trench structure 114 is established through preliminary experiments. In practical applications, the preset topographic features of the deep trench structure 114 can be obtained by measuring only the spectral features of the trench structure 211, without the need for slicing the deep trench structure 114 to be measured. Moreover, only optical scattering measurement is required, which can greatly improve the measurement efficiency and reduce the measurement cost. In addition, the measurement data model can be used to measure various topographic features of the deep trench structure 114, and the relationship model established by the measurement data model can reduce the system error of the measurement, thereby obtaining more accurate measurement results.

[0087] Specifically, the measurement data model is a data model for representing the corresponding relationship between the preset topographic features of the deep trench structure 114 and the spectral features of the corresponding trench structure 211 under the combination of different preset etching conditions, the first semiconductor structure 11 and the process conditions. The corresponding preset topographic features of the deep trench structure 114 can be obtained by substituting the corresponding preset etching conditions, the first semiconductor structure 11, the process conditions and the spectral features of the trench structure 211 into the measurement data model.

[0088] In one embodiment, the method further comprises: when performing step A3, performing a transmission electron microscope scanning on the reference wafer 2 after slicing to obtain the preset topographic features of the trench structure 211; verifying the correlation between the preset topographic features of the trench structure 211 obtained under each measurement condition in step A4 and the preset topographic features of the deep trench structure 114 obtained under each measurement condition in step A2; when the correlation is within a strong correlation range, determining that the measurement data model is reliable; when the correlation is outside the strong correlation range, increasing the first preset depth, repeating steps A3 to A5, and updating the measurement data model.

[0089] The present application can determine whether the topographic features of the deep trench structure 114 can be reflected by the topographic features of the trench structure 211 by verifying the correlation between the preset topographic features of the trench structure 211 obtained by transmission electron microscope scanning and the preset topographic features of the deep trench structure 114, thereby confirming the reliability of the measurement data model; when the correlation between the preset topographic features of the trench structure 211 obtained by transmission electron microscope scanning and the preset topographic features of the deep trench structure 114 is not strong, it indicates that the first preset depth selected at this time does not completely reflect the preset topographic features to be measured by the deep trench structure 114, and therefore increasing the first preset depth to reestablish the measurement data model can obtain the trench structure 211 that can reflect the preset topographic features of the deep trench structure 114, thereby improving the reliability of the measurement data model.

[0090] In one embodiment, the strong correlation range is a range in which the correlation index R 2 >0.7. Specifically, those skilled in the art can also set other suitable strong correlation ranges according to application requirements.

[0091] Specifically, in all actual experimental results, the topographic features of the trench structure 211 and the deep trench structure 114 have extremely strong linear correlation, and therefore the topographic features of the deep trench structure 114 can generally be accurately obtained by directly measuring the topographic features of the trench structure 211 by optical scattering.

[0092] In one embodiment, the method further comprises:

[0093] The etching process is performed on the process wafer 1 by the test first semiconductor structure 11 under the test etching condition to obtain the deep trench structure 114, and the test first semiconductor structure 11 is prepared on the process wafer 1 by the test process condition.

[0094] The etching process is performed on the reference wafer 2 under the test etching condition by the same test second semiconductor structure 21 as the test first semiconductor structure 11, and the trench structure 211 obtained on the reference wafer 2 is stopped after reaching the first preset depth, and the test second semiconductor structure 21 is prepared on the reference wafer 2 by the test process condition;

[0095] The reference wafer 2 with the trench structure 211 and the process wafer 1 with the deep trench structure 114 are sliced and then scanned by a transmission electron microscope to obtain the preset topographic feature measurement value of the trench structure 211 and the deep trench structure 114;

[0096] The preset topographic feature measurement value of the trench structure 211 is substituted into the measurement data model to obtain the corresponding preset topographic feature calculation value of the deep trench structure 114, and the preset topographic feature calculation value of the deep trench structure 114 is compared with the preset topographic feature measurement value;

[0097] When the difference between the preset topographic feature calculation value and the preset topographic feature measurement value of the deep trench structure 114 does not exceed the first preset difference value, it is judged that the accuracy of the measurement data model meets the requirements; when the difference between the preset topographic feature calculation value and the preset topographic feature measurement value of the deep trench structure 114 exceeds the first preset difference value, the measurement data model is updated according to the preset topographic feature of the deep trench structure 114 and the spectral feature of the corresponding trench structure 211 in combination with the spectral feature of the trench structure 211 corresponding to the test etching condition, the test first semiconductor structure, and the test process condition and the preset topographic feature of the deep trench structure 114;

[0098] Or when the ratio of the difference between the preset topographic feature calculation value and the preset topographic feature measurement value of the deep trench structure 114 and the preset topographic feature calculation value of the deep trench structure 114 does not exceed the first preset ratio, it is judged that the accuracy of the measurement data model meets the requirements; when the ratio of the difference between the preset topographic feature calculation value and the preset topographic feature measurement value of the deep trench structure 114 and the preset topographic feature calculation value of the deep trench structure 114 exceeds the first preset ratio, the measurement data model is updated according to the preset topographic feature of the deep trench structure 114 and the spectral feature of the corresponding trench structure 211 in combination with the spectral feature of the trench structure 211 corresponding to the test etching condition, the test first semiconductor structure, and the test process condition and the preset topographic feature of the deep trench structure 114.

[0099] Specifically, in the above method, the etching condition can be different from the preset etching condition in the measurement condition, or the first semiconductor structure 11 can be different from the first semiconductor structure 11 in the measurement condition, or the process condition can be different from the process condition in the measurement condition; or the etching condition can be different from the preset etching condition in the measurement condition, and the first semiconductor structure 11 can be different from the first semiconductor structure 11 in the measurement condition; or the etching condition can be different from the preset etching condition in the measurement condition, and the process condition can be different from the process condition in the measurement condition; or the first semiconductor structure 11 can be different from the first semiconductor structure 11 in the measurement condition, and the process condition can be different from the process condition in the measurement condition; or the etching condition can be different from the preset etching condition in the measurement condition, and the first semiconductor structure 11 can be different from the first semiconductor structure 11 in the measurement condition, and the process condition can be different from the process condition in the measurement condition.

[0100] The present application can test the applicability of the measurement data model under the process variable other than the combination of the preset etching condition, the first semiconductor structure 11 and the process condition for setting the first semiconductor structure 11 in the measurement condition by comparing the measurement value and the calculated value under the condition of testing the etching condition, testing the first semiconductor structure 11 and testing the process condition, to judge the general usability of the measurement data model; when the measurement value and the calculated value are greatly different, a new measurement data model can be obtained by incorporating the combination of testing the etching condition, testing the first semiconductor structure 11 and testing the process condition, which can improve the usability of the measurement data model for wider etching conditions and improve the reliability of the measurement results.

[0101] In one embodiment, as shown in Figure 13 Part of the data table when establishing the measurement data model is shown, wherein the first column represents different etching conditions, the second column represents the type of wafer, the third column represents the same photolithography process flow for setting the first semiconductor structure 11 and the second semiconductor structure 21, the fourth column represents the full process flow for setting the deep groove structure 114 and the front part process flow for setting the groove structure 211, the third column and the fourth column belong to known process controllable factors, the fifth to eighth columns represent the corresponding topographic feature parameters obtained by slicing TEM (Transmission Electron Microscope) measurement of the corresponding wafer after the corresponding etching condition and the corresponding process flow, and the ninth to twelfth columns represent the corresponding topographic feature parameters obtained by optical scattering measurement (OCD, also known as SCD, SpectraCD) of the corresponding wafer after the corresponding etching condition and the corresponding process flow, wherein the process wafer 1 cannot be measured by SCD, so the corresponding SCD parameter is n / a;

[0102] According to the correlation between the topographic feature parameters of the deep trench structure 114 and the trench structure 211 obtained by the TEM measurement of the process wafer 1 and the reference control wafer 2 under different etching conditions in the data table, the reflection of the trench structure 211 in the reference control wafer 2 on the topographic feature of the deep trench structure 114 in the process wafer 1 can be verified.

[0103] After confirming that the correlation between the topographic features of the deep trench structure 114 and the trench structure 211 is strong, a measurement data model is established according to the TEM measurement results of the deep trench structure 114 in the process wafer 1 and the SCD measurement results of the trench structure 211 in the reference control wafer 2 under different etching conditions.

[0104] By adjusting and expanding the range of process controllable factors, new TEM measurement results of the deep trench structure 114 of the process wafer 1 and new SCD measurement results of the trench structure 211 of the reference control wafer 2 are obtained. The SCD measurement results of the trench structure 211 of the new reference control wafer 2 are substituted into the measurement data model to obtain the calculation results of the topographic features of the deep trench structure 114. Comparing the calculation results of the topographic features of the deep trench structure 114 with the TEM measurement results can verify the applicability of the measurement data model in a larger range of process controllable factors.

[0105] Specifically, Figure 13 In the table, only the measurement variables under different etching conditions are shown, and the first semiconductor structure 11, the process conditions for setting the first semiconductor structure 11 (including the photolithography process in the third column) and the experimental design under different combinations of etching conditions are not shown. In actual use of the scheme, the three controllable factors can be set to different combinations of conditions for measuring topographic features and spectral features, and the measurement data model can be obtained together.

[0106] Specifically, by, for example, Figure 13The corresponding relationship model obtained by establishing the measurement data model of the spectrum characteristics of the trench structure 211 corresponding to the preset topographic characteristics of the deep trench structure 114 under the preset etching condition, the first semiconductor structure 11 and the process condition for setting the first semiconductor structure 11 can realize a high correlation corresponding relationship between the spectrum characteristics of the trench structure 211 and the preset topographic characteristics of the deep trench structure 114 under the preset etching condition, the first semiconductor structure 11 and the process condition for setting the first semiconductor structure 11 in the measurement condition. When the measurement data model is re-established by combining the spectrum characteristics of the trench structure 211 corresponding to the preset topographic characteristics of the deep trench structure 114 under the preset etching condition, the first semiconductor structure 11 and the process condition for setting the first semiconductor structure 11 and the spectrum characteristics of the trench structure 211 corresponding to the preset topographic characteristics of the deep trench structure 114 under the inspection etching condition, the inspection first semiconductor structure 11 and the inspection process condition, the corresponding relationship model obtained can realize a high correlation corresponding relationship between the spectrum characteristics of the trench structure 211 and the preset topographic characteristics of the deep trench structure 114 under the preset etching condition, the first semiconductor structure 11, the process condition for setting the first semiconductor structure 11, the inspection etching condition, the inspection first semiconductor structure 11 and the inspection process condition, thereby expanding the range of conditions that the corresponding relationship model obtained can be adapted to use.

[0107] Embodiment two:

[0108] The present embodiment provides a measurement method, and it should be noted that the following order does not strictly represent the order of the measurement method protected by the present embodiment, and those skilled in the art can change it according to the actual preparation steps.

[0109] First, step B1 is performed, and the same process is used to set the first semiconductor structure 11 on the wafer to be measured and the second semiconductor structure 21 identical to the first semiconductor structure 11 on the reference control chip 2.

[0110] Then, step B2 is performed, and the first semiconductor structure 11 is used to perform etching process on the wafer to be measured to obtain a complete deep trench structure 114; the second semiconductor structure 21 is used to perform the same etching process on the reference control chip 2 under the same etching condition as the wafer to be measured, and the etching process is stopped when the trench structure 211 obtained from the reference control chip 2 reaches a first preset depth.

[0111] Next, step B3 is performed, and optical scattering measurement is performed on the obtained trench structure 211 to obtain the measurement value of the spectrum characteristics of the trench structure 211.

[0112] Finally, step B4 is performed, the measurement data model obtained according to the measurement data model establishment method described in Embodiment One is used, the obtained measurement value of the spectral feature of the trench structure 211 is substituted into the measurement data model, and the measurement value of the preset topographic feature of the deep trench structure 114 is obtained.

[0113] The present application can directly measure the spectral feature of the trench structure 211 obtained by optical scattering measurement in actual application by using the measurement data model obtained in Embodiment One, and the preset topographic feature of the deep trench structure 114 can be calculated, the measurement efficiency is high, the cost is low, the accuracy is high, the topographic feature of the deep trench structure 114 with a deep depth can be measured, and the data is comprehensive.

[0114] Embodiment Three

[0115] The present embodiment provides a process control method, which comprises:

[0116] The measurement value of the preset topographic feature of the deep trench structure 114 on the wafer to be measured is obtained by the measurement method in Embodiment Two, and is compared with the target value of the preset topographic feature of the deep trench structure 114.

[0117] When the difference between the measurement value of the preset topographic feature of the deep trench structure 114 and the target value of the preset topographic feature of the deep trench structure 114 exceeds a second preset difference value, the process of the wafer to be measured is stopped or a preset adjustment is made to the process of the wafer to be measured; or when the ratio of the difference between the measurement value of the preset topographic feature of the deep trench structure 114 and the target value of the preset topographic feature of the deep trench structure 114 and the measurement value of the preset topographic feature of the deep trench structure 114 exceeds a second preset ratio value, the process of the wafer to be measured is stopped or a preset adjustment is made to the process of the wafer to be measured.

[0118] The present application can quickly and efficiently obtain measurement results by using the measurement data model obtained in Embodiment One and measuring the preset topographic feature of the deep trench structure 114 of the wafer to be measured by the measurement method in Embodiment Two, and the real-time monitoring of the topographic feature of the deep trench structure 114 can be realized, so that the process can be stopped or adjusted in time when the topographic feature of the deep trench structure 114 is abnormal, so as to avoid the loss of a large number of wafers caused by abnormal process environment, and the overall production cost can be reduced.

[0119] To sum up, the method for establishing a measurement data model, the measurement method and the process control method can obtain a trench structure close to the deep trench structure topography feature by referring to the control wafer to perform the same etching process before the process wafer, and can establish a measurement data model according to the spectral features of the trench structure under different measurement conditions and the deep trench structure topography feature, so that the topography feature of the deep trench structure can be obtained without measuring the deep trench structure in application, the efficiency of measuring the topography feature of the deep trench structure is greatly improved, and the measurement cost is reduced.

[0120] Therefore, the present application effectively overcomes the shortcomings in the prior art and has high industrial utilization value.

[0121] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.

Claims

1. A method of establishing a measurement data model, characterized by, The method comprises: Step A1: providing a process wafer, the process wafer being provided with a first semiconductor structure by a preset process condition; performing an etching process on the process wafer through the first semiconductor structure under a preset etching condition to obtain a complete deep trench structure; and performing slicing on the process wafer with the deep trench structure and scanning the deep trench structure by a transmission electron microscope to obtain a preset topographic feature of the deep trench structure; Step A2: providing m different preset etching conditions, n different first semiconductor structures, and k different process conditions for setting the first semiconductor structure, wherein m, n and k are all integers greater than or equal to 1; determining more than one measurement condition according to different combinations of the preset etching conditions, the first semiconductor structures and the process conditions; repeating step A1 under each measurement condition to obtain the preset topographic feature of the deep trench structure obtained under each measurement condition; Step A3: providing a reference control wafer, the reference control wafer being provided with a second semiconductor structure identical to the first semiconductor structure obtained by the same process condition as the first semiconductor structure; performing the same etching process on the reference control wafer as the process wafer under the same preset etching condition as the process wafer, and stopping when the trench structure obtained on the reference control wafer reaches a first preset depth; and performing optical scattering measurement on the trench structure to obtain a spectral feature of the trench structure; the first preset depth is a depth at which the trench structure can be measured by the optical scattering measurement method to obtain the preset topographic feature corresponding to the deep trench structure; Step A4: repeating step A3 under each measurement condition in step A2 to obtain the spectral feature of the trench structure obtained under each measurement condition; Step A5: establishing the measurement data model according to the preset topographic feature of the deep trench structure corresponding to each measurement condition and the spectral feature of the trench structure corresponding to each measurement condition.

2. The method of claim 1, wherein, The method further comprises: when step A3 is performed, performing slicing on the reference control wafer with the trench structure and scanning by a transmission electron microscope to obtain the preset topographic feature of the trench structure; verifying the correlation between the preset topographic feature of the trench structure obtained under each measurement condition in step A4 and the preset topographic feature of the deep trench structure obtained under each measurement condition in step A2; when the correlation is within a strong correlation range, determining that the measurement data model is reliable; when the correlation is outside the strong correlation range, increasing the first preset depth, repeating steps A3 to A5, and updating the measurement data model.

3. The method of claim 1 or 2, wherein The method further comprises: using different test etching conditions, test first semiconductor structures and / or test process conditions from the preset etching conditions, the first semiconductor structures and the process conditions in the measurement conditions; performing the etching process on the process wafer through the test first semiconductor structure under the test etching condition to obtain a deep trench structure, the test first semiconductor structure being prepared on the process wafer by the test process condition; The etching process is performed on the reference wafer under the test etching condition by a test second semiconductor structure identical to the test first semiconductor structure, and the etching process is stopped when a trench structure obtained on the reference wafer reaches the first preset depth; the test second semiconductor structure is prepared on the reference wafer by the test process condition; After slicing the reference wafer with the trench structure and the process wafer with the deep trench structure, the preset topographic feature measurement value of the trench structure and the deep trench structure is obtained by using a transmission electron microscope; The preset topographic feature measurement value of the trench structure is substituted into the measurement data model to obtain a corresponding preset topographic feature calculation value of the deep trench structure, and the preset topographic feature calculation value of the deep trench structure is compared with the preset topographic feature measurement value; When the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value does not exceed a first preset difference value, it is determined that the accuracy of the measurement data model meets the requirements; when the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value exceeds the first preset difference value, the measurement data model is updated according to the preset topographic feature of the deep trench structure and the spectral feature of the corresponding trench structure in combination with the spectral feature of the trench structure corresponding to the test etching condition, the test first semiconductor structure, the test process condition and the preset topographic feature of the deep trench structure. When the ratio of the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value and the preset topographic feature calculation value of the deep trench structure does not exceed a first preset ratio value, it is determined that the accuracy of the measurement data model meets the requirements; when the ratio of the difference between the preset topographic feature calculation value of the deep trench structure and the preset topographic feature measurement value and the preset topographic feature calculation value of the deep trench structure exceeds the first preset ratio value, the measurement data model is updated according to the preset topographic feature of the deep trench structure and the spectral feature of the corresponding trench structure in combination with the spectral feature of the trench structure corresponding to the test etching condition, the test first semiconductor structure, the test process condition and the preset topographic feature of the deep trench structure.

4. The method of claim 1, wherein, The aspect ratio of the deep trench structure is greater than or equal to 10, and the depth of the deep trench structure is greater than or equal to 1 micrometer.

5. The method of claim 4, wherein, The first preset depth is 100 nanometers-500 nanometers.

6. The method of claim 1, wherein, The thickness of the reference wafer is greater than or equal to the thickness of the process wafer.

7. The method of claim 1, wherein, The preset topographic feature of the deep trench structure includes one or more than one of any combination of a critical dimension at an opening of the deep trench structure, a critical dimension of a second preset depth of the deep trench structure, an included angle between a sidewall and a top surface at the opening of the deep trench structure, or a position or size of a topographic abnormal point of a side surface of the deep trench structure, and the second preset depth is less than the first preset depth.

8. The method of claim 1, wherein, The first semiconductor structure comprises a photoetching layer; the photoetching layer is patterned by exposing and developing the photoetching layer in the etching process; The deep trench structure is formed in the process wafer by etching the process wafer through the patterned photoetching layer.

9. A method of measurement, characterized by, The measurement method comprises: The same process is used to set a first semiconductor structure on a wafer to be measured and a second semiconductor structure identical to the first semiconductor structure on a reference wafer; The etching process is performed on the wafer to be measured through the first semiconductor structure to obtain a complete deep trench structure; the same etching process is performed on the reference wafer under the same etching conditions as the wafer to be measured, and the trench structure obtained from the reference wafer is stopped when it reaches a first preset depth; Optical scattering measurement is performed on the obtained trench structure to obtain a measurement value of the spectral characteristics of the trench structure; The measurement data model obtained by the measurement data model establishment method according to any one of claims 1-8 is used to obtain a measurement value of the preset topographic feature of the deep trench structure by substituting the measurement value of the spectral characteristics of the trench structure into the measurement data model.

10. A process control method characterized by, The process control method comprises: The measurement value of the preset topographic feature of the deep trench structure on the wafer to be measured obtained by the measurement method in claim 9 is obtained, and compared with a target value of the preset topographic feature of the deep trench structure; When the difference between the measurement value of the preset topographic feature of the deep trench structure and the target value of the preset topographic feature of the deep trench structure exceeds a second preset difference value, the process on the wafer to be measured is stopped or the process on the wafer to be measured is preset adjusted; or when the ratio of the difference between the measurement value of the preset topographic feature of the deep trench structure and the target value of the preset topographic feature of the deep trench structure to the measurement value of the preset topographic feature of the deep trench structure exceeds a second preset ratio value, the process on the wafer to be measured is stopped or the process on the wafer to be measured is preset adjusted.

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