A method for fabricating a lanthanum-doped oxide semiconductor transistor

Abstract

This invention discloses a method for fabricating lanthanum-doped oxide semiconductor transistors, belonging to the field of oxide semiconductor technology. The channel layer of the oxide semiconductor field-effect transistor of this invention is a lanthanum-doped indium oxide thin film. This channel layer is fabricated using atomic layer deposition (ALD), with the deposition temperature controlled within the range of 100℃ to 400℃. For every n In atomic layer deposition cycles, one La atomic layer deposition is inserted, and this process is repeated x times to obtain the lanthanum-doped indium oxide thin film. Using this invention to fabricate oxide semiconductor field-effect transistors can improve the transistor threshold voltage and device stability, and can be further applied to high-performance dynamic memory, display thin-film transistors, flexible circuits, and back-end compatible logic circuits.

Description

Technical Field

[0001] This invention relates to the field of oxide semiconductor technology, and more specifically to a method for fabricating a lanthanum-doped oxide semiconductor field-effect transistor. Background Technology

[0002] Oxide-semiconductor (OSB) channel materials have become a research hotspot in recent years, exhibiting extremely low off-state leakage current, excellent field-effect mobility, and thermal budget compatible with back-end processes. They hold broad application prospects in dynamic memory, display thin-film transistors, flexible devices, and back-end compatible logic circuits. Among various OSB SEB transistors, indium oxide (InO) stands out due to its high field-effect mobility. However, on the one hand, the high intrinsic carrier concentration of InO makes it difficult to effectively control via the gate electric field, resulting in a trade-off between mobility and threshold voltage. On the other hand, InO also possesses a high defect state density and low indium-oxygen bond energy, limiting its bias stability. To address these issues, elemental doping is a promising and important approach. Some metal cations have higher binding energies to oxygen than indium ions themselves, thus acting as oxygen vacancy inhibitors. Incorporating these cations into the channel can effectively reduce the intrinsic carrier concentration of the InO film, thereby achieving an adjustable threshold voltage and good bias stability. Among many elements, lanthanum has a very high binding energy between its metal cation and oxygen (789 kJ / mol), exceeding that of indium (360 kJ / mol), zinc (284 kJ / mol), gallium (374 kJ / mol), and other elements, giving it great potential for application in oxide semiconductor doping. Summary of the Invention

[0003] To address the shortcomings of the prior art, the present invention aims to provide a method for fabricating a lanthanum-doped oxide semiconductor field-effect transistor, thereby achieving an oxide semiconductor device with adjustable mobility, threshold voltage, and good bias stability.

[0004] The technical solution provided by this invention is as follows:

[0005] A method for fabricating an oxide semiconductor field-effect transistor (OSP), comprising a substrate, a gate electrode, a gate electrode dielectric, a channel layer, and source / drain electrodes, characterized in that the channel layer is a lanthanum-doped indium oxide (IO) thin film, the channel layer is fabricated using atomic layer deposition (ALD) with the deposition temperature controlled within the range of 100℃ to 400℃, and one La atomic layer deposition is inserted for every n In atomic layer deposition cycles, repeated x times to obtain the lanthanum-doped IO thin film. Specific steps include:

[0006] 1) Place the substrate in the atomic layer deposition chamber and precisely control the indium source content introduced into the chamber by the switching time t1 of the solenoid valve. The corresponding t1 range is 0.01 to 10 s. After ensuring that the precursor adsorption is a self-limiting reaction, purge with nitrogen or argon. The purging time t2 is controlled by the solenoid valve and the corresponding t2 time range is 1 to 100 s.

[0007] 2) The oxygen content introduced into the cavity is precisely controlled by the solenoid valve switching time t3, and the corresponding t3 range is 0.01 to 50s. After the precursor reaction is complete, it is purged with nitrogen or argon. The purging time t4 is controlled by the solenoid valve, and the corresponding t4 time range is 1 to 100s.

[0008] 3) Repeat steps 1) and 2) n times to obtain an In atomic layer deposition;

[0009] 4) Place the deposition substrate in the atomic layer deposition chamber and precisely control the lanthanum source content introduced into the chamber by the switching time t5 of the solenoid valve. The corresponding t5 range is 0.01 to 10 s. After ensuring that the precursor adsorption is a self-limiting reaction, purge with nitrogen or argon. The purging time t6 is controlled by the solenoid valve. The corresponding t6 time range is 1 to 100 s.

[0010] 5) The oxygen content introduced into the cavity is precisely controlled by the solenoid valve switching time t7, and the corresponding t7 range is 0.01 to 50 s. After the precursor reaction is complete, it is purged with nitrogen or argon. The purging time t8 is controlled by the solenoid valve, and the corresponding t8 time range is 1 to 100 s; thus, one La atomic layer deposition is obtained.

[0011] 6) Repeat steps 1) through 5) x times to obtain lanthanum-doped indium oxide thin films.

[0012] Furthermore, the molar ratio of lanthanum atoms is 0.01 mol% to 30 mol%, which is the ratio of lanthanum atoms to (lanthanum atoms + oxygen atoms + indium atoms).

[0013] Furthermore, n is an integer from 1 to 60, and x is an integer from 1 to 20.

[0014] Furthermore, in atomic layer deposition, the indium source includes one or more of trimethylindium, diethylindium, triethylindium, and cyclopentadieneindium.

[0015] Furthermore, in atomic layer deposition, the lanthanum source is tris(N,N'-diisopropylmethylammonium)lanthanum.

[0016] Furthermore, in atomic layer deposition, the oxygen source includes one or more of water, oxygen, ozone, hydrogen peroxide, and oxygen plasma.

[0017] Furthermore, in atomic layer deposition, the purging gas includes argon, nitrogen, etc.

[0018] Furthermore, the substrate includes one or more of silicon, sapphire, silicon carbide, gallium nitride, diamond, and flexible substrate.

[0019] Furthermore, the gate electrode comprises one or more of nickel, platinum, gold, tungsten, titanium nitride, and indium tin oxide.

[0020] Furthermore, the gate dielectric includes one or more of silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, and lanthanum oxide.

[0021] Furthermore, the source and drain electrode materials include one or more of nickel, platinum, gold, tungsten, titanium nitride, and indium tin oxide.

[0022] The oxide semiconductor field-effect transistors of the present invention include, but are not limited to, back gate structure, top gate structure, dual gate structure, fin structure, and gate-around structure.

[0023] Oxide-semiconductor field-effect transistors can be used to fabricate dynamic random access memory (DRAM). The device structure can be planar or used in three-dimensional stacked heterogeneous integrated logic circuits.

[0024] The technical effects of this invention are as follows:

[0025] This invention proposes a lanthanum-doped indium oxide channel material using atomic layer deposition (ALD). By controlling the value of n, the thickness of the indium oxide layer can be precisely controlled, and by controlling the value of x, the content of lanthanum doping can be precisely controlled. Adjusting the lanthanum doping ratio controls the oxygen vacancy concentration in the channel, achieving synergistic optimization of threshold voltage, mobility, and stability. The optimized oxide semiconductor field-effect transistor can be used in high-performance dynamic memory, display thin-film transistors, flexible circuits, and back-end compatible logic circuits. Compared to ordinary indium oxide materials, this invention has the following main advantages:

[0026] 1) By doping with lanthanum, the generation of oxygen vacancies can be suppressed, which can effectively reduce the intrinsic carrier concentration of indium oxide thin films, thereby improving the threshold voltage of transistors;

[0027] 2) The higher dissociation energy of the lanthanum-oxygen bond can raise the conduction band bottom position and increase the activation energy of n-type doping, thereby improving the stability of the device. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the preparation of the channel layer by atomic layer deposition stacking according to the present invention.

[0029] Figure 2 This is a schematic diagram of the atomic layer deposition process of the present invention.

[0030] Figure 3 This is a schematic diagram of a transistor according to a specific embodiment of the present invention, wherein (a) is the back gate and (b) is the top gate.

[0031] Figure 4 This is a flowchart illustrating the fabrication process of a back-gate transistor according to a specific embodiment of the present invention.

[0032] Figure 5 This is a flowchart illustrating the fabrication process of the top-gate transistor in a specific embodiment of the present invention.

[0033] Figure 6 This is a comparison chart of the transfer characteristic curves of a lanthanum-doped indium oxide transistor and a comparative pure indium oxide thin-film transistor according to a specific embodiment of the present invention.

[0034] In the figure, 1—substrate; 2—back gate electrode; 3—dielectric layer; 31—In2O3 layer; 32—La2O3 layer; 4—channel layer; 5—source electrode Ni layer; 6—drain electrode Au layer; 7—top gate electrode Pt layer; 8—top gate electrode Au layer. Detailed Implementation

[0035] This invention provides a method for fabricating lanthanum-doped oxide semiconductor field-effect transistors, and applies it to field-effect transistors of various structures and to storage, display and logic circuits based on field-effect transistors.

[0036] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. However, those skilled in the art should understand that the following embodiments are for illustrative purposes only and should not be considered as limiting the scope of the present invention.

[0037] The channel layer of the oxide semiconductor field-effect transistor of this invention is a lanthanum-doped indium oxide thin film, such as... Figure 1 As shown, this invention prepares lanthanum-doped indium oxide (IO) films by performing one La atomic layer deposition (ILD) cycle after every n IO cycles, repeating this process x times to obtain the lanthanum-doped IO film. Here, both x and n are greater than or equal to 1. By controlling the value of n, the thickness of the IO film can be precisely controlled, and by controlling the value of x, the content of lanthanum doping can be precisely controlled. For example, when n = 4, lanthanum doping is performed once after every 4 IO cycles; when n = 8, it is performed once after every 8 IO cycles; when n = 12, it is performed once after every 12 IO cycles; when n = 16, it is performed once after every 16 IO cycles, and so on. The process flow within a small IO cycle is as follows: Figure 2 As shown, it is divided into four main steps:

[0038] The first step involves placing the deposition substrate in the atomic layer deposition chamber. The indium source content introduced into the chamber is precisely controlled by the switching time t1 of the solenoid valve. The corresponding t1 range is 0.01 to 10 s. After ensuring that the precursor adsorption is a self-limiting reaction, the chamber is purged with nitrogen or argon gas. The purging time t2 is controlled by the solenoid valve and the time range is 1 to 100 s.

[0039] The second step involves precisely controlling the oxygen content introduced into the cavity by switching the solenoid valve on and off for a time t3, with t3 ranging from 0.01 to 50 seconds. After ensuring the complete reaction of the precursor, the cavity is purged with nitrogen or argon gas for a time t4 controlled by the solenoid valve, ranging from 1 to 100 seconds. After repeating the first and second steps n times, indium oxide of a certain thickness is obtained, which is then used for the third step.

[0040] The third step involves placing the deposition substrate in the atomic layer deposition chamber. The lanthanum source content introduced into the chamber is precisely controlled by the switching time t5 of the solenoid valve. The corresponding t5 range is 0.01 to 10 s. After ensuring that the precursor adsorption is a self-limiting reaction, the chamber is purged with nitrogen or argon gas. The purging time t6 is controlled by the solenoid valve and the time range is 1 to 100 s.

[0041] The fourth step involves precisely controlling the oxygen content introduced into the cavity by switching the solenoid valve on and off for time t7. The corresponding t7 range is 0.01 to 50 seconds. After ensuring the complete reaction of the precursor, the cavity is purged with nitrogen or argon gas. The purging time t8 is controlled by the solenoid valve and ranges from 1 to 100 seconds.

[0042] Repeat steps one through four to achieve lanthanum-doped indium oxide thin film growth.

[0043] Example 1

[0044] Lanthanum-doped oxide semiconductor back-gate transistor structure, such as Figure 3 As shown in (a), the structure includes a substrate, a back gate electrode layer on the substrate, a dielectric layer on the back gate electrode, a channel layer on the dielectric layer, a source layer, and a drain layer. The specific fabrication steps are as follows:

[0045] Step 1, Substrate Cleaning. Select a high-resistivity silicon substrate 1 with good electrical insulation properties, whose resistivity is >10. 4 Ω·cm. Clean the substrate using standard RCA. First, immerse the substrate in RCA-1 (deionized water: ammonia: hydrogen peroxide = 5:1:1) at 70°C for 10 minutes to remove metal cations, organic matter, and other contaminants. After cleaning, dry the substrate with high-purity nitrogen gas. Figure 4 As shown in (a).

[0046] Step 2, prepare the back gate electrode 2, such as Figure 4As shown in (b), the specific process steps include spin coating, baking, exposure, development, physical vapor deposition, and lift-off.

[0047] Step 3: Deposit a dielectric material with a thickness of 1–100 nm as the gate dielectric layer 3 on the sample obtained in step 2 using atomic layer deposition, such as... Figure 4 As shown in (c).

[0048] Step 4: A lanthanum-doped indium oxide thin film layer is prepared by atomic layer deposition according to the present invention, with a deposition thickness of 1-20 nm.

[0049] Step 5: Define and form channel layer 4 on the deposited lanthanum-doped indium oxide thin film, as shown below. Figure 4 As shown in (d), the process includes spin coating of photoresist, baking, exposure, development, oxygen plasma cleaning to remove residual photoresist, and wet etching.

[0050] Step 6: Fabricate the Ni layer 5 and Au layer 6 of the source and drain electrodes, as follows: Figure 4 As shown in (e), the specific process steps include spin coating, baking, exposure, development, physical vapor deposition, and lift-off.

[0051] Example 2

[0052] Lanthanum-doped oxide semiconductor top-gate transistor structure, such as Figure 3 As shown in (b), the structure includes a substrate, a channel layer, a dielectric layer, a source layer, and a drain layer on the substrate 1, as well as a top gate electrode layer on the dielectric layer. The specific fabrication steps are as follows:

[0053] Step 1, Substrate Cleaning. Select a high-resistivity silicon substrate 1 with good electrical insulation properties, whose resistivity is >10. 4 Ω·cm. Clean the substrate using standard RCA. 1. First, immerse the substrate in RCA-1 (deionized water: ammonia: hydrogen peroxide = 5:1:1) at 70°C for 10 minutes to clean metal cations, organic matter, and other contaminants. After cleaning, dry with high-purity nitrogen gas. Figure 5 As shown in (a).

[0054] Step 2: A lanthanum-doped indium oxide thin film layer is prepared by atomic layer deposition according to the present invention, with a deposition thickness of 1-20 nm.

[0055] Step 3, define and form a channel layer 4 on the deposited lanthanum-doped indium oxide thin film, such as Figure 5 As shown in (b), the process includes spin coating of photoresist, baking, exposure, development, oxygen plasma cleaning to remove residual photoresist, and wet etching.

[0056] Step 4: Fabricate the Ni layer 7 and Au layer 8 for the source and drain electrodes, as follows: Figure 5As shown in (c), the specific process steps include spin coating, baking, exposure, development, physical vapor deposition, and lift-off.

[0057] Step 5: Deposit a dielectric material with a thickness of 1–100 nm as the gate dielectric layer 3 on the sample obtained in step 4 using atomic layer deposition, such as... Figure 5 As shown in (d).

[0058] Step 6: Fabricate the Pt layer 7 and Au layer 8 of the top gate electrode, as follows: Figure 5 As shown in (e), the specific process steps include spin coating, baking, exposure, development, physical vapor deposition, and stripping.

[0059] The above two embodiments are merely illustrative of the implementation of the present invention. However, those skilled in the art should understand that the above embodiments are only for illustrating the present invention and should not be regarded as limiting the scope of the present invention.

[0060] A comparative example provides a method for fabricating a thin-film transistor. The pure indium oxide thin-film transistor obtained is similar to that in Comparative Document 1 and Example 1 above, except that the channel layer of the transistor in this invention is a lanthanum-doped indium oxide thin film. Transfer characteristic curves were tested on the device prepared in Comparative Example 1 and the device prepared in Example 1, respectively. The channel length was 1 μm in both cases. Figure 6 As shown in curves A and B, the threshold voltage of the pure indium oxide back gate transistor in Comparative Example 1 is about -0.7V, while the threshold voltage of the lanthanum-doped indium oxide thin film transistor in Example 1 is about 0.4V. This indicates that lanthanum doping can suppress the generation of oxygen vacancies, effectively reduce the intrinsic carrier concentration of the indium oxide thin film, and thus increase the transistor threshold voltage to greater than 1V.

[0061] It should be noted that the above embodiments are illustrative of the present invention and not restrictive of the present invention, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims.

Claims

1. A method for fabricating an oxide semiconductor field-effect transistor, the oxide semiconductor field-effect transistor comprising a substrate, a gate electrode, a gate electrode dielectric, a channel layer, and source / drain electrodes, characterized in that, The channel layer is a lanthanum-doped indium oxide thin film. This channel layer is formed using atomic layer deposition (ALD), with the deposition temperature controlled within the range of 100℃ to 400℃. For every n In atomic layer deposition cycles, one La atomic layer deposition is inserted, and this process is repeated x times to obtain the lanthanum-doped indium oxide thin film. Specific steps include: 1) Place the substrate in the atomic layer deposition chamber and control the indium source content introduced into the chamber by means of a solenoid valve. The solenoid valve opening and closing time t1 ranges from 0.01 to 10 s. Then purge with nitrogen or argon gas. The purging time t2 is controlled by the solenoid valve and the corresponding t2 time ranges from 1 to 100 s. 2) The oxygen content introduced into the cavity is controlled by the solenoid valve opening and closing time t3, with the corresponding t3 range being 0.01 to 50 s. Then, nitrogen or argon is used for purging. The purging time t4 is controlled by the solenoid valve, with the corresponding t4 time range being 1 to 100 s. 3) Repeat steps 1) and 2) n times to obtain an In atomic layer deposition; 4) Place the deposition substrate in the atomic layer deposition chamber again, and precisely control the lanthanum source content introduced into the chamber by the solenoid valve switching time t5. The corresponding t5 range is 0.01 to 10 s. Then purge with nitrogen or argon gas. The purging time t6 is controlled by the solenoid valve. The corresponding t6 time range is 1 to 100 s. 5) The oxygen content introduced into the cavity is precisely controlled by the solenoid valve switching time t7, and the corresponding t7 range is 0.01 to 50 s. Then, nitrogen or argon is used for purging. The purging time t8 is controlled by the solenoid valve, and the corresponding t8 time range is 1 to 100 s; thus, one La atomic layer deposition is obtained. 6) Repeat steps 1) through 5) x times to obtain lanthanum-doped indium oxide thin films.

2. The preparation method according to claim 1, characterized in that, The molar ratio of lanthanum atoms to lanthanum atoms + oxygen atoms + indium atoms in the lanthanum-doped indium oxide thin film is 0.01 mol% to 30 mol%.

3. The preparation method according to claim 1, characterized in that, The n is an integer from 1 to 60, and the x is an integer from 1 to 20.

4. The preparation method according to claim 1, characterized in that, The indium source is selected from one or more of trimethylindium, diethylindium, triethylindium, and cyclopentadieneindium.

5. The preparation method according to claim 1, characterized in that, The lanthanum source is tris(N,N'-diisopropylmethylammonium)lanthanum.

6. The preparation method according to claim 1, characterized in that, The oxygen source is selected from one or more of water, oxygen, ozone, hydrogen peroxide, and oxygen plasma.

7. The preparation method according to claim 1, characterized in that, The purging gas is argon or nitrogen.

8. The preparation method according to claim 1, characterized in that, The substrate is selected from one or more of silicon, sapphire, silicon carbide, gallium nitride, diamond, and flexible substrate.

9. The preparation method according to claim 1, characterized in that, The gate electrode is selected from one or more of nickel, platinum, gold, tungsten, titanium nitride, and indium tin oxide, and the gate electrode dielectric is selected from one or more of silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, and lanthanum oxide.

10. The preparation method according to claim 1, characterized in that, The source and drain electrode materials are selected from one or more of nickel, platinum, gold, tungsten, titanium nitride, and indium tin oxide.

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