Method and apparatus for executing two-qubit logic gate, quantum computer

Abstract

The application discloses an execution method and device of a two-qubit logic gate, and a quantum computer. In the execution process, only a signal needs to be applied to the frequency control line of the adjustable coupler, and thus, only the distortion of the adjustable coupler needs to be measured and calibrated, without the need of measuring and calibrating the distortion of two qubits. The time resource consumption caused by the distortion measurement and calibration is greatly shortened, the execution efficiency of the two-qubit logic gate is effectively improved, and the execution efficiency of the quantum computer is further improved.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a method, apparatus, and quantum computer for executing a two-qubit logic gate. Background Technology

[0002] Quantum computing and quantum information is an interdisciplinary field that uses the principles of quantum mechanics to perform computational and information processing tasks. It is closely related to quantum physics, computer science, and informatics. It has experienced rapid development in the last two decades. Quantum algorithms based on quantum computers, such as factorization and unstructured search, have demonstrated performance far exceeding that of existing algorithms based on classical computers, leading to expectations that this field will surpass current computing capabilities. Because quantum computing has the potential to far exceed the performance of classical computers in solving specific problems, realizing a quantum computer requires a quantum chip containing a sufficient number and quality of qubits, capable of performing high-fidelity quantum logic gate operations and readouts on these qubits. The quantum chip is to a quantum computer what a CPU is to a traditional computer; it is the core component of a quantum computer, the processor that performs quantum computations. Before each quantum chip is officially put into use, the parameters of the qubits within the chip must be tested and characterized.

[0003] Similar to classical bits, when performing quantum computing using qubits, it is inevitable to apply qubit logic gates. For qubits, qubit logic gates actually refer to a series of control signals, and the accuracy of the parameters of these control signals is crucial to the qubit. Qubit logic gates mainly consist of two types: single-qubit logic gates and two-qubit logic gates. Two-qubit logic gates include CNOT gates, SWAP gates, CZ gates, etc.

[0004] Quantum bits are coupled to a flux control circuit. The signal on the flux control circuit is used to control the frequency of the qubit; this flux modulation circuit is also called a frequency modulation line. Flux control circuits typically include components such as bias tees, RC filters, and attenuators. The presence of these components makes the flux control circuit not an ideal circuit. Therefore, when the voltage waveform output from the AWG (Arbitrary Waveform Generator) reaches the qubit, waveform distortion occurs. Examples of waveform distortion are shown below. Figure 1As shown in the figure, a voltage waveform with amplitude A and duration T is applied to the flux control circuit at time t0. The voltage waveform ends at time t0+T, but a voltage still exists on the flux control circuit for a period of time afterward (i.e., the dashed curve in the figure). This is waveform distortion, and the voltage is the distorted voltage waveform. When performing two-qubit logic gate operations, a voltage waveform needs to be applied to the flux control circuit sequentially. The waveform distortion of the first voltage waveform will affect the second voltage waveform, causing a decrease in the accuracy of the subsequent two-qubit logic gate operation. Therefore, in existing technologies, when executing two-qubit logic gates, we need to first test and calibrate the waveform distortion of both qubits. The waveform distortion testing and calibration of each qubit consumes a considerable amount of time, greatly affecting the execution efficiency of the quantum computer.

[0005] Therefore, proposing a two-qubit logic gate scheme that can improve the execution efficiency of quantum computers has become an urgent problem to be solved in this field.

[0006] It should be noted that the information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0007] The purpose of this invention is to provide a method, apparatus, and quantum computer for executing two-qubit logic gates, which solves the problem in the prior art that waveform distortion testing and calibration operations are required for both qubits first. The waveform distortion testing and calibration operations for each qubit consume a lot of time, which greatly affects the execution efficiency of the quantum computer.

[0008] To address the above technical problems, this invention proposes a method for executing a two-qubit logic gate, comprising:

[0009] The operating frequency of the tunable coupler is set to the off frequency to shut off the coupling relationship between the first qubit and the second qubit. The tunable coupler is used to couple adjacent first qubits and second qubits in the quantum chip.

[0010] When both the first qubit and the second qubit are in the first eigenstate, and the operating frequency of the tunable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit, a signal for a two-qubit logic gate is applied to the frequency control line of the tunable coupler.

[0011] Optionally, after setting the operating frequency of the adjustable coupler to the off frequency, the method further includes:

[0012] The operating frequencies of the first and second qubits are determined based on the anharmonicity of the first qubit to generate a preset energy level difference between the first and second qubits.

[0013] Optionally, the method further includes:

[0014] The first change of the first offset with the operating frequency of the tunable coupler is obtained, wherein the first offset is the influence of the quantum state of the second qubit on the bit frequency of the first qubit;

[0015] The shutdown frequency and the on frequency are obtained based on the first change scenario.

[0016] Optionally, the first offset is obtained in the following way:

[0017] An X / 2 gate is applied to the first qubit, and a flat-top Gaussian signal is applied to the tunable coupler. The phase of the first qubit is obtained using the Ramsey experiment, with and without an X gate applied to the second qubit.

[0018] The first offset is obtained based on the difference between the two obtained phases and the duration of the flat-top Gaussian signal.

[0019] Optionally, obtaining the first offset based on the difference between the two obtained phases using the flat-top Gaussian signal includes:

[0020] The first offset is obtained by dividing the difference between the two phases by the duration of the flat-top Gaussian signal.

[0021] Optionally, the shutdown frequency is obtained in the following way:

[0022] Based on the first change, the frequency value corresponding to the minimum point of the first offset is obtained as the first frequency;

[0023] The shutdown frequency is obtained based on the first frequency.

[0024] Optionally, the activation frequency is obtained in the following way:

[0025] Based on the first change, the frequency value corresponding to when the first offset is equal to a preset threshold is obtained as the second frequency;

[0026] The activation frequency is obtained based on the second frequency.

[0027] Optionally, the magnitude of the turn-on frequency is determined based on the signal length of the two-qubit logic gate.

[0028] Optionally, the magnitude of the turn-on frequency is inversely correlated with the signal length of the two-qubit logic gate.

[0029] Optionally, the method further includes:

[0030] The conditional phase of the two-qubit logic gate was obtained using the Ramsey experiment to verify the accuracy of the two-qubit logic gate.

[0031] Based on the same inventive concept, this invention also proposes an execution device for a two-qubit logic gate, comprising:

[0032] A coupling shutdown module is configured to set the operating frequency of an adjustable coupler to a shutdown frequency to shut off the coupling relationship between the first qubit and the second qubit, wherein the adjustable coupler is used to couple adjacent first qubits and second qubits in a quantum chip.

[0033] A logic gate execution module is configured to apply a two-qubit logic gate signal to the frequency control line of the adjustable coupler when both the first qubit and the second qubit are in the first eigenstate and the operating frequency of the adjustable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit.

[0034] Based on the same inventive concept, the present invention also proposes a quantum control system, which utilizes the execution method of the two-qubit logic gate described in any one of the above-described features, or an execution device including the two-qubit logic gate described in the above-described features.

[0035] Based on the same inventive concept, the present invention also proposes a quantum computer, including the quantum control system described in the above feature description.

[0036] Based on the same inventive concept, the present invention also proposes a readable storage medium storing a computer program thereon, which, when executed by a processor, can implement the execution method of the two-qubit logic gate described in any of the above-described features.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] The proposed method for executing a two-qubit logic gate involves first setting the operating frequency of a tunable coupler to the off frequency to disconnect the coupling between the first and second qubits. Then, both the first and second qubits are set to their first eigenstates, and the operating frequency of the tunable coupler is set to the on frequency to open the coupling between them. Finally, a signal for the two-qubit logic gate is applied to the frequency control line of the tunable coupler. Because the proposed two-qubit logic gate scheme only requires applying a signal to the frequency control line of the tunable coupler during execution, only the distortion of the tunable coupler needs to be measured and calibrated, eliminating the need for distortion measurement and calibration of both qubits. This significantly reduces the time and resource consumption associated with distortion measurement and calibration, effectively improving the execution efficiency of the two-qubit logic gate and consequently increasing the execution efficiency of the quantum computer.

[0039] The execution device, quantum control system, quantum computer, and readable storage medium of the two-qubit logic gate proposed in this invention belong to the same inventive concept as the execution method of the two-qubit logic gate, and therefore have the same effective effects, which will not be elaborated here. Attached Figure Description

[0040] Figure 1 This is an example diagram of waveform distortion;

[0041] Figure 2 A simplified schematic diagram of a quantum chip with a tunable coupler;

[0042] Figure 3 This is a flowchart illustrating the execution method of a two-qubit logic gate proposed in an embodiment of the present invention.

[0043] Figure 4 This is a schematic diagram of the structure of an execution device for a two-qubit logic gate according to another embodiment of the present invention. Detailed Implementation

[0044] The specific embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0045] In the description of this invention, it should be understood that the terms "center", "upper", "lower", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0046] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0047] To better understand the technical solution of this application, the Ramsey experiment involved in this application will be briefly described below:

[0048] The Ramsey experiment involves applying two π / 2 quantum logic gate operations to a qubit, with a time interval τ between the two operations. A readout pulse is then applied to the qubit after the second π / 2 quantum logic gate operation to obtain the excited state distribution P1(τ). The process of changing the time interval τ to obtain P1(τ) is repeated. A typical Ramsey experiment shows that P1(τ) decays exponentially with time interval τ, as shown in the following mathematical model:

[0049] (1)

[0050] In Equation 1, A and B are fitting coefficients, T0 is the decoherence time of the qubit, and f d Let f0 be the carrier frequency of the microwave pulse signal corresponding to the π / 2 quantum logic gate operation, and f0 be the oscillation frequency of the qubit. Furthermore, f0 is related to the actual frequency f0 of the qubit. q The carrier frequency of π / 2 quantum logic gate operations satisfies:

[0051] (2)

[0052] In summary and in conjunction with Formula 2, we can obtain the results of the Ramsey experiment, namely, that the oscillation frequency of the curve is equal to the difference between the carrier frequency of the quantum logic gate operation and the true frequency of the qubit. Therefore, in addition to obtaining the decoherence time of the qubit, the Ramsey experiment can also accurately obtain the true frequency of the qubit at the same time.

[0053] Please refer to Figure 3This invention proposes a method for executing a two-qubit logic gate, comprising:

[0054] S100: Set the operating frequency of the tunable coupler to the off frequency to turn off the coupling relationship between the first qubit and the second qubit. The tunable coupler is used to couple adjacent first qubits and second qubits in the quantum chip.

[0055] S200: When both the first qubit and the second qubit are in the first eigenstate, and the operating frequency of the tunable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit, a two-qubit logic gate signal is applied to the frequency control line of the tunable coupler. In this embodiment, the first eigenstate is the |1> state.

[0056] Unlike existing technologies, the execution method of the two-qubit logic gate proposed in this embodiment first sets the operating frequency of the tunable coupler to the off frequency to shut off the coupling relationship between the first and second qubits. Then, both the first and second qubits are set to their first eigenstates, and the operating frequency of the tunable coupler is set to the on frequency to open the coupling relationship between them. Finally, a signal for the two-qubit logic gate is applied to the frequency control line of the tunable coupler. Since the two-qubit logic gate scheme proposed in this application only requires applying a signal to the frequency control line of the tunable coupler during execution, only the distortion of the tunable coupler needs to be measured and calibrated, eliminating the need for distortion measurement and calibration of both qubits. This significantly reduces the time and resource consumption associated with distortion measurement and calibration, effectively improving the execution efficiency of the two-qubit logic gate, and thus improving the execution efficiency of the quantum computer.

[0057] Those skilled in the art will understand that, for a quantum chip containing a tunable coupler, its structure generally involves two adjacent qubits being coupled together via a tunable coupler, which allows adjustment of the coupling strength between the two qubits. The structure of a quantum chip can be found in [reference needed]. Figure 2 In this system, Q1 and Q2 are two qubits, C0 is a tunable coupler, R1 and R2 are readout cavities for the two qubits, XY1 and XY2 are quantum state control lines, and Z1, Z2, and Z3 are frequency control lines. The structure of the tunable coupler is actually similar to that of the qubit, except that the tunable coupler only has frequency control lines and does not have matching quantum state control lines or readout cavities.

[0058] Existing two-qubit logic gate schemes, taking the CZ gate as an example, typically involve applying a CZ gate signal to the frequency control line of the qubits. During execution, the frequencies of the two qubits need to be adjusted. As described earlier regarding signal distortion, distortion measurement and calibration of the two qubits are required. However, the scheme in this application directly utilizes the characteristic of a tunable coupler that can adjust the coupling strength between the two qubits. Initially, the two qubits are in a state of decoupling or weak coupling. When the CZ gate signal is applied, the coupling strength between the two qubits is increased, and the CZ gate signal is applied to the tunable coupler, enabling the two qubits to complete the CZ gate operation. This scheme only requires distortion measurement and calibration of the tunable coupler, effectively improving the execution efficiency of the two-qubit logic gate.

[0059] As will be understood by those skilled in the art, the conditional phase is an important parameter for a two-qubit logic gate. Taking the CZ gate as an example, a single-qubit phase is generated during the adjustment of the qubit frequency. The process of adjusting a qubit from its operating point to the two-qubit resonance point and then back to its initial position can be written in the following form:

[0060] ;

[0061] in, and The CZ gate, which generates single-bit phases for two bits respectively, eliminates the single-bit phases in the matrix, achieving the following process:

[0062] ;

[0063] in, This is the conditional phase. In the ideal case of a CZ gate, the conditional phase is equal to π.

[0064] Generally, to obtain an ideal two-qubit logic gate signal, it is necessary to perform two Ramsey experiments, with the first qubit in state 0 and state 1 respectively. Then, based on the results of the two Ramsey experiments, the conditional phase test value of the two-qubit logic gate is obtained. It is then determined whether the conditional phase test value meets a preset condition, thereby determining whether the parameters of the two-qubit logic gate have been adjusted. If not, the parameters of the two-qubit logic gate signal are adjusted, and the above process is repeated until the conditional phase test value meets the requirements. In this embodiment, the signal of the two-qubit logic gate can be a flat-top Gaussian waveform, a square wave, a slepian waveform, etc., and is not limited thereto.

[0065] In step S1, although the operating frequency of the tunable coupler has been set to the turn-off frequency, in practical applications, the tunable coupler cannot completely turn off the coupling relationship between the two qubits. The turn-off frequency proposed in this embodiment is also to minimize the coupling strength between the two qubits. To ensure the execution of the two-qubit logic gate, the two qubits need to be set to their initial state. If there is still a large coupling relationship between the two qubits at this time, crosstalk will inevitably lead to inaccurate initial state settings, thus ultimately affecting the execution result of the two-qubit logic gate. Therefore, we need to ensure that the coupling strength between the two qubits is as small as possible in the initial state. In this embodiment, after setting the operating frequency of the tunable coupler to the turn-off frequency, the following steps are also included:

[0066] The operating frequencies of the first and second qubits are determined based on the anharmonicity of the first qubit to generate a preset energy level difference between the first and second qubits.

[0067] In this embodiment, by setting the operating frequencies of the first and second qubits within a certain difference range, a certain energy level difference can be generated between the two qubits, thereby further reducing the coupling strength between them. Preferably, the operating frequencies of the two qubits can be set according to the following formula:

[0068] F q1 -F q2 =a*α1;

[0069] Among them, F q1 F is the operating frequency of the first quantum bit. q2 α is the operating frequency of the second qubit, α1 is the anharmonicity of the first qubit, and a is a non-zero number. In this embodiment, a can be 0.97, 0.98, 0.8, 1.2, etc.

[0070] The stronger the coupling between two qubits, the greater the influence between them. Due to crosstalk, this generally manifests as the change in quantum state of one qubit from the ground state to an excited state affecting the frequency of the other qubit to some extent. Therefore, in this embodiment, this relationship can be used to obtain the turn-on frequency and the turn-off frequency. Specifically, the method further includes:

[0071] The first change of the first offset with the operating frequency of the tunable coupler is obtained, wherein the first offset is the influence of the quantum state of the second qubit on the bit frequency of the first qubit;

[0072] The shutdown frequency and the on frequency are obtained based on the first change scenario.

[0073] Specifically, in this embodiment, the first offset is obtained in the following way:

[0074] An X / 2 gate is applied to the first qubit, and a flat-top Gaussian signal is applied to the tunable coupler. The phase of the first qubit is obtained using the Ramsey experiment, with and without an X gate applied to the second qubit.

[0075] The first offset is obtained based on the difference between the two obtained phases and the duration of the flat-top Gaussian signal.

[0076] Those skilled in the art will understand that both the X / 2 gate and the X gate are single-qubit logic gates.

[0077] Specifically, in this embodiment, obtaining the first offset based on the difference between the two obtained phases using the flat-top Gaussian signal includes:

[0078] The first offset is obtained by dividing the difference between the two phases by the duration of the flat-top Gaussian signal.

[0079] Specifically, in this embodiment, the shutdown frequency is obtained in the following way:

[0080] Based on the first change, the frequency value corresponding to the minimum point of the first offset is obtained as the first frequency;

[0081] The shutdown frequency is obtained based on the first frequency.

[0082] Specifically, in this embodiment, the activation frequency is obtained in the following way:

[0083] Based on the first change, the frequency value corresponding to when the first offset is equal to a preset threshold is obtained as the second frequency;

[0084] The activation frequency is obtained based on the second frequency.

[0085] It should be noted that the preset threshold can be adjusted according to the actual application scenario. When we need a larger coupling strength, we can set the preset threshold to a larger value, and when we need a smaller coupling strength, we can set the preset threshold to a smaller value.

[0086] Specifically, in this embodiment, the magnitude of the activation frequency is determined based on the signal length of the two-qubit logic gate.

[0087] Specifically, in this embodiment, the magnitude of the turn-on frequency is inversely correlated with the signal length of the two-qubit logic gate.

[0088] Specifically, in this embodiment, the method further includes:

[0089] The conditional phase of the two-qubit logic gate was obtained using the Ramsey experiment to verify the accuracy of the two-qubit logic gate.

[0090] By using the phase of the oscillation curve in the Ramsey experiment, the current conditional phase of a two-qubit logic gate can be directly obtained from the phase difference between the oscillation curves in the results of two Ramsey experiments.

[0091] Based on the same inventive concept, please refer to Figure 4 The present invention also proposes an execution device for a two-qubit logic gate, comprising:

[0092] A coupling shutdown module 100 is configured to set the operating frequency of an adjustable coupler to a shutdown frequency to shut off the coupling relationship between the first qubit and the second qubit, wherein the adjustable coupler is used to couple adjacent first qubits and second qubits in a quantum chip.

[0093] The logic gate execution module 200 is configured to apply a two-qubit logic gate signal to the frequency control line of the adjustable coupler when both the first qubit and the second qubit are in the first eigenstate and the operating frequency of the adjustable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit.

[0094] It is understood that the coupling shutdown module 100 and the logic gate execution module 200 can be implemented in a single device, or any one of these modules can be divided into multiple sub-modules. Alternatively, at least some of the functions of one or more modules of the coupling shutdown module 100 and the logic gate execution module 200 can be combined with at least some of the functions of other modules and implemented in a single functional module. According to embodiments of the present invention, at least one of the coupling shutdown module 100 and the logic gate execution module 200 can be at least partially implemented as a hardware circuit, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or can be implemented in hardware or firmware in any other reasonable manner of integrating or packaging the circuit, or in a suitable combination of software, hardware, and firmware implementations. Alternatively, at least one of the coupling shutdown module 100 and the logic gate execution module 200 can be at least partially implemented as a computer program module, which, when run by a computer, can execute the functions of the corresponding module.

[0095] Based on the same inventive concept, embodiments of the present invention also propose a quantum control system, which utilizes the execution method of the two-qubit logic gate described in any one of the above-described features, or includes the execution device of the two-qubit logic gate described in the above-described features.

[0096] Based on the same inventive concept, embodiments of the present invention also propose a quantum computer, including the quantum control system described in the above feature description.

[0097] Based on the same inventive concept, embodiments of the present invention also propose a readable storage medium storing a computer program thereon, wherein the computer program, when executed by a processor, can implement the execution method of the two-qubit logic gate described in any of the above-described features.

[0098] The readable storage medium can be a tangible device capable of holding and storing instructions for use by an instruction execution device, such as, but not limited to, electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination thereof. The computer programs described herein can be downloaded from the readable storage medium to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. Each computing / processing device's network adapter card or network interface receives the computer program from the network and forwards it for storage in a readable storage medium within the respective computing / processing device. The computer program used to perform the operations of this invention can be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as "C" or similar languages. The computer program can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuits, such as programmable logic circuits, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), are personalized by utilizing state information from a computer program. These electronic circuits can execute computer-readable program instructions, thereby realizing various aspects of the present invention.

[0099] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, systems, and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by a computer program. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. These computer programs can also be stored in a readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the readable storage medium storing the computer program comprises an article of manufacture including instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams.

[0100] A computer program may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the computer program executing on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0101] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," or "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0102] The above are merely preferred embodiments of the present invention and do not constitute any limitation on the present invention. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and content disclosed in the present invention without departing from the scope of the present invention shall be deemed to have remained within the protection scope of the present invention.

Claims

1. A method for executing a two-qubit logic gate, characterized in that, include: The operating frequency of the tunable coupler is set to the off frequency to shut off the coupling relationship between the first qubit and the second qubit. The tunable coupler is used to couple adjacent first qubits and second qubits in the quantum chip. The operating frequencies of the first and second qubits are determined based on the anharmonicity of the first qubit to generate a preset energy level difference between the first and second qubits; When both the first qubit and the second qubit are in the first eigenstate, and the operating frequency of the tunable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit, a signal for a two-qubit logic gate is applied to the frequency control line of the tunable coupler.

2. The method as described in claim 1, characterized in that, The method further includes: The first change of the first offset with the operating frequency of the tunable coupler is obtained, wherein the first offset is the influence of the quantum state of the second qubit on the bit frequency of the first qubit; The shutdown frequency and the on frequency are obtained based on the first change scenario.

3. The method as described in claim 2, characterized in that, The first offset is obtained in the following way: An X / 2 gate is applied to the first qubit, and a flat-top Gaussian signal is applied to the tunable coupler. The phase of the first qubit is obtained using the Ramsey experiment, with and without an X gate applied to the second qubit. The first offset is obtained based on the difference between the two obtained phases and the duration of the flat-top Gaussian signal.

4. The method as described in claim 3, characterized in that, The step of obtaining the first offset based on the difference between the two obtained phases and the flat-top Gaussian signal includes: The first offset is obtained by dividing the difference between the two phases by the duration of the flat-top Gaussian signal.

5. The method as described in claim 2, characterized in that, The shutdown frequency is obtained in the following way: Based on the first change, the frequency value corresponding to the minimum point of the first offset is obtained as the first frequency; The shutdown frequency is obtained based on the first frequency.

6. The method as described in claim 2, characterized in that, The activation frequency is obtained in the following way: Based on the first change, the frequency value corresponding to when the first offset is equal to a preset threshold is obtained as the second frequency; The activation frequency is obtained based on the second frequency.

7. The method as described in claim 6, characterized in that, The activation frequency is determined based on the signal length of the two-qubit logic gate.

8. The method as described in claim 7, characterized in that, The magnitude of the activation frequency is inversely correlated with the signal length of the two-qubit logic gate.

9. The method as described in claim 1, characterized in that, The method further includes: The conditional phase of the two-qubit logic gate was obtained using the Ramsey experiment to verify the accuracy of the two-qubit logic gate.

10. An execution device for a two-qubit logic gate, characterized in that, include: A coupling shutdown module is configured to set the operating frequency of an adjustable coupler to a shutdown frequency to shut off the coupling relationship between a first qubit and a second qubit, wherein the adjustable coupler is used to couple adjacent first qubits and second qubits in a quantum chip. The logic gate execution module is configured to determine the operating frequencies of the first qubit and the second qubit based on the anharmonicity of the first qubit, so that the first qubit and the second qubit generate a preset energy level difference; The logic gate execution module is further configured to apply a two-qubit logic gate signal to the frequency control line of the adjustable coupler when both the first qubit and the second qubit are in the first eigenstate and the operating frequency of the adjustable coupler is set to the turn-on frequency to open the coupling relationship between the first qubit and the second qubit.

11. A quantum control system, characterized in that, An execution method using a two-qubit logic gate as described in any one of claims 1-9, or an execution device including a two-qubit logic gate as described in claim 10.

12. A quantum computer, characterized in that, Including the quantum control system as described in claim 11.

13. A readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it can implement the execution method of the two-qubit logic gate as described in any one of claims 1 to 9.

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