Array substrate and preparation method thereof and flexible electronic paper display panel

Abstract

The present application discloses an array substrate and a preparation method thereof and a flexible electronic paper display panel, mainly involving the field of display technology, wherein the array substrate comprises a flexible substrate, a first active switch, a second active switch, a first sub-data line, a first sub-scan line and a pixel electrode; the first sub-data line and the first sub-scan line are arranged on the flexible substrate, and the first sub-data line and the first sub-scan line are arranged vertically and horizontally, and a plurality of pixel units are divided; the first active switch and the second active switch in each pixel unit are respectively arranged on the front and back of the flexible substrate, and the pixel electrode is arranged on the flexible substrate and located in the pixel unit; the first sub-data line, the first active switch, the second active switch and the pixel electrode are connected in sequence. Through the above design, the problem of grayscale reduction when the flexible electronic paper display panel is bent is avoided, and the display effect is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate and a preparation method thereof, and a flexible electronic paper display panel. Background Art

[0002] With the development of digital technology, more and more display devices have entered people's lives, such as electronic paper (EP) display panels. Since electronic paper display panels can maintain display for a long time in the case of power failure, and have the advantages of lightness, thinness, low power consumption, and simple process, they are becoming more and more popular.

[0003] The current flexible electronic paper display panels can be rolled up and folded at will by using a flexible substrate made of polyimide film. However, when in use, the pixel units at the corresponding bent and folded positions will experience display abnormalities such as reduced grayscale. Summary of the invention

[0004] The purpose of the present application is to provide an array substrate and a preparation method thereof and a flexible electronic paper display panel, so as to avoid the problem of grayscale reduction when the flexible electronic paper display panel is bent and improve the display effect of the flexible electronic paper display panel.

[0005] The present application discloses an array substrate for use in a flexible electronic paper display panel, wherein the array substrate comprises a flexible substrate, a first active switch, a second active switch, a first sub-data line, a first sub-scan line and a pixel electrode;

[0006] The first sub-data lines and the first sub-scanning lines are disposed on the flexible substrate, and the first sub-data lines and the first sub-scanning lines are arranged vertically and horizontally to divide a plurality of pixel units;

[0007] The first active switch and the second active switch in each pixel unit are respectively arranged on the front side and the back side of the flexible substrate, the pixel electrode is arranged on the flexible substrate and is located in the pixel unit; the first sub-data line, the first active switch, the second active switch, and the pixel electrode are connected in sequence.

[0008] Optionally, the array substrate includes a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second insulating layer, a passivation layer, a pixel electrode, a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer;

[0009] The first active switch includes a first gate, a first sub-semiconductor, a first source and a first drain; the second active switch includes a second gate, a second sub-semiconductor, a second source and a second drain;

[0010] The third metal layer, the third insulating layer, the second semiconductor layer, the fourth metal layer, the fourth insulating layer, the passivation layer and the pixel electrode are sequentially stacked on the front side of the flexible substrate; the second gate is arranged in the third metal layer, the second sub-semiconductor is arranged in the second semiconductor layer, and the second source and the second drain are arranged in the fourth metal layer;

[0011] The first metal layer, the first insulating layer, the first semiconductor layer, the second metal layer and the second insulating layer are stacked in sequence on the back side of the flexible substrate; the first gate is arranged in the first metal layer, the first sub-semiconductor is arranged in the first semiconductor layer, and the first source and the first drain are arranged in the second metal layer;

[0012] The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to both the first gate electrode and the second gate electrode.

[0013] Optionally, the array substrate includes a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second insulating layer, a passivation layer, a pixel electrode, a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer;

[0014] The first active switch includes a first gate, a first sub-semiconductor, a first source and a first drain; the second active switch includes a second gate, a second sub-semiconductor, a second source and a second drain;

[0015] The first metal layer, the first insulating layer, the first semiconductor layer, the second metal layer, the second insulating layer, the passivation layer and the pixel electrode are sequentially stacked on the front side of the flexible substrate; the first gate is arranged in the first metal layer, the first sub-semiconductor is arranged in the first semiconductor layer, and the first source and the first drain are arranged in the second metal layer;

[0016] The third metal layer, the third insulating layer, the second semiconductor layer, the fourth metal layer and the fourth insulating layer are sequentially stacked on the back side of the flexible substrate; the second gate is arranged in the third metal layer, the second sub-semiconductor is arranged in the second semiconductor layer, and the second source and the second drain are arranged in the fourth metal layer;

[0017] The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to the first gate electrode and the second gate electrode.

[0018] Optionally, a first channel formed between the first source and the first drain, and a second channel formed between the second source and the second drain, a length direction of the first channel and a length direction of the second channel are located on the same straight line.

[0019] Optionally, the array substrate further includes a third active switch and a fourth active switch; the third active switch includes a third gate, a third sub-semiconductor, a third source, and a third drain; the fourth active switch includes a fourth gate, a fourth sub-semiconductor, a fourth source, and a fourth drain;

[0020] The third gate is also disposed in the third metal layer, the third sub-semiconductor is also disposed in the second semiconductor layer, and the third source and the third drain are also disposed in the fourth metal layer;

[0021] The fourth gate is further disposed in the first metal layer, the fourth sub-semiconductor is further disposed in the first semiconductor layer, and the fourth source and the fourth drain are further disposed in the second metal layer;

[0022] The array substrate further includes a second sub-data line and a second sub-scan line;

[0023] The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to both the first gate electrode and the second gate electrode;

[0024] The second sub-data line is connected to the third source, the third drain is connected to the fourth source, the fourth drain is connected to the pixel electrode, and the second sub-scan line is connected to both the third gate and the fourth gate.

[0025] Optionally, the first sub-scan line is located in the first metal layer, and the first sub-data line is located in the second metal layer;

[0026] The second sub-scan line is located in the third metal layer, and the second sub-data line is located in the fourth metal layer; the third channel formed between the third source and the third drain, and the fourth channel formed between the fourth source and the fourth drain, the length direction of the third channel and the length direction of the fourth channel are located on the same straight line.

[0027] The present application also discloses a method for preparing an array substrate, which is used to prepare the array substrate described above, and comprises the following steps:

[0028] forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on a flexible substrate;

[0029] forming a passivation layer on the first active switch or the second active switch;

[0030] forming the pixel electrode on the passivation layer;

[0031] The first sub-data line and the first sub-scan line are arranged vertically and horizontally to divide a plurality of pixel units, the first active switch and the second active switch in each pixel unit are respectively arranged on the front and back sides of the flexible substrate, the first sub-data line, the first active switch, the second active switch, and the pixel electrode are connected in sequence, and the first sub-data line is connected to the first active switch and the second active switch at the same time.

[0032] Optionally, the step of forming a first sub-data line, a first sub-scan line, a first active switch, and a second active switch on the flexible substrate includes:

[0033] A third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer are stacked in sequence on the front side of the flexible substrate; a second gate is arranged in the third metal layer, a second sub-semiconductor is arranged in the second semiconductor layer, a second source and a second drain are arranged in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch;

[0034] A first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer and a second insulating layer are sequentially stacked on the back side of the flexible substrate; a first gate is arranged in the first metal layer, a first sub-semiconductor is arranged in the first semiconductor layer, a first source and a first drain are arranged in the second metal layer, and the first gate, the first sub-semiconductor, the first source and the first drain form the first active switch;

[0035] The step of forming a passivation layer on the first active switch or the second active switch comprises:

[0036] The passivation layer is formed on the fourth insulating layer.

[0037] Optionally, the step of forming a first sub-data line, a first sub-scan line, a first active switch, and a second active switch on the flexible substrate includes:

[0038] A first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer and a second insulating layer are stacked in sequence on the front side of the flexible substrate; a first gate is arranged in the first metal layer, a first sub-semiconductor is arranged in the first semiconductor layer, a first source and a first drain are arranged in the second metal layer, and the first gate, the first sub-semiconductor, the first source and the first drain form the first active switch;

[0039] A third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer are stacked in sequence on the back side of the flexible substrate; a second gate is arranged in the third metal layer, a second sub-semiconductor is arranged in the second semiconductor layer, a second source and a second drain are arranged in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch;

[0040] The step of forming a passivation layer on the first active switch or the second active switch comprises:

[0041] The passivation layer is formed on the second insulating layer.

[0042] The present application also discloses a flexible electronic paper display panel, which includes an electronic paper membrane and an array substrate. The electronic paper membrane is attached to the array substrate and is located on a side of the pixel electrode away from the flexible substrate.

[0043] Compared with the existing method in which the first active switch and the second active switch on the array substrate are arranged on the same side of the flexible substrate, the present application arranges the first active switch and the second active switch on the front and back sides of the flexible substrate respectively, so that when the flexible electronic paper display panel is bent, the width of the first channel in the first active switch becomes wider while the width of the second channel in the second active switch becomes narrower; the width of the first channel in the first active switch becomes narrower while the width of the second channel in the second active switch becomes wider, so that the change of the first active switch and the change of the second active switch complement each other, avoid the problem of grayscale reduction when the flexible electronic paper display panel is bent, and improve the display effect of the flexible electronic paper display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0045] Figure 1 is a schematic diagram of a flexible electronic paper display panel according to an embodiment of the present application;

[0046] Figure 2 is a schematic diagram of an array substrate according to the first embodiment of the present application;

[0047] Figure 3 is a schematic diagram of a pixel unit plane of the first embodiment of the present application;

[0048] Figure 4 is a schematic diagram of a flexible substrate of the first embodiment of the present application, in which scanning lines are arranged on both the front and back sides;

[0049] Figure 5 It is a plan view schematic diagram of a flexible substrate of the first embodiment of the present application, in which scanning lines are arranged on both the front and back sides;

[0050] Figure 6 is a cross-sectional schematic diagram of a first channel and a second channel of the first embodiment of the present application;

[0051] Figure 7 is a schematic plan view of a first channel and a second channel of the first embodiment of the present application;

[0052] Figure 8 is a schematic diagram of an array substrate according to a second embodiment of the present application;

[0053] Fig. 9 is a cross-sectional schematic diagram of an array substrate according to a third embodiment of the present application;

[0054] Fig.10 is a cross-sectional schematic diagram of a third active switch and a fourth active switch according to the third embodiment of the present application;

[0055] Fig.11 is a schematic diagram of a pixel unit according to the third embodiment of the present application;

[0056] Fig.12 It is a schematic diagram of a process of preparing an array substrate according to an embodiment of the present application;

[0057] Figure 13a-13b is a schematic diagram of a process of a method for preparing an array substrate according to an embodiment of the present application;

[0058] Fig.14 It is a schematic diagram of a process of preparing an array substrate according to an embodiment of the present application;

[0059] Figure 15a-Figure 15b It is a schematic diagram of a process of preparing a method for an array substrate according to an embodiment of the present application.

[0060] Among them, 10, flexible electronic paper display panel; 20, electronic paper membrane; 21, particle layer; 22, common electrode layer; 30, array substrate; 40, flexible substrate; 41, front; 42, back; 110, first metal layer; 120, first insulating layer; 130, first semiconductor layer; 140, second metal layer; 150, second insulating layer; 160, passivation layer; 170, pixel electrode; 210, third metal layer; 220, third insulating layer; 230, second semiconductor layer; 240, fourth metal layer; 250, fourth insulating layer; 310, first active switch; 311, first gate; 312, first sub-semiconductor; 313, first source; 314, first drain; 315, first channel; 320, second active switch; 321, second gate; 322, second sub-semiconductor; 323, second source; 324, second drain; 325, second channel; 330, third active switch; 331, third gate; 332, third sub-semiconductor; 333, third source; 334, third drain; 335, third channel; 340, fourth active switch; 341, fourth gate; 342, fourth sub-semiconductor; 343, fourth source; 344, fourth drain; 345, fourth channel; 411, first common electrode sheet; 412, second common electrode sheet; 421, first electrode plate; 422, second electrode plate; 511, first sub-data line; 512, second sub-data line; 521, first sub-scanning line; 522, second sub-scanning line; 523, third sub-scanning line; 524, fourth sub-scanning line; 610, first direction; 620, second direction; 710, pixel unit. DETAILED DESCRIPTION

[0061] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.

[0062] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating relative importance or implicitly indicating the number of technical features indicated. Therefore, unless otherwise specified, features defined as "first" and "second" may explicitly or implicitly include one or more of the features; "plurality" means two or more. The term "including" and any variation thereof means non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components and / or combinations thereof may exist or be added.

[0063] In addition, terms indicating orientation or positional relationships, such as “center,” “lateral,” “up,” “down,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inside,” and “outside,” are described based on the orientation or relative positional relationships shown in the accompanying drawings and are merely simplified descriptions for the convenience of describing the present application. They do not indicate that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limitations on the present application.

[0064] In addition, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internally connected between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0065] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.

[0066] Figure 1 is a schematic diagram of a flexible electronic paper display panel according to an embodiment of the present application, such as Figure 1 As shown, the present application discloses a flexible electronic paper display panel 10, which includes an electronic paper film 20 and an array substrate 30, wherein the electronic paper film 20 is attached to the array substrate 30 and is located on the side of the pixel electrode 170 away from the flexible substrate 40.

[0067] The flexible electronic paper display panel 10 can be rolled into a tube when in use, or can be folded.

[0068] The electronic paper film 20 includes a particle layer 21 and a common electrode layer 22. Electrophoretic particles are arranged in the particle layer 21. The electrophoretic particles include black electrophoretic particles and white electrophoretic particles. Of course, they can also include colored electrophoretic particles, such as red electrophoretic particles, blue electrophoretic particles and green electrophoretic particles. The common electrode layer 22 is located on the side of the particle layer 21 away from the array substrate 30. An electric field is formed between the common electrode layer 22 and the pixel electrode 170 on the array substrate 30 to drive the electrophoretic particles to move to display the picture.

[0069] The present application also discloses an array substrate 30, which can be used in the flexible electronic paper display panel 10 described above. For the array substrate 30, the present application provides the following design, which is specifically introduced through several embodiments:

[0070] Embodiment 1:

[0071] Figure 2 is a schematic diagram of an array substrate according to the first embodiment of the present application. Figure 3 is a schematic diagram of a pixel unit plane of the first embodiment of the present application, such as Figure 2-Figure 3 As shown, the present application discloses an array substrate 30 for use in a flexible electronic paper display panel 10 , wherein the array substrate 30 includes a flexible substrate 40 , a first active switch 310 , a second active switch 320 , a first sub-data line 511 , a first sub-scan line 521 and a pixel electrode 170 .

[0072] The first sub-data lines 511 and the first sub-scanning lines 521 are disposed on the flexible substrate 40 , and the first sub-data lines 511 and the first sub-scanning lines 521 are arranged vertically and horizontally to divide a plurality of pixel units 710 .

[0073] The first active switch 310 and the second active switch 320 in each pixel unit 710 are respectively arranged on the front side 41 and the back side 42 of the flexible substrate 40; the pixel electrode 170 is arranged on the flexible substrate 40 and is located in the pixel unit 710; the first sub-data line 511, the first active switch 310, the second active switch 320, and the pixel electrode 170 are connected in sequence.

[0074] Exemplarily, the first sub-scan line 521 may be connected to the first active switch 310 and the second active switch 320 at the same time.

[0075] In short, each pixel unit 710 is provided with a first active switch 310 , a second active switch 320 and a pixel electrode 170 , and the first active switch 310 , the second active switch 320 and the pixel electrode 170 are connected in series.

[0076] Furthermore, it is possible that the first active switch 310 is on the front side 41 of the flexible substrate 40 and the second active switch 320 is on the back side 42 of the flexible substrate 40; of course, it is also possible that the first active switch 310 is on the back side 42 of the flexible substrate 40 and the second active switch 320 is on the front side 41 of the flexible substrate 40, and then the first active switch 310 and the second active switch 320 are connected through a via hole, and the second active switch 320 and the pixel electrode 170 are also connected through a via hole.

[0077] Furthermore, the first sub-data line 511 and the first sub-scan line 521 may be arranged on the front side 41 of the flexible substrate 40 at the same time, or may be arranged on the back side 42 of the flexible substrate 40 at the same time. Of course, it is also possible that the first sub-data line 511 is arranged on the front side 41 of the flexible substrate 40, and the first sub-scan line 521 is arranged on the back side 42 of the flexible substrate 40, or the first sub-data line 511 is arranged on the back side 42 of the flexible substrate 40, and the first sub-scan line 521 is arranged on the front side 41 of the flexible substrate 40.

[0078] When the existing flexible electronic paper display panel is bent, a folding line will be formed in the middle area of ​​the bend, defining the first channel 315 formed by the source and drain in the first active switch 310, and defining the second channel 325 formed by the source and drain in the second active switch 320. Since the first active switch 310 and the second active switch 320 of the existing flexible electronic paper display panel are both arranged on the same side of the flexible substrate 40, when folded, the first channel 315 and the second channel 325 at the position corresponding to the folding line on the array substrate 30 will become wider or narrower at the same time.

[0079] That is, when both the first active switch 310 and the second active switch 320 are disposed on the front surface 41 of the flexible substrate 40 .

[0080] When the flexible electronic paper display panel 10 is bent upward, the widths of the first channel 315 in the first active switch 310 and the second channel 325 in the second active switch 320 will be narrowed at the same time, resulting in increased leakage in the off state, and a phenomenon of reduced grayscale at the position of the flexible electronic paper display panel 10 corresponding to the pixel unit 710.

[0081] When the flexible electronic paper display panel 10 is bent downward, the widths of the first channel 315 in the first active switch 310 and the second channel 325 in the second active switch 320 will be widened at the same time, resulting in a decrease in the charging performance of the pixel electrode 170, and a phenomenon of reduced grayscale at the position of the flexible electronic paper display panel 10 corresponding to the pixel unit 710. The change is most obvious when the length direction of the first channel 315, the length direction of the second channel 325 and the length direction of the folding line are all consistent.

[0082] Compared with the existing method in which the first active switch 310 and the second active switch 320 on the array substrate are arranged on the same side of the flexible substrate 40, the present application arranges the first active switch 310 and the second active switch 320 on the front side 41 and the back side 42 of the flexible substrate 40 respectively, so that when the flexible electronic paper display panel 10 is bent, the width of the first channel 315 in the first active switch 310 becomes wider and the width of the second channel 325 in the second active switch 320 becomes narrower; the width of the first channel 315 in the first active switch 310 becomes narrower and the width of the second channel 325 in the second active switch 320 becomes wider, so that the change of the first active switch 310 and the change of the second active switch 320 complement each other, avoid the problem of grayscale reduction when the flexible electronic paper display panel 10 is bent, and improve the display effect of the flexible electronic paper display panel 10.

[0083] In this embodiment, it is taken as an example that the first active switch 310 is disposed on the back surface 42 of the flexible substrate 40 , and the second active switch 320 is disposed on the front surface 41 of the flexible substrate 40 .

[0084] Specifically, the array substrate 30 includes a first metal layer 110, a first insulating layer 120, a first semiconductor layer 130, a second metal layer 140, a second insulating layer 150, a passivation layer 160, a pixel electrode 170, a third metal layer 210, a third insulating layer 220, a second semiconductor layer 230, a fourth metal layer 240 and a fourth insulating layer 250.

[0085] The first active switch 310 includes a first gate 311 , a first sub-semiconductor 312 , a first source 313 , and a first drain 314 ; the second active switch 320 includes a second gate 321 , a second sub-semiconductor 322 , a second source 323 , and a second drain 324 .

[0086] The front side 41 of the flexible substrate 40 is stacked with the third metal layer 210, the third insulating layer 220, the second semiconductor layer 230, the fourth metal layer 240, the fourth insulating layer 250, the passivation layer 160 and the pixel electrode 170 in sequence; the second gate 321 is arranged in the third metal layer 210, the second sub-semiconductor 322 is arranged in the second semiconductor layer 230, and the second source 323 and the second drain 324 are arranged in the fourth metal layer 240.

[0087] The back side 42 of the flexible substrate 40 is stacked with the first metal layer 110, the first insulating layer 120, the first semiconductor layer 130, the second metal layer 140 and the second insulating layer 150 in sequence; the first gate 311 is arranged in the first metal layer 110, the first sub-semiconductor 312 is arranged in the first semiconductor layer 130, and the first source 313 and the first drain 314 are arranged in the second metal layer 140.

[0088] The first sub-data line 511 is connected to the first source 313, the first drain 314 is connected to the second source 323, the second drain 324 is connected to the pixel electrode 170, and the first sub-scan line 521 is connected to both the first gate 311 and the second gate 321. In simple terms, the first active switch 310 is disposed on the back surface 42 of the flexible substrate 40, the second active switch 320 is disposed on the front surface 41 of the flexible substrate 40, and the pixel electrode 170 is also disposed on the front surface 41 of the flexible substrate 40, so that the length of the via hole connecting the second active switch 320 and the pixel electrode 170 can be reduced, so as to reduce the process difficulty and improve the stability of signal transmission.

[0089] Furthermore, the first sub-data line 511 is disposed on the back side 42 of the flexible substrate 40 and in the second metal layer 140, so that the connection between the first sub-data line 511 and the first source 313 of the first active switch 310 does not need to be connected by a via hole, thereby reducing the process difficulty, improving the manufacturing yield, and improving the transmission stability of the data signal. The first sub-scan line 521 is disposed on the back side 42 of the flexible substrate 40 and in the first metal layer.

[0090] Figure 4 is a schematic diagram of a flexible substrate of the first embodiment of the present application, in which scanning lines are arranged on both the front and back sides. Figure 5 is a plan view of a flexible substrate of the first embodiment of the present application, in which scanning lines are arranged on both the front and back sides. Figure 4-Figure 5 As shown, in simple terms, scan lines are provided on both the front side 41 and the back side 42 of the flexible substrate 40. Specifically, the array substrate 30 further includes a third sub-scan line 523. The first sub-scan line 521 is provided on the back side 42 of the flexible substrate 40 and is located in the first metal layer 110. The third sub-scan line 523 is provided on the front side 41 of the flexible substrate 40 and is located in the third metal layer 210.

[0091] The first sub-scan line 521 and the third sub-scan line 523 are connected to the same driving signal, the first sub-scan line 521 is connected to the first gate 311 of the first active switch 310, and the third sub-scan line 523 is connected to the second gate 321 of the second active switch 320. The first sub-scan line 521 and the third sub-scan line 523 correspond to each other one by one, and the first active switch 310 and the second active switch 320 in one pixel unit 710 are turned on at the same time. In this way, it is not necessary to open holes and connect the second gate 321 and the first sub-scan line 521 of the second active switch 320 of each pixel unit 710, thereby reducing the process difficulty and improving the product yield of the flexible electronic paper display panel 10.

[0092] Figure 6 is a cross-sectional schematic diagram of a first channel and a second channel of the first embodiment of the present application, Figure 7 is a schematic plan view of a first channel and a second channel of the first embodiment of the present application, such as Figure 6-Figure 7 As shown, in order to avoid the situation where the width change of the first channel 315 and the width change of the second channel 325 cannot compensate for each other well, such as the situation where the width of the first channel 315 changes more and the width of the second channel 325 changes less, the present application also adjusts the positions of the first channel 315 and the second channel 325.

[0093] A first channel 315 is formed between the first source 313 and the first drain 314 , and a second channel 325 is formed between the second source 323 and the second drain 324 . The length direction of the first channel 315 and the length direction of the second channel 325 are located on the same straight line.

[0094] Exemplarily, the length direction of the first sub-data line 511 is taken as the first direction 610, the length direction of the first channel 315 and the length direction of the second channel 325 are the same as the first direction 610, and the orthographic projection of the first active switch 310 on the flexible substrate 40 does not overlap with the orthographic projection of the second active switch 320 on the flexible substrate 40. In simple terms, the orthographic projection of the second channel 325 on the substrate is located on the length extension line of the orthographic projection of the first channel 315 on the flexible substrate 40.

[0095] In this way, when the flexible electronic paper display panel 10 is bent and folded, the width variation of the first channel 315 of the first active switch 310 and the width variation of the second channel 325 of the second active switch 320 can be well compensated for each other, and the situation where the width variation of the first channel 315 of the first active switch 310 is large and the width variation of the second channel 325 of the second active switch 320 is small will not occur.

[0096] The array substrate 30 also includes a first electrode plate 421, a second electrode plate 422, a first common electrode sheet 411 and a second common electrode sheet 412, the first common electrode sheet 411 is arranged in the first metal layer 110, the first electrode plate 421 is arranged in the second metal layer 140, the second common electrode sheet 412 is arranged in the third metal layer 210, and the second electrode plate 422 is arranged in the fourth metal layer 240.

[0097] The first common electrode sheet 411 and the second common electrode sheet 412 are both connected to the common electrode layer 22, and the first electrode plate 421 and the second electrode plate 422 are both connected to the pixel electrode 170. A first storage capacitor is formed between the first electrode plate 421 and the first common electrode sheet 411, and a second storage capacitor is formed between the second electrode plate 422 and the second common electrode sheet 412. The areas of the first electrode plate 421, the second electrode plate 422, the first common electrode sheet 411, and the second common electrode sheet 412 are all equal.

[0098] During use, repeated folding will cause the first electrode plate 421, the second electrode plate 422, the first common electrode sheet 411 and the second common electrode sheet 412 to be offset in position, and the farther away the first electrode plate 421 and the second electrode plate 422 are from the flexible substrate 40, the greater the degree of positional offset. Therefore, the present application also staggers the first electrode plate 421 and the first common electrode sheet 411, and staggers the second electrode plate 422 and the second common electrode sheet 412, and the offset direction of the first electrode plate 421 and the first common electrode sheet 411 and the offset direction of the second electrode plate 422 and the second common electrode sheet 412 are opposite.

[0099] Exemplarily, the orthographic projection of the first common electrode sheet 411 on the flexible substrate 40 overlaps with the orthographic projection of the second common electrode sheet 412 on the flexible substrate 40; the second electrode plate 422 covers the left part of the second common electrode sheet 412, and the first electrode plate 421 covers the right part of the first common electrode sheet 411, or the second electrode plate 422 covers the right part of the second common electrode sheet 412, and the first electrode plate 421 covers the left part of the first common electrode sheet 411.

[0100] In this way, when the second electrode plate 422 and the first electrode plate 421 are simultaneously offset in one direction, the change in the first storage capacitor and the change in the second storage capacitor will offset each other, thereby ensuring that the charging capacity of the pixel unit 710 is not changed, avoiding display anomalies and improving the display effect.

[0101] Embodiment 2:

[0102] Figure 8 is a schematic diagram of an array substrate according to a second embodiment of the present application. Figure 8 As shown, the difference from the first embodiment is that the first active switch 310 of this embodiment is arranged on the front side 41 of the flexible substrate 40 , and the second active switch 320 is arranged on the back side 42 of the flexible substrate 40 .

[0103] The array substrate 30 includes a first metal layer 110, a first insulating layer 120, a first semiconductor layer 130, a second metal layer 140, a second insulating layer 150, a passivation layer 160, a pixel electrode 170, a third metal layer 210, a third insulating layer 220, a second semiconductor layer 230, a fourth metal layer 240 and a fourth insulating layer 250.

[0104] The first active switch 310 includes a first gate 311 , a first sub-semiconductor 312 , a first source 313 , and a first drain 314 ; the second active switch 320 includes a second gate 321 , a second sub-semiconductor 322 , a second source 323 , and a second drain 324 .

[0105] The front side 41 of the flexible substrate 40 is stacked with the first metal layer 110, the first insulating layer 120, the first semiconductor layer 130, the second metal layer 140, the second insulating layer 150, the passivation layer 160 and the pixel electrode 170 in sequence; the first gate 311 is arranged in the first metal layer 110, the first sub-semiconductor 312 is arranged in the first semiconductor layer 130, and the first source 313 and the first drain 314 are arranged in the second metal layer 140.

[0106] The back side 42 of the flexible substrate 40 is stacked with the third metal layer 210, the third insulating layer 220, the second semiconductor layer 230, the fourth metal layer 240 and the fourth insulating layer 250 in sequence; the second gate 321 is arranged in the third metal layer 210, the second sub-semiconductor 322 is arranged in the second semiconductor layer 230, and the second source 323 and the second drain 324 are arranged in the fourth metal layer 240.

[0107] The first sub-data line 511 is connected to the first source 313 , the first drain 314 is connected to the second source 323 , the second drain 324 is connected to the pixel electrode 170 , and the first sub-scanning line 521 is connected to the first gate 311 and the second gate 321 .

[0108] Compared with the first embodiment, in this embodiment, the first active switch 310 is arranged on the front side 41 of the flexible substrate 40, and the second active switch 320 is arranged on the back side 42 of the flexible substrate 40. The second active switch 320 is directly connected to the pixel electrode 170. The parasitic capacitance of the second active switch 320 arranged on the back side 42 of the flexible substrate 40 is smaller, and the influence on the voltage of the pixel electrode 170 is also smaller.

[0109] And when the array substrate 30 only includes the first sub-data line 511 and the first sub-scan line 521, the first sub-data line 511 and the first sub-scan line 521 are both arranged on the front side 41 of the flexible substrate 40, and the first sub-scan line 521 is located in the first metal layer 110 and connected to the first gate 311 of the first active switch 310 and the second gate 321 of the second active switch 320, and the first sub-data line 511 is located in the second metal layer 140 and connected to the first source 313 of the first active switch 310.

[0110] When the array substrate 30 includes the first sub-data line 511, the first sub-scan line 521 and the third sub-scan line 523, the first sub-data line 511 and the first sub-scan line 521 are both arranged on the front side 41 of the flexible substrate 40, the third sub-scan line 523 is arranged on the back side 42 of the flexible substrate 40, and the first sub-scan line 521 is located in the first metal layer 110 and connected to the first gate 311 of the first active switch 310, the first sub-data line 511 is located in the second metal layer 140 and connected to the first source 313 of the first active switch 310, and the third sub-scan line 523 is located in the third metal layer 210 and connected to the second gate 321 of the second active switch 320.

[0111] Embodiment 3:

[0112] Fig. 9 is a cross-sectional schematic diagram of an array substrate according to the third embodiment of the present application, such as Fig. 9 As shown, the difference from the first embodiment is that two groups of active switches are set in each pixel unit 710 of this embodiment, wherein the first group of active switches is the first active switch 310 and the second active switch 320, and the second group of active switches is the third active switch 330 and the fourth active switch 340.

[0113] The first active switch 310 is disposed on the back side 42 of the flexible substrate 40 , the second active switch 320 is disposed on the front side 41 of the flexible substrate 40 , the third active switch 330 is disposed on the front side 41 of the flexible substrate 40 , and the fourth active switch 340 is disposed on the back side 42 of the flexible substrate 40 .

[0114] The first active switch 310 , the second active switch 320 and the pixel electrode 170 are connected in series, the third active switch 330 , the fourth active switch 340 and the pixel electrode 170 are connected in series, and the first group of active switches and the second group of active switches are arranged in parallel.

[0115] That is, the array substrate 30 also includes a third active switch 330 and a fourth active switch 340; the third active switch 330 includes a third gate 331, a third sub-semiconductor 332, a third source 333, and a third drain 334; the fourth active switch 340 includes a fourth gate 341, a fourth sub-semiconductor 342, a fourth source 343, and a fourth drain 344.

[0116] The third gate electrode 331 is further disposed in the third metal layer 210 , the third sub-semiconductor 332 is further disposed in the second semiconductor layer 230 , and the third source electrode 333 and the third drain electrode 334 are further disposed in the fourth metal layer 240 .

[0117] The fourth gate electrode 341 is further disposed in the first metal layer 110 , the fourth sub-semiconductor 342 is further disposed in the first semiconductor layer 130 , and the fourth source electrode 343 and the fourth drain electrode 344 are further disposed in the second metal layer 140 .

[0118] The array substrate 30 further includes a second sub-data line 512 and a second sub-scan line 522. The first sub-data line 511 is connected to the first source 313, the first drain 314 is connected to the second source 323, the second drain 324 is connected to the pixel electrode 170, and the first sub-scan line 521 is connected to both the first gate 311 and the second gate 321; and the first sub-data line 511 is disposed in the second metal layer 140, and the first sub-scan line 521 is disposed in the first metal layer 110.

[0119] The second sub-data line 512 is connected to the third source 333, the third drain 334 is connected to the fourth source 343, the fourth drain 344 is connected to the pixel electrode 170, and the second sub-scan line 522 is connected to both the third gate 331 and the fourth gate 341. The second sub-data line 512 is located in the fourth metal layer 240, and the second sub-scan line 522 is located in the third metal layer 210.

[0120] The first sub-data line 511 and the second sub-data line 512 are both connected to the same driving signal. When the flexible electronic paper display panel 10 is working, since the two active switches in each group of active switches are arranged in series, when one group of active switches is damaged, since the first group of active switches and the second group of active switches are both independently connected to the same pixel electrode 170, the other group of active switches can be selected to work.

[0121] For example, when the first active switch 310 is damaged, it is no longer necessary to input a signal to the first sub-scan line 521 and the first sub-data line 511. Instead, the second group of active switches, namely the third active switch 330 and the fourth active switch 340, are selected to work, and a driving signal is input to the second sub-scan line 522 and the second sub-data line 512.

[0122] Fig.10 is a cross-sectional schematic diagram of a third active switch and a fourth active switch of the third embodiment of the present application, such as Fig.10 As shown, in order to avoid the situation that the width variation of the third channel 335 and the width variation of the fourth channel 345 cannot be compensated for each other, that is, the width variation of the third channel 335 is large and the width variation of the fourth channel 345 is small, the present application also adjusts the positions of the third channel 335 and the fourth channel 345. That is, the third channel 335 formed between the third source 333 and the third drain 334, the fourth channel 345 formed between the fourth source 343 and the fourth drain 344, the length direction of the third channel 335 and the length direction of the fourth channel 345 are located on the same straight line.

[0123] At this time, the first sub-scan line 521 is located in the first metal layer 110 , and the first sub-data line 511 is located in the second metal layer 140 ; ​​the second sub-scan line 522 is located in the third metal layer 210 , and the second sub-data line 512 is located in the fourth metal layer 240 .

[0124] Of course, the preferred Fig.10 As shown, the third active switch 330 can also be arranged on the back side 42 of the flexible substrate 40, and the fourth active switch 340 is arranged on the front side 41 of the flexible substrate 40. At this time, the third gate 331 is located in the first metal layer 110, the third sub-semiconductor 332 is located in the first semiconductor layer 130, and the third source 333 and the third drain 334 are located in the second metal layer 140; the fourth gate 341 is located in the third metal layer 210, the fourth sub-semiconductor 342 is located in the second semiconductor layer 230, and the fourth source 343 and the fourth drain 344 are located in the fourth metal layer 240.

[0125] The first sub-scan line 521 is located in the first metal layer 110 , and the first sub-data line 511 is located in the second metal layer 140 ; ​​the second sub-scan line 522 is also located in the first metal layer 110 , and the second sub-data line 512 is also located in the second metal layer 140 .

[0126] In this way, when the flexible electronic paper display panel 10 is bent and folded, the width variation of the third channel 335 of the third active switch 330 and the width variation of the fourth channel 345 of the fourth active switch 340 can be well compensated for each other, and the situation where the width variation of the third channel 335 of the third active switch 330 is large and the width variation of the fourth channel 345 of the fourth active switch 340 is small will not occur.

[0127] Fig.11 is a schematic diagram of a pixel unit of the third embodiment of the present application, such as Fig.11 As shown, during the use of the flexible electronic paper display panel 10, the flexible electronic paper display panel 10 is frequently bent and folded according to the user's usage habits, so a folding line will be formed at the folding position of the flexible electronic paper display panel 10. When the channel length direction of the active switch located on the folding line is the same as the length direction of the folding line, the channel width of the active switch is greatly affected and is more likely to be damaged.

[0128] Therefore, the present application also adjusts the positions of the two groups of active switches, that is, the length direction of the first channel 315 and the length direction of the second channel 325 are a first direction 610, the length direction of the third channel 335 and the length direction of the fourth channel 345 are a second direction 620, and the first direction 610 is perpendicular to the second direction 620.

[0129] Exemplarily, the length direction of the first sub-data line 511 is the first direction 610, the length direction of the first sub-scan line 521 is the second direction 620, the first direction 610 is perpendicular to the second direction 620, the length direction of the first channel 315 is the same as the length direction of the second channel 325, and the length direction of the first channel 315 and the length direction of the second channel 325 are parallel to the first direction 610, the length direction of the third channel 335 is the same as the length direction of the fourth channel 345, and the length direction of the third channel 335 and the length direction of the fourth channel 345 are parallel to the second direction 620.

[0130] Thus, the length direction of the channel of one of the first active switch 310 and the second active switch 320 in the first group of active switches and the third active switch 330 and the fourth active switch 340 in the second group of active switches will not be parallel to the length direction of the folding line.

[0131] Exemplarily, when the length direction of the folding line is horizontal to the length direction of the first sub-data line 511, the first active switch 310 and the second active switch 320 of the first group are easily damaged, and after the first active switch 310 and the second active switch 320 of the first group are damaged, they are replaced by the third active switch 330 and the fourth active switch 340 of the second group. Since the length direction of the third channel 335 in the third active switch 330 of the second group is perpendicular to the folding line, and the length direction of the fourth channel 345 in the fourth active switch 340 of the second group is perpendicular to the folding line, the third active switch 330 and the fourth active switch 340 of the second group are less affected, thereby improving the life of the flexible electronic paper display panel 10.

[0132] In addition, the array substrate 30 also includes a third sub-scan line 523 and a fourth sub-scan line 524; the first sub-scan line 521 is arranged on the back side 42 of the flexible substrate 40 and is located in the first metal layer 110, and the third sub-scan line 523 is arranged on the front side 41 of the flexible substrate 40 and is located in the third metal layer 210.

[0133] The first sub-scanning line 521 and the third sub-scanning line 523 are connected to the same driving signal, the first sub-scanning line 521 is connected to the first gate 311 of the first active switch 310, and the third sub-scanning line 523 is connected to the second gate 321 of the second active switch 320. The first sub-scanning line 521 and the third sub-scanning line 523 correspond to each other one by one, and the first active switch 310 and the second active switch 320 in one pixel unit 710 are turned on at the same time. In this way, it is not necessary to open holes and connect the second gate 321 and the first sub-scanning line 521 of the second active switch 320 of each pixel unit 710, thereby reducing the process difficulty and improving the product yield.

[0134] The second sub-scanning line 522 is disposed on the front side 41 of the flexible substrate 40 and is located in the third metal layer 210 . The fourth sub-scanning line 524 is disposed on the back side 42 of the flexible substrate 40 and is located in the first metal layer 110 .

[0135] The second sub-scan line 522 and the fourth sub-scan line 524 are connected to the same driving signal, the second sub-scan line 522 is connected to the third gate 331 of the third active switch 330, and the fourth sub-scan line 524 is connected to the fourth gate 341 of the fourth active switch 340. The second sub-scan line 522 and the fourth sub-scan line 524 correspond one to one, and the third active switch 330 and the fourth active switch 340 in one pixel unit 710 are turned on at the same time.

[0136] In this way, it is not necessary to open holes to connect the fourth gate 341 of the fourth active switch 340 and the second sub-scan line 522 corresponding to each pixel unit 710, thereby reducing the difficulty of the process and improving the product yield.

[0137] Fig.12 is a schematic flow chart of a method for preparing an array substrate according to an embodiment of the present application. Figure 13a-13b is a schematic diagram of a process of preparing an array substrate according to an embodiment of the present application, Figure 12-13b As shown, the present application further discloses a method for preparing an array substrate 30, and the method for preparing the array substrate 30 is used to prepare the array substrate 30 described above, and the steps include:

[0138] S1: forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on a flexible substrate;

[0139] S2: forming a passivation layer on the first active switch or the second active switch;

[0140] S3: forming the pixel electrode on the passivation layer;

[0141] The first sub-data line 511 and the first sub-scan line 521 are arranged vertically and horizontally to divide a plurality of pixel units. The first active switch 310 and the second active switch 320 in each pixel unit are respectively arranged on the front side 41 and the back side 42 of the flexible substrate 40. The first sub-data line 511, the first active switch 310, the second active switch 320, and the pixel electrode 170 are connected in sequence. The first sub-data line 511 is connected to the first active switch 310 and the second active switch 320 at the same time.

[0142] Compared with the existing method in which the first active switch 310 and the second active switch 320 on the array substrate 30 are arranged on the same side of the flexible substrate 40, the present application arranges the first active switch 310 and the second active switch 320 on the front side 41 and the back side 42 of the flexible substrate 40 respectively, so that when the flexible electronic paper display panel 10 is bent, the width of the first channel 315 in the first active switch 310 becomes wider and the width of the second channel 325 in the second active switch 320 becomes narrower; the width of the first channel 315 in the first active switch 310 becomes narrower and the width of the second channel 325 in the second active switch 320 becomes wider, so that the change of the first active switch 310 and the change of the second active switch 320 compensate for each other, avoid the problem of grayscale reduction when the flexible electronic paper display panel 10 is bent, and improve the display effect of the flexible electronic paper display panel 10.

[0143] Wherein, the step S1: forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on a flexible substrate comprises:

[0144] S111: stacking a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer in sequence on the front side of the flexible substrate; a second gate is disposed in the third metal layer, a second sub-semiconductor is disposed in the second semiconductor layer, a second source and a second drain are disposed in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch;

[0145] S112: stacking a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, and a second insulating layer in sequence on the back side of the flexible substrate; a first gate is disposed in the first metal layer, a first sub-semiconductor is disposed in the first semiconductor layer, a first source and a first drain are disposed in the second metal layer, and the first gate, the first sub-semiconductor, the first source, and the first drain form the first active switch;

[0146] S2: The step of forming a passivation layer on the first active switch or the second active switch comprises:

[0147] S211: forming the passivation layer on the fourth insulating layer.

[0148] In this way, the length of the via hole connecting the second active switch 320 and the pixel electrode 170 can be reduced, so as to reduce the process difficulty and improve the stability of signal transmission.

[0149] Fig.14 is a schematic flow chart of a method for preparing an array substrate according to an embodiment of the present application. Figure 15a-Figure 15b is a schematic diagram of a process of preparing an array substrate according to an embodiment of the present application, Figure 14-15b As shown, the step S1: forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on the flexible substrate comprises:

[0150] S121: stacking a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, and a second insulating layer in sequence on the front side of the flexible substrate; a first gate is disposed in the first metal layer, a first sub-semiconductor is disposed in the first semiconductor layer, a first source and a first drain are disposed in the second metal layer, and the first gate, the first sub-semiconductor, the first source, and the first drain form the first active switch;

[0151] S122: stacking a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer in sequence on the back side of the flexible substrate; a second gate is disposed in the third metal layer, a second sub-semiconductor is disposed in the second semiconductor layer, a second source and a second drain are disposed in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch;

[0152] The step S2: forming a passivation layer on the first active switch or the second active switch comprises:

[0153] S221: forming the passivation layer on the second insulating layer.

[0154] It should be noted that the limitations on the various steps involved in this solution, without affecting the implementation of the specific solution, are not deemed to limit the order of the steps. The steps written in front can be executed first, or later, or even simultaneously. As long as this solution can be implemented, it should be deemed to fall within the scope of protection of this application.

[0155] It should be noted that the inventive concept of the present application can form a large number of embodiments, but the length of the application document is limited and it is impossible to list them one by one. Therefore, under the premise of no conflict, the embodiments or technical features described above can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effects will be enhanced.

[0156] The above content is a further detailed description of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.

Claims

1. An array substrate for use in a flexible electronic paper display panel, characterized in that: The array substrate comprises a flexible substrate, a first active switch, a second active switch, a first sub-data line, a first sub-scan line and a pixel electrode; The first sub-data lines and the first sub-scanning lines are disposed on the flexible substrate, and the first sub-data lines and the first sub-scanning lines are arranged vertically and horizontally to divide a plurality of pixel units; The first active switch and the second active switch in each pixel unit are respectively arranged on the front side and the back side of the flexible substrate, and the pixel electrode is arranged on the flexible substrate and located in the pixel unit; the first sub-data line, the first active switch, the second active switch, and the pixel electrode are connected in sequence; a first channel formed by a source and a drain in the first active switch is defined, and a second channel formed by a source and a drain in the second active switch is defined, and a length direction of the first channel and a length direction of the second channel are located on the same straight line; The array substrate further includes a third active switch and a fourth active switch, the first group of active switches includes the first active switch and the second active switch, and the second group of active switches includes the third active switch and the fourth active switch; the third active switch is arranged on the front side of the flexible substrate, the fourth active switch is arranged on the back side of the flexible substrate, the third active switch, the fourth active switch and the pixel electrode are connected in series, and the first group of active switches and the second group of active switches are arranged in parallel; A third channel formed between a third source and a third drain of the third active switch, and a fourth channel formed between a fourth source and a fourth drain of the fourth active switch, wherein the length direction of the third channel and the length direction of the fourth channel are located on the same straight line; The length direction of the first channel and the length direction of the second channel are a first direction, the length direction of the third channel and the length direction of the fourth channel are a second direction, and the first direction is perpendicular to the second direction.

2. The array substrate according to claim 1, characterized in that: The array substrate comprises a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second insulating layer, a passivation layer, a pixel electrode, a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer; The first active switch includes a first gate, a first sub-semiconductor, a first source and a first drain; the second active switch includes a second gate, a second sub-semiconductor, a second source and a second drain; The third metal layer, the third insulating layer, the second semiconductor layer, the fourth metal layer, the fourth insulating layer, the passivation layer and the pixel electrode are sequentially stacked on the front side of the flexible substrate; the second gate is arranged in the third metal layer, the second sub-semiconductor is arranged in the second semiconductor layer, and the second source and the second drain are arranged in the fourth metal layer; The first metal layer, the first insulating layer, the first semiconductor layer, the second metal layer and the second insulating layer are stacked in sequence on the back side of the flexible substrate; the first gate is arranged in the first metal layer, the first sub-semiconductor is arranged in the first semiconductor layer, and the first source and the first drain are arranged in the second metal layer; The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to both the first gate electrode and the second gate electrode.

3. The array substrate according to claim 1, characterized in that: The array substrate comprises a first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer, a second insulating layer, a passivation layer, a pixel electrode, a third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer; The first active switch includes a first gate, a first sub-semiconductor, a first source and a first drain; the second active switch includes a second gate, a second sub-semiconductor, a second source and a second drain; The first metal layer, the first insulating layer, the first semiconductor layer, the second metal layer, the second insulating layer, the passivation layer and the pixel electrode are sequentially stacked on the front side of the flexible substrate; the first gate is arranged in the first metal layer, the first sub-semiconductor is arranged in the first semiconductor layer, and the first source and the first drain are arranged in the second metal layer; The third metal layer, the third insulating layer, the second semiconductor layer, the fourth metal layer and the fourth insulating layer are sequentially stacked on the back side of the flexible substrate; the second gate is arranged in the third metal layer, the second sub-semiconductor is arranged in the second semiconductor layer, and the second source and the second drain are arranged in the fourth metal layer; The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to the first gate electrode and the second gate electrode.

4. The array substrate according to claim 2 or 3, characterized in that: A first channel is formed between the first source and the first drain, and a second channel is formed between the second source and the second drain.

5. The array substrate according to claim 2, characterized in that: The third active switch includes a third gate, a third sub-semiconductor, a third source, and a third drain; the fourth active switch includes a fourth gate, a fourth sub-semiconductor, a fourth source, and a fourth drain; The third gate is also disposed in the third metal layer, the third sub-semiconductor is also disposed in the second semiconductor layer, and the third source and the third drain are also disposed in the fourth metal layer; The fourth gate is further disposed in the first metal layer, the fourth sub-semiconductor is further disposed in the first semiconductor layer, and the fourth source and the fourth drain are further disposed in the second metal layer; The array substrate further includes a second sub-data line and a second sub-scan line; The first sub-data line is connected to the first source electrode, the first drain electrode is connected to the second source electrode, the second drain electrode is connected to the pixel electrode, and the first sub-scan line is connected to both the first gate electrode and the second gate electrode; The second sub-data line is connected to the third source, the third drain is connected to the fourth source, the fourth drain is connected to the pixel electrode, and the second sub-scan line is connected to both the third gate and the fourth gate.

6. The array substrate according to claim 5, characterized in that: The first sub-scan line is located in the first metal layer, and the first sub-data line is located in the second metal layer; The second sub-scan line is located in the third metal layer, and the second sub-data line is located in the fourth metal layer.

7. A method for preparing an array substrate, characterized in that: The method for preparing the array substrate is used to prepare the array substrate according to any one of claims 1 to 6, and the steps include: forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on a flexible substrate; forming a passivation layer on the first active switch or the second active switch; forming the pixel electrode on the passivation layer; The first sub-data line and the first sub-scan line are arranged vertically and horizontally to divide a plurality of pixel units, the first active switch and the second active switch in each pixel unit are respectively arranged on the front and back sides of the flexible substrate, the first sub-data line, the first active switch, the second active switch, and the pixel electrode are connected in sequence, and the first sub-data line is connected to the first active switch and the second active switch at the same time.

8. The method for preparing an array substrate according to claim 7, characterized in that: The step of forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on the flexible substrate comprises: A third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer are stacked in sequence on the front side of the flexible substrate; a second gate is arranged in the third metal layer, a second sub-semiconductor is arranged in the second semiconductor layer, a second source and a second drain are arranged in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch; A first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer and a second insulating layer are sequentially stacked on the back side of the flexible substrate; a first gate is arranged in the first metal layer, a first sub-semiconductor is arranged in the first semiconductor layer, a first source and a first drain are arranged in the second metal layer, and the first gate, the first sub-semiconductor, the first source and the first drain form the first active switch; The step of forming a passivation layer on the first active switch or the second active switch comprises: The passivation layer is formed on the fourth insulating layer.

9. The method for preparing an array substrate according to claim 7, characterized in that: The step of forming a first sub-data line, a first sub-scan line, a first active switch and a second active switch on the flexible substrate comprises: A first metal layer, a first insulating layer, a first semiconductor layer, a second metal layer and a second insulating layer are stacked in sequence on the front side of the flexible substrate; a first gate is arranged in the first metal layer, a first sub-semiconductor is arranged in the first semiconductor layer, a first source and a first drain are arranged in the second metal layer, and the first gate, the first sub-semiconductor, the first source and the first drain form the first active switch; A third metal layer, a third insulating layer, a second semiconductor layer, a fourth metal layer and a fourth insulating layer are stacked in sequence on the back side of the flexible substrate; a second gate is arranged in the third metal layer, a second sub-semiconductor is arranged in the second semiconductor layer, a second source and a second drain are arranged in the fourth metal layer, and the second gate, the second sub-semiconductor, the second source and the second drain form the second active switch; The step of forming a passivation layer on the first active switch or the second active switch comprises: The passivation layer is formed on the second insulating layer.

10. A flexible electronic paper display panel, characterized in that: The flexible electronic paper display panel comprises an electronic paper membrane and an array substrate as described in any one of claims 1 to 6, wherein the electronic paper membrane is attached to the array substrate and is located on a side of the pixel electrode away from the flexible substrate.

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