A satellite two-way time comparison demodulation method and system based on chip compression

Abstract

The present application belongs to the technical field of satellite two-way time comparison. The present application provides a satellite two-way time comparison demodulation method and system based on chip compression. The preprocessing and sharing of the original data of the signal in the embodiment of the present application can overcome the problem that analog devices and FPGA-based devices cannot calculate multiple site signals at the same time and the clocks between different physical channels are not synchronized. The tracking method of chip compression reduces the amount of calculation and increases the dynamic range of the comparison to a certain extent while ensuring the measurement accuracy and stability, and can adapt to SDR devices with higher sampling rates.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of satellite two-way time comparison, and in particular to a satellite two-way time comparison demodulation method and system based on chip compression. Background Art

[0002] Two Way Satellite Time and Frequency Transfer (TWSTFT) sends modulated time-frequency signals to the other station through a satellite link between two stations. At the same time, each station measures the arrival time of the signal from the other station with reference to the clock of the local station, and determines the time difference of the reference clocks of the two stations based on the difference in the measurement results of the two stations. Due to the symmetry of its transmission path, the propagation delay on the link can be almost completely offset. The accuracy and stability of the comparison can be improved by using a reasonable demodulation method.

[0003] At present, there are three main signal demodulation methods:

[0004] The first is the demodulation method based on analog signals, which is mainly represented by the SATRE modem. When a station acquires a signal, it first captures the signal to determine whether the signal contains the PRN (pseudo random code, PRN) code of the other station; the captured signal is continuously tracked through a second-order delay locked loop (Delay Locked Loop, DLL) corresponding to the PRN signal; during the tracking process, information such as carrier frequency, carrier phase, and code phase are obtained; the above information is used to restore the second pulse signal of the corresponding station and compare it with the local second pulse signal to obtain the clock error information.

[0005] The second is the carrier-based satellite two-way comparison (TWCP) modulation method, which is mainly represented by the SRS modem. SRS does not perform frequency conversion in the receiving path and directly digitizes to avoid additional phase noise. After digitization, the four correlators contained in the SRS modem can process four received signals at the same time. The correlator is implemented on a field-programmable gate array (FPGA), and the correlation peak is obtained by comparing 32 correlation lag values, and the propagation delay is determined by the code phase every 20 ms.

[0006] The third is the modulation method based on software defined radio (SDR), which is mainly represented by the SDR demodulation system in the TWSTFT link. The system uses the SDR device to convert the acquired digital intermediate frequency (IF) signal into analog-to-digital, and transmits the converted digital signal to a high-performance PC device. The PC device first captures the received digital signal to obtain the coarse values ​​of the code phase and carrier frequency of all site signals in the corresponding link; when the capture is successful, it enters the tracking stage, and each channel down-converts the received signal to the baseband and obtains the correlation peak through 29 related lag values. In order to increase the computing speed, the above capture and tracking processes are implemented using GPU.

[0007] However, the demodulation method based on analog signals is implemented by analog circuits, and its development cycle is long. In addition, this method cannot calculate the clock difference between multiple sites and the local area at the same time, and a special schedule needs to be designed to compare a single group of sites. The demodulation method based on carriers is implemented using a programmable gate array (FPGA). This method still requires certain professional knowledge. At the same time, the signal data of each site in this method needs to be processed by an independent correlator. Therefore, the number of correlators determines the number of sites that are compared at the same time, and there will be a problem of clock asynchrony between different physical channels, introducing new errors. The demodulation method based on SDR uses software to implement signal processing, which solves the problems of long development cycle and clock asynchrony between physical channels. However, with the continuous development of SDR equipment, it can provide signal data with higher sampling rate and higher quantization bit, which improves the accuracy of the comparison results to a certain extent and reduces the impact of multipath effects, but at the same time reduces the calculation efficiency of the comparison.

[0008] Therefore, it is necessary to improve one or more problems existing in the above-mentioned related technical solutions.

[0009] It should be noted that this section is intended to provide a background or context for the technical solutions of the present application stated in the claims. The description herein is not admitted to be prior art by virtue of being included in this section. Summary of the invention

[0010] In order to avoid the shortcomings of the prior art, the present application provides a satellite two-way time comparison and demodulation method and system based on code chip compression, which is used to solve the problems of long development cycle, clock asynchrony between channels, and large data processing volume in the prior art.

[0011] According to a first aspect of an embodiment of the present application, a satellite two-way time comparison demodulation method based on chip compression is provided, the method comprising:

[0012] Acquire configuration information, generate judgment bits, and pre-generate PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information;

[0013] Acquire the original signal data collected by the SDR device in real time, send the original signal data to the signal data buffer, and send the signal position index information and timestamp information corresponding to the original data to the message queue;

[0014] Obtain signal position index information and timestamp information from the message queue in sequence, obtain the corresponding signal original data in the signal data buffer according to the signal position index information and timestamp information, convert the signal original data into floating point numbers, calculate the power of the signal original data according to the floating point numbers, save the floating point numbers, timestamp information and the power of the signal original data into the shared memory, and judge the capture result according to the judgment bit;

[0015] If the capture is not successful, obtain the floating point number, timestamp information and power of the original signal data in the shared memory, and perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and judge the capture result according to the code parallel search result. If successful, enter the tracking stage, reset the judgment bit, save and update the carrier frequency and code phase coarse values ​​in the code parallel search result to the shared memory;

[0016] If the capture is successful, the carrier frequency and code phase coarse values ​​in the shared memory are obtained, and the corresponding TOA value and code phase information are obtained according to the carrier frequency, code phase coarse value and PRN code time domain data; wherein the code phase information includes the correlation value result within the dynamic range and the index position corresponding to the correlation value result within the dynamic range;

[0017] The corresponding Time-Tag position is obtained according to the TOA value and code phase information, and then the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio are obtained, and the capture result judgment bit is updated.

[0018] Further, the steps of acquiring configuration information, generating a determination bit, and pre-generating PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information include:

[0019] Generate judgment bit;

[0020] The SDR device sets the SDR device position, frequency reference signal source, 1PPS signal source, sampling rate, data packet length per second, data format, carrier frequency and bandwidth according to the configuration information;

[0021] The channel sets the capture success status bit, sampling rate, code rate, channel corresponding PRN number, coarse capture code phase, minimum signal-to-noise ratio for successful capture, carrier frequency, carrier initial search range, carrier initial capture step size and filter bandwidth according to the configuration information;

[0022] Generate a PRN code corresponding to the channel according to the PRN number, perform an interpolation operation on the PRN code to generate PRN code time domain data corresponding to the next code period of the preset sampling rate, copy the PRN code time domain data to a new queue and perform an FFT operation to obtain the corresponding PRN code frequency domain data, and perform a filtering operation on the PRN code frequency domain data according to the filtering bandwidth; wherein the length of the PRN code is L, and the length of the PRN code frequency domain data is 3L;

[0023] Perform IFFT operation on the filtered PRN code frequency domain data to generate corresponding time domain data, and shift the time domain data to generate local PRN code data with code phase offsets of -1.5, -1.0, -0.5, 0, 0.5, 1.0 and 1.5, respectively. Perform transposition operation on each local PRN code data and organize all local PRN codes into PRN code time domain data in sequence; wherein the PRN code time domain data is a matrix with a matrix size of , M is the length of the PRN code corresponding to the channel, a is the number of offset groups of the PRN code corresponding to the channel, and a=7, is the sampling rate, is the code rate.

[0024] Further, if the capture is unsuccessful, the floating point number, timestamp information and power of the original signal data in the shared memory are obtained, and based on the PRN code frequency domain data, the floating point number is sequentially down-converted, FFT transformed, complex multiplied and IFFT transformed to obtain the code parallel search result, and the capture result is judged according to the code parallel search result. If successful, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved in the shared memory. The steps include:

[0025] A floating point number with a length of 3L is intercepted, and a down-conversion operation is performed on the floating point number according to the initial carrier frequency, the initial carrier search range, and the initial carrier capture step length in a cyclic decreasing manner;

[0026] Performing an FFT operation on the floating-point number after the down-conversion operation to obtain frequency domain signal data of length 3L, then performing a complex multiplication on the obtained frequency domain signal data of length 3L and the PRN code frequency domain data of length 3L, and obtaining a code parallel search result at a preset frequency through an IFFT operation;

[0027] If the peak value in the search result is greater than the minimum signal-to-noise ratio for successful capture, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved to the shared memory.

[0028] Further, if the capture is successful, the steps of obtaining the carrier frequency and code phase coarse values ​​in the shared memory, and obtaining the corresponding TOA value and code phase information according to the carrier frequency, code phase coarse value and PRN code time domain data include:

[0029] The floating point number is down-converted according to the carrier frequency and code phase coarse values ​​obtained in the capture phase, and a transposition operation is performed to generate a new matrix. The size of the matrix is ;in, is the sampling rate, is the code rate;

[0030] A baseband data matrix of a code period length L is obtained cyclically; wherein, ;

[0031] The baseband data matrix of one code cycle length is multiplied by the corresponding matrix of the PRN code time domain data in the tracking phase, and the length is obtained after organization. The one-dimensional complex vector is interpolated so that the length of the vector is , b is the number of sampling points corresponding to the required dynamic range;

[0032] The interpolated one-dimensional complex vector is transformed by FFT to generate frequency domain data, and the frequency domain data is filtered and then transformed by IFFT to complete the one-dimensional complex vector;

[0033] The one-dimensional complex vector after IFFT transformation is summed with an interval of a to obtain the corresponding code phase dynamic range of The corresponding results of the I and Q branches are obtained, and then the correlation value results and the corresponding carrier phase results within the dynamic range are obtained;

[0034] Get the corresponding index position according to the relevant value results within the dynamic range K ;

[0035] By utilizing the symmetry of the PRN code correlation value, the five consecutive maximum correlation value results and the code phase coarse value are fitted to obtain the TOA value.

[0036] Furthermore, the expression of TOA value is:

[0037]

[0038] in, is the correlation value result within the dynamic range, is the coarse value of the code phase.

[0039] Further, the step of obtaining the corresponding Time-Tag position according to the TOA value and the code phase information, and then obtaining the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and updating the judgment bit includes:

[0040] When the TOA value difference between adjacent code periods is 1 / 2 of the length of the PRN code, the index position corresponding to the first code period is K is the Time-Tag position;

[0041] The final TOA value is obtained according to the Time-Tag position, code cycle length and the average TOA value of each cycle; where the final TOA value = Time-Tag position * code cycle length + average TOA value of each cycle;

[0042] Perform linear fitting on the carrier phase results obtained in each code period, the mean of the fitting results is the carrier phase of the entire period, and the sum of the rate of change of the fitting results and the current carrier frequency value is the latest carrier frequency;

[0043] The average of the signal-to-noise ratio values ​​corresponding to each code period is the signal-to-noise ratio corresponding to the entire period;

[0044] Determine whether the signal-to-noise ratio corresponding to the entire cycle is greater than the minimum signal-to-noise ratio for successful capture;

[0045] If it is greater than the minimum signal-to-noise ratio for successful capture, the tracking phase is entered; if it is less than the minimum signal-to-noise ratio for successful capture, the judgment bit is reset and the capture phase is entered.

[0046] According to a second aspect of an embodiment of the present application, a satellite two-way time comparison and demodulation system based on chip compression is provided, the system comprising:

[0047] Initialize the configuration module, used to obtain configuration information, generate judgment bits, and pre-generate PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information;

[0048] The signal acquisition module is used to obtain the original signal data collected by the SDR device in real time, send the original signal data to the signal data buffer, and send the signal position index information and timestamp information corresponding to the original data to the message queue;

[0049] A signal preprocessing module is used to obtain the signal position index information and timestamp information from the message queue in sequence, obtain the corresponding signal original data in the signal data buffer according to the signal position index information and timestamp information, convert the signal original data into floating point numbers, calculate the power of the signal original data according to the floating point numbers, save the floating point numbers, timestamp information and the power of the signal original data into a shared memory, and judge the capture result according to the judgment bit;

[0050] The signal capture module is used to obtain the floating point number, timestamp information and power of the original signal data in the shared memory if the capture is unsuccessful, and to perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and to judge the capture result according to the code parallel search result. If successful, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved and updated to the shared memory;

[0051] The signal tracking module is used to obtain the carrier frequency and code phase coarse values ​​in the shared memory if the capture is successful, and obtain the corresponding TOA value and code phase information according to the carrier frequency, code phase coarse value and PRN code time domain data; wherein the code phase information includes the correlation value result within the dynamic range and the index position corresponding to the correlation value result within the dynamic range;

[0052] The result calculation module is used to obtain the corresponding Time-Tag position according to the TOA value and code phase information, so as to obtain the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and update the judgment bit.

[0053] The technical solution provided by the embodiments of the present application may have the following beneficial effects:

[0054] In the embodiment of the present application, through the satellite two-way time comparison and demodulation method and system based on chip compression, the preprocessing and sharing of the original signal data can overcome the problem that analog devices and FPGA-based devices cannot simultaneously calculate multiple site signals and the clocks between different physical channels are not synchronized. The chip compression tracking method reduces the amount of calculation and increases the dynamic range of the comparison to a certain extent while ensuring the measurement accuracy and stability, and can adapt to SDR devices with higher sampling rates. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0056] Figure 1 A step diagram showing a satellite two-way time comparison and demodulation method based on chip compression in an exemplary embodiment of the present application;

[0057] Figure 2 A specific flow chart of a satellite two-way time comparison and demodulation method based on chip compression in an exemplary embodiment of the present application is shown;

[0058] Figure 3 A schematic diagram showing generation of a code period PRN code required in the tracking and acquisition phase in an exemplary embodiment of the present application is shown;

[0059] Figure 4 A schematic diagram showing the generation of PRN code time domain data required in the tracking phase in an exemplary embodiment of the present application is shown;

[0060] Figure 5 A flowchart showing the capture phase in an exemplary embodiment of the present application;

[0061] Figure 6 A flow chart showing the tracking phase in an exemplary embodiment of the present application;

[0062] Figure 7 A schematic diagram showing the organization of a baseband data matrix of one code period in the tracking phase in an exemplary embodiment of the present application is shown;

[0063] Figure 8 A schematic diagram of a satellite two-way time comparison and demodulation system based on chip compression in an exemplary embodiment of the present application is shown. DETAILED DESCRIPTION

[0064] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0065] In addition, the accompanying drawings are only schematic illustrations of the embodiments of the present application and are not necessarily drawn to scale. The same reference numerals in the drawings represent the same or similar parts, and their repeated descriptions will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities.

[0066] This example implementation first provides a satellite two-way time comparison demodulation method based on chip compression. Figure 1 As shown in , the satellite two-way time comparison demodulation method based on chip compression may include:

[0067] Step S101: Acquire configuration information, generate a determination bit, and pre-generate PRN code frequency domain data required for the acquisition phase and PRN code time domain data required for the tracking phase according to the configuration information;

[0068] Step S102: acquiring the original signal data collected by the SDR device in real time, sending the original signal data to the signal data buffer, and sending the signal position index information and timestamp information corresponding to the original data to the message queue;

[0069] Step S103: obtaining the signal position index information and timestamp information from the message queue in order, obtaining the corresponding signal original data in the signal data buffer according to the signal position index information and timestamp information, converting the signal original data into a floating point number, calculating the power of the signal original data according to the floating point number, saving the floating point number, timestamp information and the power of the signal original data into a shared memory, and judging the capture result according to the judgment bit;

[0070] Step S1034: If the capture is unsuccessful, obtain the floating point number, timestamp information and power of the original signal data in the shared memory, and perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and judge the capture result according to the code parallel search result. If successful, enter the tracking phase, reset the judgment bit, save and update the carrier frequency and code phase coarse values ​​in the code parallel search result to the shared memory;

[0071] Step S105: If the capture is successful, the carrier frequency and the coarse code phase values ​​in the shared memory are obtained, and the corresponding TOA value and code phase information are obtained according to the carrier frequency, the coarse code phase value and the PRN code time domain data; wherein the code phase information includes the correlation value result within the dynamic range and the index position corresponding to the correlation value result within the dynamic range;

[0072] Step S106: Obtain the corresponding Time-Tag position according to the TOA value and the code phase information, and then obtain the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and update the judgment bit.

[0073] Through the above-mentioned satellite two-way time comparison demodulation method based on chip compression, the preprocessing and sharing of the original signal data can overcome the problem that analog devices and FPGA-based devices cannot simultaneously calculate multiple site signals and the clock asynchrony between different physical channels. The chip compression tracking method reduces the amount of calculation and increases the dynamic range of the comparison to a certain extent while ensuring the measurement accuracy and stability, and can adapt to SDR devices with higher sampling rates.

[0074] Next, we will refer to Figures 1 to 7 The various steps of the satellite two-way time ratio demodulation method based on chip compression in this example implementation are described in more detail.

[0075] In step S101, Figure 2As shown, the initialization configuration module initializes the SDR equipment and each channel in the system according to the configuration information, and generates the PRN code frequency domain data required for the corresponding capture phase and the PRN code time domain data required for the tracking phase according to the PRN number corresponding to each channel.

[0076] 1. The initialization configuration of the SDR device includes the settings of the SDR device location, frequency reference signal source, 1PPS signal source, sampling rate, data packet length per second, data format, carrier frequency, bandwidth, etc.

[0077] 2. Channel initialization configuration includes the capture success status bit, sampling rate (sampRate), code rate (codeRate), channel corresponding PRN number, coarse capture code phase, capture success minimum signal-to-noise ratio, carrier frequency, carrier initial search range, carrier initial capture step, filter bandwidth and other information settings, as well as the creation of memory space required for each stage;

[0078] 3. In the capture phase, the PRN code frequency domain data is acquired. First, the PRN code (length is M) corresponding to the channel is generated according to the PRN number. Then, the PRN code is interpolated to generate the PRN code (length is L) time domain data corresponding to the next code period of the specified sampling rate. The PRN code time domain data is copied to a new queue (length is 3L) and the FFT operation is performed to obtain the corresponding frequency domain data. Finally, the filtering operation is performed according to the filtering bandwidth.

[0079] 4. In the tracking phase, the PRN code time domain data is obtained. First, the IFFT operation is performed on the filtered PRN code frequency domain data to generate the corresponding time domain data. Then, the local PRN code data with code phase offsets of -1.5, -1.0, -0.5, 0, 0.5, 1.0, and 1.5 are generated by translation. Finally, each PRN code is transposed and all local PRN codes are organized into a matrix in order. The matrix size is ,in, =7.

[0080] In step S102, if Figure 2 As shown, the original signal data collected by the SDR device is acquired in real time, and the original signal data is sent to the signal data buffer, and the signal position index information and timestamp information corresponding to the original data are sent to the message queue.

[0081] In step S103, Figure 2As shown, the signal position index information and timestamp information are obtained from the message queue in sequence, the corresponding signal original data in the signal data buffer is obtained according to the signal position index information and timestamp information, the signal original data is converted into floating point numbers, the power of the signal original data is calculated according to the floating point numbers, and the floating point numbers, timestamp information and the power of the signal original data are saved in the shared memory. Among them, the floating point number includes a single-precision floating point number (float32) or a double-precision floating point number (float64).

[0082] In step S104, Figure 2 As shown, down-conversion, FFT transformation, complex multiplication, IFFT transformation and other operations are performed on the floating point number, and the capture result is judged.

[0083] 1. First, intercept a floating point number with a length of 3L, and perform a down-conversion operation on the floating point number according to the initial carrier frequency, the initial carrier search range, and the initial carrier capture step length in a cyclic decreasing manner;

[0084] 2. Perform FFT operation on the down-converted data to obtain frequency domain signal data of length 3L, then perform complex multiplication on the obtained received signal data of length 3L and the frequency domain data of the capture phase PRN code of length 3L, and obtain the parallel search results of the code at the specified frequency through IFFT operation;

[0085] 3. Finally, determine whether the peak value in the search result meets the minimum signal-to-noise ratio requirement for successful capture. If successful, enter the tracking phase, reset the judgment bit, and record the coarse values ​​of the corresponding carrier frequency and code phase.

[0086] In step S105, Figure 2 As shown, the carrier phase corresponding to each code period and the code phase comparison result value are obtained.

[0087] 1. According to the coarse values ​​of carrier frequency and code phase obtained in the capture phase, the original data is down-converted and transposed to generate a new matrix. The matrix size is ;

[0088] 2. Loop to obtain a code cycle length L ( ) data;

[0089] 3. Multiply the data corresponding matrix of a code cycle length with the PRN code time domain data corresponding matrix of the tracking phase, and organize it to obtain a length of A one-dimensional complex vector is interpolated to make the vector length ; Among them, b should be larger than the number of sampling points corresponding to the required dynamic range. Considering the optimal performance of the GPU, the value of b should be an integer multiple of 64, for example, b=64.

[0090] 4. The one-dimensional vector after interpolation operation is transformed by FFT to generate frequency domain data, and the frequency domain data is filtered and then transformed by IFFT to complete the one-dimensional vector data;

[0091] 5. After performing a summation operation on the obtained one-dimensional vector with an interval of a, the corresponding code phase dynamic range can be obtained. The corresponding results of the I and Q branches are used to obtain the correlation value result c_cor and the corresponding carrier phase result c_phi within the dynamic range;

[0092] 6. Get the index position K corresponding to the maximum value in c_cor. By utilizing the symmetry of the PRN code correlation value, fitting five consecutive maximum correlation results and the code phase coarse value (c_code_head_pos) can obtain a high-precision TOA value:

[0093]

[0094] In step S106, if Figure 2 As shown, the final TOA, carrier frequency, carrier phase, code phase, signal-to-noise ratio and other result information are calculated to determine whether to continue the tracking phase or re-capture the operation.

[0095] Each channel obtains the corresponding Time-Tag position according to the TOA and code phase information of different code periods to obtain the final comparison value, carrier frequency, carrier phase, signal-to-noise ratio and other information.

[0096] Specifically, when the TOA difference between adjacent code periods is 1 / 2 of the PRN code length, the index position corresponding to the first code period is the Time-Tag position, and the final TOA value can be obtained by the Time-Tag index position * code period length + average TOA value of each period. At the same time, a linear fit is performed on the carrier phase value obtained in each code period, and the mean value obtained by the fitting result is the carrier phase value of the entire period. The change rate of the fitting result and the sum of the current carrier frequency value are the latest carrier frequency. The mean of the signal-to-noise ratio values ​​corresponding to each code period is the signal-to-noise ratio value corresponding to the entire period.

[0097] Determine whether the corresponding signal-to-noise ratio value of the entire cycle is greater than the minimum signal-to-noise ratio for successful capture. If it is greater than this value, the tracking phase will continue in the next cycle. If it is less than this value, the judgment bit will be reset and the capture phase will be entered in the next cycle.

[0098] In one embodiment, each channel acquires the signal data in the shared memory in a serial (or parallel) manner, obtains the carrier frequency, code phase and signal-to-noise ratio at the time of maximum correlation by continuously shrinking the carrier search range, carrier search step length and code parallel search, and determines whether the capture is successful;

[0099] In one embodiment, each channel obtains signal data in a shared memory in a serial (or parallel) manner, generates baseband signal data after down-conversion and reordering, and the result of multiplying the corresponding matrix of the baseband signal data of each code period with the corresponding matrix of the PRN code time domain data in the tracking phase is subjected to interpolation, FFT transformation, filtering, IFFT transformation and high-resolution correlator (HRC) to obtain the corresponding TOA and code phase information.

[0100] In a specific embodiment, Figure 3 As shown in the figure, it is a schematic diagram of generating the PRN code for the next code period at a specified sampling rate. First, the PRN code corresponding to the channel is generated according to the PRN number (the length is n), and then the PRN code is interpolated to generate the PRN code corresponding to the next code period at the specified sampling rate (the length is ) time domain data.

[0101] To obtain the PRN code frequency domain data required in the capture phase, copy the PRN code time domain data to a new queue (length ) and perform FFT operation to obtain the corresponding frequency domain data, and finally perform filtering operation according to the filtering bandwidth.

[0102] In a specific embodiment, Figure 4 As shown in the figure, it is a schematic diagram of generating the PRN code time domain data required in the tracking phase. First, the PRN code (length is ) time domain data is subjected to FFT, filtering, and IFFT operations to generate time domain data of the specified bandwidth, and then local PRN code data with code phase offsets of -1.5, -1.0, -0.5, 0.5, 1.0, and 1.5 are generated through translation. Finally, all local PRN codes (with offsets of -1.5, -1.0, -0.5, 0, 0.5, 1.0, and 1.5) are reordered to generate the corresponding matrix.

[0103] In a specific embodiment, Figure 5 As shown in FIG. 1 , it is a flowchart of the capture phase. First, the IF real data signal is obtained from the shared memory, and the length is intercepted according to the randomly obtained starting index value. The original data is obtained by down-converting the original data according to the carrier search range and the carrier capture step to generate complex baseband data; the baseband data is subjected to FFT operation to obtain a length of The frequency domain signal data is then combined with the length In the capture phase, the PRN code frequency domain data is complex multiplied, and the parallel search results of the code at the specified frequency are obtained through IFFT operation and the maximum value of the search is obtained; after a round of search is completed, the frequency search range and search step are narrowed; when the search step is greater than or equal to 1, the above process is repeated; when the search step is less than 1, it is determined whether the peak value in the search result meets the minimum signal-to-noise ratio requirement for successful capture.

[0104] In a specific embodiment, Figure 6 The flowchart of the tracking phase is shown. First, the coarse value information of carrier frequency, carrier phase and code phase (from the capture phase or the previous tracking cycle) is used to down-convert the original data and construct the corresponding matrix according to the code period.

[0105] In a specific embodiment, Figure 7 As shown in FIG. 1 , a schematic diagram of the organization of data of a code cycle in the tracking phase is shown. Specifically, the IF real data signal is down-converted and the data is organized as A matrix with n rows and columns, where I and Q data are arranged alternately in the columns.

[0106] Then the baseband data matrix of one code period is obtained and multiplied with the local PRN code time domain data matrix in the tracking phase. After organization, the length is A one-dimensional complex vector is interpolated with zero values ​​to make the vector length ; The one-dimensional vector after interpolation operation is transformed by FFT to generate frequency domain data, and the frequency domain data is filtered and then transformed by IFFT to complete the one-dimensional vector data; the obtained one-dimensional vector is summed with an interval of 64 and the effective length is truncated to obtain the I and Q branch result vectors of the corresponding code phase dynamic range, and the power and carrier phase values ​​corresponding to different code phases are obtained according to the I and Q branch result vectors; the power peak value and the corresponding code phase information are obtained, and the TOA value corresponding to the period is calculated using a high-resolution correlator.

[0107] The method provided in the real-time example of the present application adopts a demodulation method of satellite two-way time comparison based on code chip compression to achieve fast and real-time capture, tracking and calculation; while ensuring the accuracy and stability of the calculation results, the space and time complexity of the calculation during tracking is reduced, the calculation efficiency is improved, and it can adapt to devices with higher sampling rates, further improving the accuracy of the comparison; the use of analog channels ensures the consistency of clocks and data between channels; the entire processing is performed in the CPU or GPU, and the SDR device is only used for data reception and digitization, which is conducive to rapid optimization and iteration and has strong practicality.

[0108] This example implementation also provides a satellite two-way time comparison and demodulation system based on chip compression. Figure 8As shown in , the satellite two-way time comparison and demodulation system 100 based on chip compression may include:

[0109] Initialization configuration module 110, used to obtain configuration information, and pre-generate PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information;

[0110] The signal acquisition module 120 is used to acquire the original signal data collected by the SDR device in real time, send the original signal data to the signal data buffer, and send the signal position index information and timestamp information corresponding to the original data to the message queue;

[0111] The signal preprocessing module 130 is used to sequentially obtain the signal position index information and the timestamp information from the message queue, obtain the corresponding signal original data in the signal data buffer according to the signal position index information and the timestamp information, convert the signal original data into a floating point number, calculate the power of the signal original data according to the floating point number, save the floating point number, the timestamp information and the power of the signal original data into a shared memory, and determine the last capture result;

[0112] The signal capture module 140 is used to obtain the floating point number, timestamp information and power of the original signal data in the shared memory if the capture is unsuccessful, and perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and judge the capture result according to the code parallel search result. If successful, the capture result is tracked and the corresponding carrier frequency and code phase coarse value are recorded;

[0113] The signal tracking module 150 is used to obtain the floating point number, timestamp information and power of the original signal data in the shared memory if the capture is successful, and obtain the corresponding TOA value and code phase information according to the carrier frequency, code phase coarse value and PRN code time domain data;

[0114] The result calculation module 160 is used to obtain the corresponding Time-Tag position according to the TOA value and the code phase information, so as to obtain the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and update the capture result judgment bit.

[0115] In one embodiment, the SDR device initialization in the initialization configuration module is used to set information such as the SDR device position, frequency reference signal source, 1PPS signal source, sampling rate, length of data packets acquired per second, data format, carrier frequency and bandwidth; the channel initialization configuration includes the setting of capture success status bit, sampling rate (sampRate), code rate (codeRate), channel corresponding PRN number, coarse capture code phase, minimum signal-to-noise ratio for successful capture, carrier frequency, carrier initial search range, carrier initial capture step, filter bandwidth and other information, as well as the creation of memory space required for each stage.

[0116] In one embodiment, the signal tracking module is specifically used to perform down-conversion operations on the original data of IF real numbers and perform transposition operations to generate a new matrix; multiply the data matrix of a code period with the corresponding matrix of the local time domain data of the PRN code in the tracking phase and organize it into a one-dimensional complex vector, and perform interpolation, FFT, filtering and IFFT operations on the vector to achieve one-dimensional vector data completion; sum the obtained one-dimensional vectors at equal intervals to obtain the result vectors corresponding to the I and Q branches; obtain the index position K corresponding to the maximum value in the result vector, and fit five consecutive maximum correlation results and index positions by utilizing the symmetry of the PRN code correlation value to obtain a high-precision TOA value.

[0117] Through the above-mentioned satellite two-way time comparison and demodulation method and system based on chip compression, the preprocessing and sharing of the original signal data can overcome the problem that analog devices and FPGA-based devices cannot simultaneously calculate multiple site signals and the clock asynchrony between different physical channels. The chip compression tracking method reduces the amount of calculation and increases the dynamic range of the comparison to a certain extent while ensuring the measurement accuracy and stability, and can adapt to SDR devices with higher sampling rates.

[0118] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0119] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the appended claims.

Claims

1. A satellite two-way time comparison and demodulation method based on chip compression, characterized in that: The method includes: Acquire configuration information, generate judgment bits, and pre-generate PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information; Acquire the original signal data collected by the SDR device in real time, send the original signal data to the signal data buffer, and send the signal position index information and timestamp information corresponding to the original data to the message queue; Obtain signal position index information and timestamp information from the message queue in sequence, obtain the corresponding signal original data in the signal data buffer according to the signal position index information and timestamp information, convert the signal original data into floating point numbers, calculate the power of the signal original data according to the floating point numbers, save the floating point numbers, timestamp information and the power of the signal original data into the shared memory, and judge the capture result according to the judgment bit; If the capture is not successful, obtain the floating point number, timestamp information and power of the original signal data in the shared memory, and perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and judge the capture result according to the code parallel search result. If successful, enter the tracking stage, reset the judgment bit, save and update the carrier frequency and code phase coarse values ​​in the code parallel search result to the shared memory; If the capture is successful, the carrier frequency and code phase coarse values ​​in the shared memory are obtained, and the corresponding TOA value and code phase information are obtained according to the carrier frequency, code phase coarse value and PRN code time domain data; wherein the code phase information includes the correlation value result within the dynamic range and the index position corresponding to the correlation value result within the dynamic range; The corresponding Time-Tag position is obtained according to the TOA value and code phase information, and then the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio are obtained, and the judgment bit is updated.

2. The satellite two-way time comparison and demodulation method based on chip compression according to claim 1, characterized in that: The steps of obtaining configuration information, generating a judgment bit, and pre-generating PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information include: Generate judgment bit; The SDR device sets the SDR device position, frequency reference signal source, 1PPS signal source, sampling rate, data packet length per second, data format, carrier frequency and bandwidth according to the configuration information; The channel sets the capture success status bit, sampling rate, code rate, channel corresponding PRN number, coarse capture code phase, minimum signal-to-noise ratio for successful capture, carrier frequency, carrier initial search range, carrier initial capture step size and filter bandwidth according to the configuration information; Generate the PRN code corresponding to the channel according to the PRN number, perform interpolation operation on the PRN code to generate the PRN code time domain data corresponding to the next code period of the preset sampling rate, copy the PRN code time domain data to a new queue and perform FFT operation to obtain the corresponding PRN code frequency domain data, and perform filtering operation on the PRN code frequency domain data according to the filtering bandwidth; wherein the PRN code length of one code period is L, and the length of the PRN code frequency domain data is 3L; Perform IFFT operation on the filtered PRN code frequency domain data to generate corresponding time domain data, and shift the time domain data to generate local PRN code data with code phase offsets of -1.5, -1.0, -0.5, 0, 0.5, 1.0 and 1.5, respectively. Perform transposition operation on each local PRN code data and organize all local PRN codes into PRN code time domain data in sequence; wherein the PRN code time domain data is a matrix with a matrix size of , M is the length of the PRN code corresponding to the channel, a is the number of offset groups of the PRN code corresponding to the channel, and a=7, is the sampling rate, is the code rate.

3. The satellite two-way time comparison and demodulation method based on chip compression according to claim 2, characterized in that: If the capture is unsuccessful, the floating point number, timestamp information and power of the original signal data in the shared memory are obtained, and based on the PRN code frequency domain data, the floating point number is sequentially down-converted, FFT transformed, complex multiplied and IFFT transformed to obtain the code parallel search result, and the capture result is judged according to the code parallel search result. If successful, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved in the shared memory. The steps include: A floating point number with a length of 3L is intercepted, and a down-conversion operation is performed on the floating point number according to the initial carrier frequency, the initial carrier search range, and the initial carrier capture step length in a cyclic decreasing manner; Performing an FFT operation on the floating-point number after the down-conversion operation to obtain frequency domain signal data of length 3L, then performing a complex multiplication on the obtained frequency domain signal data of length 3L and the PRN code frequency domain data of length 3L, and obtaining a code parallel search result at a preset frequency through an IFFT operation; If the peak value in the search result is greater than the minimum signal-to-noise ratio for successful capture, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved to the shared memory.

4. The satellite two-way time comparison and demodulation method based on chip compression according to claim 3 is characterized in that: If the capture is successful, the steps of obtaining the carrier frequency and the coarse code phase values ​​in the shared memory, and obtaining the corresponding TOA value and code phase information according to the carrier frequency, the coarse code phase value and the PRN code time domain data include: The floating point number is down-converted according to the carrier frequency and code phase coarse value obtained in the capture phase, and a transposition operation is performed to generate a new matrix. The size of the matrix is ;in, is the sampling rate, is the code rate; A baseband data matrix of a code period length L is obtained cyclically; wherein, ; The baseband data matrix of one code cycle length is multiplied by the corresponding matrix of the PRN code time domain data in the tracking phase, and the length is obtained after organization. The one-dimensional complex vector is interpolated so that the length of the vector is , b is the number of sampling points corresponding to the required dynamic range; The interpolated one-dimensional complex vector is transformed by FFT to generate frequency domain data, and the frequency domain data is filtered and then transformed by IFFT to complete the one-dimensional complex vector; The one-dimensional complex vector after IFFT transformation is spaced as The summation operation is performed to obtain the corresponding code phase dynamic range: The corresponding results of the I and Q branches are obtained, and then the correlation value results and the corresponding carrier phase results within the dynamic range are obtained; Get the corresponding index position according to the relevant value results within the dynamic range K ; By utilizing the symmetry of the PRN code correlation value, the five consecutive maximum correlation value results and the code phase coarse value are fitted to obtain the TOA value.

5. The satellite two-way time comparison and demodulation method based on chip compression according to claim 4 is characterized in that: The expression of TOA value is: in, is the correlation value result within the dynamic range, is the coarse value of the code phase.

6. The satellite two-way time comparison and demodulation method based on chip compression according to claim 5, characterized in that: The steps of obtaining the corresponding Time-Tag position according to the TOA value and the code phase information, and then obtaining the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and updating the judgment bit include: When the TOA value difference between adjacent code periods is 1 / 2 of the length of the PRN code, the index position corresponding to the first code period is K is the Time-Tag position; The final TOA value is obtained according to the Time-Tag position, code cycle length and the average TOA value of each cycle; where the final TOA value = Time-Tag position * code cycle length + average TOA value of each cycle; Perform linear fitting on the carrier phase results obtained in each code period, the mean of the fitting results is the carrier phase of the entire period, and the sum of the rate of change of the fitting results and the current carrier frequency value is the latest carrier frequency; The average of the signal-to-noise ratio values ​​corresponding to each code period is the signal-to-noise ratio corresponding to the entire period; Determine whether the signal-to-noise ratio corresponding to the entire cycle is greater than the minimum signal-to-noise ratio for successful capture; If it is greater than the minimum signal-to-noise ratio for successful capture, the tracking phase is entered; if it is less than the minimum signal-to-noise ratio for successful capture, the judgment bit is reset and the capture phase is entered.

7. A satellite two-way time comparison and demodulation system based on chip compression, characterized in that: The system includes: Initialize the configuration module, which is used to obtain configuration information, generate judgment bits, and pre-generate PRN code frequency domain data required in the acquisition phase and PRN code time domain data required in the tracking phase according to the configuration information; The signal acquisition module is used to obtain the original signal data collected by the SDR device in real time, send the original signal data to the signal data buffer, and send the signal position index information and timestamp information corresponding to the original data to the message queue; A signal preprocessing module is used to obtain the signal position index information and timestamp information from the message queue in sequence, obtain the corresponding signal original data in the signal data buffer according to the signal position index information and timestamp information, convert the signal original data into floating point numbers, calculate the power of the signal original data according to the floating point numbers, save the floating point numbers, timestamp information and the power of the signal original data into a shared memory, and judge the capture result according to the judgment bit; The signal capture module is used to obtain the floating point number, timestamp information and power of the original signal data in the shared memory if the capture is unsuccessful, and to perform down-conversion, FFT transformation, complex multiplication and IFFT transformation operations on the floating point number in sequence based on the PRN code frequency domain data to obtain the code parallel search result, and to judge the capture result according to the code parallel search result. If successful, the tracking phase is entered, the judgment bit is reset, and the carrier frequency and code phase coarse values ​​in the code parallel search result are saved and updated to the shared memory; The signal tracking module is used to obtain the carrier frequency and code phase coarse values ​​in the shared memory if the capture is successful, and obtain the corresponding TOA value and code phase information according to the carrier frequency, code phase coarse value and PRN code time domain data; wherein the code phase information includes the correlation value result within the dynamic range and the index position corresponding to the correlation value result within the dynamic range; The result calculation module is used to obtain the corresponding Time-Tag position according to the TOA value and code phase information, so as to obtain the final TOA value, carrier frequency, carrier phase and signal-to-noise ratio, and update the judgment bit.

Images