A cold atom capture device based on transmission stacked atom chips

Abstract

The present invention discloses a cold atom capture device based on a transmission stacked atomic chip, comprising: a transmission stacked atomic chip, a transmission chip fixing frame, a transparent ultra-high vacuum cavity, a chip atomic source and an optical path, wherein the transmission stacked atomic chip is connected to the transmission chip fixing frame; the transparent ultra-high vacuum cavity is connected to the transmission stacked atomic chip; the chip atomic source is connected to the transparent ultra-high vacuum cavity and passes through the side wall of the transparent ultra-high vacuum cavity to enter the interior thereof. By introducing the transmission stacked atomic chip, the present invention can reduce manufacturing costs, improve space utilization, optimize atomic chip energy consumption, and enhance atomic capture efficiency and purity; the present invention has the advantages of high atomic capture and cooling efficiency, high space utilization, low power consumption, low noise, good detection and coupling degree, and high scalability, and provides a more efficient and stable cold atom capture device and method for the operation and testing of atomic chips.

Description

Technical Field

[0001] The present invention belongs to the fields of optical technology and quantum technology, and in particular relates to a cold atom capture device based on transmission-type stacked atomic chips. Background Art

[0002] As quantum technology is booming, cold atoms, as important carriers of quantum bits, are increasingly becoming more important in the fields of quantum computing, quantum simulation, and quantum communication. However, the popular cold atom capture devices on the market currently rely mainly on reflective chips, which capture and manipulate atoms by reflecting light and magnetic fields through the metal or dielectric film on the surface of the chip. Although reflective chips are widely used in the field of quantum technology, they have limitations such as slow operation speed, low atom capture efficiency, and cramped operating space, making it difficult to meet the growing demand for small-size, high-performance quantum systems. In order to address these challenges, it is urgent to explore new on-chip cold atom capture devices.

[0003] The working principle of the transmission chip is to capture and manipulate atoms through the light field that passes through the chip and the magnetic field on the chip surface. This design breaks the limitations of traditional reflective chips. Transmission chips have significant advantages in capturing and manipulating cold atoms. First, its structural design makes the interaction time between atoms and microwave fields shorter, thereby achieving faster atomic manipulation speed. This feature is particularly important in quantum computing and other applications that require high-speed operation. Secondly, the transmission chip has better coupling characteristics between the light field and the microwave field. By precisely controlling the phase of the light field, efficient manipulation of atoms can be achieved. In addition, the transmission chip also provides a more flexible way to manipulate atoms, so that the light field has more control conditions and is no longer limited to reflection conditions. Moreover, another important advantage of the transmission chip is that it is easy to detect. Since the transmission chip can detect the state of cold atoms from both the front and back sides of the chip, it makes it more convenient and efficient in the application of devices with limited space. At the same time, the transmission chip structure can also be easily expanded to multiple atoms, thereby realizing parallel manipulation of multiple atoms. This parallel manipulation capability can significantly improve the scale and efficiency of quantum computing.

[0004] Chip stacking technology is an advanced semiconductor packaging technology that stacks multiple chips or chip layers closely together vertically or horizontally, thereby significantly improving the functional density, computing efficiency and communication speed of the chip. This technology can significantly reduce the physical distance between chips, reduce costs, and is widely used in the fields of computers, communications, consumer electronics, etc., especially in cutting-edge technology fields such as artificial intelligence, the Internet of Things and cloud computing, showing great application potential and value. Transmissive chips are the prerequisite for atomic chip stacking technology.

[0005] With the rapid development of quantum technology, the performance requirements for cold atom capture devices are becoming increasingly higher. Traditional reflective cold atom chip devices can no longer meet the needs of small-size, high-performance quantum systems. Therefore, developing a new type of cold atom capture device based on a stack of transmission chips and atom chips to increase space utilization, improve atom capture efficiency and manipulation speed has become an urgent problem to be solved in the current field of on-chip cold atom capture. Summary of the invention

[0006] The purpose of the present invention is to provide a cold atom capture device based on transmission-type stacked atomic chips in view of the deficiencies in the prior art.

[0007] The objective of the present invention is achieved through the following technical solution: A cold atom capture device based on a transmission-type stacked atom chip, comprising:

[0008] Transmission stacked atomic chips are used to cool and trap atoms to produce ultracold atoms to provide a working source for quantum technology research;

[0009] A transmissive chip holder, used to support and fix the transmissive stacked atomic chip, so as to support and connect external equipment;

[0010] A transparent ultra-high vacuum chamber is used to provide a stable ultra-high vacuum environment for maintaining cold atoms, so as to prevent external atoms from affecting the capture and cooling of cold atoms;

[0011] A chip atom source, used for providing cooling and capturing atoms required for the transmission stacked atom chip; and

[0012] An optical path, used to provide initial light field conditions for trapping and cooling atoms;

[0013] Among them, the transmissive stacked atomic chip is connected to the transmissive chip fixing frame; the transparent ultra-high vacuum cavity is connected to the transmissive stacked atomic chip; the chip atomic source is connected to the transparent ultra-high vacuum cavity and passes through the side wall of the transparent ultra-high vacuum cavity into its interior.

[0014] Furthermore, the transmissive stacked atom chip includes a bottom cold atom capture chip, an upper secondary cooling chip and a transmissive stacked atom chip electrode pin, wherein the bottom cold atom capture chip is connected to the upper secondary cooling chip; the transmissive stacked atom chip electrode pin is connected to the bottom cold atom capture chip.

[0015] Furthermore, the bottom cold atom capture chip includes a bottom chip substrate and a bottom metal pin; wherein, the bottom chip substrate is used to carry the bottom metal pin and is light-transmissive; the bottom metal pins are connected by a metal wire structure, the bottom metal pins and the metal wire structure are sputtered on the bottom chip substrate, and the metal wires between the bottom metal pins form a U-shaped structure or an H-shaped structure; the bottom metal pins are connected to the electrode pins of the transmissive stacked atomic chip.

[0016] Further, the bottom metal pins include bottom metal pin No. 1, bottom metal pin No. 2, bottom metal pin No. 3, bottom metal pin No. 4, bottom metal pin No. 5, bottom metal pin No. 6, bottom metal pin No. 7, bottom metal pin No. 8, bottom metal pin No. 9, bottom metal pin No. 10, bottom metal pin No. 11, bottom metal pin No. 12, bottom metal pin No. 13, bottom metal pin No. 14, bottom metal pin No. 15, bottom metal pin No. 16, bottom metal pin No. 17, bottom metal pin No. 18, bottom metal pin No. 19, bottom metal pin No. 20, bottom metal pin No. 21, bottom metal pin No. 22, bottom metal pin No. 23, bottom metal pin No. 24, bottom metal pin No. 25 and bottom metal pin No. 26, wherein the bottom metal pin No. 3 is connected to the bottom metal pin No. 8, bottom metal pin No. 10, bottom metal pin No. 11, bottom metal pin No. 12, bottom metal pin No. 13, bottom metal pin No. 14, bottom metal pin No. 15, bottom metal pin No. 16, bottom metal pin No. 17, bottom metal pin No. 18, bottom metal pin No. 19, bottom metal pin No. 20, bottom metal pin No. 21, bottom metal pin No. 22, bottom metal pin No. 23, bottom metal pin No. 24, bottom metal pin No. 25 and bottom metal pin No. 26 respectively by the surface metal wire structure. The bottom metal pin No. 12, the bottom metal pin No. 16, the bottom metal pin No. 21 and the bottom metal pin No. 25 form an H-shaped structure; the bottom metal pin No. 5 is connected to the bottom metal pin No. 6 by a surface metal wire structure to form a U-shaped structure; the bottom metal pin No. 18 is connected to the bottom metal pin No. 19 by a surface metal wire structure to form a U-shaped structure; the bottom metal pin No. 1, the bottom metal pin No. 2, the bottom metal pin No. 9, the bottom metal pin No. 10, the bottom metal pin No. 11, the bottom metal pin No. 13, the bottom metal pin No. 14, the bottom metal pin No. 15, the bottom metal pin No. 22, the bottom metal pin No. 23, the bottom metal pin No. 24 and the bottom metal pin No. 26 are connected to the upper secondary cooling chip; the bottom metal pins, the bottom metal pins, the bottom metal pins and the bottom metal pins are extended electrode pins reserved for the bottom cold atom capture chip.

[0017] Furthermore, the material of the bottom chip substrate includes silicon carbide and silicon nitride and has light transmittance; the material of the bottom metal pin is copper.

[0018] Furthermore, the upper secondary cooling chip includes an upper chip substrate and an upper metal pin, wherein the upper chip substrate is used to support the upper metal pin and is light-transmissive; the upper metal pins are interconnected by a metal wire structure, the upper metal pins and the metal wire structure are sputtered on the upper chip substrate, and the metal wires between the upper metal pins form a Z-shaped structure.

[0019] Further, the upper metal pins include upper metal pin No. 1, upper metal pin No. 2, upper metal pin No. 3, upper metal pin No. 4, upper metal pin No. 5, upper metal pin No. 6, upper metal pin No. 7, upper metal pin No. 8, upper metal pin No. 9, upper metal pin No. 10, upper metal pin No. 11 and upper metal pin No. 12, wherein the upper metal pin No. 1 is connected to the upper metal pin No. 7 through a surface metal wire structure to form a Z-shaped structure; the upper metal pin No. 2 is connected to the upper metal pin No. 6 through a surface metal wire structure to form a Z-shaped structure; the upper metal pin No. 8 is connected to the upper metal pin No. 12 through a surface metal wire structure to form a Z-shaped structure; the upper metal pin No. 3, upper metal pin No. 4, upper metal pin No. 5, upper metal pin No. 9, upper metal pin No. 10 and upper metal pin No. 11 are connected to the bottom cold atom capture chip.

[0020] Furthermore, the material of the upper chip substrate includes silicon carbide and silicon nitride and is light-transmissive; the material of the upper metal pin is gold.

[0021] Furthermore, the transmissive chip holder is made of titanium metal;

[0022] The transparent ultra-high vacuum cavity is made of high vacuum resistant quartz glass.

[0023] Furthermore, the optical path includes two optical paths, one optical path passes through the transmission-type stacked atomic chip to enter the transparent ultra-high vacuum cavity, and the other optical path passes through the side wall of the transparent ultra-high vacuum cavity to enter the transparent ultra-high vacuum cavity.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] (1) The present invention comprehensively considers the functions and working requirements of each device and has the characteristics of high scalability and integration: the transmissive stacked atomic chip allows multiple atomic chip layers to be stacked in the vertical direction, thereby significantly expanding the number and density of quantum bits. This stacking technology enables larger-scale quantum systems to be realized, improving the complexity and processing power of quantum computing; in addition, different functional modules can be integrated together through stacking to form a more compact and efficient quantum computing platform.

[0026] (2) The present invention has the advantage of relatively small physical size: the transmissive design allows light or other signals to transmit through the chip, which means that the overall physical size will not increase significantly when the number of stacked layers increases; compared with the traditional planar layout, the stacked layout can make more efficient use of space, making the quantum computing device more compact and lightweight while maintaining high performance.

[0027] (3) The present invention has the advantages of good detection and coupling: the transmissive stacked atomic chips can achieve efficient detection and coupling between different layers through specially designed optical or electromagnetic interfaces. This detection and coupling capability is crucial for achieving key tasks such as quantum entanglement, quantum gate operation and quantum error correction. The present invention can further enhance these capabilities and improve the accuracy and reliability of quantum computing through transmissive chip stacking technology.

[0028] (4) The present invention has the advantages of low power consumption and low noise: the design of the transmissive stacked atomic chip helps to reduce power consumption and reduce noise; by stacking multiple layers in the vertical direction, the need for long-distance signal transmission can be reduced, reducing power consumption; at the same time, by precisely controlling the coupling and isolation between different layers, inter-layer interference and noise can be reduced, thereby improving the stability and consistency of quantum bits. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a schematic diagram of the overall structure of the cold atom capture device based on the transmission-type stacked atom chip of the present invention;

[0030] Figure 2 A physical picture of the cold atom capture device based on the transmission-type stacked atom chip of the present invention;

[0031] Figure 3 Three views of the bottom cold atom capture chip of the transmission stacked atom chip of the present invention;

[0032] Figure 4 The three views of the upper secondary cooling chip of the transmissive stacked atomic chip of the present invention;

[0033] Figure 5 This is a pin numbering diagram of the bottom layer cold atom capture chip of the present invention;

[0034] Figure 6 This is a pin numbering diagram of the upper secondary cooling chip of the present invention.

[0035] In the figure, the transmission stacked atomic chip 1, the bottom cold atom capture chip 11, the bottom metal pin No. 1101, the bottom metal pin No. 2102, the bottom metal pin No. 3103, the bottom metal pin No. 4104, the bottom metal pin No. 5105, the bottom metal pin No. 6106, the bottom metal pin No. 7107, the bottom metal pin No. 8108, the bottom metal pin No. 9109, the bottom metal pin No. 1010, the bottom metal pin No. 1112, the bottom metal pin No. 1113, the bottom metal pin No. 1114, the bottom metal pin No. 1115, the bottom metal pin No. 1116, the bottom metal pin No. 1117, the bottom metal pin No. 1118, the bottom metal pin No. 1119, the bottom metal pin No. 1120, the bottom metal pin No. 1121, the bottom metal pin No. 1122 layer metal pin 1122, bottom layer metal pin No. 22 1123, bottom layer metal pin No. 23 1124, bottom layer metal pin No. 24 1125, bottom layer metal pin No. 25 1126, bottom layer metal pin No. 26 1127, upper secondary cooling chip 12, upper metal pin No. 1201, upper metal pin No. 2 1202, upper metal pin No. 3 1203, upper metal pin No. 4 1204, upper metal pin No. 5 1205, upper metal pin No. 6 1206, upper metal pin No. 7 1207, upper metal pin No. 8 1208, upper metal pin No. 9 1209, upper metal pin No. 10 1210, upper metal pin No. 11 1211, upper metal pin No. 1212, transmission type stacked atomic chip electrode pin 13, transmission type chip fixing frame 2, transparent ultra-high vacuum cavity 3, chip atomic source 4, optical path 5. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical scheme and advantages of the present invention more clear, the present invention is further described in detail in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0037] See also Figure 1 The cold atom capture device based on the transmission stacked atom chip of the present invention specifically comprises a transmission stacked atom chip 1, a transmission chip holder 2, a transparent ultra-high vacuum cavity 3, a chip atom source 4 and an optical path 5. The transmission stacked atom chip 1 is connected to the transmission chip holder 2; the transparent ultra-high vacuum cavity 3 is connected to the transmission stacked atom chip 1; the chip atom source 4 is connected to the transparent ultra-high vacuum cavity 3 and passes through the side wall of the transparent ultra-high vacuum cavity 3 to enter the interior thereof.

[0038] Exemplarily, when the transmissive stacked atomic chip 1 is connected to the transmissive chip fixing frame 2, it can be connected by vacuum glue bonding, and of course it can also be connected by other methods; when the transparent ultra-high vacuum chamber 3 is connected to the transmissive stacked atomic chip 1, it can be connected by silicon-based bonding, and of course it can also be connected by other methods; when the chip atomic source 4 is connected to the transparent ultra-high vacuum chamber 3, it can be connected by indium wire crimping, and of course it can also be connected by other methods.

[0039] In this embodiment, the transmissive stacked atomic chip 1 is used to cool and capture atoms to generate ultracold atoms to provide a working source for quantum technology research; the transmissive chip fixing frame 2 is used to support and fix the transmissive stacked atomic chip 1 to support and connect external equipment; the transparent ultra-high vacuum cavity 3 is used to provide a stable ultra-high vacuum environment for maintaining cold atoms to avoid external atoms affecting the capture and cooling of cold atoms; the chip atomic source 4 is used to provide the atoms required for cooling and capturing the transmissive stacked atomic chip 1; the optical path 5 is used to provide the initial conditions of the light field for the capture and cooling of atoms.

[0040] Furthermore, the transmission stacked atomic chip 1 includes a bottom cold atom capture chip 11, an upper secondary cooling chip 12 and a transmission stacked atomic chip electrode pin 13, as shown in FIG. Figure 1 As shown, the bottom cold atom capture chip 11 is connected to the upper secondary cooling chip 12; and the transmission stacked atom chip electrode pins 13 are connected to the bottom cold atom capture chip 11.

[0041] Exemplarily, when the bottom cold atom capture chip 11 is connected to the upper secondary cooling chip 12, it can be connected by wire bonding, and of course it can also be connected by other methods; when the transmission stacked atomic chip electrode pin 13 is connected to the bottom cold atom capture chip 11, it can be connected by welding, and of course it can also be connected by other methods.

[0042] Furthermore, the bottom cold atom capture chip 11 includes a bottom chip substrate 1128 and a bottom metal pin, wherein the bottom chip substrate 1128 is used to carry the bottom metal pin and is light-transmissive; the bottom metal pins are connected by a metal wire structure, the bottom metal pins and the metal wire structure are sputtered on the bottom chip substrate 1128, and the metal wires between the bottom metal pins form a U-shaped structure or an H-shaped structure, which is used to generate a large gradient magnetic field for capturing and cooling atoms; the bottom metal pins are connected to the transmission type stacked atomic chip electrode pins 13, for example, the bottom metal pins are connected to the transmission type stacked atomic chip electrode pins 13 by welding, and of course they can also be connected by other methods.

[0043] like Figure 5As shown, the bottom metal pins include a first bottom metal pin 1101, a second bottom metal pin 1102, a third bottom metal pin 1103, a fourth bottom metal pin 1104, a fifth bottom metal pin 1105, a sixth bottom metal pin 1106, a seventh bottom metal pin 1107, an eighth bottom metal pin 1108, a ninth bottom metal pin 1109, a tenth bottom metal pin 1110, an eleventh bottom metal pin 1112, a twelveth bottom metal pin 1113, a thirteenth bottom metal pin 1114, and a fourteenth bottom metal pin 1115. The bottom metal pin No. 1115, the bottom metal pin No. 1116, the bottom metal pin No. 1117, the bottom metal pin No. 1118, the bottom metal pin No. 1119, the bottom metal pin No. 1120, the bottom metal pin No. 20 1121, the bottom metal pin No. 1122, the bottom metal pin No. 22 1123, the bottom metal pin No. 23 1124, the bottom metal pin No. 24 1125, the bottom metal pin No. 25 1126 and the bottom metal pin No. 26 1127.Among them, the bottom metal pin No. 3 1103 is connected to the bottom metal pin No. 8 1108, the bottom metal pin No. 12 1113, the bottom metal pin No. 16 1117, the bottom metal pin No. 21 1122 and the bottom metal pin No. 25 1126 by the surface metal wire structure, forming an H-shaped structure; the bottom metal pin No. 5 1105 is connected to the bottom metal pin No. 6 1106 by the surface metal wire structure, forming a U-shaped structure; the bottom metal pin No. 18 1119 is connected to the bottom metal pin No. 19 1120 by the surface metal wire structure, forming a U-shaped structure; the bottom metal pin No. 1 101, the bottom metal pin No. 2 1102, the bottom metal pin No. 9 1109, the bottom metal pin No. 10 1110, the bottom metal pin No. 1112, the bottom metal pin No. 13 1114, the bottom metal pin No. 14 1115, the bottom metal pin No. 15 1116, the bottom metal pin No. 22 112 3. The bottom metal pin No. 23 1124, the bottom metal pin No. 24 1125, and the bottom metal pin No. 26 1127 are connected to the upper secondary cooling chip 12. For example, the bottom metal pin No. 1 101, the bottom metal pin No. 2 1102, the bottom metal pin No. 9 1109, the bottom metal pin No. 10 1110, the bottom metal pin No. 1112, the bottom metal pin No. 1114, the bottom metal pin No. 1115, the bottom metal pin No. 1116, the bottom metal pin No. 22 1123, the bottom metal pin No. 23 1124, the bottom metal pin No. 24 1125, and the bottom metal pin No. 26 1127 are connected to the upper secondary cooling chip 12 by wire bonding; the bottom metal pins 1104, 1107, 1118, and 1121 are extended electrode pins reserved for the bottom cold atom capture chip 11.

[0044] Preferably, the bottom chip substrate 1128 is made of silicon carbide, silicon nitride and other materials, has high light transmittance, and is suitable for experimental requirements such as optical observation and laser irradiation. The bottom metal pin is made of copper, which is suitable for the requirements of large current conduction.

[0045] Furthermore, the upper secondary cooling chip 12 includes an upper chip substrate 1213 and an upper metal pin, wherein the upper chip substrate 1213 is used to support the upper metal pin and is light-transmissive; the upper metal pins are interconnected by a metal wire structure, the upper metal pins and the metal wire structure are sputtered on the upper chip substrate 1213, and the metal wires between the upper metal pins form a Z-shaped structure for generating a large gradient magnetic field for further cooling the atoms.

[0046] like Figure 6As shown, the upper metal pins include an upper metal pin No. 1201, an upper metal pin No. 2 1202, an upper metal pin No. 3 1203, an upper metal pin No. 4 1204, an upper metal pin No. 5 1205, an upper metal pin No. 6 1206, an upper metal pin No. 7 1207, an upper metal pin No. 8 1208, an upper metal pin No. 9 1209, an upper metal pin No. 10 1210, an upper metal pin No. 11 1211 and an upper metal pin No. 1212. Among them, the first upper metal pin 1201 is connected to the seventh upper metal pin 1207 through the surface metal wire structure to form a Z-shaped structure; the second upper metal pin 1202 is connected to the sixth upper metal pin 1206 through the surface metal wire structure to form a Z-shaped structure; the eighth upper metal pin 1208 is connected to the twelfth upper metal pin 1212 through the surface metal wire structure to form a Z-shaped structure; the third upper metal pin 1203, the fourth upper metal pin 1204, the fifth upper metal pin 1216 are connected to the surface metal wire structure to form a Z-shaped structure; The upper metal pin 1205, the ninth upper metal pin 1209, the tenth upper metal pin 1210, and the eleventh upper metal pin 1211 are connected to the bottom cold atom capture chip 11. For example, the third upper metal pin 1203, the fourth upper metal pin 1204, the fifth upper metal pin 1205, the ninth upper metal pin 1209, the tenth upper metal pin 1210, and the eleventh upper metal pin 1211 are connected to the bottom cold atom capture chip 11 through wire bonding.

[0047] Preferably, the upper chip substrate 1213 is made of silicon carbide, silicon nitride and other materials, has high light transmittance, and is suitable for experimental requirements such as optical observation and laser irradiation. The upper metal pin is made of gold, which is suitable for the requirements of large current conduction.

[0048] Furthermore, the transmissive chip holder 2 is made of titanium metal.

[0049] Furthermore, the transparent ultra-high vacuum cavity 3 is made of high vacuum resistant quartz glass.

[0050] Furthermore, the optical path 5 includes two optical paths, one optical path passes through the transmission-type stacked atomic chip 1 and enters the transparent ultra-high vacuum cavity 3 , and the other optical path passes through the side wall of the transparent ultra-high vacuum cavity 3 and enters the transparent ultra-high vacuum cavity 3 .

[0051] The cold atom capture device based on transmission-type stacked atom chips of the present invention will be described in detail below according to the embodiments, and the purpose and effect of the present invention will become more obvious.

[0052] A physical picture of a cold atom capture device based on a transmission stacked atom chip Figure 2As shown, the device is specifically configured with a 62mm×62mm silicon carbide bottom cold atom capture chip CAC-SiC-62 and a 48mm×48mm silicon carbide upper secondary cooling chip CAC-SiC-48. When the device is specifically implemented, Figure 1 As shown, it mainly includes a transmissive stacked atom chip 1, a transmissive chip fixing frame 2, a transparent ultra-high vacuum chamber 3, a chip atom source 4 and an optical path 5. The transmissive stacked atom chip 1 includes a bottom cold atom capture chip 11 (silicon carbide bottom cold atom capture chip CAC-SiC-62) and an upper secondary cooling chip 12 (silicon carbide upper secondary cooling chip CAC-SiC-48).

[0053] When implementing it, Figure 3 As shown, the bottom cold atom capture chip 11 is 62 mm long, 62 mm wide, and 0.5 mm thick; the thickness of all bottom metal pins is about 500 μm. Figure 4 As shown, the upper secondary cooling chip 12 has a length of 48 mm, a width of 48 mm, and a thickness of 0.65 mm; the thickness of all upper metal pins is about 50 microns.

[0054] In the specific implementation, the vacuum degree inside the transparent ultra-high vacuum chamber 3 is maintained at 1.0×10 -8 Pascal below.

[0055] The specific implementation process of the device is as follows:

[0056] (1) Connect the electrode pin 13 of the transmission stacked atomic chip to the power supply to provide a large current for the transmission stacked atomic chip 1, connect the bottom metal pin No. 5 1105 and the bottom metal pin No. 6 1106, input a current of 10A from the bottom metal pin No. 5 1105, and simultaneously connect the bottom metal pin No. 9 1119 and the bottom metal pin No. 19 1120, input a current of 10A from the bottom metal pin No. 19 1120, and ground the bottom metal pin No. 12 1113 and the bottom metal pin No. 25 1126, so that a magnetic field with a large gradient is generated on the surface of the bottom cold atom capture chip 11.

[0057] (2) Turn on the chip atomic source 4 to release atomic vapor.

[0058] (3) The optical path 5 is aligned with the center of the large gradient magnetic field of the transmissive stacked atomic chip 1. The light field passes through the transmissive stacked atomic chip 1 and the transparent ultra-high vacuum cavity 3, and couples with the center of the large gradient magnetic field to generate a magneto-optical trap for capturing atoms, thereby capturing the atoms.

[0059] (4) Turn off the bottom cold atom capture chip 11, and at the same time turn on the upper secondary cooling chip 12, connect the upper metal pin No. 2 1202 and the upper metal pin No. 6 1206, the upper metal pin No. 1212 and the upper metal pin No. 8 1208, and pass a current of 6A respectively, and at the same time connect the upper metal pin No. 1 1201 and the upper metal pin No. 7 1207, and pass a current of 2A, to generate the magnetic field required for evaporative cooling, and further cool the atoms captured in step (3).

[0060] (5) Using detection light and detectors to detect the state of the atoms obtained in step (4) to determine the mass of captured and cooled atoms, and then conduct quantum technology experimental research.

[0061] The above embodiments are only used to illustrate the design ideas and features of the present invention, and their purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. The protection scope of the present invention is not limited to the above embodiments. Therefore, any equivalent changes or modifications made based on the principles and design ideas disclosed by the present invention are within the protection scope of the present invention.

[0062] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A cold atom capture device based on a transmission stacked atom chip, characterized in that: include: Transmission stacked atomic chip (1), used to cool and trap atoms to produce ultracold atoms to provide a working source for quantum technology research; A transmissive chip fixing frame (2) for supporting and fixing the transmissive stacked atomic chip (1) so as to support and connect external equipment; A transparent ultra-high vacuum chamber (3) is used to provide a stable ultra-high vacuum environment for maintaining the cold atoms, so as to prevent external atoms from affecting the capture and cooling of the cold atoms; A chip atom source (4), used for providing atoms required for cooling and capturing the transmission-type stacked atom chip (1); and An optical path (5), used for providing an initial light field condition for trapping and cooling atoms; The transmission type stacked atomic chip (1) is connected to the transmission type chip fixing frame (2); the transparent ultra-high vacuum cavity (3) is connected to the transmission type stacked atomic chip (1); the chip atomic source (4) is connected to the transparent ultra-high vacuum cavity (3) and passes through the side wall of the transparent ultra-high vacuum cavity (3) to enter the interior thereof; The transmission type stacked atom chip (1) comprises a bottom layer cold atom capture chip (11), an upper layer secondary cooling chip (12) and a transmission type stacked atom chip electrode pin (13), wherein the bottom layer cold atom capture chip (11) is connected to the upper layer secondary cooling chip (12); the transmission type stacked atom chip electrode pin (13) is connected to the bottom layer cold atom capture chip (11); The bottom cold atom capture chip (11) comprises a bottom chip substrate (1128) and bottom metal pins; wherein the bottom chip substrate (1128) is used to carry the bottom metal pins and is light-transmissive; the bottom metal pins are connected by a metal wire structure, the bottom metal pins and the metal wire structure are sputtered on the bottom chip substrate (1128), and the metal wires between the bottom metal pins form a U-shaped structure or an H-shaped structure; the bottom metal pins are connected to the transmission-type stacked atom chip electrode pins (13); The upper secondary cooling chip (12) comprises an upper chip substrate (1213) and an upper metal pin, wherein the upper chip substrate (1213) is used to carry the upper metal pin and is light-transmissive; the upper metal pins are interconnected via a metal wire structure, the upper metal pins and the metal wire structure are sputtered on the upper chip substrate (1213), and the metal wires between the upper metal pins form a Z-shaped structure.

2. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The bottom metal pins include bottom metal pin No. 1 (1101), bottom metal pin No. 2 (1102), bottom metal pin No. 3 (1103), bottom metal pin No. 4 (1104), bottom metal pin No. 5 (1105), bottom metal pin No. 6 (1106), bottom metal pin No. 7 (1107), bottom metal pin No. 8 (1108), bottom metal pin No. 9 (1109), bottom metal pin No. 10 (1110), bottom metal pin No. 11 (1112), bottom metal pin No. 12 (1113), bottom metal pin No. 13 (1114), bottom metal pin No. 14 (1115), bottom metal pin No. 15 (1116), bottom metal pin No. 16 (1117), bottom metal pin No. 17 (1118), bottom metal pin No. 18 (1119), bottom metal pin No. 19 (1120), bottom metal pin No. 19 (1121), bottom metal pin No. 19 (1122), bottom metal pin No. 19 (1123), bottom metal pin No. 19 (1124), bottom metal pin No. 19 (1125), bottom metal pin No. 19 (1126), bottom metal pin No. 19 (1127), bottom metal pin No. 19 (1128), bottom metal pin No. 19 (1129), bottom metal pin No. 19 (1130), bottom metal pin No. 19 (114 The bottom metal pin (1103) is connected to the bottom metal pin (1104) of the first embodiment of the present invention, wherein the ... The bottom metal pin No. 108, the bottom metal pin No. 12 (1113), the bottom metal pin No. 16 (1117), the bottom metal pin No. 21 (1122) and the bottom metal pin No. 25 (1126) form an H-shaped structure; the bottom metal pin No. 5 (1105) is connected to the bottom metal pin No. 6 (1106) by a surface metal wire structure to form a U-shaped structure; the bottom metal pin No. 18 (1119) is connected to the bottom metal pin No. 19 (1120) by a surface metal wire structure to form a U-shaped structure; the bottom metal pin No. 1 (1101), the bottom metal pin No. 2 (1102), the bottom metal pin No. 9 (1109), the bottom metal pin No. 10 The bottom metal pin (1110), the eleventh bottom metal pin (1112), the thirteenth bottom metal pin (1114), the fourteenth bottom metal pin (1115), the fifteenth bottom metal pin (1116), the twenty-second bottom metal pin (1123), the twenty-third bottom metal pin (1124), the twenty-fourth bottom metal pin (1125), and the twenty-sixth bottom metal pin (1127) are connected to the upper secondary cooling chip (12); the bottom metal pin (1104), the bottom metal pin (1107), the bottom metal pin (1118), and the bottom metal pin (1121) are extended electrode pins reserved for the bottom cold atom capture chip (11).

3. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The material of the bottom chip substrate (1128) includes silicon carbide and silicon nitride and has light transmittance; the material of the bottom metal pin is copper.

4. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The upper metal pins include an upper metal pin No. 1 (1201), an upper metal pin No. 2 (1202), an upper metal pin No. 3 (1203), an upper metal pin No. 4 (1204), an upper metal pin No. 5 (1205), an upper metal pin No. 6 (1206), an upper metal pin No. 7 (1207), an upper metal pin No. 8 (1208), an upper metal pin No. 9 (1209), an upper metal pin No. 10 (1210), an upper metal pin No. 11 (1211) and an upper metal pin No. 12 (1212), wherein the upper metal pin No. 1 (1201) and the upper metal pin No. 7 (1207) are connected by The surface metal wire structure is connected to form a Z-shaped structure; the second upper metal pin (1202) and the sixth upper metal pin (1206) are connected through the surface metal wire structure to form a Z-shaped structure; the eighth upper metal pin (1208) and the twelfth upper metal pin (1212) are connected through the surface metal wire structure to form a Z-shaped structure; the third upper metal pin (1203), the fourth upper metal pin (1204), the fifth upper metal pin (1205), the ninth upper metal pin (1209), the tenth upper metal pin (1210), and the eleventh upper metal pin (1211) are connected to the bottom cold atom capture chip (11).

5. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The material of the upper chip substrate (1213) includes silicon carbide and silicon nitride and has light transmittance; the material of the upper metal pin is gold.

6. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The transmission type chip fixing frame (2) is made of metal titanium material; The transparent ultra-high vacuum cavity (3) is made of high vacuum resistant quartz glass.

7. The cold atom capture device based on transmission stacked atom chips according to claim 1, characterized in that: The optical path (5) includes two optical paths, one optical path passes through the transmission-type stacked atomic chip (1) and enters the transparent ultra-high vacuum cavity (3), and the other optical path passes through the side wall of the transparent ultra-high vacuum cavity (3) and enters the transparent ultra-high vacuum cavity (3).

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