An electronic device for collecting maternal-fetal physiological electrical signals of a pregnant woman's abdomen and a computer medium

Abstract

The present application provides an electronic device for collecting physiological electrical signals of pregnant women's abdomen and obtaining fetal heart rate information and maternal heart rate information, and a computer medium. The electronic device is composed of a battery management unit circuit, a low-noise power conversion unit circuit, a pre-filtering and protection unit circuit, an amplification and collection conversion unit circuit, a microcontroller unit circuit, a wireless data transmission unit and a data display unit. The computer medium is solidified in the microcontroller unit circuit, which is responsible for controlling the normal operation and data interaction of the device, and suppressing data noise and extracting and displaying heart rate according to the collected data. Through the present application, the physiological electrical signals of pregnant women's abdomen can be collected, and real-time electrical signal curves, maternal heart rate information and fetal heart rate information can be obtained.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of biomedical electronics and the field of fetal monitoring for pregnant women, in particular to an electronic device for collecting maternal-fetal physiological electrical signals on the abdomen of a pregnant woman and a computer medium. BACKGROUND

[0002] The mainstream perinatal fetal monitoring technology at present is the ultrasonic fetal monitoring technology based on the Doppler principle. This technology radiates energy waves to the fetal heart direction through a high-frequency ultrasonic Doppler probe and obtains the fetal heart rate according to the echo signals. Its principle defects make it have the following shortcomings: (1) it is not suitable for long-term monitoring application scenarios (monitoring time ≤ 2H); (2) the signal is easily disturbed and affected by the pregnant woman's body position, abdominal aortic activity; (3) the effect of fetal heart monitoring for obese pregnant women is poor. Collecting abdominal electrical signals of pregnant women for maternal-fetal monitoring is a non-invasive monitoring technology, which can obtain long-term fetal electrocardiogram signals and fetal heart rate, overcoming the above shortcomings. However, the components of the physiological electrical signals on the abdominal surface of a pregnant woman are relatively complex, mainly including the mother's own electrocardiogram signal (MECG), fetal electrocardiogram signal (FECG), uterine electromyogram signal (EHG), abdominal polarization potential, power frequency noise interference, etc. The proportion of the fetal electrocardiogram signal is very small, which makes the useful signal almost submerged in the background noise, making it difficult to extract the fetal heart rate information from the physiological electrical signals on the abdomen of a pregnant woman, limiting the application and development of this technology, and is a problem to be solved.

[0003] SUMMARY

[0004] The present application provides an electronic device for collecting physiological electrical signals on the abdomen of a pregnant woman and obtaining fetal heart rate information and maternal heart rate information, and a computer medium. The present application realizes non-invasive measurement of fetal heart rate and maternal heart rate through synchronous collection of electrical signals of four points on the abdominal surface of a pregnant woman relative to the reference point potential. The reference noise of the device itself is as low as 2uV, the sampling frequency is adjustable from 250SPS to 16KSPS, the collected data is processed and extracted by a microcontroller, and real-time waveform parameter display is performed through a liquid crystal screen and external data transmission is performed through a wireless data interface. The present application can effectively collect the electrical signals on the abdomen of a pregnant woman and suppress the noise signals therein, so as to obtain the maternal electrocardiogram signal and the fetal electrocardiogram signal and further convert them into fetal heart rate and maternal heart rate information.

[0005] The present application can be specifically divided into hardware circuit and computer medium.

[0006] The hardware circuit part of the present application comprises battery management circuit, 1st-4th power conversion unit circuit, pre-filtering and protection unit circuit, amplification and acquisition conversion unit circuit, microcontroller circuit, wireless output transmission unit circuit and data display unit circuit. The system principle block diagram is shown in FIG. 1 The main functions of each unit circuit are described as follows:

[0007] (1) Battery management unit: the battery management circuit is mainly responsible for charging the rechargeable battery in the device and completing the bidirectional conversion of power supply, charging the battery according to the actual use state of the user or converting the energy in the battery and outputting to the system power bus, thereby providing necessary power for the entire system.

[0008] (2) 1st power conversion unit: the 1st power conversion unit is responsible for converting the single power voltage on the system power bus into low-noise positive and negative dual power, thereby supplying power and providing necessary bias potential for the pre-filtering and protection unit and the amplification and acquisition conversion unit in the system.

[0009] (3) 2nd power conversion unit: the 2nd power conversion unit is responsible for converting the power voltage on the system power bus into a stable low-noise voltage that can be accepted by digital controller devices, thereby providing necessary power supply for the digital devices in the amplification and acquisition conversion unit to work normally.

[0010] (4) 3rd / 4th power conversion unit: the 3rd and 4th power conversion units are responsible for converting the power voltage on the system power bus into the necessary power rails for the microcontroller unit, data display unit and wireless data transmission unit to work normally.

[0011] (5) Pre-filtering and protection unit: the main device of this unit is a passive device, which is responsible for removing high-frequency interference, impedance matching, overload protection and anti-static protection for the input multiple electrode signals. In the present device, the pre-filtering and protection unit contains 4 input channels and 1 output channel.

[0012] (6) Amplification and acquisition conversion unit: this unit contains signal conditioning circuit for processing analog signals and analog-to-digital conversion circuit for digitizing and sampling analog signals. This unit has 4 input channels and 1 output channel, which can realize digital quantization and acquisition of the signals of 4 points relative to the reference point potential, while outputting bias drive signals for suppressing motion artifacts and power frequency interference.

[0013] (7) Microcontroller unit: the main device of this unit is a microcontroller, which has a special system control algorithm and signal processing algorithm deployed inside, realizing real-time control of the normal operation of the entire system and real-time operation processing of the acquired signals.

[0014] (8) wireless data transmission unit and data display unit: the wireless data transmission unit is responsible for the output signal of the microcontroller to the user terminal or the host computer for wireless transmission, or receiving the control instruction sent by the user to the microcontroller unit. The main device of the data display unit is the liquid crystal display screen, which receives the real-time control of the microcontroller, so as to display the waveform and parameters of the current channel signal.

[0015] The computer medium part of the present application includes two parts of system control logic algorithm and signal processing algorithm. The system control logic algorithm is used to realize the real-time control of the whole electronic device, including controlling the operation of the battery management circuit, managing the working condition of each unit in the low power consumption condition, controlling the working mode of the amplification and collection unit, receiving data, communicating with the outside world and controlling the screen display content. The main function of the signal processing algorithm is to realize the processing of the physiological electrical signals of the four channels of the pregnant woman's abdomen, including filtering and noise reduction, statistical analysis, etc. The computer medium is solidified on the microcontroller in the microcontroller unit of the hardware part, and the control logic algorithm and the signal processing algorithm realize data interaction and real-time control through shared memory. The algorithm logic diagram in a single collection-processing cycle is shown in FIG. 2 .

[0016] The present application has the following advantages and effects compared with the prior art:

[0017] The present application provides an electronic device for collecting physiological electrical signals of the pregnant woman's abdomen and obtaining fetal heart rate information and maternal heart rate information of the pregnant woman, and a computer medium. The electronic device is composed of a battery management unit circuit, a low-noise power supply conversion unit circuit, a pre-filtering and protection unit circuit, an amplification and collection conversion unit circuit, a microcontroller unit circuit, a wireless data transmission unit and a data display unit. The computer medium is solidified in the microcontroller unit circuit, which is responsible for controlling the normal operation and data interaction of the device. The present application realizes non-invasive measurement of fetal heart rate and maternal heart rate through synchronous collection of electrical signals of four points on the surface of the pregnant woman's abdomen relative to the reference point potential. The reference noise of the device itself is as low as 2uV, the sampling frequency is adjustable from 250SPS to 16KSPS, the collected data is processed and extracted by the microcontroller, and the real-time waveform parameter display is realized through the liquid crystal screen and the external data transmission is realized through the wireless data interface. The present application can effectively collect the electrical signals of the pregnant woman's abdomen and suppress the noise signals therein, so as to obtain the maternal electrocardiogram signal and the fetal electrocardiogram signal and further convert them into fetal heart rate and maternal heart rate information. BRIEF DESCRIPTION OF DRAWINGS

[0018] The drawings described herein are used to provide further understanding of the present application, constitute a part of the present application, and the illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0019] FIG. 1 is the principle block diagram of the circuit system disclosed by the present application;

[0020] FIG. 2 is the algorithm logic block diagram in a single acquisition-processing cycle of the present application;

[0021] FIG. 3 is the power conversion unit circuit structure of the embodiment of the present application;

[0022] FIG. 4 is the pre-filtering and protection unit circuit structure of the embodiment of the present application;

[0023] FIG. 5 is the amplification and acquisition unit circuit structure of the embodiment of the present application;

[0024] FIG. 6 is the control logic algorithm and subprogram of the embodiment of the present application;

[0025] FIG. 7 is the signal processing algorithm and subprogram of the embodiment of the present application;

[0026] FIG. 8 is the second-order IIR digital filter of the embodiment of the present application;

[0027] FIG. 9 is the heart rate extraction process of the embodiment of the present application; DETAILED DESCRIPTION

[0028] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0029] Embodiment:

[0030] The present application collects the physiological electrical signals of the abdomen of a pregnant woman through the hardware circuit of the following principle, and realizes the extraction of the maternal ECG signal and the fetal ECG signal from the collected real-time data through digital signal processing in a certain way, and further converts them into the maternal heart rate and the fetal heart rate.

[0031] The specific implementation of the hardware circuit part of the present application is described as follows.

[0032] (1) The battery management unit circuit is the bus power supply output of the entire device. Its main functions include the following: first, charging management of the rechargeable battery; second, real-time monitoring of the battery voltage and state and transmitting the battery state data through the I2C bus to the MCU; third, overcharge protection of the battery; fourth, over-discharge protection of the battery; and fifth, over-current protection of the battery.2 C interface to the microcontroller unit; three is to supply power for the normal operation of the circuit.

[0033] (2) In order to provide low noise power supply for each electronic component on the circuit, four independent power supply units are configured in the power supply circuit, which are respectively responsible for power supply for the amplification and collection unit, the microcontroller unit and the data display / data transmission unit. Low noise LDO is used for linear voltage stabilization and mutual isolation to reduce the power supply interference between them. The first power supply unit has a circuit structure as shown in FIG. 3 (a), which outputs two low noise power supplies by means of charge pump cooperating with LDO. Preferably, the chip U1 is of model LM27762. The 3.6-4.2V voltage of the bus power supply is converted into two power supplies: +2.5V and -2.5V after being input through the RC filter network composed of R6, C5 and C6, and is output through R1, C2, C3 and R7, C7, C8 respectively. C4 is a bootstrap capacitor for generating negative voltage. R2, R4 and R8, R9 constitute a voltage feedback network to ensure the stability of the voltage value even under heavy load, and the final output of the positive and negative dual power supply voltage meets the following formula:

[0034]

[0035]

[0036] The second power supply unit has a circuit structure as shown in FIG. 3 (b). In order to ensure low output noise of the stabilized power supply, the chip U3 is preferably of model LP5907. The third and fourth power supply units have a circuit structure as shown in FIG. 3 (c). Among them, the first and second power supply units are specially used for power supply for the pre-filtering and protection unit and the amplification and collection unit, the third power supply unit is specially used for power supply for the microcontroller, and the fourth power supply unit is specially used for power supply for the data display unit and the wireless data transmission unit.

[0037] (3) The pre-filtering and protection unit has a circuit structure as shown in FIG. 4 , which mainly consists of resistance-capacitance devices and bidirectional diodes. The RC network composed of R1, R3, C1 and C3 performs differential mode filtering on the input signal, and the RC network composed of R1, R2, R3 and C2 performs common mode filtering on the input signal. D1 and D2 are double diodes, the anode of which is connected to the negative power supply, the first cathode of which is connected to the signal output end, and the second cathode of which is connected to the positive power supply, so as to realize voltage clamping protection and protect the circuit from being broken down by static electricity and inrush current.

[0038] (4)Amplification and acquisition conversion unit is the core unit of the entire device. It amplifies and quantizes the four-channel differential analog signals from the pregnant woman's abdomen electrode, and finally converts them into digital signals and outputs the data through the digital serial interface. At the same time, this unit outputs. Preferably, the core analog-to-digital converter of the circuit uses a chip of type ADS1299-4. The circuit of this part has a circuit structure as shown in FIG. 5 The unit circuit needs 3 power supply rails for power supply, which are +2.5V, -2.5V and 3.3V respectively. Among them, 3.3V is the digital power supply for the analog-to-digital conversion part. The introduction of +2.5V and -2.5V dual power supply instead of single power supply mainly considers configuring the internal programmable gain amplifier output reference point at the same potential point as AGND, so as to realize the amplification of the full differential signal and improve the common mode rejection capability. The reference voltage of the analog-to-digital converter is biased to -2.5V through R5, C12 and C13 to ensure the acquisition of the full differential signal within the full dynamic range. In order to suppress the motion artifact and power frequency interference of the pregnant woman, it is necessary to introduce a bias feedback signal to the surface of the pregnant woman to realize the interference signal cancellation. In this circuit unit, the drive cancellation signal is generated by the internal programmable gain amplifier of ADS1299-4 through the configuration of analog switch, and is output through R4 and C11. In addition, R2, R3, C3 and C9 are responsible for compensating the loop of the amplifier generating the cancellation signal to suppress self-oscillation. The full differential signals of the 4 channels are input through the 9th to 16th pins, and the quantized signals are realized through the SPI interface and the DRDY pin.

[0039] (5) The microcontroller unit is the control core device of the entire device. Its main functions include the following: first, controlling the working state of the amplification and acquisition conversion unit and receiving the quantized four-channel pregnant woman's abdomen electrical signal data in time according to the synchronous conversion signal; second, performing digital signal processing on the collected four-channel data, filtering out the noise and extracting the maternal heart rate and fetal heart rate information; third, controlling the working and reading of the battery management unit through the data interface; fourth, interacting data with the wireless data transmission unit and the data display unit through the universal asynchronous serial communication interface. The microcontroller unit has solidified special control logic algorithms and signal processing algorithms to realize real-time processing and output of the collected signals.

[0040] (6) The wireless data transmission unit supports real-time transmission of the collected signals to the remote end in the form of wireless data transmission; the data display unit is a liquid crystal display with touch function, which supports real-time display of the collected signal waveform by the device locally, or receiving the device working mode configuration instruction sent by the user.

[0041] The computer medium part of the present application mainly includes control logic algorithms and signal processing algorithms, such asFIG. 2 The control logic algorithm controls the normal operation of the device hardware, and the signal processing algorithm is specifically for real-time data processing of the collected signals.

[0042] The control logic algorithm of the present application is described as follows.

[0043] The control logic algorithm in the microcontroller unit mainly includes a system power management subroutine, an external data interaction subroutine, and a signal acquisition control subroutine, as shown in the figure. FIG. 6 The power management subroutine interacts with the power management unit on the hardware through the I 2 C interface to control the charging properties of the current battery and obtain the state of the battery. The external data interaction subroutine is responsible for data interaction with the wireless data transmission unit and the data display unit through the UART interface, respectively, to transmit the collected and processed data or receive control instructions issued by the user to the device. The signal acquisition control subroutine is responsible for data interaction with the amplification and acquisition conversion unit on the hardware to obtain quantized encoded 4-channel maternal abdominal electrical signals at a certain sampling rate and store them in a certain size buffer. In order to ensure the real-time nature of signal acquisition, among the three subroutine blocks under the control logic algorithm, the signal acquisition control subroutine has the highest priority, followed by the external data interaction subroutine, and finally the power management subroutine.

[0044] In order to avoid the influence of buffer conflict on the real-time nature of acquisition during signal processing, the signal acquisition control subroutine uses a double buffer mechanism for data acquisition and processing: this subroutine has two buffers of size N (denoted as buffer A and buffer B). When both buffers are empty, if sampling data arrives, buffer A is filled first. After buffer A is filled, it is sent to the signal processing algorithm for signal processing and feature extraction. During this period, if new data arrives, it is filled into buffer B until buffer B is filled and sent to the signal processing algorithm, then the data is stored in buffer A again, and the cycle continues. Given that the minimum rate of QRS complex is 30bpm, in order to ensure the effectiveness of R-R peak detection in heart rate extraction, the length of a single buffer for a single acquisition channel should be at least

[0045]

[0046] The signal processing algorithm of the present application is described as follows.

[0047] The signal processing algorithm in the microcontroller processes the data stored in the buffer by the control logic algorithm in real time and outputs the electrical signal data curve to be displayed and the maternal and fetal heart rates extracted based on the processed data. Specifically, it can be divided into two parts: a digital filtering subroutine and a heart rate extraction subroutine, as shown in the figure.FIG. 7 as shown.

[0048] The digital filtering sub-function implements filtering on the signal by configuring a notch filter, a high-pass filter and a low-pass filter based on a multi-order IIR digital filter. For a 2-order IIR digital filter, the following applies FIG. 8 The response loop structure is shown. The digital filtering sub-function first implements notch filtering on the signal to filter out the power line frequency interference. According to the power grid standard, the frequency point of the notch filter is configured at 50Hz and 60Hz, the notch frequency band range is ±0.2Hz, and the order is not less than 4. After the notch filter, the signal is subjected to high-pass filtering to suppress baseline drift, and the frequency point of the high-pass filter is configured at 1Hz. A traditional IIR high-pass filter has a high requirement for the floating-point precision of the filter correlation coefficient when achieving good step response and phase stability. When the coefficient precision is insufficient, it will cause serious distortion of the filter output signal and deterioration of the waveform quality. However, improving the precision of the floating-point number (from single-precision floating-point number to double-precision floating-point number) will further increase the amount of calculation and thus prolong the signal processing time. In contrast, the low-pass filter is relatively stable in this regard. Therefore, the high-pass filter is configured in the form of a full-pass filter minus a low-pass filter. According to the Nyquist sampling criterion, the -3dB bandwidth of the collected signal is half of the sampling rate, so the full-pass filter is a low-pass filter with a frequency point configured at 1 / 2f sample . The high-pass filter is actually composed of two low-pass filters, and the frequency point of the low-pass filter as the subtraction number is configured at 1Hz. The order of each of the two low-pass filters is not less than 8. After the high-pass filter suppresses the baseline drift, the signal is filtered for spike peaks, which is achieved by a low-pass filter with a frequency point configured at 120Hz and an order not less than 4. Finally, the signal is sent to a sliding window average filter with a window length of 10 for data curve smoothing processing. The final output is the real-time curve of the processed 4-channel electrical signal.

[0049] The heart rate extraction sub-function extracts the fetal heart rate and maternal heart rate information from the 4-channel electrical signal real-time curve output above. As shown in FIG. 9 The heart rate extraction sub-function first normalizes the signal by mapping the signal to the 0-100 coordinate through the maximum value of the signal. Then, the R-wave position is extracted from the signal by first-order differentiation. Since the signal contains both maternal heart rate and fetal heart rate information, the R-wave extraction will mark the R-wave positions of both the maternal heart rate and the fetal heart rate. Assuming that position N (N >= 4) in a buffer has an R-wave, the amplitude at this position has the following characteristics:

[0050] A N -A N-4≥ 2 and A N -A N+4 ≥ 2 (Formula 4)

[0051] After this step, the total number of R waves contained in the current electrical signal can be extracted. Subsequently, the Kalman filter is used for further processing of the waveform. Since the peak value of the R wave of the fetus has a large difference with the peak value amplitude of the R wave of the mother, this step will filter the fetal R wave in the signal, and output the data waveform of the maternal electrocardiogram more obviously. Subsequently, the R wave extraction is performed again on the signal to obtain the peak position and number of the R wave of the mother. By subtracting the number of R waves obtained twice, the number of R waves of the maternal electrocardiogram and the number of R waves of the fetal electrocardiogram in the current data can be obtained. Subsequently, the heart rate is calculated according to the distribution position interval of the R wave and the sampling rate of the signal. Assuming that the positions of the two adjacent R wave peaks of the mother or the fetus in a data sequence are N1 and N2, respectively, the calculation of the heart rate is carried out by the following formula:

[0052]

[0053] Subsequently, the real-time waveform of the processed four-channel acquisition electrical signal and the maternal heart rate and the fetal heart rate are transmitted to the control logic algorithm by the signal processing algorithm, and the control logic algorithm outputs the related data through the device interface or displays the related data on the screen.

Claims

1. An electronic device for collecting physiological electrical signals from the abdomen of pregnant women, characterized in that: It includes a battery management unit circuit, a low-noise power conversion unit circuit, a pre-filtering and protection unit circuit, an amplification and acquisition conversion unit circuit, a microcontroller unit circuit, a wireless data transmission unit circuit, and a data display circuit unit; The battery management unit circuit has the function of managing the charging and discharging of the rechargeable battery; The low-noise power conversion unit circuit has the function of regulating the battery voltage into multiple low-noise power rails. The pre-filtering and protection unit has the functions of resisting electrostatic shock and suppressing the input signal overamplitude caused by polarization voltage; The amplification and acquisition conversion unit circuit has the function of amplifying and quantizing the weak and low input impedance electrode signals. The microcontroller unit circuit is responsible for the control of the entire device, and internally deploys computer media for system control and electrical signal processing; The wireless data transmission unit circuit and the data display unit circuit are responsible for transmitting the acquired electrical signal waveform and the extracted data to the outside world, and at the same time, receiving the user's working status control command sent to the device. The microcontroller unit circuit has the following characteristics: The microcontroller unit circuit is divided into a control logic algorithm section and a signal processing algorithm section; The control logic algorithm is a control program that enables the entire electronic device to operate normally. It has three subroutine blocks: power management subroutine, external data interaction subroutine, and signal acquisition control subroutine, which are arranged in order of priority from low to high. They are respectively responsible for the charging and discharging management of the device's battery, the human-machine interaction of the device's acquired data, and the real-time control of the data stream of the acquisition loop. The signal acquisition control subroutine in the control logic algorithm has a dual-buffered data storage structure for a single acquisition channel; The signal processing algorithm implements the processing of physiological signals and the extraction of feature parameters, and has two subroutine blocks: a digital filtering subfunction and a heart rate extraction subfunction; The digital filtering sub-function removes power frequency interference, suppresses baseline drift, filters high-frequency interference, and smooths curves in electrical signal data waveforms. The heart rate extraction sub-function extracts maternal and fetal heart rate information from the filtered waveform. The heart rate extraction sub-function process is as follows: First, the data is normalized to unify the amplitude. Then, the total number and position of the R-wave peaks of the fetus and the mother are obtained through a first-order difference method. Then, the total number and position of the R-wave peaks of the mother alone are obtained through a Kalman filter. Finally, the total number and position of the R-wave peaks of the fetus alone are obtained by subtracting the two. Heart rate is calculated based on the distribution and interval of the R waves and the signal sampling rate. Assuming that the positions of two consecutive R wave peaks in a data sequence are N1 and N2 (maternal or fetal), the heart rate is calculated using the following formula:

2. The electronic device for collecting abdominal physiological electrical signals of pregnant women according to claim 1, characterized in that: The low-noise power conversion unit circuit has the following characteristics: The low-noise power conversion unit circuit has three low-noise low-dropout linear regulator (LDO) outputs and one low-noise charge pump regulator output. The charge pump regulated output converts a single power supply input into a low-noise dual power supply output; the three low-noise linear regulator output voltages are respectively connected to the digital power supply terminals of the amplification and acquisition conversion unit circuit, the microcontroller unit circuit, and the wireless data transmission unit circuit; one low-noise charge pump regulated output is connected to the analog power supply terminals of the pre-filtering and protection unit circuit and the amplification and acquisition conversion unit circuit.

3. The electronic device for collecting abdominal physiological electrical signals of pregnant women according to claim 2, characterized in that, It has the following characteristics: The digital filtering sub-functions include a digital notch filter, a high-pass filter, a low-pass filter, and a sliding window averaging filter; The high-pass filter is constructed by subtracting a low-pass filter with a frequency set at 1 Hz from a low-pass filter with a frequency set at half the sampling frequency.

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